a test-centric approach to asic development for mems - mems journal.pdf · asic sourcing in-house...

MÅRTEN VRÅNES DIRECTOR, CONSULTING SERVICES CONSULTING SERVICES GROUP MEMS JOURNAL, INC. C: 707.583.3711 [email protected]

4th Annual MTR Conference| October 2012

A Test-Centric Approach to ASIC Development for MEMS

Outline

  Introduction

  ASIC Development   Alternative Strategies

 SSCs  Stepwise  FPGA

  Summary

MEMS Journal, Inc. | Consulting Services Group | [email protected]

Introduction

  Definition:  ASIC for MEMS = Application Specific Integrated

Circuit for Micro Electro Mechanical Systems   Purpose:

 To convert analog sensor output to the digital real realm and often a real-world value

  Note:  ASIC is not a standard, off-the-shelf IC  Standard ICs for MEMS here referred to as Sensor

Signal Conditioner (SSC)

10010011110011


ASIC/SSC Block Diagram

Source: ZMDI

External Sensor


Introduction | ASIC vs. SSC

ASIC SSC

High Volume, >10M per year X

Low to Medium Volume, < 10M per year X X

Proof-of-concept, customer/investor sampling X

Monolithic or wafer-level packaging X

Size sensitive applications X

Cost sensitive applications X

Special functionality, eg. sensor fusion, proprietary algorithms X

Special application, eg. packaging, harsh environments X

Multiple sensor integration X

Lowest NRE X

Analog output/ uncompensated sensors X


ASIC Sourcing

  In-House  Develop the ASIC using predominantly internal resources   Full control over test

  Integrated Device Manufacturer (IDM)   IDM supplier's ASIC product is based in large part on

proprietary technology such as design tools, IP, packaging, and usually, but not necessarily the process technology

  IDM responsible for production test   Fabless

  Fabless ASIC suppliers rely largely on outside suppliers for their technology

  Test responsibilities can vary


Outline

  Introduction   ASIC Development

  Alternative Strategies  SSCs  Stepwise  FPGA

  Summary


ASIC Development

  Custom Design  Define all litho layers   Tailor functionality, performance, layout and unit cost  High risk and resource intensive development

  Examples: development cost/time, ASIC to MEMS mismatch, IP infringement issues and testability

  IP Block Design  Use pre-existing, proven IP blocks

  Examples: analog sensor interface, uC, NVM, I2C/SPI  Cost depending on block availability and price   Existing blocks are fab dependent   Testability already designed into each block


ASIC Development Cycle

Design

Simulation

Layout Tapeout

Test

Does the ASIC “fit” the MEMS?


Does the ASIC “fit” the MEMS?


Ensuring MEMS / ASIC fit

  Meeting the Design Specification  Design, simulation, know-how and existing IP blocks  MEMS and ASIC tradeoffs

  Minimizing Risk   Seasoned analog designers  Multi-project wafer (MPW) for “proof of concept”  Corner simulations using SPICE and Monte Carlo analysis  Multifunctional design and tapeout reviews

  Test resources should be involved throughout the design process   Strict source control   Re-using existing, proven IP blocks  Design for Test (DFT)


Design for Test | Analog Circuitry


Digitally controlled, analog switches enable monitoring of input and output signals to an analog block.

Design for Test | Analog Circuitry


Digitally controlled, analog switches enable with input test signal. Can be used as self-test and product testing.

Example| ASIC Development

  Sensing   Pressure   Temperature   Voltage   Motion/Acceleration

  Control   Microcontroller   Firmware: State Machine   Sensor Interface (ADC) and

Processing   Oscillators   Timers   Watchdog

  Memory   RAM, ROM & EEPROM

  Inputs   Sensor Inputs   LF Pick-Up Coil   Automatic Gain

Control   Command Decoder

  Outputs   RF Transmitter   315MHz / 434MHz   ASK / FSK Modulation

  Power Management   Battery Management   Low-Power Operation

LV Sensors’ ASIC


Example| ASIC Development

  Design, Integration & Layout   Custom RF and LF | fabless 3rd party   Custom multi-channel sensor interface | in-house   Custom analog sensor conditioning | in-house   Custom (size) NVM |IDM   Standard uC | IDM   Integration & layout | fabless 3rd party   Layout | fabless 3rd party

  Test Related Issues   Test coverage and testability   Design optimized for power, not test. Scan and IDDQ not possible.   Unproven design, very comprehensive automotive characterization

scheme (-40°C to 125°C)   “Is it the MEMS or ASIC” issues


LV Sensors’ TPMS Product

ASIC Development Challenges

  Design & Application   Increasing functionality and complexity   Tiny analog signals   Signal integrity and noise   Integration of multiple sensors   Sensor algorithms and sensor fusion   Environmental factors: light, humidity, mechanical stress etc.   When to tape-out?

  With ASICs becoming more complex, the time to market shrinking and the expected unit cost declining, how can the ASIC design be improved by testing upstream in the product development?


Outline

  Introduction   ASIC Development   Alternative Strategies


  Summary


Alternative Strategies | Overview

  Standard   Use an off-the-shelf SSC   Test existing MEMS   Integrated product

  Stepwise   A step-by-step approach to

ASIC development   Verify ASIC blocks before

taping out the entire chip   FPGA

  Leverage the programmability and versatility of FPGA


Source: National Instruments

NI PXI-7813R RIO FPGA

Alternative Strategies | Standard

  Proof of concept

  Rapid prototyping

  Customer and investor samples

  MEMS characterization

  Performance benchmarking

  Tested and proven development platform

  Use as basis for custom ASIC

  Launch into a standalone product

  Cost, cost and cost

  Feature and functionality limitations

  “Overkill”

  Limited programmability

  Predefined calibration algorithms

  Unpredictable availability

  Fixed layout and form factor

  High-volume limitations

Pros Cons Cons


  Development Platform  Hardware

 Main Development Board  Daughter / Plug-In Boards  Satellite Boards

 Software  Application Development Software  Firmware  Calibration Software (eg. DLL)

Source: ACAM



R&D

Test

Production

Test

Engineering

Test


DLL


  Supplier Provided Calibration DLL   Seamless integration with SSC

  Implemented in firmware, dedicated circuitry, ROM or other   Linking R&D, Engineering and Production testing   DLL with calibration algorithm

  Can be used from a range of programming languages   Eg. C, C++, VB, NI LabView, NI LabWindows/CVI

Supplier Provided Calibration DLL

Test Data, Ref. Data Scaling Factors etc.

INPUTS OUTPUTS

Calibration Coefficients, Calibration Fit, Errors etc.


Example | Calibration DLL

1

2

3

  1. Configure NVM   Calibration Algorithm   Output Sensor

Resolution   Clear Calibration

Coefficients

  2. Collect sensor and reference measurement data

  3. Scale measurement data


Source: ZMDI

Example | Calibration DLL

5

6

  4. Set calibration mask

  5. Call calibration function -  Inputs:

-  # data points -  Calibration coefficients -  Raw sensor data (scaled) -  Ref. data (scaled)

-  Output -  Calculated calibration

coefficients -  Error code

  6. Write calibration coefficients to EEPROM

4


Source: ZMDI

Standard SSC | Example 1

  ZMDI’s ZSSC3026   Low Power 16 Bit Sensor Signal

Conditioner IC   Integrated 18-bit calibration

math DSP   Fully corrected signal at digital

output   Minimize calibration costs through

the one-pass calibration concept   No external trimming components

required   Highly integrated CMOS design   Excellent for low-voltage and

low-power battery applications

Source: ZMDI



  How to use?   Test samples

  MEMS + SSC   Digital raw counts   Test operating range   Multiple temperatures, voltages etc.

  Plug data into development SW   Click and choose calibration

algorithms/coefficients   Optimize calibration points

  Evaluate calibration “fit” and error, calculated automatically by dev. SW

  Calibrate samples and verify real measurement errors

Source: ZMDI



  Si-Ware’s 61111  Development platform for

capacitive MEMS accelerometers and gyros.

  Integrated SSC, SWS1110  Key Features

 1X gyro or accel. interface  High-res ADC  Gyro drive actuation loop  High voltage actuation option  Temperature compensation


Source: Si-Ware


  How to use?  Custom sensor boards

plug directly into the main development board.

 Sensor board can be used as standalone unit for testing on shaker, rate table or other fixture.


Source: Si-Ware

Alternative Strategies | Stepwise

  Analog Sensor Front-End Design  Analog to digital converter (ADC)  OPAMPs  Comparators  Temperature sensor  Bandgap references  Switches  Filters  Clock Scheme


CIC Filter

Source: National Instruments


  Analog Sensor Front-End Tapeout   Multi-project wafer shuttle (MPW)

  Analog Sensor Front-End Test   High pin count package with test

pins available   Analog measurements

  Noise , resolution, range   Use known passives

  Digital simulation/emulation   FPGA test setup   Real measurements   Algorithm development   Application testing


Source: E2V

FPGA Front End

MEMS

Connectors


  FPGA Test Setup  Develop and simulate digital circuitry


Connectors for power, USB programmer, PC etc.

MEMS & FPGA

  Field Programmable Gate Arrays (FPGAs) are programmable semiconductor devices that are based on a matrix configuration with configurable interconnects.

  SRAM based FPGAs can be programmed and reprogrammed many times

  Perfect match for MEMS product development   Main Advantages

  Use of hardware based timing   Simulate ASIC design   Develop and test sensor algorithms   Connect to and test individual ASIC blocks   Aid ASIC design for testability


Source: Xilinx

Alternative Strategies | FPGA

  Factory-integrate analog front-end with an FPGA   Ideal for new product development & testing   Solution for early ramp-up production, <1M   Requires:

 Partnering with an FPGA provider  Xilinx  Alterra   Lattice

 …or the release of a “MEMS FPGA development platform”


Source: Altera


  Endless Possibilities  Low-cost versions

  Integrated products   Low-volume production ramp-up

 Value-added versions  Product development  Multi-sensor input  Proof of concept   Investor / customer samples  Engineering samples


FPGA

Analog Front End

MEMS Sensors

Software Development Platform


  Development Platform Example   FPGA with multiple analog input channels

  Resistive interface   Wheatstone bridge   Voltage/current driven

  Capacitance interface   Gain/offset based interface   Ratiometric based interface   Single-ended sensors   Differential sensors

  …   Use for a multitude of sensors   Sensor integration / fusion   Develop ASIC for high-volume applications


Source: Si-Ware

Outline

  Introduction   ASIC Development   Alternative Strategies


  Summary


Summary

  Limitations with typical ASIC development projects have been presented with a particular focus on test.

  Three distinct strategies have been discussed as alternatives to:  Test upstream in the product development cycle  Leverage existing market offerings & technology  Minimize product development risk  Speed up time to market


Consulting Services

  Strategic Marketing   Developed branding and strategic marketing presentations for

industry-leading ASIC and SSCs solutions.   Competitive Analysis

  Evaluation and industry benchmarking of sensor interface ASIC devices.

  Industry analysis   Developed detailed production test requirements analysis for a

major multinational contactor solutions company.   Whitepapers & Marketing Reports

  Reports on MEMS testing   Whitepapers for leading ASIC and SSCs   Whitepapers for MEMS processing


Contact Information

Mårten Vrånes Director, MEMS Testing and Reliability Consulting Services Group MEMS Journal, Inc. C: 707.583.3711 [email protected]


a test-centric approach to asic development for mems - mems journal.pdf · asic sourcing in-house...

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