a novel probe-card for 8 inch full wafer contact …...probe cards from x16 up to 200mm fwc. •...

A novel probe-card for 8 inch full wafer contact using MLS 2005 South West Test Workshop

June 5 - 8, 2005

Fred MegnaMicronics Japan Co. LTD (Phoenix office)1201 S. Alma School Rd.Suite 7550Mesa, AZ 85210

Tatsuo InoueMicronics Japan Co. LTD (Aomori plant)571-2 Minamida, Oaza-Machii,Hiraka-cho, Minamitsugaru-gun,Aomori 036-0114 Japan

June 2005 SWTW 2005 A novel probe-card for 8 inch full wafer contact using MLS (Inoue/Megna) 2

Outline • Introduction• Background• FWC Probe Card Specifications • Structure• Micro Cantilever• MLS• Multilayer PWB• Evaluation• Future Work• Conclusion• Acknowledgements


Introduction• In Dec. 2004 MJC announced a probe-card for 8 inch full

wafer contact (FWC) (Nikkei Micro-devices News; 02-Dec. ).

– Micro-cantilevers;which make contact withthe LSI wafer bond pad

– MLS (Multi-Layer ceramic/thin-film Substrate);which is the interface between the micro cantilevers and the PWB

– Multi-layer PWB; the main body of the probe-card

• The dominant structure of this probe-card consists of;


Background• LSI memory Reducing TAT

Increasing Density　　　　　　　　1~2 Gbits Memory

Quickly increasing to 8 Gbits

• Product cycle dynamics; requireunscheduled production changes ~1x per quarter.

• Advanced probe cards; delivered in 8 to 16 weeks.

Tape out to silicon of 6 to 8 weeks shortening to 5 weeks

Tape outFirst Silicon

Probe-card?!?!


Background • Highly parallel probe-card

FWC probe-card ; enables outgoing test efficiency

• Requirements for leading edge probe-cards;1. High density contact. 2. Reduced TAT (6 weeks). 3. Highly parallel (FWC is desirable).

Tape outFirst Silicon

Probe-card!!!!!

June 2005 SWTW 2005 A novel probe-card for 8 inch full wafer contact using MLS (Inoue/Megna) 6* Specification may change without notice

1.3g/25µm

15µm□

＜30µm

＜±15µm

＜□200mm

＞60µm×65µm

>=100µm

Specification

5.Tip planarity

6.Tip size

7.Tip force

4.XY accuracy

3.Probe area

2.Pad size

1.Pad pitch

Item

•Spe

cific

atio

n fo

r FW

C P

robe

-car

d

June 2005 SWTW 2005 A novel probe-card for 8 inch full wafer contact using MLS (Inoue/Megna) 7* Specification may change without notice

RT～105℃14.Temperature range

<=400mA 11.Current per probe

<=200MHz12.Frequency

270µm10.MLS to tip Height

<=500K TDs

8.3 or 12mm

＜25µm

<=100µm (FC)

Specification

9.Scrub mark size

8.Over drive

13.Probe depth

15.Contact　Life

Item

•Spe

cific

atio

n fo

r FW

C P

robe

-car

d


Multi-layer PWB

Micro-cantileversMLS

HandleStiffener

Structure • Structure of the FWC probe-card consists of Micro-cantilevers,

MLS and Multi-layer PWB

φ440

φ295

φ295


• MJC’s micro-cantilever is fabricated by photolithography • Reduced size • Consistent, well-balanced performance

• A single row of micro-cantilevers with 100μm pitch is shown bellow

• 80μm pitch is coming soon.

Micro Cantilever


MLS (Multi-Layer ceramic/thin-film Substrate)

PolyimideLayers

• MLS; wiring substrate consists of thin-film metal layers andpolyimide dielectric layers on a co-fired ceramic substrate.

• MLS technology was developed in 1985 by NEC for use in their supercomputers.

• NEC developed more than 20 MLS types based on one standard ceramic substrate. Ceramic TH

φ=0.2mmPitch=1.5mm

Ceramic Substratet=3mm

Metal Pad & GND

Signal & PS Layer

GND Layer

I/O Pad


• MJC is now manufacturing MLS under license of NEC. • Utilizing (5) standard ceramic substrate sizes, we are able to build

probe cards from x16 up to 200mm FWC.• Utilizing standard ceramic sizes results in zero TAT for the ceramic

portion.


Metal Layer 0

Metal Layer 1

Metal Layer 2

Metal Layer 3

Bottom Dielectric Layer

Dielectric Layer 0

Dielectric Layer 1

Dielectric Layer 2

Dielectric Layer 3Metal Layer 4

Ceramic

Thin Film < 100um


(a) Photograph ofSignal Layer (Line width=25μm)

(b) Cross Section ofPolyimide Thin-film Layers

Ceramic Multi-Layer Build-up StandardSubstrate Substrate PCB PCB

Via pitch 0.635 0.1 0.141 0.5Via Pad Dia. 0.381 0.052 0.075 0.35Via hole Dia. 0.203 0.032 0.05 0.15Via Pad to line Clearance 0.254 0.012 0.025 0.15

Line Width 0.127 0.025 0.025 0.07Space Width 0.127 0.025 0.025 0.071mm□ Via Count 1.2 100 50 3

Max Layer Count 22L 9L 8L 40LMask metal glass film(glass) filmsize 220x220mm 225x225mm 250x250mm 500x500mm

thickness max 5mm 100-200um 4.8mm 6.2mm

•• Comparison with other technologiesComparison with other technologies



• MLS Comparison to other technologiesMLS

Build-Up PCB

PCB with Buried Via-Holes100μm 25μm

100μ

m25

μm

25μ

m

25μm

100μm 25μm 25μm

100μ

m25

μm

25μ

m

1.00mm

1.00

mm

80μm

120μm

110μm

0.50mm

100 Via/mm2

50 Via/mm2

3 Via/mm2


12W11W10W9W8W7W6W5W4W3W2W1W

MLC design MLC (Multi-Layer Ceramic) fabrication Shipment

Ass’y, Inspection

Ass’y, Inspection

MLS fabrication

•MLS Reducing total TAT

Shipment

PCB design

PCB fabrication

MLS design

PCB design

PCB fabrication

Stocked ceramic

Reducing TAT !


Multi-layer PWB• Applying MLS techniques to the PWB

– Evolve the PWB to be standard (Test Platform and Device Family)

– Similar to the MLS (ceramic), the PWB has only common patterns and through holes

– Manufacturing each final probe card• Routing for specific devices is achieved in the thin

film layer of the MLS


Evaluation• Life Test

– 0 to 500K TD• Mechanical

– Scrub– Contact force– Peel strength– Joint strength

• Electrical– TDR– Signal Propagation– Contact Resistance


• Z Height vs Touch Downs

Zheig h t vs TD

02468

101214161820

Initial 100k 200k 300k 400k 500kNumber of TDs

Z H

eig

ht (

um

)

Eval

uatio

n (M

echa

nica

l)


Scrub Leng th vs OD

0

5

10

15

20

25

20 40 60 80 100 120 140OD(um)

Length

(um

)

Scrub Dep th vs OD

0.00.10.20.30.40.5

20 40 60 80 100 120 140OD(um)

Depth

(um

)05-Apr-2005

Eval

uatio

n (M

echa

nica

l)


針圧測定結果

0.00

1.00

2 .00

3 .00

4 .00

5 .00

6 .00

7 .000

10

20

30

40

50

60

70

80

90

100

110

120

130

140

150

OD(μm)

針圧

(gf) MAX

MIN

AVE

Contact Force vs ODC

onta

ct F

orce

(g)

OD (um)Eval

uatio

n (M

echa

nica

l)


• Peel Strength of MLSType1; 4mm Polyimide Pad

on Ceramic Substrate

Type2; 4mm Copper Padon Polyimide Layer

Type3; 4mm Copper Padon Ceramic Substrate

Polyimide

Copper Studpull

Ceramic Substrate

Copper Pad

Solder

Storage Conditions ;

No.1 　　–40℃

No.2 　　110℃

No.3 180℃

No.4 0~ 196℃ Cycle

Copper Pad

Evaluation (Mechanical)


Type1:□ 4mm Polyimide Pad on Ceramic Substrate

0. 01. 0

2. 0

3. 0

4. 0

5. 0

6. 0

7. 0

8. 0

9. 0

10. 0

10 100 1000 10000Storing Time（Ｈ）

Uni

t Stre

ngth（

Kgf/

mm2）

-40℃ Storing

110℃ Storing

180℃ Storing

• Peel Strength of MLS

Target Strength0.15Kgf/mm2 = 1.5N/mm2

Eval

uatio

n (M

echa

nica

l)


Type 2; □4mm Copper Pad on Polyimide

0.0

1.0

2.0

3.0

4.0

5.0

6.0

7.0

8.0

9.0

10.0

10 100 1000 10000Storing Time （Ｈ）

Uni

t Stre

ngth（

Kgf/m

m2）

-40℃ Storing

110℃ Storing

180℃ Storing



Eval

uatio

n (M

echa

nica

l)


Type 3; □4mm　Copper Pad on Ceramic Substrate

0.0

1.0

2.0

3.0

4.0

5.0

6.0

7.0

8.0

9.0

10.0

10 100 1000 10000

Storing Time （Ｈ）

Uni

t Stre

ngth

（Kg

f/mm

2）

-40℃ Storing

110℃ Storing

180℃ Storing



Eval

uatio

n (M

echa

nica

l)


Type 1;□ 4mm Polyimide Pad on Ceramic Substrate

0.0

1.0

2.0

3.0

4.0

5.0

6.0

7.0

8.0

9.0

10.0

10 100 1000 10000Cycle (times)

Uni

t Stre

ngth

（Kg

f/mm

2）

0→196℃ Temp Cycle



Eval

uatio

n (M

echa

nica

l)


Type 2; □4mm Copper Pad on Polyimide

0.0

1.0

2.0

3.0

4.0

5.0

6.0

7.0

8.0

9.0

10.0

10 100 1000 10000Cycle (times)

Uni

t Stre

ngth

（Kg

f/mm

2）



Target Strength

0.15Kgf/mm2 = 1.5N/mm2

Eval

uatio

n (M

echa

nica

l)


Type 3; □4mm Copper Pad on Ceramic Substrate

0. 01. 0

2. 0

3. 0

4. 0

5. 0

6. 0

7. 0

8. 0

9. 0

10. 0

10 100 1000 10000Cycle (times)

Uni

t Stre

ngth

（Kg

f/mm

2）




Eval

uatio

n (M

echa

nica

l)


• Joint Strength of Micro-cantilever on SubstrateHeater push

Polyimide

Micro-Cantilever

Ceramic Substrate

Copper Pad


•Electrical CharacteristicSignal propagation characteristics through 100mm MLS signal line

1.3GHz at –3dB decay

Eval

uatio

n (E

lect

rical

)


電流印加連続TD接触抵抗OD=80μm

0

0.5

1

1.5

2

2.5

3

3.5

4

4.5

5

Initial

100

200

300

400

500

600

700

800

clean

TD回数

接触抵抗[Ω

]

Recommended Cleaning Cycle

Contact Resistance vs TD

Eval

uatio

n (E

lect

rical

)


Future Work• Development for high speed and high

frequency signal propagation (>= 500MHz)

• Probe-cards for 12 inch full wafer contact testing


Conclusion• A probe-card for 8 inch-wafer full contact has been

completed and shipped with the structure consisting of; Micro-cantilevers, MLS and PWB.

• These are now being used in high volume manufacturing.• Fine Micro-cantilevers and thin-film processed MLS have

realized more than 6,000 contacts, with 100um pitch on a single probe-card.

• Design and manufacturing of a specialized MLS on a common ceramic substrate, and the combination of a common PWB realizes 6 weeks TAT for a completed probe-card.

• The evaluation results of several advanced probe-cards show excellent reliability and high frequency performance (up to 300MHz).


Acknowledgements • Thanks to Yoshiei Hasegawa, the CEO of MJC for

his outstanding guidance and support of 8inch FWC probe-card development.

• Thanks to Hisatoshi Shirasaka and Shizuo Tsuiki for their long term efforts to establish fundamentals of photolithograph technology.

• Thanks to the members of Aomori Plant, MitakaLab., Ibaraki Technology Lab. and U.S. team for their collaboration to develop 8inch FWC probe-card.

a novel probe-card for 8 inch full wafer contact …...probe cards from x16 up to 200mm fwc. •...

Documents