a novel graphical technique for combinational logic...

13
Research Article A Novel Graphical Technique for Combinational Logic Representation and Optimization Vedhas Pandit 1 and Björn Schuller 1,2 1 Chair of Embedded Intelligence for Health Care and Wellbeing, University of Augsburg, Augsburg, Germany 2 Group on Language, Audio & Music (GLAM), Imperial College London, London, UK Correspondence should be addressed to Vedhas Pandit; [email protected] Received 5 June 2017; Revised 11 October 2017; Accepted 14 November 2017; Published 31 December 2017 Academic Editor: Michele Scarpiniti Copyright © 2017 Vedhas Pandit and Bj¨ orn Schuller. is is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. We present a new technique for defining, analysing, and simplifying digital functions, through hand-calculations, easily demonstrable therefore in the classrooms. It can be extended to represent discrete systems beyond the Boolean logic. e method is graphical in nature and provides complete “implementation-free” description of the logical functions, similar to binary decision diagrams (BDDs) and Karnaugh-maps (K-maps). Transforming a function into the proposed representations (also the inverse) is a very intuitive process, easy enough that a person can hand-calculate these transformations. e algorithmic nature allows for its computing-based implementations. Because the proposed technique effectively transforms a function into a scatter plot, it is possible to represent multiple functions simultaneously. Usability of the method, therefore, is constrained neither by the number of inputs of the function nor by its outputs in theory. is, being a new paradigm, offers a lot of scope for further research. Here, we put forward a few of the strategies invented so far for using the proposed representation for simplifying the logic functions. Finally, we present extensions of the method: one that extends its applicability to multivalued discrete systems beyond Boolean functions and the other that represents the variants in terms of the coordinate system in use. 1. Introduction and Literature Overview Combinational logic optimization is one of the first steps when designing any digital circuit. is practice helps chip designer save on number of transistors, chip area, and helps reduce logic delays and power requirements. It is no surprise therefore that many efforts have been made to develop fully functional, interactive programs for the industry even in the 80s, such as MIS [1] and SOCRATES [2] and the field has only grown ever since with the advent of many companies competing in this domain. In this section, we discuss various logic optimization methods. Advantages and drawbacks associated with each of these popular methods, especially the ones that offer graphical representation of a function or are simple enough for humans to hand-calculate, is the primary focus of this section. In view of the listed advantages and drawbacks, characteristic features of an ideal methodology are then presented. A Karnaugh-map (K-map) [3, 4] is a graphical technique for combinational logic optimization, which offers a very intuitive way to hand-calculate the proposed graphical rep- resentation of a Boolean function and its reduction. Using different colour schemes, multiple output functions involving the same inputs can be represented on a single K-map. However, it is only ideal for a function where the number of inputs is less than five. To represent functions involving more than four variables, one of the proposed implementations splits the graph into subgraphs—each subgraph representing only four variables at a time [5]. Another extension of the K- maps does not require splitting the graph into smaller units to represent functions with more than four variables, but some of the variable inversions can no longer remain adjacent to each other [6]—like in the case of K-maps for four inputs. Hindawi Complexity Volume 2017, Article ID 9696342, 12 pages https://doi.org/10.1155/2017/9696342

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Research ArticleA Novel Graphical Technique for Combinational LogicRepresentation and Optimization

Vedhas Pandit1 and Bjoumlrn Schuller12

1Chair of Embedded Intelligence for Health Care and Wellbeing University of Augsburg Augsburg Germany2Group on Language Audio amp Music (GLAM) Imperial College London London UK

Correspondence should be addressed to Vedhas Pandit vedhasgmailcom

Received 5 June 2017 Revised 11 October 2017 Accepted 14 November 2017 Published 31 December 2017

Academic Editor Michele Scarpiniti

Copyright copy 2017 Vedhas Pandit and Bjorn Schuller This is an open access article distributed under the Creative CommonsAttribution License which permits unrestricted use distribution and reproduction in any medium provided the original work isproperly cited

We present a new technique for defining analysing and simplifying digital functions through hand-calculations easilydemonstrable therefore in the classrooms It can be extended to represent discrete systems beyond the Boolean logic The methodis graphical in nature and provides complete ldquoimplementation-freerdquo description of the logical functions similar to binary decisiondiagrams (BDDs) and Karnaugh-maps (K-maps) Transforming a function into the proposed representations (also the inverse) isa very intuitive process easy enough that a person can hand-calculate these transformations The algorithmic nature allows forits computing-based implementations Because the proposed technique effectively transforms a function into a scatter plot it ispossible to represent multiple functions simultaneously Usability of the method therefore is constrained neither by the number ofinputs of the function nor by its outputs in theory This being a new paradigm offers a lot of scope for further research Here weput forward a few of the strategies invented so far for using the proposed representation for simplifying the logic functions Finallywe present extensions of the method one that extends its applicability to multivalued discrete systems beyond Boolean functionsand the other that represents the variants in terms of the coordinate system in use

1 Introduction and Literature Overview

Combinational logic optimization is one of the first stepswhen designing any digital circuit This practice helps chipdesigner save on number of transistors chip area and helpsreduce logic delays and power requirements It is no surprisetherefore that many efforts have been made to developfully functional interactive programs for the industry evenin the 80s such as MIS [1] and SOCRATES [2] and thefield has only grown ever since with the advent of manycompanies competing in this domain In this section wediscuss various logic optimization methods Advantages anddrawbacks associated with each of these popular methodsespecially the ones that offer graphical representation of afunction or are simple enough for humans to hand-calculateis the primary focus of this section In view of the listed

advantages and drawbacks characteristic features of an idealmethodology are then presented

A Karnaugh-map (K-map) [3 4] is a graphical techniquefor combinational logic optimization which offers a veryintuitive way to hand-calculate the proposed graphical rep-resentation of a Boolean function and its reduction Usingdifferent colour schemesmultiple output functions involvingthe same inputs can be represented on a single K-mapHowever it is only ideal for a function where the number ofinputs is less than five To represent functions involving morethan four variables one of the proposed implementationssplits the graph into subgraphsmdasheach subgraph representingonly four variables at a time [5] Another extension of the K-maps does not require splitting the graph into smaller units torepresent functions with more than four variables but someof the variable inversions can no longer remain adjacent toeach other [6]mdashlike in the case of K-maps for four inputs

HindawiComplexityVolume 2017 Article ID 9696342 12 pageshttpsdoiorg10115520179696342

2 Complexity

A binary decision diagram (BDD) [7ndash10] is also a graphi-cal method that is easy enough to implement and visualiseBDDs are often put to use as a data structure to bothrepresent the Boolean functions and to perform the oper-ations efficiently Unlike K-maps usability of this approachis not constrained by the number of inputs Optimizationis primarily about choosing the correct ordering of inputvariables and about reducing the number of ldquonodesrdquo bymerging equivalent nodes and by removing redundant onesDiagram complexity depends a lot on the ordering of theinput variables and the respectively applied decompositiontype [7 11] and it is not always easy to devise the correct orderbymere visual inspectionThis however to a limited extent isalso a downside of the graphical approaches presented in thispaper As for BDDs moreover one cannot translate a givengraphical representation back to its Boolean expression justby a quick visual skimming throughmdashit is imperative to tracethe entire paths starting from the output nodes back to thefirst input in order

Typed decision graphs (TDGs) [12] offer reduction ofBDDs into a graph with a lot fewer nodes and connectionsThe advantages and drawbacks of the method are thereforemostly similar to those of BDDs including dependence ofthe sizecomplexity of the representation on the orderingof the variables Also closely related to BDDs are graphicaltechniques called ldquoimplicit graph based methodrdquo [13ndash15] andsignal transition graphs (STGs) [16]

The QuinendashMcCluskey algorithm [17ndash19] (or methodof prime implicants) is functionally identical to Karnaughmapping and is a deterministic way to check that theminimalform of a Boolean function has been reached The tabularform makes it more efficient for use in computer algorithmsbut not being graphical it is not as simple or as intuitiveas Karnaugh-maps for use by the designer himselfherselfPetrickrsquos method (the branch-and-bound method) [20] isa technique for determining all minimum sum-of-productssolutions from a prime implicant chart and could be lookedupon as an extension to the QuinendashMcCluskey algorithmThe process gets tedious for a human for a large number ofinputs and does not scale well on computers likewise TheEspresso algorithm [21] uses a radically different approachby applying heuristics manipulating the ldquocubesrdquo represent-ing the product terms in the ON- DC- and OFF-coversiteratively instead of expanding the minterms Recently anew paradigm has been proposed called ldquoMajority-InverterGraphrdquo [22] which is a directed acyclic graph consisting ofthree-input majority nodes and directnegated edges

Keeping classroom education of Boolean functions atthe focus several methodologies [23ndash27] that are mostlynongraphical and can best be demonstrated with systemswith only a limited number of inputs have been proposedin addition to more generalised software implementations[28ndash32] not directly useful for demonstrating the conceptsthrough easy hand-calculations Karnaugh-mapsmdashdue to themethodrsquos graphical naturemdashcontinue to be used as the firstmethod to explain the optimization process in the switchingtheory textbooks [33] still today

In the context of the comparison of the methods noted sofar we propose that the following are the desired characteris-tics of an ideal logic representation methodology

(i) It is not constrained by the number of inputs oroutputs and can in theory handle an infinite numberof inputs and outputs That is to say multiple outputfunctions can be represented simultaneously

(ii) The optimization process should be intuitive ideallyvisual inspection should be enough to establish input-output relationship Or it should be based on aparadigm that is intuitive enough for a human tosimply hand-calculate Graphical methods like K-maps do offer that advantage

(iii) If it is graphical an equivalent numerical methodshould exist which can effectively be used as a datastructure to optimally represent combinational logicthrough conventional programming

(iv) Translating a Boolean equation into the graphicalrepresentation (or vice versa) is a simple process

(v) Ordering of variables should play no role in thecomplexity of the representation

The proposed technique satisfies all of the desired character-istics listed except the very last one Ordering of variablescontributes to the ease with which a human can optimize afunction without using any computing resources

2 Definitions

(i) The logical operatorssymbols ldquonotrdquo ldquo+rdquo ldquosdotrdquo ldquooplusrdquo andldquo⊙rdquo denote the logical negation OR AND XOR andXNOR operations respectively

(ii) The symbols ldquoprodrdquo and ldquosumrdquo denote the logical ANDand OR operations of the variables in iterationrespectively

(iii) 1198860 1198861 1198862 119886119894 119886119899 is a set of inputs to thecombinational logic block under consideration

(iv) 120601 denotes an empty set(v) SOP = sum of products(vi) POS = product of sums

3 Proposed Technique (Pandit-Plot)

Every Boolean equation is represented by a scatter plot in twodimensions In effect in its simplest version correspondingto four quadrants four Boolean expressions can simulta-neously be represented and optimized on a single planeBy using different markers one for each function multiplelogic functions may be represented in a single plane andsubsequently reduced

31 Coordinate System and Input Correspondence Everyinteger coordinate ldquo119901rdquo corresponds to an input combination1198861198941 1198861198942 119886119894119898 such that

10038161003816100381610038161199011003816100381610038161003816 =119898sum119896=1

2119894119896 (119901 isin Z 119894119896 isin N) (1)

Complexity 3

Y

X

a2a1a0 7

a2a1 6

a2a0 5

a2 4

a1a0 3

a1 2

a0 1

(0 0) 7a2a1a0

6a2a1

5a2a0

4a2

3a1a0

2a1

1a0

Figure 1 Pandit-Plot (for 119899 = 3) with redundant data-points

One axis (say 119909-axis) represents a condition where thedesignated inputs are all True (T) (also called High (H) orlogic level 1) while the other represents a case where thoseinputs are all False (F) (also called Low (L) or logic level0) There is therefore a one-to-one correspondence betweenthe set of all of combinations of the inputs and the set ofpoints on the plane with integer coordinates With sucha representation system in place every point on the plotwith integer coordinates signifies a single product (in a SOPrepresentation) or a single sum (in a POS representation) Asan example for a system with three inputs (1198860 1198861 and 1198862)the template of the plot that is restricted to the first quadrant(119901 ge 0) will be as shown in Figure 1

Throughout the discussion henceforth we only considerthe template in the first quadrant The templates in fourquadrants are symmetric to each other with 119909- and 119910-axesand the ldquo119909 = 119910rdquo and ldquo119909 = minus119910rdquo lines as the axes of symmetryWeobserve that in the scatter plot fromFigure 1 certain data-points have been marked distinctively using the filled circlesThese will be called ldquoredundantrdquo input combinationsmdashfor thereasons that will be explained in Section 33

32 Representing an Input Combination Representation ofthe combinational function ldquo119891rdquo in graphical form may bedone for ldquo119891rdquo either in POS or in SOP form the choice lieswith the logic designeruser of the plot

To represent a function in SOP form every constituentproduct term is separated into two products one containingexclusively the direct inputs and the other only the negatedinputs The overall product is represented by a point (119909 119910)where for example the 119909-coordinate corresponds to theset of input combinations coming only from the directinputs while the 119910-coordinate corresponds to the set of inputcombinations from only the negated inputs using (1) Theabsence of inputs implies that the corresponding coordinateis 0

a2a1a0 7

a2a1 6

a2a0 5

a2 4

a1a0 3

a1 2

a0 1

(0 0) 7a2a1a0

6a2a1

5a2a0

4a2

3a1a0

2a1

1a0

Figure 2 Pandit-Plot for 119891 = 11988601198861 + 1198860not11988611198862

As an example let us consider the following sum ofproducts

119891 = 11988601198861 + 1198860not11988611198862 (2)

represented by points (3 0) and (5 2) shown in Figure 2

(i) For the first product ldquo11988601198861rdquo to be True both 1198860 and 1198861need to be True Therefore the 119909-coordinate = 20 +21 = 3 as per (1) Because there are no negated inputsin the first product no 119886119896 needs to be False for 119891 tobe TrueTherefore the 119910-coordinate is 0The productldquo11988601198861rdquo is therefore represented by point (3 0)

(ii) Similarly for the product ldquo1198860not11988611198862rdquo to be True both1198860 and 1198862 need to be TrueTherefore the 119909-coordinate= 20 + 22 = 5 as per (1) Also 1198861 needs to be Falsefor function119891 to be TrueTherefore the 119910-coordinate= 21 = 2 The product ldquo1198860not11988611198862rdquo is thereforerepresented by point (5 2)

Points (3 0) and (5 2) will be called ldquodata-pointsrdquo as theysummarise the function by transforming it into numericaldata corresponding to the chosen coordinate system

Similarly for a POS-based representation we look forFalse (0FL) logic outputs to mark the points transformingevery sum in the expression

Every Boolean function can therefore be representedby only two parameters alone in this way namely thecoordinates of the representative points irrespective of thenumber of inputs This is a huge data compression in itselfwhere instead of storing the entire truth table or even allof the combinations for which the output is either T or F(whichever count is less) we can simply represent a functionwith a few data-points The system can further be optimizedto remove extraneous information as will be explained inSections 33 35 and 36

4 Complexity

(1) procedure GENERATE1(119899) ⊳ 119899 = number of inputs(2) 119877119890119889119906119899119889119886119899119905119878119890119905 = 120601(3) for 119909 larr 0 2119899 minus 1 do ⊳ Represents direct inputs(4) for 119910 larr 0 2119899 minus 1 do ⊳ Represents negated inputs(5) 119909119887119894119899119886119903119910 larr (119909)2(6) 119910119887119894119899119886119903119910 larr (119910)2(7) 119863 larr 119890119897119890119898119890119899119905119908119894119904119890(119909119887119894119899119886119903119910 and 119910119887119894119899119886119903119910)(8) if 119886119899119910(119863) = 1 then(9) 119877119890119889119906119899119889119886119899119905119878119890119905 = 119877119890119889119906119899119889119886119899119905119878119890119905 cup (119909 119910)(10) end if(11) end for(12) end for(13) end procedure

Algorithm 1 Redundant set generation for Pandit-Plot

33 Existence of Redundant Data-Points It can easily beobserved that there exist points on the plot with integercoordinates that correspond to a Boolean product or aBoolean sum that can never occur in a reduced SOP or areduced POS expression respectively

As an example point (1 1) corresponds to the (1198860not1198860)product in SOP which evaluates to 0F and the samepoint corresponds to the (1198860 + not1198860) sum in POS whichevaluates to 1T These input combinations do not haveany effect on the final expression evaluation as the outputcorresponding to these input combinations is preknown andtherefore redundant to be included as part of any Booleanexpression (eg 119891 + 1198860not1198860 = 119891) We therefore discardsuch input cases and term these as ldquoredundant pointsrdquo inthe discussions below while the rest will be called ldquovalidrdquopoints except the origin which falls into neither of the twocategories representing simply the trivial case of the outputbeing independent of the inputs

34 Generation of the Template To translate any logic func-tion to this plot the first step is to build the necessary templateor the canvas with all the input redundancies indicated(Figure 1) Such a template may be generated by exploitingpatterns for which the redundancies appear (Algorithm 1)

For example we note the following for a system with 119899inputs

(i) The 119909- and 119910-axes extend from 0 to 2119899 minus 1(ii) The points on the line 119909 = 119910 are redundant points(iii) All of the upper diagonal elements are redundant

points(iv) Redundant points because of the 1198860 inputrsquos logic level

extend along both the 119909 and 119910 directions skippingevery other point that is skipping the odd integercoordinates The redundant points associated with 1198860input are therefore of the form (2119894 + 1 2119895 + 1) where119894 119895 are integers

(v) Alternatively the template may be generated usingcellular automata rules on a brick-wall-like automatatemplate as devised in Figure 3 (in contrast to the

RulePattern

PatternRule

Xminus 1 y X Y minus 1

X Y

X minus 1 Y X Y minus 1

X Y

X minus 1 YX Y minus 1

X Y

X minus 1 Y X Y minus 1

X Y

00

10 0120 11 12

30 21 12 03

40 31 22 13 04

50 41 32 23 14 05

60 51 42 33 24 15 06

07162543 34526170

80 71 62 53 44 35 26 17 08

Figure 3 Template generation from 2 different kinds of rulessignifying its relation to the Sierpinski trianglefractals and thecellular automata

typical cellular automata template as used inConwayrsquosgame of life [34 35]mdashwhere the borders of the indi-vidual cells coincide) This gives rise to the Sierpinskitriangle [36 37] pattern as desired The captions forthe individual blocks indicate the (119909 119910) coordinatesof the points that the blocks represent

35 Logic Laws The logic optimization process is visualintuitive and simplemdashjust as for Karnaugh-maps It mayalternatively be easily implemented using a computer pro-gram by understanding the strategies in place numericallyThe basic idea of optimization is to get rid of excess of

Complexity 5

information by inspecting the scatter plot and bring the data-points as close to the axes as possibleThere exist patterns thatneed to be utilised to effectively carry out this ldquoreductionrdquoThese patterns need to be formulated into a compilation ofldquologic lawsrdquo A few examples of a logic law or an optimizationstrategy follow

Theorem 1 (radic2-integer-multiple hypotenuse rule) If two ofthe data-points are vertices of an upright right angled isoscelestriangle with its equal sides having length = 2119896 (119896 isin N) andif the third vertex is not to the right of any of those two data-points then the two data-points could effectively be representedby that third vertex alone so long as the third vertex is not aredundant point

Proof Let data-points be 119860(1199091 1199101) and 119861(1199092 1199102) such that1199091 gt 1199092 and 1199101 lt 1199102 and (1199091 minus 1199092) = (1199102 minus 1199101) = 2119896 119896 isin Nwithout loss of generalisation

Because none of the three points119860(1199091 1199101)119861(1199092 1199102) and119862(1199092 1199101) is a redundant point and because 1199091 + 2119896 = 1199092 itfollows that

1199091 = sum119894=ind(1199091)

2119894 = 2119896 + sum119894=ind(1199092)

2119894 (3)

where ind(119901) is set of suffixes corresponding to inputsassociated with coordinate ldquo119901rdquo

Similarly it follows that

1199102 = sum119894=ind(1199102)

2119894 = 2119896 + sum119894=ind(1199101)

2119894 (4)

Therefore the point 119861(1199092 1199102) represents both the directand negated inputs corresponding to the point 119862(1199091 1199102)along with the input not119886119896 Similarly the point 119860(1199091 1199101)represents both the direct and negated inputs correspondingto the point 119862(1199091 1199102) along with the input 119886119896 The twopoints 119860 and 119861 therefore effectively represent the inputscorresponding to the point 119862 and in addition either thedirect or the negated version of the input 119886119896

Therefore in SOP form

119891 fl 119891119860 + 119891119861 = (119886119896) 119891119862 + (not119886119896) 119891119862 = 119891119862 (5)

and in POS form

119891 fl 119891119860119891119861 = (119886119896 + 119891119862) (not119886119896 + 119891119862) = 119891119862 (6)

where 119891119866 fl function associated with point 119866Thus as per (5) and (6) this rule is simply amanifestation

of the two well-known equalities (1) 119875(119902) + 119875(not119902) = 119875and (2) (119878 + 119902)(119878 + not119902) = 119878 for the template we presentheremdashwhere 119875 and 119878 are respectively the product terms andthe summation terms consisting of variables excluding 119902

As an illustration if the plot in Figure 4 represents aBoolean function 119891 in SOP form with the points 119860 and 119861 asits ldquodata-pointsrdquo then per the definitions earlier

119891 = 1198860not11988611198862 + 1198860not1198861not1198862 (7)

(0 0)

a2a1a0

a2a1

a2a0

a2

a1a0

a1

a0

B

AC

7

6

5

4

3

2

1

7654321a2a1a0a2a1a2a0a2a1a0a1a0

Figure 4 Diagonal optimization for SOP

This is because point 119860(5 2) translates to ldquo1198860not11988611198862rdquo whilepoint 119861(1 6) represents ldquo1198860not1198861not1198862rdquo

Per the law proposed points 119860 and 119861 are representedtogether by point119862(1 2) alone since the right angled triangle119860119861119862 is an isosceles triangle with its congruent sides havinglength 2119896 119896 isin N(119897(119862119860) = 119897(119862119861) = 4)

We find here that the hypothesis is true since

119891 = 1198860not11988611198862 + 1198860not1198861not1198862 = (1198860not1198861) (1198862 + not1198862)= 1198860not1198861 997904rArr 119862 (1 2) (8)

If the scatter plot in Figure 4 were to correspond to a POSrepresentation then the plot would have been represented as

119891 = (1198860 + not1198861 + 1198862) (1198860 + not1198861 + not1198862) (9)

Effectively

119891 = (1198860 + not1198861) + (1198860 + not1198861) (1198862 + not1198862) + (1198862) (not1198862)= (1198860 + not1198861) 997904rArr 119862 (1 2) (10)

In either case points 119860(5 2) and 119861(1 6) are togetherrepresented by 119862(1 2) aloneTheorem 2 (symmetry about ldquo119909 = 119910rdquo line) Two ldquovalidrdquopoints symmetric about the ldquo119909 = 119910rdquo line in an SOP plot canbe effectively represented by a newly defined logical operationrepresented by operator ⋆ where119886119894 ⋆ 119886119895 = (prod119886119894) sdot (prodnot119886119895) + (prodnot119886119894) sdot (prod119886119895)

such that 119886119894 cap 119886119895 = 120601 (11)

6 Complexity

Two ldquovalidrdquo points symmetric about the ldquo119909 = 119910rdquo line in a POSplot can be effectively represented by a newly defined logicaloperation represented by operator ⋆ where119886119894 ⋆ 119886119895 = (sum119886119894 +sumnot119886119895) sdot (sumnot119886119894 +sum119886119895)

such that 119886119894 cap 119886119895 = 120601 (12)

Proof Two points symmetric about the ldquo119909 = 119910rdquo line will beof the forms 119860(1199090 1199100) and 119861(1199100 1199090) It follows that the setof direct inputs corresponding to the point 119860 (fl 119886119894) is thesame as the set of negated inputs that are represented by point119861 and vice versa (fl 119886119895)

Because points 119860 and 119861 are not redundant points itfollows that 119886119894 cap 119886119895 = 120601

Therefore for SOP

∵ 119891119860 = (prod119886119894) sdot (prodnot119886119895) there4 119891119861 = (prodnot119886119894) sdot (prod119886119895)

such that 119886119894 cap 119886119895 = 120601dArr

119891 = 119891119860 + 119865119861= (prod119886119894) sdot (prodnot119886119895) + (prodnot119886119894) sdot (prod119886119895)

(13)

Similarly for POS

∵ 119891119860 = (sum119886119894 +sumnot119886119895) there4 119891119861 = (sumnot119886119894 +sum119886119895)

such that 119886119894 cap 119886119895 = 120601dArr

119891 = 119891119860 sdot 119865119861 = (sum119886119894 +sumnot119886119895) sdot (sumnot119886119894 +sum119886119895)

(14)

For a system with just two inputs the ldquo⋆rdquo operator repre-sents simply an ldquoXORrdquo (oplus) operation while the ldquo⋆rdquo operatorrepresents an ldquoXNORrdquo (⊙) operation The ldquoNAND-onlyrdquoimplementation of ldquo⋆⋆rdquo operation is shown in Figure 5Thisnewly defined logic gate can then be optimized for given fan-in and fan-out values as necessary to be used as a buildingblock in the subsequent logic design

36 Process of Optimization While there is much scopefor further research in this area for effective algorithmdevelopment in terms of logic optimization including theones targeted to novel topologies such as the ones involvingIMPLY (not119860+119861) gates alone for example (instead of SOPPOSforms presented here effectively implemented using ldquoNANDalonerdquo and ldquoNOR alonerdquo topologies resp) one of the mostlikely logic flows for such optimization is presented next

Steps involved in this example algorithm are as follows

ai0 ai1 ai aj0 aj1 ajn

ajai

ai aj ai aj⋆ ⋆

Figure 5 ldquoNAND-onlyrdquo implementation of the newly definedlogical operations ldquo⋆ and ⋆rdquo that are essentially oplus (XOR) and ⊙(XNOR) operations respectively for a two-input system

(i) ldquoGeneraterdquo the template and plot the function(ii) ldquoExpandrdquo the expression to include every possible

product in SOP form (every possible sum for a POSform)

(iii) ldquoReducerdquo the expression using logic laws(iv) ldquoRepeatrdquo the above two steps in iteration until no

further reduction is possible as illustrated in Figure 6

As an example let 119891 = (not1198861 + 119886011988611198862) and let the represen-tation form chosen be SOP-based as well 119891 ultimately getsreduced to 119891 = not1198861 + 11988601198862 as shown in Figure 6

(1) Generate plot the product terms (Figure 6(a))(2) Expand plot points relevant to each of the current

data-points (Figure 6(b)) Here not1198861 is expanded toinclude points wherever not1198861 = 1 997904rArr 119891 = 1

(3) Reduce reduce the expression using logic laws If anew data-point replacing one or some of the originaldata-points is obtained through this process and ifthis data point cannot be further reduced then it isnoted and kept for the next iteration (We note anexample of such data-point with a label ldquoNEWrdquo inFigure 6(c))

(4) Repeat repeat steps (2) and (3) until no new replace-ment data-point closer to the origin can be obtained(Figure 6(d))

Similar to the Karnaugh-maps the ldquodo not carerdquo inputcombinations could be exploited for logic reduction [3 38]

Complexity 7

(0 0)

a2a1a0

a2a1

a2a0

a2

a1a0

a1

a0

7

6

5

4

3

2

1

7654321a2a1a0a2a1a2a0a2a1a0a1a0

(a) ldquoGeneraterdquo step illustrated for 119891 = (not1198861) + (1198860)(1198861)(1198862)

a2a1a0

a2a1

a2a0

a2

a1a0

a1

a0

7

6

5

4

3

2

1

(0 0) 7654321a2a1a0a2a1a2a0a2a1a0a1a0

(b) ldquoExpandrdquo step illustrated for the product ldquo(not1198861)rdquo

a2a1a0

a2a1

a2a0

a2

a1a0

a1

a0

7

6

5

4

3

2

1

(0 0) 7654321a2a1a0a2a1a2a0a2a1a0a1a0

NEW

(c) ldquoReductionrdquo using the ldquoradic2-integer-multiple hypotenuse rulerdquo

a2a1a0

a2a1

a2a0

a2

a1a0

a1

a0

7

6

5

4

3

2

1

(0 0) 7654321a2a1a0a2a1a2a0a2a1a0a1a0

(d) The final optimized expression 119891 = (not1198861) + (1198860)(1198862)

Figure 6 Process of optimization the steps in order are illustrated

37 As a Data Structure Because the individual Booleanterms are represented by only two coordinates (irrespectiveof the number of inputs) any combinational logic may berepresented by two parameters alone This can be viewedas a conversion of a graphical scheme to an equivalentnongraphical numerical scheme to be handled by computingsystems efficiently The two coordinates may be stored in thememory as a single unit

Because one can represent any logic expression througha set of coordinates alone we now investigate the numberof bits required to store each of the numbered coordinatesWhile a proposed template for 119899 inputs consists of 4119899 points(including the origin) the number of valid coordinates is only

3119899 minus 1 This is because a variable can manifest itself in aninput combination in its original form (119886119896) or as a negatedversion (not119886119896) or it could simply be absent Thus there arethree possibilities for every input 119886119896 The number of validpoints is therefore 3119899 minus 1 (excluding the origin indicativeof a trivial case where the output is independent of all of theinputs under consideration) Both the total number of points(120591 = 4119899 minus 1) in a template and the number of valid points(120592 = 3119899 minus 1) grow exponentially with 119899 The ratio of thenumber of bits thus required (with and without consideringthe redundant points) = ceil(log2(3119899 minus 1))ceil(log2(4119899 minus 1))which varies between 075 and 085 and eventually convergesto 08 for large 119899 As an example for 119899 = 3 120592 = 26 and

8 Complexity

120591 = 63 while for 119899 = 6 120592 = 728 and 120591 = 4095 Memorysavings thus grow with 119899 if we effectively take into accountthe redundancies in the template

However in comparison to K-maps (= 2119899 cells for an 119899-input system) our proposed method requires a much highernumber of points (= 3119899minus1 if we consider only the valid inputcombinations excluding the origin) This is because the K-maps do not take into account all of the input combinationsbut only the ones where each of the inputs manifests itselfby its presence in its original or in its negated form (thus 2119899possibilities) In the proposed method we explicitly take intoaccount also the reduced input combinations where some ofthe inputs are absent

38 Possible Extensions and Further Research Scope

(i) Beyond SOPPOS paradigms more patterns and theresulting optimization strategies need to be investi-gated in different logic gate methodologies for exam-ple SOP (ldquoAND-ORrdquo which is ldquoNAND-onlyrdquo) POS(ldquoOR-ANDrdquo which is ldquoNOR-onlyrdquo) and ldquoIMPLY-onlyrdquo realisations

(ii) Multilevel logic the concept could be extended tothree dimensions to represent a ternary logic systemwhere both inputs and outputs can have three possiblelogic levels (0 1 2) The resulting representation isthus in the form of a ldquologic latticerdquo instead ofthe two-dimensional grid presented here where thethird dimension would serve a dual purpose Firstit represents a condition where all the inputs arelogical level ldquo2rdquo (just as 119885 and 119884 represented statesldquo1rdquo and ldquo0rdquo resp) Secondly the 119911-axis may alsorepresent an output logic level within such a ldquologicslicerdquo As an example output level-1 may correspondto a point with integer (119883 119884 119885) coordinates level-0may correspond to a point just beneath this point andlevel-2 just above (Figure 7)

(iii) Alternate coordinate systems every data-point sym-bolises a huge degree of information but with onlytwo or three parameters (coordinates) Because thisinformation need not necessarily come about usinga Cartesian coordinate system alone one can chooseto alternatively employ some other coordinate systemand look for patterns and laws for optimizationwithinsuch schemes For example a 2D polar system maybe used where the (119909 119910) to (119903 120579) transformation isgoverned by the equations 119903 = 119909 120579 = 2120587119910(2119899 minus 1)and 119909 119910 isin [0 2119899 minus 1] Note that 120579 remains in therange [0 2120587] irrespective of the number of inputs(Figure 8)The logic laws for such alternate coordinatesystemsmdashwhere every coordinate of interest120595 followsthe equation120595 = 119891(sum119898119896=1 2119894119896) 119894119896 isin Nmdashcan be devisedby recognising the inherent patterns which remainsan open problem with further scope for research

39 Implications to Other Fields of Study One can use thetemplate to establish three algebraic equalities as will bediscussed in detail in this section The method in general

z-axis

x-axisy-axis

(inputs = 2)

(inputs = 0)(inputs = 1)

Δz lt 1

z = z0planez = z0

+ dzplane

(x0 y

0 z0 + Δz)

(x0 y

0 z0 minus Δz)

(x0 y

0 z0 )

z = z minusdz

plane= 2

Output

= 1

Output

= 0

Output

Figure 7 Ternary logic representation (1199090 1199100 1199110 isin N) The point(1199090 1199100 1199110plusmnΔ119911 or 1199110) represents the input condition where all inputscorresponding to 119909-coordinate = 1 all inputs corresponding to 119910-coordinate = 0 and all inputs corresponding to 119911-coordinate = 2

Figure 8 Cartesian (119909 119910) coordinate system converted into polar(119903 120579) system where 119903 = 119909 120579 = 2120587119910(2119899 minus 1) and 119909 119910 isin [0 2119899 minus 1]Filled circles indicate the ldquoredundant pointsrdquo

is useful for alternative representation and processing ofdata whenever there is representation of information (ieencoding or decoding) in the form of distinct or discretestates The basic representation strategy can therefore beextended to represent and optimize operations on qubits [39]or to represent codon tables [40 41] or design digital syntheticgene circuits [42] Using the template used in the methodproposed we have derived the following three equalities inrelation to (4119899 minus 3119899) The method gives practical evidence ofthe equalities invented and presented next

Complexity 9

Theorem 3

3119899 + [119899minus2sum119894=0

3119899minus2minus1198942119894 (2119894+1 minus 1)] + (2119899 minus 1) 2119899minus1 = 4119899forall119899 isin N 119899 ge 2

(15)

or in other words

3119899 + [119899minus2sum119894=0

3119899minus2minus119894(2119894+12 )] + (21198992 ) = 4119899

forall119899 isin N 119899 ge 2(16)

Theorem 4

3119899 + [119899minus1sum119894=0

31198944(119899minus1minus119894)] = 4119899 forall119899 isin N 119899 ge 2 (17)

Theorem 5 As a consequence

[119899minus1sum119894=0

31198944(119899minus1minus119894)] = [119899minus2sum119894=0

3119899minus2minus119894(2119894+12 )] + (21198992 )

forall119899 isin N 119899 ge 2∵ Equations (16) and (17)

(18)

Let us first establish that the equalities being discussed are trueusing induction

Proof For Theorem 3 we observe that the equalities pre-sented in (15) or (16) are true for 119899 = 2 and 119899 = 3

For 119899 = 2LHS = 32 + [ 0sum

119894=0

30minus119894 (2119894+1 minus 1) 2119894] + (22 minus 1) 21= 9 + [(1 (2 minus 1) 1)] + (4 minus 1) 2 = 9 + 1 + 6= 16 = 42 = RHS

(19)

For 119899 = 3LHS = 33 + [ 1sum

119894=0

(31minus119894 (2119894+1 minus 1) 2119894)] + (23 minus 1) 22= 27 + [(31 (21 minus 1) 20) + (30 (22 minus 1) 21)]+ (7) 4 = 27 + [3 (1) (1) + 1 (3) (2)] + (7) 4

= 27 + 9 + 28 = 64 = 43 = RHS

(20)

Now say for some 119899 = 119898 ge 23119898 + [119898minus2sum

119894=0

(3119898minus2minus119894 (2119894+1 minus 1) 2119894)] + (2119898 minus 1) 2119898minus1= 22119898 = 4119898

(21)

Therefore

3119898 + (3119898minus2 (21 minus 1) 20 + 3119898minus3 (22 minus 1) 21 + sdot sdot sdot+ 31 (2119898minus2 minus 1) 2119898minus3 + 30 (2119898minus1 minus 1) 2119898minus2)+ (2119898 minus 1) 2119898minus1

= 22119898(22)

For 119899 = 119898 + 1 ge 2 thereforeLHS = 3119898+1 + [119898minus1sum

119894=0

(3119898minus1minus119894 (2119894+1 minus 1) 2119894)]+ (2119898+1 minus 1) 2119898

= 3119898+1 + (3119898minus1 (21 minus 1) 20 + 3119898minus2 (22 minus 1) 21 + sdot sdot sdot+ 31 (2119898minus1 minus 1) 2119898minus2 + 30 (2119898 minus 1) 2119898minus1)+ (2119898+1 minus 1) 2119898

= 3 (3119898 + (3119898minus2 (21 minus 1) 20 + 3119898minus1 (22 minus 1) 21 + sdot sdot sdot+ 30 (2119898minus1 minus 1) 2119898minus2)) + (2119898 minus 1) 2119898minus1+ (2119898+1 minus 1) 2119898

= (2 + 1) times (22119898 minus (2119898 minus 1) 2119898minus1) + (2119898 minus 1) 2119898minus1+ (2119898+1 minus 1) 2119898 (∵ Equation (22))

= (22119898+1 minus 22119898 + 2119898) + (22119898 minus 22119898minus1 + 2119898minus1)+ (22119898minus1 minus 2119898minus1 + 22119898+1 minus 2119898)

= 22119898+2 = 4119898+1 = RHS

(23)

Therefore if the statement is true for 119899 = 119898 then thestatement is true for 119899 = 119898 + 1 (119899119898 isin N) Because thestatement is true for 119899 = 2 and 3 it is true for every 119899 isin N

and 119899 ge 2Proof For Theorem 4 similarly we observe that the equalitypresented in (17) is true for 119899 = 2

LHS = 32 + [ 1sum119894=0

31198944(2minus1minus119894)] = 32 + [3041 + 3140]= 16 = 42 = RHS

(24)

Now say for some 119899 = 119898 ge 23119898 + [119898minus1sum

119894=0

31198944(119898minus1minus119894)] = 4119898 (25)

10 Complexity

For 119899 = 119898 + 1 ge 2 thereforeLHS = 3119898+1 + [ 119898sum

119894=0

31198944(119898minus119894)]

= 3119898+1 + 4 times [119898minus1sum119894=0

31198944(119898minus1minus119894)] + 311989840

= 3119898+1 + 4 times [4119898 minus 3119898] + 311989840= 3119898+1 + 4119898+1 minus (3 + 1) times 3119898 + 3119898 = 4119898+1= RHS

(26)

Because the statement is true for 119899 = 2 it is true for every119899 isin N and 119899 ge 2In the context of the template for the method proposed

the two theorems can be proven graphically by simplycounting the number of valid and redundant points viadifferent formulations If 3119899 + 119891(119899) = 4119899 for all 119899 isin N weknow the following

(i) 4119899 = 21198992119899 = (axis range)2 = total number of points

(ii) 3119899 = total number of ldquovalidrdquo data-points includingthe origin

(∵ Every input 119886119894 can manifest itself in the inputcombination represented by (119883119884) either in its orig-inal form (input combination represented by th 119883-coordinate) or as a negated input (input combinationrepresented by the119884-coordinate) ormay notmanifestitself at all)

(iii) 119891(119899) = total number of redundant points

(∵ Total number of points = total number of ldquovalidrdquopoints including the origin + total number of ldquoredun-dantrdquo points)

Proof To establish equality presented in the Theorem 3 weuse the formulation of 119891(119899) as presented in Figure 9 FromFigure 9 it is evident that

∵ 119896sum119897=1

119897 = 119896 (119896 + 1)2 forall119896 isin N119896 = 2119895 forall119895 isin N 0 le 119895 lt 119899

there4 119891 (119899) = [119899minus2sum119894=0

3119899minus2minus1198942119894 (2119894+1 minus 1)] + (2119899 minus 1) 2119899minus1(27)

The exponent of 3 translates to a multiplier that representsthe frequency of occurrence of the constituent triangle of thatspecific size in the template

1

1

2

22

3

4

568

7

32(2nminus3 minus 1)(2nminus4)31(2nminus2 minus 1)(2nminus3)

30(2nminus1 minus 1)(2nminus2)

(2n minus 1)(2nminus1)

3 points2 points1 point

2n minus 1 points

30

31

3 2

sum

Figure 9 Total number of ldquoredundant pointsrdquothe points in thedarkened region by counting the number of points in constituenttriangles separately

Proof AlternatelyTheorem4 can be proven using a recursiveformula for 119891(119899) as obtained from Figure 10

∵ 119891 (119899) = 3119891 (119899 minus 1) + 4119899minus1there4 119891 (119899) = 3 [3119891 (119899 minus 2) + 4119899minus2] + 4119899minus1

= 32119891 (119899 minus 2) + 3 times 4119899minus2 + 4119899minus1= [3119899minus1119891 (1) + 119899minus2sum

119894=0

3119894 (4(119899minus1minus119894))]

= [119899minus1sum119894=0

31198944(119899minus1minus119894)] ∵ 119891 (1) = 1

(28)

This method can be used in classrooms to quickly hand-calculate an optimized formof the logic function using a rulerand a compass alone (Figure 11)

4 Conclusion

A novel graphical technique for digital logic representationand optimization has been proposed which makes optimiza-tion algorithm much more instinctive and easy Multipleequations can be optimized simultaneously using the tem-plate presented One can theoretically therefore optimizesimultaneously multiple combinational logic circuits withany number of inputs or outputsWe propose a data structuretransformation that can compress a truth table into a fewparametersThe approach and the fundamentals involved arelikely to generate many novel solutions applicable to otherdisciplines A new paradigm is being proposed which opensup new avenues for research in terms of new methodologiesand pattern identification towards better logic reduction

Complexity 11

f(n minus 1)

f(n minus 1) f(n minus 1)

2nminus1 points in X2n

minus1

poin

ts in

Y

Figure 10 Total number of ldquoredundant pointsrdquothe points in thedarkened region by deriving a recursive formula for 119891(119899) Thus119891(119899) = 3 times 119891(119899 minus 1) + (2119899minus1)2

0 1 2 4 8 16

Figure 11 A compass and a ruler (marked with 2119899 units) canbe effectively used to quickly find the points that can be mergedtogether to generate amore optimized logic representation using thelogic laws proposed earlier (Section 35)

tailored to different implementation topologies such asSOP (ldquoAND-ORrdquoldquoNAND-onlyrdquo) POS (ldquoOR-ANDrdquoldquoNOR-onlyrdquo) and ldquoIMPLY-onlyrdquo realisations or the newer method-ologies such as ldquoreconfigurable asynchronous logic automata(RALA)rdquo [43] and the search formost suited template for eachin terms of the coordinate system of choice and the templategeneration rules

Our proposed technique currently establishes a one-to-one mapping between all of the possible variable combina-tions and the corresponding output statesmdashrepresenting theabsence and presence of every variable (in its original andthe negated form) for each of the variable combinations Onepossible future research direction is to investigate the rela-tionship between the proposed technique herein and otherrepresentation techniquesmdashsuch as QMDDs which too relyon quadrants and one-to-one mappings and which ratherextend way beyond the proposed technique to representtransformation matrices featuring complex entries useful forlogic involving qubits Further research may also be targetedtowards multilevel discrete systems beyond Boolean algebraand reversible [44 45] and hazard-free logic synthesis [9]

Conflicts of Interest

The authors declare that there are no conflicts of interestregarding the publication of this paper

References

[1] R K Brayton R Rudell A Sangiovanni-Vincentelli and AR Wang ldquoMIS A Multiple-Level Logic Optimization SystemrdquoIEEE Transactions on Computer-Aided Design of IntegratedCircuits and Systems vol 6 no 6 pp 1062ndash1081 1987

[2] A J De Geus and W Cohen ldquoA Rule-Based System for Opti-mizing Combinational Logicrdquo IEEE Design Test of Computersvol 2 no 4 pp 22ndash32 1985

[3] M Karnaugh ldquoThemapmethod for synthesis of combinationallogic circuitsrdquoTransactions of the American Institute of ElectricalEngineers Part I Communication and Electronics vol 72 no 5pp 593ndash599 1953

[4] M E Holder ldquoA modified karnaugh map techniquerdquo IEEETransactions on Education vol 48 no 1 pp 206-207 2005

[5] J Cavanagh Computer Arithmetic and Verilog HDL Fundamen-tals CRC Press 2009

[6] Z Kohavi and N K Jha Switching and finite automata theoryCambridge University Press 2009

[7] C Y Lee ldquoRepresentation of switching circuits by binary-decision programsrdquoBell Labs Technical Journal vol 38 pp 985ndash999 1959

[8] S B Akers ldquoBinary decision diagramsrdquo IEEE Transactions onComputers vol 27 no 6 pp 509ndash516 1978

[9] B Lin and S Devadas ldquoSynthesis of Hazard-Free MultilevelLogic Under Multiple-Input Changes from Binary DecisionDiagramsrdquo IEEE Transactions on Computer-Aided Design ofIntegrated Circuits and Systems vol 14 no 8 pp 974ndash985 1995

[10] C Yang and M Ciesielski ldquoBDS A BDD-based logic optimiza-tion systemrdquo IEEE Transactions on Computer-Aided Design ofIntegrated Circuits and Systems vol 21 no 7 pp 866ndash876 2002

[11] R E Bryant ldquoGraph-based algorithms for boolean functionmanipulationrdquo IEEE Transactions on Computers vol C-35 no8 pp 677ndash691 1986

[12] L Mauborgne ldquoAbstract interpretation using typed decisiongraphsrdquo Science of Computer Programming vol 31 no 1 pp 91ndash112 1998

[13] O Coudert and J C Madre ldquoA new implicit graph-based primeand essential prime computation techniquerdquo in Proceedings ofthe Proc International Symp Information Sciences FukuokaJapan 1992

[14] O Coudert and J C Madre ldquoA New Graph Based PrimeComputation Techniquerdquo in Logic Synthesis and Optimizationpp 33ndash57 Springer Boston MA USA 1993

[15] O Coudert J C Madre H Fraisse and H Touati ldquoImplicitprime cover computation An overviewrdquo in Proceedings of thein Proc Synthesis and Simulation Meeting and InternationalInterchange (SASIMI) Nara Japan 1993

[16] J Gu and R Puri ldquoAsynchronous circuit synthesis with Booleansatisfiabilityrdquo IEEE Transactions on Computer-Aided Design ofIntegrated Circuits and Systems vol 14 no 8 pp 961ndash973 1995

[17] W V Quine ldquoThe problem of simplifying truth functionsrdquoTheAmerican Mathematical Monthly vol 59 pp 521ndash531 1952

[18] W V Quine ldquoA way to simplify truth functionsrdquoThe AmericanMathematical Monthly vol 62 pp 627ndash631 1955

12 Complexity

[19] J McCluskey ldquoMinimization of Boolean functionsrdquo Bell LabsTechnical Journal vol 35 pp 1417ndash1444 1956

[20] S Petrick ldquoA direct determination of the irredundant forms of aboolean function from the set of prime implicantsrdquo Tech RepAir Force Cambridge Research Center 1956

[21] R L Rudell ldquoMultiple-Valued Logic Minimization for PLASynthesisrdquo Defense Technical Information Center 1986

[22] L Amaru P-E Gaillardon and G De Micheli ldquoMajority-Inverter Graph ANewParadigm for LogicOptimizationrdquo IEEETransactions on Computer-Aided Design of Integrated Circuitsand Systems vol 35 no 5 pp 806ndash819 2016

[23] D C Fielder ldquoClassroom Reduction of Boolean FunctionsrdquoIEEE Transactions on Education vol 9 no 4 pp 202ndash205 1966

[24] B C H Turton ldquoExtending Quine-McCluskey for exclusive-orlogic synthesisrdquo IEEE Transactions on Education vol 39 no 1pp 81ndash85 1996

[25] R Benzer and V Rozga ldquoThe Design and Application of aMinority Logic Gate-A Senior Projectrdquo IEEE Transactions onEducation vol 10 no 3 pp 141ndash146 1967

[26] N R Bell ldquoAMapMethod for the Teaching of the FundamentalConcepts of Compound-Input Logic Circuitsrdquo IEEE Transac-tions on Education vol 11 no 3 pp 173ndash177 1968

[27] R F Tinder ldquoMultilevel LogicMinimizationUsingK-mapXORPatternsrdquo IEEE Transactions on Education vol 38 no 4 pp370ndash375 1995

[28] B D Carroll and I Chen ldquoABALmdashA Language for BooleanFunction Representation andManipulationrdquo IEEE Transactionson Education vol 20 no 1 pp 70ndash72 1977

[29] C E Klock F R Schneider M V N Gomes D S MouraR P Ribas and A I Reis ldquoKARMA A didactic tool for two-level logic synthesisrdquo in Proceedings of theMSE 2007 2007 IEEEInternational Conference on Microelectronic Systems EducationEducating Systems Designers for the Global Economy and aSecure World pp 59-60 San Diego CA USA June 2007

[30] V P Correia and A I Reis ldquoA tutorial tool for switch logicrdquo inProceedings of the International Conference on MicroelectronicSystems Education MSE 2001 pp 28-29 Las Vegas NV USAJune 2001

[31] Z Stanisavljevic V Pavlovic B Nikolic and J DjordjevicldquoSDLDS-system for digital logic design and simulationrdquo IEEETransactions on Education vol 56 no 2 pp 235ndash245 2013

[32] P Corsini and L Rizzo ldquoSSCSSC A Tool for the Teaching ofDigital Circuitsrdquo IEEE Transactions on Education vol 34 no 1pp 70ndash75 1991

[33] G J Klir and M A Marin ldquoNew considerations in teachingswitching theoryrdquo IEEE Transactions on Education vol 12 no4 pp 257ndash261 1969

[34] M Gardner ldquoMathematical games The fantastic combinationsof John Conwayrsquos new solitaire game ldquoliferdquordquo Scientific Americanvol 223 no 4 pp 120ndash123 1970

[35] S Wolfram ldquoCellular automata as models of complexityrdquoNature vol 311 no 5985 pp 419ndash424 1984

[36] M Sierpinski ldquoSur une courbe dont tout point est un pointde ramificationrdquo Compte Rendus hebdomadaires des seance delAcademie des Science de Paris vol 160 pp 302ndash305 1915

[37] J-P Allouche and J Shallit Automatic SequencesTheory Appli-cations Generalizations Cambridge University Press 2003

[38] K A Bartlett R K Brayton G D Hachtel et al ldquoMultilevelLogic Minimization Using Implicit Donrsquot Caresrdquo IEEE Trans-actions on Computer-Aided Design of Integrated Circuits andSystems vol 7 no 6 pp 723ndash740 1988

[39] P Niemann R Wille D M Miller M A Thornton and RDrechsler ldquoQMDDs Efficient Quantum Function Representa-tion and Manipulationrdquo IEEE Transactions on Computer-AidedDesign of Integrated Circuits and Systems vol 35 no 1 pp 86ndash99 2016

[40] D Searls andMNoordewier ldquoPattern-matching search ofDNAsequences using logic grammarsrdquo in Proceedings of the SeventhIEEE Conference on Artificial Intelligence Application pp 3ndash9Miami Beach FL USA 1991

[41] C R Woese ldquoOrder in the genetic coderdquo Proceedings of theNational Acadamy of Sciences of the United States of Americavol 54 no 1 pp 71ndash75 1965

[42] M A Marchisio and J Stelling ldquoAutomatic design of digitalsynthetic gene circuitsrdquo PLoS Computational Biology vol 7 no2 Article ID e1001083 2011

[43] N Gershenfeld D Dalrymple K Chen et al ldquoReconfigurableasynchronous logic automata (RALA)rdquo in Proceedings of the37th Annual ACM SIGPLAN-SIGACT Symposium on Principlesof Programming Languages POPLrsquo10 vol 45 pp 1ndash6 MadridSpain January 2010

[44] V V Shende A K Prasad I L Markov and J P HayesldquoSynthesis of reversible logic circuitsrdquo IEEE Transactions onComputer-Aided Design of Integrated Circuits and Systems vol22 no 6 pp 710ndash722 2003

[45] P Gupta A Agrawal and N K Jha ldquoAn algorithm for synthesisof reversible logic circuitsrdquo IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems vol 25 no 11pp 2317ndash2329 2006

Submit your manuscripts athttpswwwhindawicom

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Mathematical Problems in Engineering

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Differential EquationsInternational Journal of

Volume 2014

Applied MathematicsJournal of

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Probability and StatisticsHindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Journal of

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Mathematical PhysicsAdvances in

Complex AnalysisJournal of

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CombinatoricsHindawi Publishing Corporationhttpwwwhindawicom Volume 2014

International Journal of

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Function Spaces

Abstract and Applied AnalysisHindawi Publishing Corporationhttpwwwhindawicom Volume 2014

International Journal of Mathematics and Mathematical Sciences

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Algebra

Discrete Dynamics in Nature and Society

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Volume 2014 Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Stochastic AnalysisInternational Journal of

2 Complexity

A binary decision diagram (BDD) [7ndash10] is also a graphi-cal method that is easy enough to implement and visualiseBDDs are often put to use as a data structure to bothrepresent the Boolean functions and to perform the oper-ations efficiently Unlike K-maps usability of this approachis not constrained by the number of inputs Optimizationis primarily about choosing the correct ordering of inputvariables and about reducing the number of ldquonodesrdquo bymerging equivalent nodes and by removing redundant onesDiagram complexity depends a lot on the ordering of theinput variables and the respectively applied decompositiontype [7 11] and it is not always easy to devise the correct orderbymere visual inspectionThis however to a limited extent isalso a downside of the graphical approaches presented in thispaper As for BDDs moreover one cannot translate a givengraphical representation back to its Boolean expression justby a quick visual skimming throughmdashit is imperative to tracethe entire paths starting from the output nodes back to thefirst input in order

Typed decision graphs (TDGs) [12] offer reduction ofBDDs into a graph with a lot fewer nodes and connectionsThe advantages and drawbacks of the method are thereforemostly similar to those of BDDs including dependence ofthe sizecomplexity of the representation on the orderingof the variables Also closely related to BDDs are graphicaltechniques called ldquoimplicit graph based methodrdquo [13ndash15] andsignal transition graphs (STGs) [16]

The QuinendashMcCluskey algorithm [17ndash19] (or methodof prime implicants) is functionally identical to Karnaughmapping and is a deterministic way to check that theminimalform of a Boolean function has been reached The tabularform makes it more efficient for use in computer algorithmsbut not being graphical it is not as simple or as intuitiveas Karnaugh-maps for use by the designer himselfherselfPetrickrsquos method (the branch-and-bound method) [20] isa technique for determining all minimum sum-of-productssolutions from a prime implicant chart and could be lookedupon as an extension to the QuinendashMcCluskey algorithmThe process gets tedious for a human for a large number ofinputs and does not scale well on computers likewise TheEspresso algorithm [21] uses a radically different approachby applying heuristics manipulating the ldquocubesrdquo represent-ing the product terms in the ON- DC- and OFF-coversiteratively instead of expanding the minterms Recently anew paradigm has been proposed called ldquoMajority-InverterGraphrdquo [22] which is a directed acyclic graph consisting ofthree-input majority nodes and directnegated edges

Keeping classroom education of Boolean functions atthe focus several methodologies [23ndash27] that are mostlynongraphical and can best be demonstrated with systemswith only a limited number of inputs have been proposedin addition to more generalised software implementations[28ndash32] not directly useful for demonstrating the conceptsthrough easy hand-calculations Karnaugh-mapsmdashdue to themethodrsquos graphical naturemdashcontinue to be used as the firstmethod to explain the optimization process in the switchingtheory textbooks [33] still today

In the context of the comparison of the methods noted sofar we propose that the following are the desired characteris-tics of an ideal logic representation methodology

(i) It is not constrained by the number of inputs oroutputs and can in theory handle an infinite numberof inputs and outputs That is to say multiple outputfunctions can be represented simultaneously

(ii) The optimization process should be intuitive ideallyvisual inspection should be enough to establish input-output relationship Or it should be based on aparadigm that is intuitive enough for a human tosimply hand-calculate Graphical methods like K-maps do offer that advantage

(iii) If it is graphical an equivalent numerical methodshould exist which can effectively be used as a datastructure to optimally represent combinational logicthrough conventional programming

(iv) Translating a Boolean equation into the graphicalrepresentation (or vice versa) is a simple process

(v) Ordering of variables should play no role in thecomplexity of the representation

The proposed technique satisfies all of the desired character-istics listed except the very last one Ordering of variablescontributes to the ease with which a human can optimize afunction without using any computing resources

2 Definitions

(i) The logical operatorssymbols ldquonotrdquo ldquo+rdquo ldquosdotrdquo ldquooplusrdquo andldquo⊙rdquo denote the logical negation OR AND XOR andXNOR operations respectively

(ii) The symbols ldquoprodrdquo and ldquosumrdquo denote the logical ANDand OR operations of the variables in iterationrespectively

(iii) 1198860 1198861 1198862 119886119894 119886119899 is a set of inputs to thecombinational logic block under consideration

(iv) 120601 denotes an empty set(v) SOP = sum of products(vi) POS = product of sums

3 Proposed Technique (Pandit-Plot)

Every Boolean equation is represented by a scatter plot in twodimensions In effect in its simplest version correspondingto four quadrants four Boolean expressions can simulta-neously be represented and optimized on a single planeBy using different markers one for each function multiplelogic functions may be represented in a single plane andsubsequently reduced

31 Coordinate System and Input Correspondence Everyinteger coordinate ldquo119901rdquo corresponds to an input combination1198861198941 1198861198942 119886119894119898 such that

10038161003816100381610038161199011003816100381610038161003816 =119898sum119896=1

2119894119896 (119901 isin Z 119894119896 isin N) (1)

Complexity 3

Y

X

a2a1a0 7

a2a1 6

a2a0 5

a2 4

a1a0 3

a1 2

a0 1

(0 0) 7a2a1a0

6a2a1

5a2a0

4a2

3a1a0

2a1

1a0

Figure 1 Pandit-Plot (for 119899 = 3) with redundant data-points

One axis (say 119909-axis) represents a condition where thedesignated inputs are all True (T) (also called High (H) orlogic level 1) while the other represents a case where thoseinputs are all False (F) (also called Low (L) or logic level0) There is therefore a one-to-one correspondence betweenthe set of all of combinations of the inputs and the set ofpoints on the plane with integer coordinates With sucha representation system in place every point on the plotwith integer coordinates signifies a single product (in a SOPrepresentation) or a single sum (in a POS representation) Asan example for a system with three inputs (1198860 1198861 and 1198862)the template of the plot that is restricted to the first quadrant(119901 ge 0) will be as shown in Figure 1

Throughout the discussion henceforth we only considerthe template in the first quadrant The templates in fourquadrants are symmetric to each other with 119909- and 119910-axesand the ldquo119909 = 119910rdquo and ldquo119909 = minus119910rdquo lines as the axes of symmetryWeobserve that in the scatter plot fromFigure 1 certain data-points have been marked distinctively using the filled circlesThese will be called ldquoredundantrdquo input combinationsmdashfor thereasons that will be explained in Section 33

32 Representing an Input Combination Representation ofthe combinational function ldquo119891rdquo in graphical form may bedone for ldquo119891rdquo either in POS or in SOP form the choice lieswith the logic designeruser of the plot

To represent a function in SOP form every constituentproduct term is separated into two products one containingexclusively the direct inputs and the other only the negatedinputs The overall product is represented by a point (119909 119910)where for example the 119909-coordinate corresponds to theset of input combinations coming only from the directinputs while the 119910-coordinate corresponds to the set of inputcombinations from only the negated inputs using (1) Theabsence of inputs implies that the corresponding coordinateis 0

a2a1a0 7

a2a1 6

a2a0 5

a2 4

a1a0 3

a1 2

a0 1

(0 0) 7a2a1a0

6a2a1

5a2a0

4a2

3a1a0

2a1

1a0

Figure 2 Pandit-Plot for 119891 = 11988601198861 + 1198860not11988611198862

As an example let us consider the following sum ofproducts

119891 = 11988601198861 + 1198860not11988611198862 (2)

represented by points (3 0) and (5 2) shown in Figure 2

(i) For the first product ldquo11988601198861rdquo to be True both 1198860 and 1198861need to be True Therefore the 119909-coordinate = 20 +21 = 3 as per (1) Because there are no negated inputsin the first product no 119886119896 needs to be False for 119891 tobe TrueTherefore the 119910-coordinate is 0The productldquo11988601198861rdquo is therefore represented by point (3 0)

(ii) Similarly for the product ldquo1198860not11988611198862rdquo to be True both1198860 and 1198862 need to be TrueTherefore the 119909-coordinate= 20 + 22 = 5 as per (1) Also 1198861 needs to be Falsefor function119891 to be TrueTherefore the 119910-coordinate= 21 = 2 The product ldquo1198860not11988611198862rdquo is thereforerepresented by point (5 2)

Points (3 0) and (5 2) will be called ldquodata-pointsrdquo as theysummarise the function by transforming it into numericaldata corresponding to the chosen coordinate system

Similarly for a POS-based representation we look forFalse (0FL) logic outputs to mark the points transformingevery sum in the expression

Every Boolean function can therefore be representedby only two parameters alone in this way namely thecoordinates of the representative points irrespective of thenumber of inputs This is a huge data compression in itselfwhere instead of storing the entire truth table or even allof the combinations for which the output is either T or F(whichever count is less) we can simply represent a functionwith a few data-points The system can further be optimizedto remove extraneous information as will be explained inSections 33 35 and 36

4 Complexity

(1) procedure GENERATE1(119899) ⊳ 119899 = number of inputs(2) 119877119890119889119906119899119889119886119899119905119878119890119905 = 120601(3) for 119909 larr 0 2119899 minus 1 do ⊳ Represents direct inputs(4) for 119910 larr 0 2119899 minus 1 do ⊳ Represents negated inputs(5) 119909119887119894119899119886119903119910 larr (119909)2(6) 119910119887119894119899119886119903119910 larr (119910)2(7) 119863 larr 119890119897119890119898119890119899119905119908119894119904119890(119909119887119894119899119886119903119910 and 119910119887119894119899119886119903119910)(8) if 119886119899119910(119863) = 1 then(9) 119877119890119889119906119899119889119886119899119905119878119890119905 = 119877119890119889119906119899119889119886119899119905119878119890119905 cup (119909 119910)(10) end if(11) end for(12) end for(13) end procedure

Algorithm 1 Redundant set generation for Pandit-Plot

33 Existence of Redundant Data-Points It can easily beobserved that there exist points on the plot with integercoordinates that correspond to a Boolean product or aBoolean sum that can never occur in a reduced SOP or areduced POS expression respectively

As an example point (1 1) corresponds to the (1198860not1198860)product in SOP which evaluates to 0F and the samepoint corresponds to the (1198860 + not1198860) sum in POS whichevaluates to 1T These input combinations do not haveany effect on the final expression evaluation as the outputcorresponding to these input combinations is preknown andtherefore redundant to be included as part of any Booleanexpression (eg 119891 + 1198860not1198860 = 119891) We therefore discardsuch input cases and term these as ldquoredundant pointsrdquo inthe discussions below while the rest will be called ldquovalidrdquopoints except the origin which falls into neither of the twocategories representing simply the trivial case of the outputbeing independent of the inputs

34 Generation of the Template To translate any logic func-tion to this plot the first step is to build the necessary templateor the canvas with all the input redundancies indicated(Figure 1) Such a template may be generated by exploitingpatterns for which the redundancies appear (Algorithm 1)

For example we note the following for a system with 119899inputs

(i) The 119909- and 119910-axes extend from 0 to 2119899 minus 1(ii) The points on the line 119909 = 119910 are redundant points(iii) All of the upper diagonal elements are redundant

points(iv) Redundant points because of the 1198860 inputrsquos logic level

extend along both the 119909 and 119910 directions skippingevery other point that is skipping the odd integercoordinates The redundant points associated with 1198860input are therefore of the form (2119894 + 1 2119895 + 1) where119894 119895 are integers

(v) Alternatively the template may be generated usingcellular automata rules on a brick-wall-like automatatemplate as devised in Figure 3 (in contrast to the

RulePattern

PatternRule

Xminus 1 y X Y minus 1

X Y

X minus 1 Y X Y minus 1

X Y

X minus 1 YX Y minus 1

X Y

X minus 1 Y X Y minus 1

X Y

00

10 0120 11 12

30 21 12 03

40 31 22 13 04

50 41 32 23 14 05

60 51 42 33 24 15 06

07162543 34526170

80 71 62 53 44 35 26 17 08

Figure 3 Template generation from 2 different kinds of rulessignifying its relation to the Sierpinski trianglefractals and thecellular automata

typical cellular automata template as used inConwayrsquosgame of life [34 35]mdashwhere the borders of the indi-vidual cells coincide) This gives rise to the Sierpinskitriangle [36 37] pattern as desired The captions forthe individual blocks indicate the (119909 119910) coordinatesof the points that the blocks represent

35 Logic Laws The logic optimization process is visualintuitive and simplemdashjust as for Karnaugh-maps It mayalternatively be easily implemented using a computer pro-gram by understanding the strategies in place numericallyThe basic idea of optimization is to get rid of excess of

Complexity 5

information by inspecting the scatter plot and bring the data-points as close to the axes as possibleThere exist patterns thatneed to be utilised to effectively carry out this ldquoreductionrdquoThese patterns need to be formulated into a compilation ofldquologic lawsrdquo A few examples of a logic law or an optimizationstrategy follow

Theorem 1 (radic2-integer-multiple hypotenuse rule) If two ofthe data-points are vertices of an upright right angled isoscelestriangle with its equal sides having length = 2119896 (119896 isin N) andif the third vertex is not to the right of any of those two data-points then the two data-points could effectively be representedby that third vertex alone so long as the third vertex is not aredundant point

Proof Let data-points be 119860(1199091 1199101) and 119861(1199092 1199102) such that1199091 gt 1199092 and 1199101 lt 1199102 and (1199091 minus 1199092) = (1199102 minus 1199101) = 2119896 119896 isin Nwithout loss of generalisation

Because none of the three points119860(1199091 1199101)119861(1199092 1199102) and119862(1199092 1199101) is a redundant point and because 1199091 + 2119896 = 1199092 itfollows that

1199091 = sum119894=ind(1199091)

2119894 = 2119896 + sum119894=ind(1199092)

2119894 (3)

where ind(119901) is set of suffixes corresponding to inputsassociated with coordinate ldquo119901rdquo

Similarly it follows that

1199102 = sum119894=ind(1199102)

2119894 = 2119896 + sum119894=ind(1199101)

2119894 (4)

Therefore the point 119861(1199092 1199102) represents both the directand negated inputs corresponding to the point 119862(1199091 1199102)along with the input not119886119896 Similarly the point 119860(1199091 1199101)represents both the direct and negated inputs correspondingto the point 119862(1199091 1199102) along with the input 119886119896 The twopoints 119860 and 119861 therefore effectively represent the inputscorresponding to the point 119862 and in addition either thedirect or the negated version of the input 119886119896

Therefore in SOP form

119891 fl 119891119860 + 119891119861 = (119886119896) 119891119862 + (not119886119896) 119891119862 = 119891119862 (5)

and in POS form

119891 fl 119891119860119891119861 = (119886119896 + 119891119862) (not119886119896 + 119891119862) = 119891119862 (6)

where 119891119866 fl function associated with point 119866Thus as per (5) and (6) this rule is simply amanifestation

of the two well-known equalities (1) 119875(119902) + 119875(not119902) = 119875and (2) (119878 + 119902)(119878 + not119902) = 119878 for the template we presentheremdashwhere 119875 and 119878 are respectively the product terms andthe summation terms consisting of variables excluding 119902

As an illustration if the plot in Figure 4 represents aBoolean function 119891 in SOP form with the points 119860 and 119861 asits ldquodata-pointsrdquo then per the definitions earlier

119891 = 1198860not11988611198862 + 1198860not1198861not1198862 (7)

(0 0)

a2a1a0

a2a1

a2a0

a2

a1a0

a1

a0

B

AC

7

6

5

4

3

2

1

7654321a2a1a0a2a1a2a0a2a1a0a1a0

Figure 4 Diagonal optimization for SOP

This is because point 119860(5 2) translates to ldquo1198860not11988611198862rdquo whilepoint 119861(1 6) represents ldquo1198860not1198861not1198862rdquo

Per the law proposed points 119860 and 119861 are representedtogether by point119862(1 2) alone since the right angled triangle119860119861119862 is an isosceles triangle with its congruent sides havinglength 2119896 119896 isin N(119897(119862119860) = 119897(119862119861) = 4)

We find here that the hypothesis is true since

119891 = 1198860not11988611198862 + 1198860not1198861not1198862 = (1198860not1198861) (1198862 + not1198862)= 1198860not1198861 997904rArr 119862 (1 2) (8)

If the scatter plot in Figure 4 were to correspond to a POSrepresentation then the plot would have been represented as

119891 = (1198860 + not1198861 + 1198862) (1198860 + not1198861 + not1198862) (9)

Effectively

119891 = (1198860 + not1198861) + (1198860 + not1198861) (1198862 + not1198862) + (1198862) (not1198862)= (1198860 + not1198861) 997904rArr 119862 (1 2) (10)

In either case points 119860(5 2) and 119861(1 6) are togetherrepresented by 119862(1 2) aloneTheorem 2 (symmetry about ldquo119909 = 119910rdquo line) Two ldquovalidrdquopoints symmetric about the ldquo119909 = 119910rdquo line in an SOP plot canbe effectively represented by a newly defined logical operationrepresented by operator ⋆ where119886119894 ⋆ 119886119895 = (prod119886119894) sdot (prodnot119886119895) + (prodnot119886119894) sdot (prod119886119895)

such that 119886119894 cap 119886119895 = 120601 (11)

6 Complexity

Two ldquovalidrdquo points symmetric about the ldquo119909 = 119910rdquo line in a POSplot can be effectively represented by a newly defined logicaloperation represented by operator ⋆ where119886119894 ⋆ 119886119895 = (sum119886119894 +sumnot119886119895) sdot (sumnot119886119894 +sum119886119895)

such that 119886119894 cap 119886119895 = 120601 (12)

Proof Two points symmetric about the ldquo119909 = 119910rdquo line will beof the forms 119860(1199090 1199100) and 119861(1199100 1199090) It follows that the setof direct inputs corresponding to the point 119860 (fl 119886119894) is thesame as the set of negated inputs that are represented by point119861 and vice versa (fl 119886119895)

Because points 119860 and 119861 are not redundant points itfollows that 119886119894 cap 119886119895 = 120601

Therefore for SOP

∵ 119891119860 = (prod119886119894) sdot (prodnot119886119895) there4 119891119861 = (prodnot119886119894) sdot (prod119886119895)

such that 119886119894 cap 119886119895 = 120601dArr

119891 = 119891119860 + 119865119861= (prod119886119894) sdot (prodnot119886119895) + (prodnot119886119894) sdot (prod119886119895)

(13)

Similarly for POS

∵ 119891119860 = (sum119886119894 +sumnot119886119895) there4 119891119861 = (sumnot119886119894 +sum119886119895)

such that 119886119894 cap 119886119895 = 120601dArr

119891 = 119891119860 sdot 119865119861 = (sum119886119894 +sumnot119886119895) sdot (sumnot119886119894 +sum119886119895)

(14)

For a system with just two inputs the ldquo⋆rdquo operator repre-sents simply an ldquoXORrdquo (oplus) operation while the ldquo⋆rdquo operatorrepresents an ldquoXNORrdquo (⊙) operation The ldquoNAND-onlyrdquoimplementation of ldquo⋆⋆rdquo operation is shown in Figure 5Thisnewly defined logic gate can then be optimized for given fan-in and fan-out values as necessary to be used as a buildingblock in the subsequent logic design

36 Process of Optimization While there is much scopefor further research in this area for effective algorithmdevelopment in terms of logic optimization including theones targeted to novel topologies such as the ones involvingIMPLY (not119860+119861) gates alone for example (instead of SOPPOSforms presented here effectively implemented using ldquoNANDalonerdquo and ldquoNOR alonerdquo topologies resp) one of the mostlikely logic flows for such optimization is presented next

Steps involved in this example algorithm are as follows

ai0 ai1 ai aj0 aj1 ajn

ajai

ai aj ai aj⋆ ⋆

Figure 5 ldquoNAND-onlyrdquo implementation of the newly definedlogical operations ldquo⋆ and ⋆rdquo that are essentially oplus (XOR) and ⊙(XNOR) operations respectively for a two-input system

(i) ldquoGeneraterdquo the template and plot the function(ii) ldquoExpandrdquo the expression to include every possible

product in SOP form (every possible sum for a POSform)

(iii) ldquoReducerdquo the expression using logic laws(iv) ldquoRepeatrdquo the above two steps in iteration until no

further reduction is possible as illustrated in Figure 6

As an example let 119891 = (not1198861 + 119886011988611198862) and let the represen-tation form chosen be SOP-based as well 119891 ultimately getsreduced to 119891 = not1198861 + 11988601198862 as shown in Figure 6

(1) Generate plot the product terms (Figure 6(a))(2) Expand plot points relevant to each of the current

data-points (Figure 6(b)) Here not1198861 is expanded toinclude points wherever not1198861 = 1 997904rArr 119891 = 1

(3) Reduce reduce the expression using logic laws If anew data-point replacing one or some of the originaldata-points is obtained through this process and ifthis data point cannot be further reduced then it isnoted and kept for the next iteration (We note anexample of such data-point with a label ldquoNEWrdquo inFigure 6(c))

(4) Repeat repeat steps (2) and (3) until no new replace-ment data-point closer to the origin can be obtained(Figure 6(d))

Similar to the Karnaugh-maps the ldquodo not carerdquo inputcombinations could be exploited for logic reduction [3 38]

Complexity 7

(0 0)

a2a1a0

a2a1

a2a0

a2

a1a0

a1

a0

7

6

5

4

3

2

1

7654321a2a1a0a2a1a2a0a2a1a0a1a0

(a) ldquoGeneraterdquo step illustrated for 119891 = (not1198861) + (1198860)(1198861)(1198862)

a2a1a0

a2a1

a2a0

a2

a1a0

a1

a0

7

6

5

4

3

2

1

(0 0) 7654321a2a1a0a2a1a2a0a2a1a0a1a0

(b) ldquoExpandrdquo step illustrated for the product ldquo(not1198861)rdquo

a2a1a0

a2a1

a2a0

a2

a1a0

a1

a0

7

6

5

4

3

2

1

(0 0) 7654321a2a1a0a2a1a2a0a2a1a0a1a0

NEW

(c) ldquoReductionrdquo using the ldquoradic2-integer-multiple hypotenuse rulerdquo

a2a1a0

a2a1

a2a0

a2

a1a0

a1

a0

7

6

5

4

3

2

1

(0 0) 7654321a2a1a0a2a1a2a0a2a1a0a1a0

(d) The final optimized expression 119891 = (not1198861) + (1198860)(1198862)

Figure 6 Process of optimization the steps in order are illustrated

37 As a Data Structure Because the individual Booleanterms are represented by only two coordinates (irrespectiveof the number of inputs) any combinational logic may berepresented by two parameters alone This can be viewedas a conversion of a graphical scheme to an equivalentnongraphical numerical scheme to be handled by computingsystems efficiently The two coordinates may be stored in thememory as a single unit

Because one can represent any logic expression througha set of coordinates alone we now investigate the numberof bits required to store each of the numbered coordinatesWhile a proposed template for 119899 inputs consists of 4119899 points(including the origin) the number of valid coordinates is only

3119899 minus 1 This is because a variable can manifest itself in aninput combination in its original form (119886119896) or as a negatedversion (not119886119896) or it could simply be absent Thus there arethree possibilities for every input 119886119896 The number of validpoints is therefore 3119899 minus 1 (excluding the origin indicativeof a trivial case where the output is independent of all of theinputs under consideration) Both the total number of points(120591 = 4119899 minus 1) in a template and the number of valid points(120592 = 3119899 minus 1) grow exponentially with 119899 The ratio of thenumber of bits thus required (with and without consideringthe redundant points) = ceil(log2(3119899 minus 1))ceil(log2(4119899 minus 1))which varies between 075 and 085 and eventually convergesto 08 for large 119899 As an example for 119899 = 3 120592 = 26 and

8 Complexity

120591 = 63 while for 119899 = 6 120592 = 728 and 120591 = 4095 Memorysavings thus grow with 119899 if we effectively take into accountthe redundancies in the template

However in comparison to K-maps (= 2119899 cells for an 119899-input system) our proposed method requires a much highernumber of points (= 3119899minus1 if we consider only the valid inputcombinations excluding the origin) This is because the K-maps do not take into account all of the input combinationsbut only the ones where each of the inputs manifests itselfby its presence in its original or in its negated form (thus 2119899possibilities) In the proposed method we explicitly take intoaccount also the reduced input combinations where some ofthe inputs are absent

38 Possible Extensions and Further Research Scope

(i) Beyond SOPPOS paradigms more patterns and theresulting optimization strategies need to be investi-gated in different logic gate methodologies for exam-ple SOP (ldquoAND-ORrdquo which is ldquoNAND-onlyrdquo) POS(ldquoOR-ANDrdquo which is ldquoNOR-onlyrdquo) and ldquoIMPLY-onlyrdquo realisations

(ii) Multilevel logic the concept could be extended tothree dimensions to represent a ternary logic systemwhere both inputs and outputs can have three possiblelogic levels (0 1 2) The resulting representation isthus in the form of a ldquologic latticerdquo instead ofthe two-dimensional grid presented here where thethird dimension would serve a dual purpose Firstit represents a condition where all the inputs arelogical level ldquo2rdquo (just as 119885 and 119884 represented statesldquo1rdquo and ldquo0rdquo resp) Secondly the 119911-axis may alsorepresent an output logic level within such a ldquologicslicerdquo As an example output level-1 may correspondto a point with integer (119883 119884 119885) coordinates level-0may correspond to a point just beneath this point andlevel-2 just above (Figure 7)

(iii) Alternate coordinate systems every data-point sym-bolises a huge degree of information but with onlytwo or three parameters (coordinates) Because thisinformation need not necessarily come about usinga Cartesian coordinate system alone one can chooseto alternatively employ some other coordinate systemand look for patterns and laws for optimizationwithinsuch schemes For example a 2D polar system maybe used where the (119909 119910) to (119903 120579) transformation isgoverned by the equations 119903 = 119909 120579 = 2120587119910(2119899 minus 1)and 119909 119910 isin [0 2119899 minus 1] Note that 120579 remains in therange [0 2120587] irrespective of the number of inputs(Figure 8)The logic laws for such alternate coordinatesystemsmdashwhere every coordinate of interest120595 followsthe equation120595 = 119891(sum119898119896=1 2119894119896) 119894119896 isin Nmdashcan be devisedby recognising the inherent patterns which remainsan open problem with further scope for research

39 Implications to Other Fields of Study One can use thetemplate to establish three algebraic equalities as will bediscussed in detail in this section The method in general

z-axis

x-axisy-axis

(inputs = 2)

(inputs = 0)(inputs = 1)

Δz lt 1

z = z0planez = z0

+ dzplane

(x0 y

0 z0 + Δz)

(x0 y

0 z0 minus Δz)

(x0 y

0 z0 )

z = z minusdz

plane= 2

Output

= 1

Output

= 0

Output

Figure 7 Ternary logic representation (1199090 1199100 1199110 isin N) The point(1199090 1199100 1199110plusmnΔ119911 or 1199110) represents the input condition where all inputscorresponding to 119909-coordinate = 1 all inputs corresponding to 119910-coordinate = 0 and all inputs corresponding to 119911-coordinate = 2

Figure 8 Cartesian (119909 119910) coordinate system converted into polar(119903 120579) system where 119903 = 119909 120579 = 2120587119910(2119899 minus 1) and 119909 119910 isin [0 2119899 minus 1]Filled circles indicate the ldquoredundant pointsrdquo

is useful for alternative representation and processing ofdata whenever there is representation of information (ieencoding or decoding) in the form of distinct or discretestates The basic representation strategy can therefore beextended to represent and optimize operations on qubits [39]or to represent codon tables [40 41] or design digital syntheticgene circuits [42] Using the template used in the methodproposed we have derived the following three equalities inrelation to (4119899 minus 3119899) The method gives practical evidence ofthe equalities invented and presented next

Complexity 9

Theorem 3

3119899 + [119899minus2sum119894=0

3119899minus2minus1198942119894 (2119894+1 minus 1)] + (2119899 minus 1) 2119899minus1 = 4119899forall119899 isin N 119899 ge 2

(15)

or in other words

3119899 + [119899minus2sum119894=0

3119899minus2minus119894(2119894+12 )] + (21198992 ) = 4119899

forall119899 isin N 119899 ge 2(16)

Theorem 4

3119899 + [119899minus1sum119894=0

31198944(119899minus1minus119894)] = 4119899 forall119899 isin N 119899 ge 2 (17)

Theorem 5 As a consequence

[119899minus1sum119894=0

31198944(119899minus1minus119894)] = [119899minus2sum119894=0

3119899minus2minus119894(2119894+12 )] + (21198992 )

forall119899 isin N 119899 ge 2∵ Equations (16) and (17)

(18)

Let us first establish that the equalities being discussed are trueusing induction

Proof For Theorem 3 we observe that the equalities pre-sented in (15) or (16) are true for 119899 = 2 and 119899 = 3

For 119899 = 2LHS = 32 + [ 0sum

119894=0

30minus119894 (2119894+1 minus 1) 2119894] + (22 minus 1) 21= 9 + [(1 (2 minus 1) 1)] + (4 minus 1) 2 = 9 + 1 + 6= 16 = 42 = RHS

(19)

For 119899 = 3LHS = 33 + [ 1sum

119894=0

(31minus119894 (2119894+1 minus 1) 2119894)] + (23 minus 1) 22= 27 + [(31 (21 minus 1) 20) + (30 (22 minus 1) 21)]+ (7) 4 = 27 + [3 (1) (1) + 1 (3) (2)] + (7) 4

= 27 + 9 + 28 = 64 = 43 = RHS

(20)

Now say for some 119899 = 119898 ge 23119898 + [119898minus2sum

119894=0

(3119898minus2minus119894 (2119894+1 minus 1) 2119894)] + (2119898 minus 1) 2119898minus1= 22119898 = 4119898

(21)

Therefore

3119898 + (3119898minus2 (21 minus 1) 20 + 3119898minus3 (22 minus 1) 21 + sdot sdot sdot+ 31 (2119898minus2 minus 1) 2119898minus3 + 30 (2119898minus1 minus 1) 2119898minus2)+ (2119898 minus 1) 2119898minus1

= 22119898(22)

For 119899 = 119898 + 1 ge 2 thereforeLHS = 3119898+1 + [119898minus1sum

119894=0

(3119898minus1minus119894 (2119894+1 minus 1) 2119894)]+ (2119898+1 minus 1) 2119898

= 3119898+1 + (3119898minus1 (21 minus 1) 20 + 3119898minus2 (22 minus 1) 21 + sdot sdot sdot+ 31 (2119898minus1 minus 1) 2119898minus2 + 30 (2119898 minus 1) 2119898minus1)+ (2119898+1 minus 1) 2119898

= 3 (3119898 + (3119898minus2 (21 minus 1) 20 + 3119898minus1 (22 minus 1) 21 + sdot sdot sdot+ 30 (2119898minus1 minus 1) 2119898minus2)) + (2119898 minus 1) 2119898minus1+ (2119898+1 minus 1) 2119898

= (2 + 1) times (22119898 minus (2119898 minus 1) 2119898minus1) + (2119898 minus 1) 2119898minus1+ (2119898+1 minus 1) 2119898 (∵ Equation (22))

= (22119898+1 minus 22119898 + 2119898) + (22119898 minus 22119898minus1 + 2119898minus1)+ (22119898minus1 minus 2119898minus1 + 22119898+1 minus 2119898)

= 22119898+2 = 4119898+1 = RHS

(23)

Therefore if the statement is true for 119899 = 119898 then thestatement is true for 119899 = 119898 + 1 (119899119898 isin N) Because thestatement is true for 119899 = 2 and 3 it is true for every 119899 isin N

and 119899 ge 2Proof For Theorem 4 similarly we observe that the equalitypresented in (17) is true for 119899 = 2

LHS = 32 + [ 1sum119894=0

31198944(2minus1minus119894)] = 32 + [3041 + 3140]= 16 = 42 = RHS

(24)

Now say for some 119899 = 119898 ge 23119898 + [119898minus1sum

119894=0

31198944(119898minus1minus119894)] = 4119898 (25)

10 Complexity

For 119899 = 119898 + 1 ge 2 thereforeLHS = 3119898+1 + [ 119898sum

119894=0

31198944(119898minus119894)]

= 3119898+1 + 4 times [119898minus1sum119894=0

31198944(119898minus1minus119894)] + 311989840

= 3119898+1 + 4 times [4119898 minus 3119898] + 311989840= 3119898+1 + 4119898+1 minus (3 + 1) times 3119898 + 3119898 = 4119898+1= RHS

(26)

Because the statement is true for 119899 = 2 it is true for every119899 isin N and 119899 ge 2In the context of the template for the method proposed

the two theorems can be proven graphically by simplycounting the number of valid and redundant points viadifferent formulations If 3119899 + 119891(119899) = 4119899 for all 119899 isin N weknow the following

(i) 4119899 = 21198992119899 = (axis range)2 = total number of points

(ii) 3119899 = total number of ldquovalidrdquo data-points includingthe origin

(∵ Every input 119886119894 can manifest itself in the inputcombination represented by (119883119884) either in its orig-inal form (input combination represented by th 119883-coordinate) or as a negated input (input combinationrepresented by the119884-coordinate) ormay notmanifestitself at all)

(iii) 119891(119899) = total number of redundant points

(∵ Total number of points = total number of ldquovalidrdquopoints including the origin + total number of ldquoredun-dantrdquo points)

Proof To establish equality presented in the Theorem 3 weuse the formulation of 119891(119899) as presented in Figure 9 FromFigure 9 it is evident that

∵ 119896sum119897=1

119897 = 119896 (119896 + 1)2 forall119896 isin N119896 = 2119895 forall119895 isin N 0 le 119895 lt 119899

there4 119891 (119899) = [119899minus2sum119894=0

3119899minus2minus1198942119894 (2119894+1 minus 1)] + (2119899 minus 1) 2119899minus1(27)

The exponent of 3 translates to a multiplier that representsthe frequency of occurrence of the constituent triangle of thatspecific size in the template

1

1

2

22

3

4

568

7

32(2nminus3 minus 1)(2nminus4)31(2nminus2 minus 1)(2nminus3)

30(2nminus1 minus 1)(2nminus2)

(2n minus 1)(2nminus1)

3 points2 points1 point

2n minus 1 points

30

31

3 2

sum

Figure 9 Total number of ldquoredundant pointsrdquothe points in thedarkened region by counting the number of points in constituenttriangles separately

Proof AlternatelyTheorem4 can be proven using a recursiveformula for 119891(119899) as obtained from Figure 10

∵ 119891 (119899) = 3119891 (119899 minus 1) + 4119899minus1there4 119891 (119899) = 3 [3119891 (119899 minus 2) + 4119899minus2] + 4119899minus1

= 32119891 (119899 minus 2) + 3 times 4119899minus2 + 4119899minus1= [3119899minus1119891 (1) + 119899minus2sum

119894=0

3119894 (4(119899minus1minus119894))]

= [119899minus1sum119894=0

31198944(119899minus1minus119894)] ∵ 119891 (1) = 1

(28)

This method can be used in classrooms to quickly hand-calculate an optimized formof the logic function using a rulerand a compass alone (Figure 11)

4 Conclusion

A novel graphical technique for digital logic representationand optimization has been proposed which makes optimiza-tion algorithm much more instinctive and easy Multipleequations can be optimized simultaneously using the tem-plate presented One can theoretically therefore optimizesimultaneously multiple combinational logic circuits withany number of inputs or outputsWe propose a data structuretransformation that can compress a truth table into a fewparametersThe approach and the fundamentals involved arelikely to generate many novel solutions applicable to otherdisciplines A new paradigm is being proposed which opensup new avenues for research in terms of new methodologiesand pattern identification towards better logic reduction

Complexity 11

f(n minus 1)

f(n minus 1) f(n minus 1)

2nminus1 points in X2n

minus1

poin

ts in

Y

Figure 10 Total number of ldquoredundant pointsrdquothe points in thedarkened region by deriving a recursive formula for 119891(119899) Thus119891(119899) = 3 times 119891(119899 minus 1) + (2119899minus1)2

0 1 2 4 8 16

Figure 11 A compass and a ruler (marked with 2119899 units) canbe effectively used to quickly find the points that can be mergedtogether to generate amore optimized logic representation using thelogic laws proposed earlier (Section 35)

tailored to different implementation topologies such asSOP (ldquoAND-ORrdquoldquoNAND-onlyrdquo) POS (ldquoOR-ANDrdquoldquoNOR-onlyrdquo) and ldquoIMPLY-onlyrdquo realisations or the newer method-ologies such as ldquoreconfigurable asynchronous logic automata(RALA)rdquo [43] and the search formost suited template for eachin terms of the coordinate system of choice and the templategeneration rules

Our proposed technique currently establishes a one-to-one mapping between all of the possible variable combina-tions and the corresponding output statesmdashrepresenting theabsence and presence of every variable (in its original andthe negated form) for each of the variable combinations Onepossible future research direction is to investigate the rela-tionship between the proposed technique herein and otherrepresentation techniquesmdashsuch as QMDDs which too relyon quadrants and one-to-one mappings and which ratherextend way beyond the proposed technique to representtransformation matrices featuring complex entries useful forlogic involving qubits Further research may also be targetedtowards multilevel discrete systems beyond Boolean algebraand reversible [44 45] and hazard-free logic synthesis [9]

Conflicts of Interest

The authors declare that there are no conflicts of interestregarding the publication of this paper

References

[1] R K Brayton R Rudell A Sangiovanni-Vincentelli and AR Wang ldquoMIS A Multiple-Level Logic Optimization SystemrdquoIEEE Transactions on Computer-Aided Design of IntegratedCircuits and Systems vol 6 no 6 pp 1062ndash1081 1987

[2] A J De Geus and W Cohen ldquoA Rule-Based System for Opti-mizing Combinational Logicrdquo IEEE Design Test of Computersvol 2 no 4 pp 22ndash32 1985

[3] M Karnaugh ldquoThemapmethod for synthesis of combinationallogic circuitsrdquoTransactions of the American Institute of ElectricalEngineers Part I Communication and Electronics vol 72 no 5pp 593ndash599 1953

[4] M E Holder ldquoA modified karnaugh map techniquerdquo IEEETransactions on Education vol 48 no 1 pp 206-207 2005

[5] J Cavanagh Computer Arithmetic and Verilog HDL Fundamen-tals CRC Press 2009

[6] Z Kohavi and N K Jha Switching and finite automata theoryCambridge University Press 2009

[7] C Y Lee ldquoRepresentation of switching circuits by binary-decision programsrdquoBell Labs Technical Journal vol 38 pp 985ndash999 1959

[8] S B Akers ldquoBinary decision diagramsrdquo IEEE Transactions onComputers vol 27 no 6 pp 509ndash516 1978

[9] B Lin and S Devadas ldquoSynthesis of Hazard-Free MultilevelLogic Under Multiple-Input Changes from Binary DecisionDiagramsrdquo IEEE Transactions on Computer-Aided Design ofIntegrated Circuits and Systems vol 14 no 8 pp 974ndash985 1995

[10] C Yang and M Ciesielski ldquoBDS A BDD-based logic optimiza-tion systemrdquo IEEE Transactions on Computer-Aided Design ofIntegrated Circuits and Systems vol 21 no 7 pp 866ndash876 2002

[11] R E Bryant ldquoGraph-based algorithms for boolean functionmanipulationrdquo IEEE Transactions on Computers vol C-35 no8 pp 677ndash691 1986

[12] L Mauborgne ldquoAbstract interpretation using typed decisiongraphsrdquo Science of Computer Programming vol 31 no 1 pp 91ndash112 1998

[13] O Coudert and J C Madre ldquoA new implicit graph-based primeand essential prime computation techniquerdquo in Proceedings ofthe Proc International Symp Information Sciences FukuokaJapan 1992

[14] O Coudert and J C Madre ldquoA New Graph Based PrimeComputation Techniquerdquo in Logic Synthesis and Optimizationpp 33ndash57 Springer Boston MA USA 1993

[15] O Coudert J C Madre H Fraisse and H Touati ldquoImplicitprime cover computation An overviewrdquo in Proceedings of thein Proc Synthesis and Simulation Meeting and InternationalInterchange (SASIMI) Nara Japan 1993

[16] J Gu and R Puri ldquoAsynchronous circuit synthesis with Booleansatisfiabilityrdquo IEEE Transactions on Computer-Aided Design ofIntegrated Circuits and Systems vol 14 no 8 pp 961ndash973 1995

[17] W V Quine ldquoThe problem of simplifying truth functionsrdquoTheAmerican Mathematical Monthly vol 59 pp 521ndash531 1952

[18] W V Quine ldquoA way to simplify truth functionsrdquoThe AmericanMathematical Monthly vol 62 pp 627ndash631 1955

12 Complexity

[19] J McCluskey ldquoMinimization of Boolean functionsrdquo Bell LabsTechnical Journal vol 35 pp 1417ndash1444 1956

[20] S Petrick ldquoA direct determination of the irredundant forms of aboolean function from the set of prime implicantsrdquo Tech RepAir Force Cambridge Research Center 1956

[21] R L Rudell ldquoMultiple-Valued Logic Minimization for PLASynthesisrdquo Defense Technical Information Center 1986

[22] L Amaru P-E Gaillardon and G De Micheli ldquoMajority-Inverter Graph ANewParadigm for LogicOptimizationrdquo IEEETransactions on Computer-Aided Design of Integrated Circuitsand Systems vol 35 no 5 pp 806ndash819 2016

[23] D C Fielder ldquoClassroom Reduction of Boolean FunctionsrdquoIEEE Transactions on Education vol 9 no 4 pp 202ndash205 1966

[24] B C H Turton ldquoExtending Quine-McCluskey for exclusive-orlogic synthesisrdquo IEEE Transactions on Education vol 39 no 1pp 81ndash85 1996

[25] R Benzer and V Rozga ldquoThe Design and Application of aMinority Logic Gate-A Senior Projectrdquo IEEE Transactions onEducation vol 10 no 3 pp 141ndash146 1967

[26] N R Bell ldquoAMapMethod for the Teaching of the FundamentalConcepts of Compound-Input Logic Circuitsrdquo IEEE Transac-tions on Education vol 11 no 3 pp 173ndash177 1968

[27] R F Tinder ldquoMultilevel LogicMinimizationUsingK-mapXORPatternsrdquo IEEE Transactions on Education vol 38 no 4 pp370ndash375 1995

[28] B D Carroll and I Chen ldquoABALmdashA Language for BooleanFunction Representation andManipulationrdquo IEEE Transactionson Education vol 20 no 1 pp 70ndash72 1977

[29] C E Klock F R Schneider M V N Gomes D S MouraR P Ribas and A I Reis ldquoKARMA A didactic tool for two-level logic synthesisrdquo in Proceedings of theMSE 2007 2007 IEEEInternational Conference on Microelectronic Systems EducationEducating Systems Designers for the Global Economy and aSecure World pp 59-60 San Diego CA USA June 2007

[30] V P Correia and A I Reis ldquoA tutorial tool for switch logicrdquo inProceedings of the International Conference on MicroelectronicSystems Education MSE 2001 pp 28-29 Las Vegas NV USAJune 2001

[31] Z Stanisavljevic V Pavlovic B Nikolic and J DjordjevicldquoSDLDS-system for digital logic design and simulationrdquo IEEETransactions on Education vol 56 no 2 pp 235ndash245 2013

[32] P Corsini and L Rizzo ldquoSSCSSC A Tool for the Teaching ofDigital Circuitsrdquo IEEE Transactions on Education vol 34 no 1pp 70ndash75 1991

[33] G J Klir and M A Marin ldquoNew considerations in teachingswitching theoryrdquo IEEE Transactions on Education vol 12 no4 pp 257ndash261 1969

[34] M Gardner ldquoMathematical games The fantastic combinationsof John Conwayrsquos new solitaire game ldquoliferdquordquo Scientific Americanvol 223 no 4 pp 120ndash123 1970

[35] S Wolfram ldquoCellular automata as models of complexityrdquoNature vol 311 no 5985 pp 419ndash424 1984

[36] M Sierpinski ldquoSur une courbe dont tout point est un pointde ramificationrdquo Compte Rendus hebdomadaires des seance delAcademie des Science de Paris vol 160 pp 302ndash305 1915

[37] J-P Allouche and J Shallit Automatic SequencesTheory Appli-cations Generalizations Cambridge University Press 2003

[38] K A Bartlett R K Brayton G D Hachtel et al ldquoMultilevelLogic Minimization Using Implicit Donrsquot Caresrdquo IEEE Trans-actions on Computer-Aided Design of Integrated Circuits andSystems vol 7 no 6 pp 723ndash740 1988

[39] P Niemann R Wille D M Miller M A Thornton and RDrechsler ldquoQMDDs Efficient Quantum Function Representa-tion and Manipulationrdquo IEEE Transactions on Computer-AidedDesign of Integrated Circuits and Systems vol 35 no 1 pp 86ndash99 2016

[40] D Searls andMNoordewier ldquoPattern-matching search ofDNAsequences using logic grammarsrdquo in Proceedings of the SeventhIEEE Conference on Artificial Intelligence Application pp 3ndash9Miami Beach FL USA 1991

[41] C R Woese ldquoOrder in the genetic coderdquo Proceedings of theNational Acadamy of Sciences of the United States of Americavol 54 no 1 pp 71ndash75 1965

[42] M A Marchisio and J Stelling ldquoAutomatic design of digitalsynthetic gene circuitsrdquo PLoS Computational Biology vol 7 no2 Article ID e1001083 2011

[43] N Gershenfeld D Dalrymple K Chen et al ldquoReconfigurableasynchronous logic automata (RALA)rdquo in Proceedings of the37th Annual ACM SIGPLAN-SIGACT Symposium on Principlesof Programming Languages POPLrsquo10 vol 45 pp 1ndash6 MadridSpain January 2010

[44] V V Shende A K Prasad I L Markov and J P HayesldquoSynthesis of reversible logic circuitsrdquo IEEE Transactions onComputer-Aided Design of Integrated Circuits and Systems vol22 no 6 pp 710ndash722 2003

[45] P Gupta A Agrawal and N K Jha ldquoAn algorithm for synthesisof reversible logic circuitsrdquo IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems vol 25 no 11pp 2317ndash2329 2006

Submit your manuscripts athttpswwwhindawicom

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

MathematicsJournal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Mathematical Problems in Engineering

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Differential EquationsInternational Journal of

Volume 2014

Applied MathematicsJournal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Probability and StatisticsHindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Journal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Mathematical PhysicsAdvances in

Complex AnalysisJournal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

OptimizationJournal of

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CombinatoricsHindawi Publishing Corporationhttpwwwhindawicom Volume 2014

International Journal of

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Operations ResearchAdvances in

Journal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Function Spaces

Abstract and Applied AnalysisHindawi Publishing Corporationhttpwwwhindawicom Volume 2014

International Journal of Mathematics and Mathematical Sciences

Hindawi Publishing Corporationhttpwwwhindawicom Volume 201

The Scientific World JournalHindawi Publishing Corporation httpwwwhindawicom Volume 2014

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Algebra

Discrete Dynamics in Nature and Society

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

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Decision SciencesAdvances in

Journal of

Hindawi Publishing Corporationhttpwwwhindawicom

Volume 2014 Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Stochastic AnalysisInternational Journal of

Complexity 3

Y

X

a2a1a0 7

a2a1 6

a2a0 5

a2 4

a1a0 3

a1 2

a0 1

(0 0) 7a2a1a0

6a2a1

5a2a0

4a2

3a1a0

2a1

1a0

Figure 1 Pandit-Plot (for 119899 = 3) with redundant data-points

One axis (say 119909-axis) represents a condition where thedesignated inputs are all True (T) (also called High (H) orlogic level 1) while the other represents a case where thoseinputs are all False (F) (also called Low (L) or logic level0) There is therefore a one-to-one correspondence betweenthe set of all of combinations of the inputs and the set ofpoints on the plane with integer coordinates With sucha representation system in place every point on the plotwith integer coordinates signifies a single product (in a SOPrepresentation) or a single sum (in a POS representation) Asan example for a system with three inputs (1198860 1198861 and 1198862)the template of the plot that is restricted to the first quadrant(119901 ge 0) will be as shown in Figure 1

Throughout the discussion henceforth we only considerthe template in the first quadrant The templates in fourquadrants are symmetric to each other with 119909- and 119910-axesand the ldquo119909 = 119910rdquo and ldquo119909 = minus119910rdquo lines as the axes of symmetryWeobserve that in the scatter plot fromFigure 1 certain data-points have been marked distinctively using the filled circlesThese will be called ldquoredundantrdquo input combinationsmdashfor thereasons that will be explained in Section 33

32 Representing an Input Combination Representation ofthe combinational function ldquo119891rdquo in graphical form may bedone for ldquo119891rdquo either in POS or in SOP form the choice lieswith the logic designeruser of the plot

To represent a function in SOP form every constituentproduct term is separated into two products one containingexclusively the direct inputs and the other only the negatedinputs The overall product is represented by a point (119909 119910)where for example the 119909-coordinate corresponds to theset of input combinations coming only from the directinputs while the 119910-coordinate corresponds to the set of inputcombinations from only the negated inputs using (1) Theabsence of inputs implies that the corresponding coordinateis 0

a2a1a0 7

a2a1 6

a2a0 5

a2 4

a1a0 3

a1 2

a0 1

(0 0) 7a2a1a0

6a2a1

5a2a0

4a2

3a1a0

2a1

1a0

Figure 2 Pandit-Plot for 119891 = 11988601198861 + 1198860not11988611198862

As an example let us consider the following sum ofproducts

119891 = 11988601198861 + 1198860not11988611198862 (2)

represented by points (3 0) and (5 2) shown in Figure 2

(i) For the first product ldquo11988601198861rdquo to be True both 1198860 and 1198861need to be True Therefore the 119909-coordinate = 20 +21 = 3 as per (1) Because there are no negated inputsin the first product no 119886119896 needs to be False for 119891 tobe TrueTherefore the 119910-coordinate is 0The productldquo11988601198861rdquo is therefore represented by point (3 0)

(ii) Similarly for the product ldquo1198860not11988611198862rdquo to be True both1198860 and 1198862 need to be TrueTherefore the 119909-coordinate= 20 + 22 = 5 as per (1) Also 1198861 needs to be Falsefor function119891 to be TrueTherefore the 119910-coordinate= 21 = 2 The product ldquo1198860not11988611198862rdquo is thereforerepresented by point (5 2)

Points (3 0) and (5 2) will be called ldquodata-pointsrdquo as theysummarise the function by transforming it into numericaldata corresponding to the chosen coordinate system

Similarly for a POS-based representation we look forFalse (0FL) logic outputs to mark the points transformingevery sum in the expression

Every Boolean function can therefore be representedby only two parameters alone in this way namely thecoordinates of the representative points irrespective of thenumber of inputs This is a huge data compression in itselfwhere instead of storing the entire truth table or even allof the combinations for which the output is either T or F(whichever count is less) we can simply represent a functionwith a few data-points The system can further be optimizedto remove extraneous information as will be explained inSections 33 35 and 36

4 Complexity

(1) procedure GENERATE1(119899) ⊳ 119899 = number of inputs(2) 119877119890119889119906119899119889119886119899119905119878119890119905 = 120601(3) for 119909 larr 0 2119899 minus 1 do ⊳ Represents direct inputs(4) for 119910 larr 0 2119899 minus 1 do ⊳ Represents negated inputs(5) 119909119887119894119899119886119903119910 larr (119909)2(6) 119910119887119894119899119886119903119910 larr (119910)2(7) 119863 larr 119890119897119890119898119890119899119905119908119894119904119890(119909119887119894119899119886119903119910 and 119910119887119894119899119886119903119910)(8) if 119886119899119910(119863) = 1 then(9) 119877119890119889119906119899119889119886119899119905119878119890119905 = 119877119890119889119906119899119889119886119899119905119878119890119905 cup (119909 119910)(10) end if(11) end for(12) end for(13) end procedure

Algorithm 1 Redundant set generation for Pandit-Plot

33 Existence of Redundant Data-Points It can easily beobserved that there exist points on the plot with integercoordinates that correspond to a Boolean product or aBoolean sum that can never occur in a reduced SOP or areduced POS expression respectively

As an example point (1 1) corresponds to the (1198860not1198860)product in SOP which evaluates to 0F and the samepoint corresponds to the (1198860 + not1198860) sum in POS whichevaluates to 1T These input combinations do not haveany effect on the final expression evaluation as the outputcorresponding to these input combinations is preknown andtherefore redundant to be included as part of any Booleanexpression (eg 119891 + 1198860not1198860 = 119891) We therefore discardsuch input cases and term these as ldquoredundant pointsrdquo inthe discussions below while the rest will be called ldquovalidrdquopoints except the origin which falls into neither of the twocategories representing simply the trivial case of the outputbeing independent of the inputs

34 Generation of the Template To translate any logic func-tion to this plot the first step is to build the necessary templateor the canvas with all the input redundancies indicated(Figure 1) Such a template may be generated by exploitingpatterns for which the redundancies appear (Algorithm 1)

For example we note the following for a system with 119899inputs

(i) The 119909- and 119910-axes extend from 0 to 2119899 minus 1(ii) The points on the line 119909 = 119910 are redundant points(iii) All of the upper diagonal elements are redundant

points(iv) Redundant points because of the 1198860 inputrsquos logic level

extend along both the 119909 and 119910 directions skippingevery other point that is skipping the odd integercoordinates The redundant points associated with 1198860input are therefore of the form (2119894 + 1 2119895 + 1) where119894 119895 are integers

(v) Alternatively the template may be generated usingcellular automata rules on a brick-wall-like automatatemplate as devised in Figure 3 (in contrast to the

RulePattern

PatternRule

Xminus 1 y X Y minus 1

X Y

X minus 1 Y X Y minus 1

X Y

X minus 1 YX Y minus 1

X Y

X minus 1 Y X Y minus 1

X Y

00

10 0120 11 12

30 21 12 03

40 31 22 13 04

50 41 32 23 14 05

60 51 42 33 24 15 06

07162543 34526170

80 71 62 53 44 35 26 17 08

Figure 3 Template generation from 2 different kinds of rulessignifying its relation to the Sierpinski trianglefractals and thecellular automata

typical cellular automata template as used inConwayrsquosgame of life [34 35]mdashwhere the borders of the indi-vidual cells coincide) This gives rise to the Sierpinskitriangle [36 37] pattern as desired The captions forthe individual blocks indicate the (119909 119910) coordinatesof the points that the blocks represent

35 Logic Laws The logic optimization process is visualintuitive and simplemdashjust as for Karnaugh-maps It mayalternatively be easily implemented using a computer pro-gram by understanding the strategies in place numericallyThe basic idea of optimization is to get rid of excess of

Complexity 5

information by inspecting the scatter plot and bring the data-points as close to the axes as possibleThere exist patterns thatneed to be utilised to effectively carry out this ldquoreductionrdquoThese patterns need to be formulated into a compilation ofldquologic lawsrdquo A few examples of a logic law or an optimizationstrategy follow

Theorem 1 (radic2-integer-multiple hypotenuse rule) If two ofthe data-points are vertices of an upright right angled isoscelestriangle with its equal sides having length = 2119896 (119896 isin N) andif the third vertex is not to the right of any of those two data-points then the two data-points could effectively be representedby that third vertex alone so long as the third vertex is not aredundant point

Proof Let data-points be 119860(1199091 1199101) and 119861(1199092 1199102) such that1199091 gt 1199092 and 1199101 lt 1199102 and (1199091 minus 1199092) = (1199102 minus 1199101) = 2119896 119896 isin Nwithout loss of generalisation

Because none of the three points119860(1199091 1199101)119861(1199092 1199102) and119862(1199092 1199101) is a redundant point and because 1199091 + 2119896 = 1199092 itfollows that

1199091 = sum119894=ind(1199091)

2119894 = 2119896 + sum119894=ind(1199092)

2119894 (3)

where ind(119901) is set of suffixes corresponding to inputsassociated with coordinate ldquo119901rdquo

Similarly it follows that

1199102 = sum119894=ind(1199102)

2119894 = 2119896 + sum119894=ind(1199101)

2119894 (4)

Therefore the point 119861(1199092 1199102) represents both the directand negated inputs corresponding to the point 119862(1199091 1199102)along with the input not119886119896 Similarly the point 119860(1199091 1199101)represents both the direct and negated inputs correspondingto the point 119862(1199091 1199102) along with the input 119886119896 The twopoints 119860 and 119861 therefore effectively represent the inputscorresponding to the point 119862 and in addition either thedirect or the negated version of the input 119886119896

Therefore in SOP form

119891 fl 119891119860 + 119891119861 = (119886119896) 119891119862 + (not119886119896) 119891119862 = 119891119862 (5)

and in POS form

119891 fl 119891119860119891119861 = (119886119896 + 119891119862) (not119886119896 + 119891119862) = 119891119862 (6)

where 119891119866 fl function associated with point 119866Thus as per (5) and (6) this rule is simply amanifestation

of the two well-known equalities (1) 119875(119902) + 119875(not119902) = 119875and (2) (119878 + 119902)(119878 + not119902) = 119878 for the template we presentheremdashwhere 119875 and 119878 are respectively the product terms andthe summation terms consisting of variables excluding 119902

As an illustration if the plot in Figure 4 represents aBoolean function 119891 in SOP form with the points 119860 and 119861 asits ldquodata-pointsrdquo then per the definitions earlier

119891 = 1198860not11988611198862 + 1198860not1198861not1198862 (7)

(0 0)

a2a1a0

a2a1

a2a0

a2

a1a0

a1

a0

B

AC

7

6

5

4

3

2

1

7654321a2a1a0a2a1a2a0a2a1a0a1a0

Figure 4 Diagonal optimization for SOP

This is because point 119860(5 2) translates to ldquo1198860not11988611198862rdquo whilepoint 119861(1 6) represents ldquo1198860not1198861not1198862rdquo

Per the law proposed points 119860 and 119861 are representedtogether by point119862(1 2) alone since the right angled triangle119860119861119862 is an isosceles triangle with its congruent sides havinglength 2119896 119896 isin N(119897(119862119860) = 119897(119862119861) = 4)

We find here that the hypothesis is true since

119891 = 1198860not11988611198862 + 1198860not1198861not1198862 = (1198860not1198861) (1198862 + not1198862)= 1198860not1198861 997904rArr 119862 (1 2) (8)

If the scatter plot in Figure 4 were to correspond to a POSrepresentation then the plot would have been represented as

119891 = (1198860 + not1198861 + 1198862) (1198860 + not1198861 + not1198862) (9)

Effectively

119891 = (1198860 + not1198861) + (1198860 + not1198861) (1198862 + not1198862) + (1198862) (not1198862)= (1198860 + not1198861) 997904rArr 119862 (1 2) (10)

In either case points 119860(5 2) and 119861(1 6) are togetherrepresented by 119862(1 2) aloneTheorem 2 (symmetry about ldquo119909 = 119910rdquo line) Two ldquovalidrdquopoints symmetric about the ldquo119909 = 119910rdquo line in an SOP plot canbe effectively represented by a newly defined logical operationrepresented by operator ⋆ where119886119894 ⋆ 119886119895 = (prod119886119894) sdot (prodnot119886119895) + (prodnot119886119894) sdot (prod119886119895)

such that 119886119894 cap 119886119895 = 120601 (11)

6 Complexity

Two ldquovalidrdquo points symmetric about the ldquo119909 = 119910rdquo line in a POSplot can be effectively represented by a newly defined logicaloperation represented by operator ⋆ where119886119894 ⋆ 119886119895 = (sum119886119894 +sumnot119886119895) sdot (sumnot119886119894 +sum119886119895)

such that 119886119894 cap 119886119895 = 120601 (12)

Proof Two points symmetric about the ldquo119909 = 119910rdquo line will beof the forms 119860(1199090 1199100) and 119861(1199100 1199090) It follows that the setof direct inputs corresponding to the point 119860 (fl 119886119894) is thesame as the set of negated inputs that are represented by point119861 and vice versa (fl 119886119895)

Because points 119860 and 119861 are not redundant points itfollows that 119886119894 cap 119886119895 = 120601

Therefore for SOP

∵ 119891119860 = (prod119886119894) sdot (prodnot119886119895) there4 119891119861 = (prodnot119886119894) sdot (prod119886119895)

such that 119886119894 cap 119886119895 = 120601dArr

119891 = 119891119860 + 119865119861= (prod119886119894) sdot (prodnot119886119895) + (prodnot119886119894) sdot (prod119886119895)

(13)

Similarly for POS

∵ 119891119860 = (sum119886119894 +sumnot119886119895) there4 119891119861 = (sumnot119886119894 +sum119886119895)

such that 119886119894 cap 119886119895 = 120601dArr

119891 = 119891119860 sdot 119865119861 = (sum119886119894 +sumnot119886119895) sdot (sumnot119886119894 +sum119886119895)

(14)

For a system with just two inputs the ldquo⋆rdquo operator repre-sents simply an ldquoXORrdquo (oplus) operation while the ldquo⋆rdquo operatorrepresents an ldquoXNORrdquo (⊙) operation The ldquoNAND-onlyrdquoimplementation of ldquo⋆⋆rdquo operation is shown in Figure 5Thisnewly defined logic gate can then be optimized for given fan-in and fan-out values as necessary to be used as a buildingblock in the subsequent logic design

36 Process of Optimization While there is much scopefor further research in this area for effective algorithmdevelopment in terms of logic optimization including theones targeted to novel topologies such as the ones involvingIMPLY (not119860+119861) gates alone for example (instead of SOPPOSforms presented here effectively implemented using ldquoNANDalonerdquo and ldquoNOR alonerdquo topologies resp) one of the mostlikely logic flows for such optimization is presented next

Steps involved in this example algorithm are as follows

ai0 ai1 ai aj0 aj1 ajn

ajai

ai aj ai aj⋆ ⋆

Figure 5 ldquoNAND-onlyrdquo implementation of the newly definedlogical operations ldquo⋆ and ⋆rdquo that are essentially oplus (XOR) and ⊙(XNOR) operations respectively for a two-input system

(i) ldquoGeneraterdquo the template and plot the function(ii) ldquoExpandrdquo the expression to include every possible

product in SOP form (every possible sum for a POSform)

(iii) ldquoReducerdquo the expression using logic laws(iv) ldquoRepeatrdquo the above two steps in iteration until no

further reduction is possible as illustrated in Figure 6

As an example let 119891 = (not1198861 + 119886011988611198862) and let the represen-tation form chosen be SOP-based as well 119891 ultimately getsreduced to 119891 = not1198861 + 11988601198862 as shown in Figure 6

(1) Generate plot the product terms (Figure 6(a))(2) Expand plot points relevant to each of the current

data-points (Figure 6(b)) Here not1198861 is expanded toinclude points wherever not1198861 = 1 997904rArr 119891 = 1

(3) Reduce reduce the expression using logic laws If anew data-point replacing one or some of the originaldata-points is obtained through this process and ifthis data point cannot be further reduced then it isnoted and kept for the next iteration (We note anexample of such data-point with a label ldquoNEWrdquo inFigure 6(c))

(4) Repeat repeat steps (2) and (3) until no new replace-ment data-point closer to the origin can be obtained(Figure 6(d))

Similar to the Karnaugh-maps the ldquodo not carerdquo inputcombinations could be exploited for logic reduction [3 38]

Complexity 7

(0 0)

a2a1a0

a2a1

a2a0

a2

a1a0

a1

a0

7

6

5

4

3

2

1

7654321a2a1a0a2a1a2a0a2a1a0a1a0

(a) ldquoGeneraterdquo step illustrated for 119891 = (not1198861) + (1198860)(1198861)(1198862)

a2a1a0

a2a1

a2a0

a2

a1a0

a1

a0

7

6

5

4

3

2

1

(0 0) 7654321a2a1a0a2a1a2a0a2a1a0a1a0

(b) ldquoExpandrdquo step illustrated for the product ldquo(not1198861)rdquo

a2a1a0

a2a1

a2a0

a2

a1a0

a1

a0

7

6

5

4

3

2

1

(0 0) 7654321a2a1a0a2a1a2a0a2a1a0a1a0

NEW

(c) ldquoReductionrdquo using the ldquoradic2-integer-multiple hypotenuse rulerdquo

a2a1a0

a2a1

a2a0

a2

a1a0

a1

a0

7

6

5

4

3

2

1

(0 0) 7654321a2a1a0a2a1a2a0a2a1a0a1a0

(d) The final optimized expression 119891 = (not1198861) + (1198860)(1198862)

Figure 6 Process of optimization the steps in order are illustrated

37 As a Data Structure Because the individual Booleanterms are represented by only two coordinates (irrespectiveof the number of inputs) any combinational logic may berepresented by two parameters alone This can be viewedas a conversion of a graphical scheme to an equivalentnongraphical numerical scheme to be handled by computingsystems efficiently The two coordinates may be stored in thememory as a single unit

Because one can represent any logic expression througha set of coordinates alone we now investigate the numberof bits required to store each of the numbered coordinatesWhile a proposed template for 119899 inputs consists of 4119899 points(including the origin) the number of valid coordinates is only

3119899 minus 1 This is because a variable can manifest itself in aninput combination in its original form (119886119896) or as a negatedversion (not119886119896) or it could simply be absent Thus there arethree possibilities for every input 119886119896 The number of validpoints is therefore 3119899 minus 1 (excluding the origin indicativeof a trivial case where the output is independent of all of theinputs under consideration) Both the total number of points(120591 = 4119899 minus 1) in a template and the number of valid points(120592 = 3119899 minus 1) grow exponentially with 119899 The ratio of thenumber of bits thus required (with and without consideringthe redundant points) = ceil(log2(3119899 minus 1))ceil(log2(4119899 minus 1))which varies between 075 and 085 and eventually convergesto 08 for large 119899 As an example for 119899 = 3 120592 = 26 and

8 Complexity

120591 = 63 while for 119899 = 6 120592 = 728 and 120591 = 4095 Memorysavings thus grow with 119899 if we effectively take into accountthe redundancies in the template

However in comparison to K-maps (= 2119899 cells for an 119899-input system) our proposed method requires a much highernumber of points (= 3119899minus1 if we consider only the valid inputcombinations excluding the origin) This is because the K-maps do not take into account all of the input combinationsbut only the ones where each of the inputs manifests itselfby its presence in its original or in its negated form (thus 2119899possibilities) In the proposed method we explicitly take intoaccount also the reduced input combinations where some ofthe inputs are absent

38 Possible Extensions and Further Research Scope

(i) Beyond SOPPOS paradigms more patterns and theresulting optimization strategies need to be investi-gated in different logic gate methodologies for exam-ple SOP (ldquoAND-ORrdquo which is ldquoNAND-onlyrdquo) POS(ldquoOR-ANDrdquo which is ldquoNOR-onlyrdquo) and ldquoIMPLY-onlyrdquo realisations

(ii) Multilevel logic the concept could be extended tothree dimensions to represent a ternary logic systemwhere both inputs and outputs can have three possiblelogic levels (0 1 2) The resulting representation isthus in the form of a ldquologic latticerdquo instead ofthe two-dimensional grid presented here where thethird dimension would serve a dual purpose Firstit represents a condition where all the inputs arelogical level ldquo2rdquo (just as 119885 and 119884 represented statesldquo1rdquo and ldquo0rdquo resp) Secondly the 119911-axis may alsorepresent an output logic level within such a ldquologicslicerdquo As an example output level-1 may correspondto a point with integer (119883 119884 119885) coordinates level-0may correspond to a point just beneath this point andlevel-2 just above (Figure 7)

(iii) Alternate coordinate systems every data-point sym-bolises a huge degree of information but with onlytwo or three parameters (coordinates) Because thisinformation need not necessarily come about usinga Cartesian coordinate system alone one can chooseto alternatively employ some other coordinate systemand look for patterns and laws for optimizationwithinsuch schemes For example a 2D polar system maybe used where the (119909 119910) to (119903 120579) transformation isgoverned by the equations 119903 = 119909 120579 = 2120587119910(2119899 minus 1)and 119909 119910 isin [0 2119899 minus 1] Note that 120579 remains in therange [0 2120587] irrespective of the number of inputs(Figure 8)The logic laws for such alternate coordinatesystemsmdashwhere every coordinate of interest120595 followsthe equation120595 = 119891(sum119898119896=1 2119894119896) 119894119896 isin Nmdashcan be devisedby recognising the inherent patterns which remainsan open problem with further scope for research

39 Implications to Other Fields of Study One can use thetemplate to establish three algebraic equalities as will bediscussed in detail in this section The method in general

z-axis

x-axisy-axis

(inputs = 2)

(inputs = 0)(inputs = 1)

Δz lt 1

z = z0planez = z0

+ dzplane

(x0 y

0 z0 + Δz)

(x0 y

0 z0 minus Δz)

(x0 y

0 z0 )

z = z minusdz

plane= 2

Output

= 1

Output

= 0

Output

Figure 7 Ternary logic representation (1199090 1199100 1199110 isin N) The point(1199090 1199100 1199110plusmnΔ119911 or 1199110) represents the input condition where all inputscorresponding to 119909-coordinate = 1 all inputs corresponding to 119910-coordinate = 0 and all inputs corresponding to 119911-coordinate = 2

Figure 8 Cartesian (119909 119910) coordinate system converted into polar(119903 120579) system where 119903 = 119909 120579 = 2120587119910(2119899 minus 1) and 119909 119910 isin [0 2119899 minus 1]Filled circles indicate the ldquoredundant pointsrdquo

is useful for alternative representation and processing ofdata whenever there is representation of information (ieencoding or decoding) in the form of distinct or discretestates The basic representation strategy can therefore beextended to represent and optimize operations on qubits [39]or to represent codon tables [40 41] or design digital syntheticgene circuits [42] Using the template used in the methodproposed we have derived the following three equalities inrelation to (4119899 minus 3119899) The method gives practical evidence ofthe equalities invented and presented next

Complexity 9

Theorem 3

3119899 + [119899minus2sum119894=0

3119899minus2minus1198942119894 (2119894+1 minus 1)] + (2119899 minus 1) 2119899minus1 = 4119899forall119899 isin N 119899 ge 2

(15)

or in other words

3119899 + [119899minus2sum119894=0

3119899minus2minus119894(2119894+12 )] + (21198992 ) = 4119899

forall119899 isin N 119899 ge 2(16)

Theorem 4

3119899 + [119899minus1sum119894=0

31198944(119899minus1minus119894)] = 4119899 forall119899 isin N 119899 ge 2 (17)

Theorem 5 As a consequence

[119899minus1sum119894=0

31198944(119899minus1minus119894)] = [119899minus2sum119894=0

3119899minus2minus119894(2119894+12 )] + (21198992 )

forall119899 isin N 119899 ge 2∵ Equations (16) and (17)

(18)

Let us first establish that the equalities being discussed are trueusing induction

Proof For Theorem 3 we observe that the equalities pre-sented in (15) or (16) are true for 119899 = 2 and 119899 = 3

For 119899 = 2LHS = 32 + [ 0sum

119894=0

30minus119894 (2119894+1 minus 1) 2119894] + (22 minus 1) 21= 9 + [(1 (2 minus 1) 1)] + (4 minus 1) 2 = 9 + 1 + 6= 16 = 42 = RHS

(19)

For 119899 = 3LHS = 33 + [ 1sum

119894=0

(31minus119894 (2119894+1 minus 1) 2119894)] + (23 minus 1) 22= 27 + [(31 (21 minus 1) 20) + (30 (22 minus 1) 21)]+ (7) 4 = 27 + [3 (1) (1) + 1 (3) (2)] + (7) 4

= 27 + 9 + 28 = 64 = 43 = RHS

(20)

Now say for some 119899 = 119898 ge 23119898 + [119898minus2sum

119894=0

(3119898minus2minus119894 (2119894+1 minus 1) 2119894)] + (2119898 minus 1) 2119898minus1= 22119898 = 4119898

(21)

Therefore

3119898 + (3119898minus2 (21 minus 1) 20 + 3119898minus3 (22 minus 1) 21 + sdot sdot sdot+ 31 (2119898minus2 minus 1) 2119898minus3 + 30 (2119898minus1 minus 1) 2119898minus2)+ (2119898 minus 1) 2119898minus1

= 22119898(22)

For 119899 = 119898 + 1 ge 2 thereforeLHS = 3119898+1 + [119898minus1sum

119894=0

(3119898minus1minus119894 (2119894+1 minus 1) 2119894)]+ (2119898+1 minus 1) 2119898

= 3119898+1 + (3119898minus1 (21 minus 1) 20 + 3119898minus2 (22 minus 1) 21 + sdot sdot sdot+ 31 (2119898minus1 minus 1) 2119898minus2 + 30 (2119898 minus 1) 2119898minus1)+ (2119898+1 minus 1) 2119898

= 3 (3119898 + (3119898minus2 (21 minus 1) 20 + 3119898minus1 (22 minus 1) 21 + sdot sdot sdot+ 30 (2119898minus1 minus 1) 2119898minus2)) + (2119898 minus 1) 2119898minus1+ (2119898+1 minus 1) 2119898

= (2 + 1) times (22119898 minus (2119898 minus 1) 2119898minus1) + (2119898 minus 1) 2119898minus1+ (2119898+1 minus 1) 2119898 (∵ Equation (22))

= (22119898+1 minus 22119898 + 2119898) + (22119898 minus 22119898minus1 + 2119898minus1)+ (22119898minus1 minus 2119898minus1 + 22119898+1 minus 2119898)

= 22119898+2 = 4119898+1 = RHS

(23)

Therefore if the statement is true for 119899 = 119898 then thestatement is true for 119899 = 119898 + 1 (119899119898 isin N) Because thestatement is true for 119899 = 2 and 3 it is true for every 119899 isin N

and 119899 ge 2Proof For Theorem 4 similarly we observe that the equalitypresented in (17) is true for 119899 = 2

LHS = 32 + [ 1sum119894=0

31198944(2minus1minus119894)] = 32 + [3041 + 3140]= 16 = 42 = RHS

(24)

Now say for some 119899 = 119898 ge 23119898 + [119898minus1sum

119894=0

31198944(119898minus1minus119894)] = 4119898 (25)

10 Complexity

For 119899 = 119898 + 1 ge 2 thereforeLHS = 3119898+1 + [ 119898sum

119894=0

31198944(119898minus119894)]

= 3119898+1 + 4 times [119898minus1sum119894=0

31198944(119898minus1minus119894)] + 311989840

= 3119898+1 + 4 times [4119898 minus 3119898] + 311989840= 3119898+1 + 4119898+1 minus (3 + 1) times 3119898 + 3119898 = 4119898+1= RHS

(26)

Because the statement is true for 119899 = 2 it is true for every119899 isin N and 119899 ge 2In the context of the template for the method proposed

the two theorems can be proven graphically by simplycounting the number of valid and redundant points viadifferent formulations If 3119899 + 119891(119899) = 4119899 for all 119899 isin N weknow the following

(i) 4119899 = 21198992119899 = (axis range)2 = total number of points

(ii) 3119899 = total number of ldquovalidrdquo data-points includingthe origin

(∵ Every input 119886119894 can manifest itself in the inputcombination represented by (119883119884) either in its orig-inal form (input combination represented by th 119883-coordinate) or as a negated input (input combinationrepresented by the119884-coordinate) ormay notmanifestitself at all)

(iii) 119891(119899) = total number of redundant points

(∵ Total number of points = total number of ldquovalidrdquopoints including the origin + total number of ldquoredun-dantrdquo points)

Proof To establish equality presented in the Theorem 3 weuse the formulation of 119891(119899) as presented in Figure 9 FromFigure 9 it is evident that

∵ 119896sum119897=1

119897 = 119896 (119896 + 1)2 forall119896 isin N119896 = 2119895 forall119895 isin N 0 le 119895 lt 119899

there4 119891 (119899) = [119899minus2sum119894=0

3119899minus2minus1198942119894 (2119894+1 minus 1)] + (2119899 minus 1) 2119899minus1(27)

The exponent of 3 translates to a multiplier that representsthe frequency of occurrence of the constituent triangle of thatspecific size in the template

1

1

2

22

3

4

568

7

32(2nminus3 minus 1)(2nminus4)31(2nminus2 minus 1)(2nminus3)

30(2nminus1 minus 1)(2nminus2)

(2n minus 1)(2nminus1)

3 points2 points1 point

2n minus 1 points

30

31

3 2

sum

Figure 9 Total number of ldquoredundant pointsrdquothe points in thedarkened region by counting the number of points in constituenttriangles separately

Proof AlternatelyTheorem4 can be proven using a recursiveformula for 119891(119899) as obtained from Figure 10

∵ 119891 (119899) = 3119891 (119899 minus 1) + 4119899minus1there4 119891 (119899) = 3 [3119891 (119899 minus 2) + 4119899minus2] + 4119899minus1

= 32119891 (119899 minus 2) + 3 times 4119899minus2 + 4119899minus1= [3119899minus1119891 (1) + 119899minus2sum

119894=0

3119894 (4(119899minus1minus119894))]

= [119899minus1sum119894=0

31198944(119899minus1minus119894)] ∵ 119891 (1) = 1

(28)

This method can be used in classrooms to quickly hand-calculate an optimized formof the logic function using a rulerand a compass alone (Figure 11)

4 Conclusion

A novel graphical technique for digital logic representationand optimization has been proposed which makes optimiza-tion algorithm much more instinctive and easy Multipleequations can be optimized simultaneously using the tem-plate presented One can theoretically therefore optimizesimultaneously multiple combinational logic circuits withany number of inputs or outputsWe propose a data structuretransformation that can compress a truth table into a fewparametersThe approach and the fundamentals involved arelikely to generate many novel solutions applicable to otherdisciplines A new paradigm is being proposed which opensup new avenues for research in terms of new methodologiesand pattern identification towards better logic reduction

Complexity 11

f(n minus 1)

f(n minus 1) f(n minus 1)

2nminus1 points in X2n

minus1

poin

ts in

Y

Figure 10 Total number of ldquoredundant pointsrdquothe points in thedarkened region by deriving a recursive formula for 119891(119899) Thus119891(119899) = 3 times 119891(119899 minus 1) + (2119899minus1)2

0 1 2 4 8 16

Figure 11 A compass and a ruler (marked with 2119899 units) canbe effectively used to quickly find the points that can be mergedtogether to generate amore optimized logic representation using thelogic laws proposed earlier (Section 35)

tailored to different implementation topologies such asSOP (ldquoAND-ORrdquoldquoNAND-onlyrdquo) POS (ldquoOR-ANDrdquoldquoNOR-onlyrdquo) and ldquoIMPLY-onlyrdquo realisations or the newer method-ologies such as ldquoreconfigurable asynchronous logic automata(RALA)rdquo [43] and the search formost suited template for eachin terms of the coordinate system of choice and the templategeneration rules

Our proposed technique currently establishes a one-to-one mapping between all of the possible variable combina-tions and the corresponding output statesmdashrepresenting theabsence and presence of every variable (in its original andthe negated form) for each of the variable combinations Onepossible future research direction is to investigate the rela-tionship between the proposed technique herein and otherrepresentation techniquesmdashsuch as QMDDs which too relyon quadrants and one-to-one mappings and which ratherextend way beyond the proposed technique to representtransformation matrices featuring complex entries useful forlogic involving qubits Further research may also be targetedtowards multilevel discrete systems beyond Boolean algebraand reversible [44 45] and hazard-free logic synthesis [9]

Conflicts of Interest

The authors declare that there are no conflicts of interestregarding the publication of this paper

References

[1] R K Brayton R Rudell A Sangiovanni-Vincentelli and AR Wang ldquoMIS A Multiple-Level Logic Optimization SystemrdquoIEEE Transactions on Computer-Aided Design of IntegratedCircuits and Systems vol 6 no 6 pp 1062ndash1081 1987

[2] A J De Geus and W Cohen ldquoA Rule-Based System for Opti-mizing Combinational Logicrdquo IEEE Design Test of Computersvol 2 no 4 pp 22ndash32 1985

[3] M Karnaugh ldquoThemapmethod for synthesis of combinationallogic circuitsrdquoTransactions of the American Institute of ElectricalEngineers Part I Communication and Electronics vol 72 no 5pp 593ndash599 1953

[4] M E Holder ldquoA modified karnaugh map techniquerdquo IEEETransactions on Education vol 48 no 1 pp 206-207 2005

[5] J Cavanagh Computer Arithmetic and Verilog HDL Fundamen-tals CRC Press 2009

[6] Z Kohavi and N K Jha Switching and finite automata theoryCambridge University Press 2009

[7] C Y Lee ldquoRepresentation of switching circuits by binary-decision programsrdquoBell Labs Technical Journal vol 38 pp 985ndash999 1959

[8] S B Akers ldquoBinary decision diagramsrdquo IEEE Transactions onComputers vol 27 no 6 pp 509ndash516 1978

[9] B Lin and S Devadas ldquoSynthesis of Hazard-Free MultilevelLogic Under Multiple-Input Changes from Binary DecisionDiagramsrdquo IEEE Transactions on Computer-Aided Design ofIntegrated Circuits and Systems vol 14 no 8 pp 974ndash985 1995

[10] C Yang and M Ciesielski ldquoBDS A BDD-based logic optimiza-tion systemrdquo IEEE Transactions on Computer-Aided Design ofIntegrated Circuits and Systems vol 21 no 7 pp 866ndash876 2002

[11] R E Bryant ldquoGraph-based algorithms for boolean functionmanipulationrdquo IEEE Transactions on Computers vol C-35 no8 pp 677ndash691 1986

[12] L Mauborgne ldquoAbstract interpretation using typed decisiongraphsrdquo Science of Computer Programming vol 31 no 1 pp 91ndash112 1998

[13] O Coudert and J C Madre ldquoA new implicit graph-based primeand essential prime computation techniquerdquo in Proceedings ofthe Proc International Symp Information Sciences FukuokaJapan 1992

[14] O Coudert and J C Madre ldquoA New Graph Based PrimeComputation Techniquerdquo in Logic Synthesis and Optimizationpp 33ndash57 Springer Boston MA USA 1993

[15] O Coudert J C Madre H Fraisse and H Touati ldquoImplicitprime cover computation An overviewrdquo in Proceedings of thein Proc Synthesis and Simulation Meeting and InternationalInterchange (SASIMI) Nara Japan 1993

[16] J Gu and R Puri ldquoAsynchronous circuit synthesis with Booleansatisfiabilityrdquo IEEE Transactions on Computer-Aided Design ofIntegrated Circuits and Systems vol 14 no 8 pp 961ndash973 1995

[17] W V Quine ldquoThe problem of simplifying truth functionsrdquoTheAmerican Mathematical Monthly vol 59 pp 521ndash531 1952

[18] W V Quine ldquoA way to simplify truth functionsrdquoThe AmericanMathematical Monthly vol 62 pp 627ndash631 1955

12 Complexity

[19] J McCluskey ldquoMinimization of Boolean functionsrdquo Bell LabsTechnical Journal vol 35 pp 1417ndash1444 1956

[20] S Petrick ldquoA direct determination of the irredundant forms of aboolean function from the set of prime implicantsrdquo Tech RepAir Force Cambridge Research Center 1956

[21] R L Rudell ldquoMultiple-Valued Logic Minimization for PLASynthesisrdquo Defense Technical Information Center 1986

[22] L Amaru P-E Gaillardon and G De Micheli ldquoMajority-Inverter Graph ANewParadigm for LogicOptimizationrdquo IEEETransactions on Computer-Aided Design of Integrated Circuitsand Systems vol 35 no 5 pp 806ndash819 2016

[23] D C Fielder ldquoClassroom Reduction of Boolean FunctionsrdquoIEEE Transactions on Education vol 9 no 4 pp 202ndash205 1966

[24] B C H Turton ldquoExtending Quine-McCluskey for exclusive-orlogic synthesisrdquo IEEE Transactions on Education vol 39 no 1pp 81ndash85 1996

[25] R Benzer and V Rozga ldquoThe Design and Application of aMinority Logic Gate-A Senior Projectrdquo IEEE Transactions onEducation vol 10 no 3 pp 141ndash146 1967

[26] N R Bell ldquoAMapMethod for the Teaching of the FundamentalConcepts of Compound-Input Logic Circuitsrdquo IEEE Transac-tions on Education vol 11 no 3 pp 173ndash177 1968

[27] R F Tinder ldquoMultilevel LogicMinimizationUsingK-mapXORPatternsrdquo IEEE Transactions on Education vol 38 no 4 pp370ndash375 1995

[28] B D Carroll and I Chen ldquoABALmdashA Language for BooleanFunction Representation andManipulationrdquo IEEE Transactionson Education vol 20 no 1 pp 70ndash72 1977

[29] C E Klock F R Schneider M V N Gomes D S MouraR P Ribas and A I Reis ldquoKARMA A didactic tool for two-level logic synthesisrdquo in Proceedings of theMSE 2007 2007 IEEEInternational Conference on Microelectronic Systems EducationEducating Systems Designers for the Global Economy and aSecure World pp 59-60 San Diego CA USA June 2007

[30] V P Correia and A I Reis ldquoA tutorial tool for switch logicrdquo inProceedings of the International Conference on MicroelectronicSystems Education MSE 2001 pp 28-29 Las Vegas NV USAJune 2001

[31] Z Stanisavljevic V Pavlovic B Nikolic and J DjordjevicldquoSDLDS-system for digital logic design and simulationrdquo IEEETransactions on Education vol 56 no 2 pp 235ndash245 2013

[32] P Corsini and L Rizzo ldquoSSCSSC A Tool for the Teaching ofDigital Circuitsrdquo IEEE Transactions on Education vol 34 no 1pp 70ndash75 1991

[33] G J Klir and M A Marin ldquoNew considerations in teachingswitching theoryrdquo IEEE Transactions on Education vol 12 no4 pp 257ndash261 1969

[34] M Gardner ldquoMathematical games The fantastic combinationsof John Conwayrsquos new solitaire game ldquoliferdquordquo Scientific Americanvol 223 no 4 pp 120ndash123 1970

[35] S Wolfram ldquoCellular automata as models of complexityrdquoNature vol 311 no 5985 pp 419ndash424 1984

[36] M Sierpinski ldquoSur une courbe dont tout point est un pointde ramificationrdquo Compte Rendus hebdomadaires des seance delAcademie des Science de Paris vol 160 pp 302ndash305 1915

[37] J-P Allouche and J Shallit Automatic SequencesTheory Appli-cations Generalizations Cambridge University Press 2003

[38] K A Bartlett R K Brayton G D Hachtel et al ldquoMultilevelLogic Minimization Using Implicit Donrsquot Caresrdquo IEEE Trans-actions on Computer-Aided Design of Integrated Circuits andSystems vol 7 no 6 pp 723ndash740 1988

[39] P Niemann R Wille D M Miller M A Thornton and RDrechsler ldquoQMDDs Efficient Quantum Function Representa-tion and Manipulationrdquo IEEE Transactions on Computer-AidedDesign of Integrated Circuits and Systems vol 35 no 1 pp 86ndash99 2016

[40] D Searls andMNoordewier ldquoPattern-matching search ofDNAsequences using logic grammarsrdquo in Proceedings of the SeventhIEEE Conference on Artificial Intelligence Application pp 3ndash9Miami Beach FL USA 1991

[41] C R Woese ldquoOrder in the genetic coderdquo Proceedings of theNational Acadamy of Sciences of the United States of Americavol 54 no 1 pp 71ndash75 1965

[42] M A Marchisio and J Stelling ldquoAutomatic design of digitalsynthetic gene circuitsrdquo PLoS Computational Biology vol 7 no2 Article ID e1001083 2011

[43] N Gershenfeld D Dalrymple K Chen et al ldquoReconfigurableasynchronous logic automata (RALA)rdquo in Proceedings of the37th Annual ACM SIGPLAN-SIGACT Symposium on Principlesof Programming Languages POPLrsquo10 vol 45 pp 1ndash6 MadridSpain January 2010

[44] V V Shende A K Prasad I L Markov and J P HayesldquoSynthesis of reversible logic circuitsrdquo IEEE Transactions onComputer-Aided Design of Integrated Circuits and Systems vol22 no 6 pp 710ndash722 2003

[45] P Gupta A Agrawal and N K Jha ldquoAn algorithm for synthesisof reversible logic circuitsrdquo IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems vol 25 no 11pp 2317ndash2329 2006

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Stochastic AnalysisInternational Journal of

4 Complexity

(1) procedure GENERATE1(119899) ⊳ 119899 = number of inputs(2) 119877119890119889119906119899119889119886119899119905119878119890119905 = 120601(3) for 119909 larr 0 2119899 minus 1 do ⊳ Represents direct inputs(4) for 119910 larr 0 2119899 minus 1 do ⊳ Represents negated inputs(5) 119909119887119894119899119886119903119910 larr (119909)2(6) 119910119887119894119899119886119903119910 larr (119910)2(7) 119863 larr 119890119897119890119898119890119899119905119908119894119904119890(119909119887119894119899119886119903119910 and 119910119887119894119899119886119903119910)(8) if 119886119899119910(119863) = 1 then(9) 119877119890119889119906119899119889119886119899119905119878119890119905 = 119877119890119889119906119899119889119886119899119905119878119890119905 cup (119909 119910)(10) end if(11) end for(12) end for(13) end procedure

Algorithm 1 Redundant set generation for Pandit-Plot

33 Existence of Redundant Data-Points It can easily beobserved that there exist points on the plot with integercoordinates that correspond to a Boolean product or aBoolean sum that can never occur in a reduced SOP or areduced POS expression respectively

As an example point (1 1) corresponds to the (1198860not1198860)product in SOP which evaluates to 0F and the samepoint corresponds to the (1198860 + not1198860) sum in POS whichevaluates to 1T These input combinations do not haveany effect on the final expression evaluation as the outputcorresponding to these input combinations is preknown andtherefore redundant to be included as part of any Booleanexpression (eg 119891 + 1198860not1198860 = 119891) We therefore discardsuch input cases and term these as ldquoredundant pointsrdquo inthe discussions below while the rest will be called ldquovalidrdquopoints except the origin which falls into neither of the twocategories representing simply the trivial case of the outputbeing independent of the inputs

34 Generation of the Template To translate any logic func-tion to this plot the first step is to build the necessary templateor the canvas with all the input redundancies indicated(Figure 1) Such a template may be generated by exploitingpatterns for which the redundancies appear (Algorithm 1)

For example we note the following for a system with 119899inputs

(i) The 119909- and 119910-axes extend from 0 to 2119899 minus 1(ii) The points on the line 119909 = 119910 are redundant points(iii) All of the upper diagonal elements are redundant

points(iv) Redundant points because of the 1198860 inputrsquos logic level

extend along both the 119909 and 119910 directions skippingevery other point that is skipping the odd integercoordinates The redundant points associated with 1198860input are therefore of the form (2119894 + 1 2119895 + 1) where119894 119895 are integers

(v) Alternatively the template may be generated usingcellular automata rules on a brick-wall-like automatatemplate as devised in Figure 3 (in contrast to the

RulePattern

PatternRule

Xminus 1 y X Y minus 1

X Y

X minus 1 Y X Y minus 1

X Y

X minus 1 YX Y minus 1

X Y

X minus 1 Y X Y minus 1

X Y

00

10 0120 11 12

30 21 12 03

40 31 22 13 04

50 41 32 23 14 05

60 51 42 33 24 15 06

07162543 34526170

80 71 62 53 44 35 26 17 08

Figure 3 Template generation from 2 different kinds of rulessignifying its relation to the Sierpinski trianglefractals and thecellular automata

typical cellular automata template as used inConwayrsquosgame of life [34 35]mdashwhere the borders of the indi-vidual cells coincide) This gives rise to the Sierpinskitriangle [36 37] pattern as desired The captions forthe individual blocks indicate the (119909 119910) coordinatesof the points that the blocks represent

35 Logic Laws The logic optimization process is visualintuitive and simplemdashjust as for Karnaugh-maps It mayalternatively be easily implemented using a computer pro-gram by understanding the strategies in place numericallyThe basic idea of optimization is to get rid of excess of

Complexity 5

information by inspecting the scatter plot and bring the data-points as close to the axes as possibleThere exist patterns thatneed to be utilised to effectively carry out this ldquoreductionrdquoThese patterns need to be formulated into a compilation ofldquologic lawsrdquo A few examples of a logic law or an optimizationstrategy follow

Theorem 1 (radic2-integer-multiple hypotenuse rule) If two ofthe data-points are vertices of an upright right angled isoscelestriangle with its equal sides having length = 2119896 (119896 isin N) andif the third vertex is not to the right of any of those two data-points then the two data-points could effectively be representedby that third vertex alone so long as the third vertex is not aredundant point

Proof Let data-points be 119860(1199091 1199101) and 119861(1199092 1199102) such that1199091 gt 1199092 and 1199101 lt 1199102 and (1199091 minus 1199092) = (1199102 minus 1199101) = 2119896 119896 isin Nwithout loss of generalisation

Because none of the three points119860(1199091 1199101)119861(1199092 1199102) and119862(1199092 1199101) is a redundant point and because 1199091 + 2119896 = 1199092 itfollows that

1199091 = sum119894=ind(1199091)

2119894 = 2119896 + sum119894=ind(1199092)

2119894 (3)

where ind(119901) is set of suffixes corresponding to inputsassociated with coordinate ldquo119901rdquo

Similarly it follows that

1199102 = sum119894=ind(1199102)

2119894 = 2119896 + sum119894=ind(1199101)

2119894 (4)

Therefore the point 119861(1199092 1199102) represents both the directand negated inputs corresponding to the point 119862(1199091 1199102)along with the input not119886119896 Similarly the point 119860(1199091 1199101)represents both the direct and negated inputs correspondingto the point 119862(1199091 1199102) along with the input 119886119896 The twopoints 119860 and 119861 therefore effectively represent the inputscorresponding to the point 119862 and in addition either thedirect or the negated version of the input 119886119896

Therefore in SOP form

119891 fl 119891119860 + 119891119861 = (119886119896) 119891119862 + (not119886119896) 119891119862 = 119891119862 (5)

and in POS form

119891 fl 119891119860119891119861 = (119886119896 + 119891119862) (not119886119896 + 119891119862) = 119891119862 (6)

where 119891119866 fl function associated with point 119866Thus as per (5) and (6) this rule is simply amanifestation

of the two well-known equalities (1) 119875(119902) + 119875(not119902) = 119875and (2) (119878 + 119902)(119878 + not119902) = 119878 for the template we presentheremdashwhere 119875 and 119878 are respectively the product terms andthe summation terms consisting of variables excluding 119902

As an illustration if the plot in Figure 4 represents aBoolean function 119891 in SOP form with the points 119860 and 119861 asits ldquodata-pointsrdquo then per the definitions earlier

119891 = 1198860not11988611198862 + 1198860not1198861not1198862 (7)

(0 0)

a2a1a0

a2a1

a2a0

a2

a1a0

a1

a0

B

AC

7

6

5

4

3

2

1

7654321a2a1a0a2a1a2a0a2a1a0a1a0

Figure 4 Diagonal optimization for SOP

This is because point 119860(5 2) translates to ldquo1198860not11988611198862rdquo whilepoint 119861(1 6) represents ldquo1198860not1198861not1198862rdquo

Per the law proposed points 119860 and 119861 are representedtogether by point119862(1 2) alone since the right angled triangle119860119861119862 is an isosceles triangle with its congruent sides havinglength 2119896 119896 isin N(119897(119862119860) = 119897(119862119861) = 4)

We find here that the hypothesis is true since

119891 = 1198860not11988611198862 + 1198860not1198861not1198862 = (1198860not1198861) (1198862 + not1198862)= 1198860not1198861 997904rArr 119862 (1 2) (8)

If the scatter plot in Figure 4 were to correspond to a POSrepresentation then the plot would have been represented as

119891 = (1198860 + not1198861 + 1198862) (1198860 + not1198861 + not1198862) (9)

Effectively

119891 = (1198860 + not1198861) + (1198860 + not1198861) (1198862 + not1198862) + (1198862) (not1198862)= (1198860 + not1198861) 997904rArr 119862 (1 2) (10)

In either case points 119860(5 2) and 119861(1 6) are togetherrepresented by 119862(1 2) aloneTheorem 2 (symmetry about ldquo119909 = 119910rdquo line) Two ldquovalidrdquopoints symmetric about the ldquo119909 = 119910rdquo line in an SOP plot canbe effectively represented by a newly defined logical operationrepresented by operator ⋆ where119886119894 ⋆ 119886119895 = (prod119886119894) sdot (prodnot119886119895) + (prodnot119886119894) sdot (prod119886119895)

such that 119886119894 cap 119886119895 = 120601 (11)

6 Complexity

Two ldquovalidrdquo points symmetric about the ldquo119909 = 119910rdquo line in a POSplot can be effectively represented by a newly defined logicaloperation represented by operator ⋆ where119886119894 ⋆ 119886119895 = (sum119886119894 +sumnot119886119895) sdot (sumnot119886119894 +sum119886119895)

such that 119886119894 cap 119886119895 = 120601 (12)

Proof Two points symmetric about the ldquo119909 = 119910rdquo line will beof the forms 119860(1199090 1199100) and 119861(1199100 1199090) It follows that the setof direct inputs corresponding to the point 119860 (fl 119886119894) is thesame as the set of negated inputs that are represented by point119861 and vice versa (fl 119886119895)

Because points 119860 and 119861 are not redundant points itfollows that 119886119894 cap 119886119895 = 120601

Therefore for SOP

∵ 119891119860 = (prod119886119894) sdot (prodnot119886119895) there4 119891119861 = (prodnot119886119894) sdot (prod119886119895)

such that 119886119894 cap 119886119895 = 120601dArr

119891 = 119891119860 + 119865119861= (prod119886119894) sdot (prodnot119886119895) + (prodnot119886119894) sdot (prod119886119895)

(13)

Similarly for POS

∵ 119891119860 = (sum119886119894 +sumnot119886119895) there4 119891119861 = (sumnot119886119894 +sum119886119895)

such that 119886119894 cap 119886119895 = 120601dArr

119891 = 119891119860 sdot 119865119861 = (sum119886119894 +sumnot119886119895) sdot (sumnot119886119894 +sum119886119895)

(14)

For a system with just two inputs the ldquo⋆rdquo operator repre-sents simply an ldquoXORrdquo (oplus) operation while the ldquo⋆rdquo operatorrepresents an ldquoXNORrdquo (⊙) operation The ldquoNAND-onlyrdquoimplementation of ldquo⋆⋆rdquo operation is shown in Figure 5Thisnewly defined logic gate can then be optimized for given fan-in and fan-out values as necessary to be used as a buildingblock in the subsequent logic design

36 Process of Optimization While there is much scopefor further research in this area for effective algorithmdevelopment in terms of logic optimization including theones targeted to novel topologies such as the ones involvingIMPLY (not119860+119861) gates alone for example (instead of SOPPOSforms presented here effectively implemented using ldquoNANDalonerdquo and ldquoNOR alonerdquo topologies resp) one of the mostlikely logic flows for such optimization is presented next

Steps involved in this example algorithm are as follows

ai0 ai1 ai aj0 aj1 ajn

ajai

ai aj ai aj⋆ ⋆

Figure 5 ldquoNAND-onlyrdquo implementation of the newly definedlogical operations ldquo⋆ and ⋆rdquo that are essentially oplus (XOR) and ⊙(XNOR) operations respectively for a two-input system

(i) ldquoGeneraterdquo the template and plot the function(ii) ldquoExpandrdquo the expression to include every possible

product in SOP form (every possible sum for a POSform)

(iii) ldquoReducerdquo the expression using logic laws(iv) ldquoRepeatrdquo the above two steps in iteration until no

further reduction is possible as illustrated in Figure 6

As an example let 119891 = (not1198861 + 119886011988611198862) and let the represen-tation form chosen be SOP-based as well 119891 ultimately getsreduced to 119891 = not1198861 + 11988601198862 as shown in Figure 6

(1) Generate plot the product terms (Figure 6(a))(2) Expand plot points relevant to each of the current

data-points (Figure 6(b)) Here not1198861 is expanded toinclude points wherever not1198861 = 1 997904rArr 119891 = 1

(3) Reduce reduce the expression using logic laws If anew data-point replacing one or some of the originaldata-points is obtained through this process and ifthis data point cannot be further reduced then it isnoted and kept for the next iteration (We note anexample of such data-point with a label ldquoNEWrdquo inFigure 6(c))

(4) Repeat repeat steps (2) and (3) until no new replace-ment data-point closer to the origin can be obtained(Figure 6(d))

Similar to the Karnaugh-maps the ldquodo not carerdquo inputcombinations could be exploited for logic reduction [3 38]

Complexity 7

(0 0)

a2a1a0

a2a1

a2a0

a2

a1a0

a1

a0

7

6

5

4

3

2

1

7654321a2a1a0a2a1a2a0a2a1a0a1a0

(a) ldquoGeneraterdquo step illustrated for 119891 = (not1198861) + (1198860)(1198861)(1198862)

a2a1a0

a2a1

a2a0

a2

a1a0

a1

a0

7

6

5

4

3

2

1

(0 0) 7654321a2a1a0a2a1a2a0a2a1a0a1a0

(b) ldquoExpandrdquo step illustrated for the product ldquo(not1198861)rdquo

a2a1a0

a2a1

a2a0

a2

a1a0

a1

a0

7

6

5

4

3

2

1

(0 0) 7654321a2a1a0a2a1a2a0a2a1a0a1a0

NEW

(c) ldquoReductionrdquo using the ldquoradic2-integer-multiple hypotenuse rulerdquo

a2a1a0

a2a1

a2a0

a2

a1a0

a1

a0

7

6

5

4

3

2

1

(0 0) 7654321a2a1a0a2a1a2a0a2a1a0a1a0

(d) The final optimized expression 119891 = (not1198861) + (1198860)(1198862)

Figure 6 Process of optimization the steps in order are illustrated

37 As a Data Structure Because the individual Booleanterms are represented by only two coordinates (irrespectiveof the number of inputs) any combinational logic may berepresented by two parameters alone This can be viewedas a conversion of a graphical scheme to an equivalentnongraphical numerical scheme to be handled by computingsystems efficiently The two coordinates may be stored in thememory as a single unit

Because one can represent any logic expression througha set of coordinates alone we now investigate the numberof bits required to store each of the numbered coordinatesWhile a proposed template for 119899 inputs consists of 4119899 points(including the origin) the number of valid coordinates is only

3119899 minus 1 This is because a variable can manifest itself in aninput combination in its original form (119886119896) or as a negatedversion (not119886119896) or it could simply be absent Thus there arethree possibilities for every input 119886119896 The number of validpoints is therefore 3119899 minus 1 (excluding the origin indicativeof a trivial case where the output is independent of all of theinputs under consideration) Both the total number of points(120591 = 4119899 minus 1) in a template and the number of valid points(120592 = 3119899 minus 1) grow exponentially with 119899 The ratio of thenumber of bits thus required (with and without consideringthe redundant points) = ceil(log2(3119899 minus 1))ceil(log2(4119899 minus 1))which varies between 075 and 085 and eventually convergesto 08 for large 119899 As an example for 119899 = 3 120592 = 26 and

8 Complexity

120591 = 63 while for 119899 = 6 120592 = 728 and 120591 = 4095 Memorysavings thus grow with 119899 if we effectively take into accountthe redundancies in the template

However in comparison to K-maps (= 2119899 cells for an 119899-input system) our proposed method requires a much highernumber of points (= 3119899minus1 if we consider only the valid inputcombinations excluding the origin) This is because the K-maps do not take into account all of the input combinationsbut only the ones where each of the inputs manifests itselfby its presence in its original or in its negated form (thus 2119899possibilities) In the proposed method we explicitly take intoaccount also the reduced input combinations where some ofthe inputs are absent

38 Possible Extensions and Further Research Scope

(i) Beyond SOPPOS paradigms more patterns and theresulting optimization strategies need to be investi-gated in different logic gate methodologies for exam-ple SOP (ldquoAND-ORrdquo which is ldquoNAND-onlyrdquo) POS(ldquoOR-ANDrdquo which is ldquoNOR-onlyrdquo) and ldquoIMPLY-onlyrdquo realisations

(ii) Multilevel logic the concept could be extended tothree dimensions to represent a ternary logic systemwhere both inputs and outputs can have three possiblelogic levels (0 1 2) The resulting representation isthus in the form of a ldquologic latticerdquo instead ofthe two-dimensional grid presented here where thethird dimension would serve a dual purpose Firstit represents a condition where all the inputs arelogical level ldquo2rdquo (just as 119885 and 119884 represented statesldquo1rdquo and ldquo0rdquo resp) Secondly the 119911-axis may alsorepresent an output logic level within such a ldquologicslicerdquo As an example output level-1 may correspondto a point with integer (119883 119884 119885) coordinates level-0may correspond to a point just beneath this point andlevel-2 just above (Figure 7)

(iii) Alternate coordinate systems every data-point sym-bolises a huge degree of information but with onlytwo or three parameters (coordinates) Because thisinformation need not necessarily come about usinga Cartesian coordinate system alone one can chooseto alternatively employ some other coordinate systemand look for patterns and laws for optimizationwithinsuch schemes For example a 2D polar system maybe used where the (119909 119910) to (119903 120579) transformation isgoverned by the equations 119903 = 119909 120579 = 2120587119910(2119899 minus 1)and 119909 119910 isin [0 2119899 minus 1] Note that 120579 remains in therange [0 2120587] irrespective of the number of inputs(Figure 8)The logic laws for such alternate coordinatesystemsmdashwhere every coordinate of interest120595 followsthe equation120595 = 119891(sum119898119896=1 2119894119896) 119894119896 isin Nmdashcan be devisedby recognising the inherent patterns which remainsan open problem with further scope for research

39 Implications to Other Fields of Study One can use thetemplate to establish three algebraic equalities as will bediscussed in detail in this section The method in general

z-axis

x-axisy-axis

(inputs = 2)

(inputs = 0)(inputs = 1)

Δz lt 1

z = z0planez = z0

+ dzplane

(x0 y

0 z0 + Δz)

(x0 y

0 z0 minus Δz)

(x0 y

0 z0 )

z = z minusdz

plane= 2

Output

= 1

Output

= 0

Output

Figure 7 Ternary logic representation (1199090 1199100 1199110 isin N) The point(1199090 1199100 1199110plusmnΔ119911 or 1199110) represents the input condition where all inputscorresponding to 119909-coordinate = 1 all inputs corresponding to 119910-coordinate = 0 and all inputs corresponding to 119911-coordinate = 2

Figure 8 Cartesian (119909 119910) coordinate system converted into polar(119903 120579) system where 119903 = 119909 120579 = 2120587119910(2119899 minus 1) and 119909 119910 isin [0 2119899 minus 1]Filled circles indicate the ldquoredundant pointsrdquo

is useful for alternative representation and processing ofdata whenever there is representation of information (ieencoding or decoding) in the form of distinct or discretestates The basic representation strategy can therefore beextended to represent and optimize operations on qubits [39]or to represent codon tables [40 41] or design digital syntheticgene circuits [42] Using the template used in the methodproposed we have derived the following three equalities inrelation to (4119899 minus 3119899) The method gives practical evidence ofthe equalities invented and presented next

Complexity 9

Theorem 3

3119899 + [119899minus2sum119894=0

3119899minus2minus1198942119894 (2119894+1 minus 1)] + (2119899 minus 1) 2119899minus1 = 4119899forall119899 isin N 119899 ge 2

(15)

or in other words

3119899 + [119899minus2sum119894=0

3119899minus2minus119894(2119894+12 )] + (21198992 ) = 4119899

forall119899 isin N 119899 ge 2(16)

Theorem 4

3119899 + [119899minus1sum119894=0

31198944(119899minus1minus119894)] = 4119899 forall119899 isin N 119899 ge 2 (17)

Theorem 5 As a consequence

[119899minus1sum119894=0

31198944(119899minus1minus119894)] = [119899minus2sum119894=0

3119899minus2minus119894(2119894+12 )] + (21198992 )

forall119899 isin N 119899 ge 2∵ Equations (16) and (17)

(18)

Let us first establish that the equalities being discussed are trueusing induction

Proof For Theorem 3 we observe that the equalities pre-sented in (15) or (16) are true for 119899 = 2 and 119899 = 3

For 119899 = 2LHS = 32 + [ 0sum

119894=0

30minus119894 (2119894+1 minus 1) 2119894] + (22 minus 1) 21= 9 + [(1 (2 minus 1) 1)] + (4 minus 1) 2 = 9 + 1 + 6= 16 = 42 = RHS

(19)

For 119899 = 3LHS = 33 + [ 1sum

119894=0

(31minus119894 (2119894+1 minus 1) 2119894)] + (23 minus 1) 22= 27 + [(31 (21 minus 1) 20) + (30 (22 minus 1) 21)]+ (7) 4 = 27 + [3 (1) (1) + 1 (3) (2)] + (7) 4

= 27 + 9 + 28 = 64 = 43 = RHS

(20)

Now say for some 119899 = 119898 ge 23119898 + [119898minus2sum

119894=0

(3119898minus2minus119894 (2119894+1 minus 1) 2119894)] + (2119898 minus 1) 2119898minus1= 22119898 = 4119898

(21)

Therefore

3119898 + (3119898minus2 (21 minus 1) 20 + 3119898minus3 (22 minus 1) 21 + sdot sdot sdot+ 31 (2119898minus2 minus 1) 2119898minus3 + 30 (2119898minus1 minus 1) 2119898minus2)+ (2119898 minus 1) 2119898minus1

= 22119898(22)

For 119899 = 119898 + 1 ge 2 thereforeLHS = 3119898+1 + [119898minus1sum

119894=0

(3119898minus1minus119894 (2119894+1 minus 1) 2119894)]+ (2119898+1 minus 1) 2119898

= 3119898+1 + (3119898minus1 (21 minus 1) 20 + 3119898minus2 (22 minus 1) 21 + sdot sdot sdot+ 31 (2119898minus1 minus 1) 2119898minus2 + 30 (2119898 minus 1) 2119898minus1)+ (2119898+1 minus 1) 2119898

= 3 (3119898 + (3119898minus2 (21 minus 1) 20 + 3119898minus1 (22 minus 1) 21 + sdot sdot sdot+ 30 (2119898minus1 minus 1) 2119898minus2)) + (2119898 minus 1) 2119898minus1+ (2119898+1 minus 1) 2119898

= (2 + 1) times (22119898 minus (2119898 minus 1) 2119898minus1) + (2119898 minus 1) 2119898minus1+ (2119898+1 minus 1) 2119898 (∵ Equation (22))

= (22119898+1 minus 22119898 + 2119898) + (22119898 minus 22119898minus1 + 2119898minus1)+ (22119898minus1 minus 2119898minus1 + 22119898+1 minus 2119898)

= 22119898+2 = 4119898+1 = RHS

(23)

Therefore if the statement is true for 119899 = 119898 then thestatement is true for 119899 = 119898 + 1 (119899119898 isin N) Because thestatement is true for 119899 = 2 and 3 it is true for every 119899 isin N

and 119899 ge 2Proof For Theorem 4 similarly we observe that the equalitypresented in (17) is true for 119899 = 2

LHS = 32 + [ 1sum119894=0

31198944(2minus1minus119894)] = 32 + [3041 + 3140]= 16 = 42 = RHS

(24)

Now say for some 119899 = 119898 ge 23119898 + [119898minus1sum

119894=0

31198944(119898minus1minus119894)] = 4119898 (25)

10 Complexity

For 119899 = 119898 + 1 ge 2 thereforeLHS = 3119898+1 + [ 119898sum

119894=0

31198944(119898minus119894)]

= 3119898+1 + 4 times [119898minus1sum119894=0

31198944(119898minus1minus119894)] + 311989840

= 3119898+1 + 4 times [4119898 minus 3119898] + 311989840= 3119898+1 + 4119898+1 minus (3 + 1) times 3119898 + 3119898 = 4119898+1= RHS

(26)

Because the statement is true for 119899 = 2 it is true for every119899 isin N and 119899 ge 2In the context of the template for the method proposed

the two theorems can be proven graphically by simplycounting the number of valid and redundant points viadifferent formulations If 3119899 + 119891(119899) = 4119899 for all 119899 isin N weknow the following

(i) 4119899 = 21198992119899 = (axis range)2 = total number of points

(ii) 3119899 = total number of ldquovalidrdquo data-points includingthe origin

(∵ Every input 119886119894 can manifest itself in the inputcombination represented by (119883119884) either in its orig-inal form (input combination represented by th 119883-coordinate) or as a negated input (input combinationrepresented by the119884-coordinate) ormay notmanifestitself at all)

(iii) 119891(119899) = total number of redundant points

(∵ Total number of points = total number of ldquovalidrdquopoints including the origin + total number of ldquoredun-dantrdquo points)

Proof To establish equality presented in the Theorem 3 weuse the formulation of 119891(119899) as presented in Figure 9 FromFigure 9 it is evident that

∵ 119896sum119897=1

119897 = 119896 (119896 + 1)2 forall119896 isin N119896 = 2119895 forall119895 isin N 0 le 119895 lt 119899

there4 119891 (119899) = [119899minus2sum119894=0

3119899minus2minus1198942119894 (2119894+1 minus 1)] + (2119899 minus 1) 2119899minus1(27)

The exponent of 3 translates to a multiplier that representsthe frequency of occurrence of the constituent triangle of thatspecific size in the template

1

1

2

22

3

4

568

7

32(2nminus3 minus 1)(2nminus4)31(2nminus2 minus 1)(2nminus3)

30(2nminus1 minus 1)(2nminus2)

(2n minus 1)(2nminus1)

3 points2 points1 point

2n minus 1 points

30

31

3 2

sum

Figure 9 Total number of ldquoredundant pointsrdquothe points in thedarkened region by counting the number of points in constituenttriangles separately

Proof AlternatelyTheorem4 can be proven using a recursiveformula for 119891(119899) as obtained from Figure 10

∵ 119891 (119899) = 3119891 (119899 minus 1) + 4119899minus1there4 119891 (119899) = 3 [3119891 (119899 minus 2) + 4119899minus2] + 4119899minus1

= 32119891 (119899 minus 2) + 3 times 4119899minus2 + 4119899minus1= [3119899minus1119891 (1) + 119899minus2sum

119894=0

3119894 (4(119899minus1minus119894))]

= [119899minus1sum119894=0

31198944(119899minus1minus119894)] ∵ 119891 (1) = 1

(28)

This method can be used in classrooms to quickly hand-calculate an optimized formof the logic function using a rulerand a compass alone (Figure 11)

4 Conclusion

A novel graphical technique for digital logic representationand optimization has been proposed which makes optimiza-tion algorithm much more instinctive and easy Multipleequations can be optimized simultaneously using the tem-plate presented One can theoretically therefore optimizesimultaneously multiple combinational logic circuits withany number of inputs or outputsWe propose a data structuretransformation that can compress a truth table into a fewparametersThe approach and the fundamentals involved arelikely to generate many novel solutions applicable to otherdisciplines A new paradigm is being proposed which opensup new avenues for research in terms of new methodologiesand pattern identification towards better logic reduction

Complexity 11

f(n minus 1)

f(n minus 1) f(n minus 1)

2nminus1 points in X2n

minus1

poin

ts in

Y

Figure 10 Total number of ldquoredundant pointsrdquothe points in thedarkened region by deriving a recursive formula for 119891(119899) Thus119891(119899) = 3 times 119891(119899 minus 1) + (2119899minus1)2

0 1 2 4 8 16

Figure 11 A compass and a ruler (marked with 2119899 units) canbe effectively used to quickly find the points that can be mergedtogether to generate amore optimized logic representation using thelogic laws proposed earlier (Section 35)

tailored to different implementation topologies such asSOP (ldquoAND-ORrdquoldquoNAND-onlyrdquo) POS (ldquoOR-ANDrdquoldquoNOR-onlyrdquo) and ldquoIMPLY-onlyrdquo realisations or the newer method-ologies such as ldquoreconfigurable asynchronous logic automata(RALA)rdquo [43] and the search formost suited template for eachin terms of the coordinate system of choice and the templategeneration rules

Our proposed technique currently establishes a one-to-one mapping between all of the possible variable combina-tions and the corresponding output statesmdashrepresenting theabsence and presence of every variable (in its original andthe negated form) for each of the variable combinations Onepossible future research direction is to investigate the rela-tionship between the proposed technique herein and otherrepresentation techniquesmdashsuch as QMDDs which too relyon quadrants and one-to-one mappings and which ratherextend way beyond the proposed technique to representtransformation matrices featuring complex entries useful forlogic involving qubits Further research may also be targetedtowards multilevel discrete systems beyond Boolean algebraand reversible [44 45] and hazard-free logic synthesis [9]

Conflicts of Interest

The authors declare that there are no conflicts of interestregarding the publication of this paper

References

[1] R K Brayton R Rudell A Sangiovanni-Vincentelli and AR Wang ldquoMIS A Multiple-Level Logic Optimization SystemrdquoIEEE Transactions on Computer-Aided Design of IntegratedCircuits and Systems vol 6 no 6 pp 1062ndash1081 1987

[2] A J De Geus and W Cohen ldquoA Rule-Based System for Opti-mizing Combinational Logicrdquo IEEE Design Test of Computersvol 2 no 4 pp 22ndash32 1985

[3] M Karnaugh ldquoThemapmethod for synthesis of combinationallogic circuitsrdquoTransactions of the American Institute of ElectricalEngineers Part I Communication and Electronics vol 72 no 5pp 593ndash599 1953

[4] M E Holder ldquoA modified karnaugh map techniquerdquo IEEETransactions on Education vol 48 no 1 pp 206-207 2005

[5] J Cavanagh Computer Arithmetic and Verilog HDL Fundamen-tals CRC Press 2009

[6] Z Kohavi and N K Jha Switching and finite automata theoryCambridge University Press 2009

[7] C Y Lee ldquoRepresentation of switching circuits by binary-decision programsrdquoBell Labs Technical Journal vol 38 pp 985ndash999 1959

[8] S B Akers ldquoBinary decision diagramsrdquo IEEE Transactions onComputers vol 27 no 6 pp 509ndash516 1978

[9] B Lin and S Devadas ldquoSynthesis of Hazard-Free MultilevelLogic Under Multiple-Input Changes from Binary DecisionDiagramsrdquo IEEE Transactions on Computer-Aided Design ofIntegrated Circuits and Systems vol 14 no 8 pp 974ndash985 1995

[10] C Yang and M Ciesielski ldquoBDS A BDD-based logic optimiza-tion systemrdquo IEEE Transactions on Computer-Aided Design ofIntegrated Circuits and Systems vol 21 no 7 pp 866ndash876 2002

[11] R E Bryant ldquoGraph-based algorithms for boolean functionmanipulationrdquo IEEE Transactions on Computers vol C-35 no8 pp 677ndash691 1986

[12] L Mauborgne ldquoAbstract interpretation using typed decisiongraphsrdquo Science of Computer Programming vol 31 no 1 pp 91ndash112 1998

[13] O Coudert and J C Madre ldquoA new implicit graph-based primeand essential prime computation techniquerdquo in Proceedings ofthe Proc International Symp Information Sciences FukuokaJapan 1992

[14] O Coudert and J C Madre ldquoA New Graph Based PrimeComputation Techniquerdquo in Logic Synthesis and Optimizationpp 33ndash57 Springer Boston MA USA 1993

[15] O Coudert J C Madre H Fraisse and H Touati ldquoImplicitprime cover computation An overviewrdquo in Proceedings of thein Proc Synthesis and Simulation Meeting and InternationalInterchange (SASIMI) Nara Japan 1993

[16] J Gu and R Puri ldquoAsynchronous circuit synthesis with Booleansatisfiabilityrdquo IEEE Transactions on Computer-Aided Design ofIntegrated Circuits and Systems vol 14 no 8 pp 961ndash973 1995

[17] W V Quine ldquoThe problem of simplifying truth functionsrdquoTheAmerican Mathematical Monthly vol 59 pp 521ndash531 1952

[18] W V Quine ldquoA way to simplify truth functionsrdquoThe AmericanMathematical Monthly vol 62 pp 627ndash631 1955

12 Complexity

[19] J McCluskey ldquoMinimization of Boolean functionsrdquo Bell LabsTechnical Journal vol 35 pp 1417ndash1444 1956

[20] S Petrick ldquoA direct determination of the irredundant forms of aboolean function from the set of prime implicantsrdquo Tech RepAir Force Cambridge Research Center 1956

[21] R L Rudell ldquoMultiple-Valued Logic Minimization for PLASynthesisrdquo Defense Technical Information Center 1986

[22] L Amaru P-E Gaillardon and G De Micheli ldquoMajority-Inverter Graph ANewParadigm for LogicOptimizationrdquo IEEETransactions on Computer-Aided Design of Integrated Circuitsand Systems vol 35 no 5 pp 806ndash819 2016

[23] D C Fielder ldquoClassroom Reduction of Boolean FunctionsrdquoIEEE Transactions on Education vol 9 no 4 pp 202ndash205 1966

[24] B C H Turton ldquoExtending Quine-McCluskey for exclusive-orlogic synthesisrdquo IEEE Transactions on Education vol 39 no 1pp 81ndash85 1996

[25] R Benzer and V Rozga ldquoThe Design and Application of aMinority Logic Gate-A Senior Projectrdquo IEEE Transactions onEducation vol 10 no 3 pp 141ndash146 1967

[26] N R Bell ldquoAMapMethod for the Teaching of the FundamentalConcepts of Compound-Input Logic Circuitsrdquo IEEE Transac-tions on Education vol 11 no 3 pp 173ndash177 1968

[27] R F Tinder ldquoMultilevel LogicMinimizationUsingK-mapXORPatternsrdquo IEEE Transactions on Education vol 38 no 4 pp370ndash375 1995

[28] B D Carroll and I Chen ldquoABALmdashA Language for BooleanFunction Representation andManipulationrdquo IEEE Transactionson Education vol 20 no 1 pp 70ndash72 1977

[29] C E Klock F R Schneider M V N Gomes D S MouraR P Ribas and A I Reis ldquoKARMA A didactic tool for two-level logic synthesisrdquo in Proceedings of theMSE 2007 2007 IEEEInternational Conference on Microelectronic Systems EducationEducating Systems Designers for the Global Economy and aSecure World pp 59-60 San Diego CA USA June 2007

[30] V P Correia and A I Reis ldquoA tutorial tool for switch logicrdquo inProceedings of the International Conference on MicroelectronicSystems Education MSE 2001 pp 28-29 Las Vegas NV USAJune 2001

[31] Z Stanisavljevic V Pavlovic B Nikolic and J DjordjevicldquoSDLDS-system for digital logic design and simulationrdquo IEEETransactions on Education vol 56 no 2 pp 235ndash245 2013

[32] P Corsini and L Rizzo ldquoSSCSSC A Tool for the Teaching ofDigital Circuitsrdquo IEEE Transactions on Education vol 34 no 1pp 70ndash75 1991

[33] G J Klir and M A Marin ldquoNew considerations in teachingswitching theoryrdquo IEEE Transactions on Education vol 12 no4 pp 257ndash261 1969

[34] M Gardner ldquoMathematical games The fantastic combinationsof John Conwayrsquos new solitaire game ldquoliferdquordquo Scientific Americanvol 223 no 4 pp 120ndash123 1970

[35] S Wolfram ldquoCellular automata as models of complexityrdquoNature vol 311 no 5985 pp 419ndash424 1984

[36] M Sierpinski ldquoSur une courbe dont tout point est un pointde ramificationrdquo Compte Rendus hebdomadaires des seance delAcademie des Science de Paris vol 160 pp 302ndash305 1915

[37] J-P Allouche and J Shallit Automatic SequencesTheory Appli-cations Generalizations Cambridge University Press 2003

[38] K A Bartlett R K Brayton G D Hachtel et al ldquoMultilevelLogic Minimization Using Implicit Donrsquot Caresrdquo IEEE Trans-actions on Computer-Aided Design of Integrated Circuits andSystems vol 7 no 6 pp 723ndash740 1988

[39] P Niemann R Wille D M Miller M A Thornton and RDrechsler ldquoQMDDs Efficient Quantum Function Representa-tion and Manipulationrdquo IEEE Transactions on Computer-AidedDesign of Integrated Circuits and Systems vol 35 no 1 pp 86ndash99 2016

[40] D Searls andMNoordewier ldquoPattern-matching search ofDNAsequences using logic grammarsrdquo in Proceedings of the SeventhIEEE Conference on Artificial Intelligence Application pp 3ndash9Miami Beach FL USA 1991

[41] C R Woese ldquoOrder in the genetic coderdquo Proceedings of theNational Acadamy of Sciences of the United States of Americavol 54 no 1 pp 71ndash75 1965

[42] M A Marchisio and J Stelling ldquoAutomatic design of digitalsynthetic gene circuitsrdquo PLoS Computational Biology vol 7 no2 Article ID e1001083 2011

[43] N Gershenfeld D Dalrymple K Chen et al ldquoReconfigurableasynchronous logic automata (RALA)rdquo in Proceedings of the37th Annual ACM SIGPLAN-SIGACT Symposium on Principlesof Programming Languages POPLrsquo10 vol 45 pp 1ndash6 MadridSpain January 2010

[44] V V Shende A K Prasad I L Markov and J P HayesldquoSynthesis of reversible logic circuitsrdquo IEEE Transactions onComputer-Aided Design of Integrated Circuits and Systems vol22 no 6 pp 710ndash722 2003

[45] P Gupta A Agrawal and N K Jha ldquoAn algorithm for synthesisof reversible logic circuitsrdquo IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems vol 25 no 11pp 2317ndash2329 2006

Submit your manuscripts athttpswwwhindawicom

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

MathematicsJournal of

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Mathematical Problems in Engineering

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Differential EquationsInternational Journal of

Volume 2014

Applied MathematicsJournal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Probability and StatisticsHindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Journal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Mathematical PhysicsAdvances in

Complex AnalysisJournal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

OptimizationJournal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

CombinatoricsHindawi Publishing Corporationhttpwwwhindawicom Volume 2014

International Journal of

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Operations ResearchAdvances in

Journal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Function Spaces

Abstract and Applied AnalysisHindawi Publishing Corporationhttpwwwhindawicom Volume 2014

International Journal of Mathematics and Mathematical Sciences

Hindawi Publishing Corporationhttpwwwhindawicom Volume 201

The Scientific World JournalHindawi Publishing Corporation httpwwwhindawicom Volume 2014

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Algebra

Discrete Dynamics in Nature and Society

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

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Decision SciencesAdvances in

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Volume 2014 Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Stochastic AnalysisInternational Journal of

Complexity 5

information by inspecting the scatter plot and bring the data-points as close to the axes as possibleThere exist patterns thatneed to be utilised to effectively carry out this ldquoreductionrdquoThese patterns need to be formulated into a compilation ofldquologic lawsrdquo A few examples of a logic law or an optimizationstrategy follow

Theorem 1 (radic2-integer-multiple hypotenuse rule) If two ofthe data-points are vertices of an upright right angled isoscelestriangle with its equal sides having length = 2119896 (119896 isin N) andif the third vertex is not to the right of any of those two data-points then the two data-points could effectively be representedby that third vertex alone so long as the third vertex is not aredundant point

Proof Let data-points be 119860(1199091 1199101) and 119861(1199092 1199102) such that1199091 gt 1199092 and 1199101 lt 1199102 and (1199091 minus 1199092) = (1199102 minus 1199101) = 2119896 119896 isin Nwithout loss of generalisation

Because none of the three points119860(1199091 1199101)119861(1199092 1199102) and119862(1199092 1199101) is a redundant point and because 1199091 + 2119896 = 1199092 itfollows that

1199091 = sum119894=ind(1199091)

2119894 = 2119896 + sum119894=ind(1199092)

2119894 (3)

where ind(119901) is set of suffixes corresponding to inputsassociated with coordinate ldquo119901rdquo

Similarly it follows that

1199102 = sum119894=ind(1199102)

2119894 = 2119896 + sum119894=ind(1199101)

2119894 (4)

Therefore the point 119861(1199092 1199102) represents both the directand negated inputs corresponding to the point 119862(1199091 1199102)along with the input not119886119896 Similarly the point 119860(1199091 1199101)represents both the direct and negated inputs correspondingto the point 119862(1199091 1199102) along with the input 119886119896 The twopoints 119860 and 119861 therefore effectively represent the inputscorresponding to the point 119862 and in addition either thedirect or the negated version of the input 119886119896

Therefore in SOP form

119891 fl 119891119860 + 119891119861 = (119886119896) 119891119862 + (not119886119896) 119891119862 = 119891119862 (5)

and in POS form

119891 fl 119891119860119891119861 = (119886119896 + 119891119862) (not119886119896 + 119891119862) = 119891119862 (6)

where 119891119866 fl function associated with point 119866Thus as per (5) and (6) this rule is simply amanifestation

of the two well-known equalities (1) 119875(119902) + 119875(not119902) = 119875and (2) (119878 + 119902)(119878 + not119902) = 119878 for the template we presentheremdashwhere 119875 and 119878 are respectively the product terms andthe summation terms consisting of variables excluding 119902

As an illustration if the plot in Figure 4 represents aBoolean function 119891 in SOP form with the points 119860 and 119861 asits ldquodata-pointsrdquo then per the definitions earlier

119891 = 1198860not11988611198862 + 1198860not1198861not1198862 (7)

(0 0)

a2a1a0

a2a1

a2a0

a2

a1a0

a1

a0

B

AC

7

6

5

4

3

2

1

7654321a2a1a0a2a1a2a0a2a1a0a1a0

Figure 4 Diagonal optimization for SOP

This is because point 119860(5 2) translates to ldquo1198860not11988611198862rdquo whilepoint 119861(1 6) represents ldquo1198860not1198861not1198862rdquo

Per the law proposed points 119860 and 119861 are representedtogether by point119862(1 2) alone since the right angled triangle119860119861119862 is an isosceles triangle with its congruent sides havinglength 2119896 119896 isin N(119897(119862119860) = 119897(119862119861) = 4)

We find here that the hypothesis is true since

119891 = 1198860not11988611198862 + 1198860not1198861not1198862 = (1198860not1198861) (1198862 + not1198862)= 1198860not1198861 997904rArr 119862 (1 2) (8)

If the scatter plot in Figure 4 were to correspond to a POSrepresentation then the plot would have been represented as

119891 = (1198860 + not1198861 + 1198862) (1198860 + not1198861 + not1198862) (9)

Effectively

119891 = (1198860 + not1198861) + (1198860 + not1198861) (1198862 + not1198862) + (1198862) (not1198862)= (1198860 + not1198861) 997904rArr 119862 (1 2) (10)

In either case points 119860(5 2) and 119861(1 6) are togetherrepresented by 119862(1 2) aloneTheorem 2 (symmetry about ldquo119909 = 119910rdquo line) Two ldquovalidrdquopoints symmetric about the ldquo119909 = 119910rdquo line in an SOP plot canbe effectively represented by a newly defined logical operationrepresented by operator ⋆ where119886119894 ⋆ 119886119895 = (prod119886119894) sdot (prodnot119886119895) + (prodnot119886119894) sdot (prod119886119895)

such that 119886119894 cap 119886119895 = 120601 (11)

6 Complexity

Two ldquovalidrdquo points symmetric about the ldquo119909 = 119910rdquo line in a POSplot can be effectively represented by a newly defined logicaloperation represented by operator ⋆ where119886119894 ⋆ 119886119895 = (sum119886119894 +sumnot119886119895) sdot (sumnot119886119894 +sum119886119895)

such that 119886119894 cap 119886119895 = 120601 (12)

Proof Two points symmetric about the ldquo119909 = 119910rdquo line will beof the forms 119860(1199090 1199100) and 119861(1199100 1199090) It follows that the setof direct inputs corresponding to the point 119860 (fl 119886119894) is thesame as the set of negated inputs that are represented by point119861 and vice versa (fl 119886119895)

Because points 119860 and 119861 are not redundant points itfollows that 119886119894 cap 119886119895 = 120601

Therefore for SOP

∵ 119891119860 = (prod119886119894) sdot (prodnot119886119895) there4 119891119861 = (prodnot119886119894) sdot (prod119886119895)

such that 119886119894 cap 119886119895 = 120601dArr

119891 = 119891119860 + 119865119861= (prod119886119894) sdot (prodnot119886119895) + (prodnot119886119894) sdot (prod119886119895)

(13)

Similarly for POS

∵ 119891119860 = (sum119886119894 +sumnot119886119895) there4 119891119861 = (sumnot119886119894 +sum119886119895)

such that 119886119894 cap 119886119895 = 120601dArr

119891 = 119891119860 sdot 119865119861 = (sum119886119894 +sumnot119886119895) sdot (sumnot119886119894 +sum119886119895)

(14)

For a system with just two inputs the ldquo⋆rdquo operator repre-sents simply an ldquoXORrdquo (oplus) operation while the ldquo⋆rdquo operatorrepresents an ldquoXNORrdquo (⊙) operation The ldquoNAND-onlyrdquoimplementation of ldquo⋆⋆rdquo operation is shown in Figure 5Thisnewly defined logic gate can then be optimized for given fan-in and fan-out values as necessary to be used as a buildingblock in the subsequent logic design

36 Process of Optimization While there is much scopefor further research in this area for effective algorithmdevelopment in terms of logic optimization including theones targeted to novel topologies such as the ones involvingIMPLY (not119860+119861) gates alone for example (instead of SOPPOSforms presented here effectively implemented using ldquoNANDalonerdquo and ldquoNOR alonerdquo topologies resp) one of the mostlikely logic flows for such optimization is presented next

Steps involved in this example algorithm are as follows

ai0 ai1 ai aj0 aj1 ajn

ajai

ai aj ai aj⋆ ⋆

Figure 5 ldquoNAND-onlyrdquo implementation of the newly definedlogical operations ldquo⋆ and ⋆rdquo that are essentially oplus (XOR) and ⊙(XNOR) operations respectively for a two-input system

(i) ldquoGeneraterdquo the template and plot the function(ii) ldquoExpandrdquo the expression to include every possible

product in SOP form (every possible sum for a POSform)

(iii) ldquoReducerdquo the expression using logic laws(iv) ldquoRepeatrdquo the above two steps in iteration until no

further reduction is possible as illustrated in Figure 6

As an example let 119891 = (not1198861 + 119886011988611198862) and let the represen-tation form chosen be SOP-based as well 119891 ultimately getsreduced to 119891 = not1198861 + 11988601198862 as shown in Figure 6

(1) Generate plot the product terms (Figure 6(a))(2) Expand plot points relevant to each of the current

data-points (Figure 6(b)) Here not1198861 is expanded toinclude points wherever not1198861 = 1 997904rArr 119891 = 1

(3) Reduce reduce the expression using logic laws If anew data-point replacing one or some of the originaldata-points is obtained through this process and ifthis data point cannot be further reduced then it isnoted and kept for the next iteration (We note anexample of such data-point with a label ldquoNEWrdquo inFigure 6(c))

(4) Repeat repeat steps (2) and (3) until no new replace-ment data-point closer to the origin can be obtained(Figure 6(d))

Similar to the Karnaugh-maps the ldquodo not carerdquo inputcombinations could be exploited for logic reduction [3 38]

Complexity 7

(0 0)

a2a1a0

a2a1

a2a0

a2

a1a0

a1

a0

7

6

5

4

3

2

1

7654321a2a1a0a2a1a2a0a2a1a0a1a0

(a) ldquoGeneraterdquo step illustrated for 119891 = (not1198861) + (1198860)(1198861)(1198862)

a2a1a0

a2a1

a2a0

a2

a1a0

a1

a0

7

6

5

4

3

2

1

(0 0) 7654321a2a1a0a2a1a2a0a2a1a0a1a0

(b) ldquoExpandrdquo step illustrated for the product ldquo(not1198861)rdquo

a2a1a0

a2a1

a2a0

a2

a1a0

a1

a0

7

6

5

4

3

2

1

(0 0) 7654321a2a1a0a2a1a2a0a2a1a0a1a0

NEW

(c) ldquoReductionrdquo using the ldquoradic2-integer-multiple hypotenuse rulerdquo

a2a1a0

a2a1

a2a0

a2

a1a0

a1

a0

7

6

5

4

3

2

1

(0 0) 7654321a2a1a0a2a1a2a0a2a1a0a1a0

(d) The final optimized expression 119891 = (not1198861) + (1198860)(1198862)

Figure 6 Process of optimization the steps in order are illustrated

37 As a Data Structure Because the individual Booleanterms are represented by only two coordinates (irrespectiveof the number of inputs) any combinational logic may berepresented by two parameters alone This can be viewedas a conversion of a graphical scheme to an equivalentnongraphical numerical scheme to be handled by computingsystems efficiently The two coordinates may be stored in thememory as a single unit

Because one can represent any logic expression througha set of coordinates alone we now investigate the numberof bits required to store each of the numbered coordinatesWhile a proposed template for 119899 inputs consists of 4119899 points(including the origin) the number of valid coordinates is only

3119899 minus 1 This is because a variable can manifest itself in aninput combination in its original form (119886119896) or as a negatedversion (not119886119896) or it could simply be absent Thus there arethree possibilities for every input 119886119896 The number of validpoints is therefore 3119899 minus 1 (excluding the origin indicativeof a trivial case where the output is independent of all of theinputs under consideration) Both the total number of points(120591 = 4119899 minus 1) in a template and the number of valid points(120592 = 3119899 minus 1) grow exponentially with 119899 The ratio of thenumber of bits thus required (with and without consideringthe redundant points) = ceil(log2(3119899 minus 1))ceil(log2(4119899 minus 1))which varies between 075 and 085 and eventually convergesto 08 for large 119899 As an example for 119899 = 3 120592 = 26 and

8 Complexity

120591 = 63 while for 119899 = 6 120592 = 728 and 120591 = 4095 Memorysavings thus grow with 119899 if we effectively take into accountthe redundancies in the template

However in comparison to K-maps (= 2119899 cells for an 119899-input system) our proposed method requires a much highernumber of points (= 3119899minus1 if we consider only the valid inputcombinations excluding the origin) This is because the K-maps do not take into account all of the input combinationsbut only the ones where each of the inputs manifests itselfby its presence in its original or in its negated form (thus 2119899possibilities) In the proposed method we explicitly take intoaccount also the reduced input combinations where some ofthe inputs are absent

38 Possible Extensions and Further Research Scope

(i) Beyond SOPPOS paradigms more patterns and theresulting optimization strategies need to be investi-gated in different logic gate methodologies for exam-ple SOP (ldquoAND-ORrdquo which is ldquoNAND-onlyrdquo) POS(ldquoOR-ANDrdquo which is ldquoNOR-onlyrdquo) and ldquoIMPLY-onlyrdquo realisations

(ii) Multilevel logic the concept could be extended tothree dimensions to represent a ternary logic systemwhere both inputs and outputs can have three possiblelogic levels (0 1 2) The resulting representation isthus in the form of a ldquologic latticerdquo instead ofthe two-dimensional grid presented here where thethird dimension would serve a dual purpose Firstit represents a condition where all the inputs arelogical level ldquo2rdquo (just as 119885 and 119884 represented statesldquo1rdquo and ldquo0rdquo resp) Secondly the 119911-axis may alsorepresent an output logic level within such a ldquologicslicerdquo As an example output level-1 may correspondto a point with integer (119883 119884 119885) coordinates level-0may correspond to a point just beneath this point andlevel-2 just above (Figure 7)

(iii) Alternate coordinate systems every data-point sym-bolises a huge degree of information but with onlytwo or three parameters (coordinates) Because thisinformation need not necessarily come about usinga Cartesian coordinate system alone one can chooseto alternatively employ some other coordinate systemand look for patterns and laws for optimizationwithinsuch schemes For example a 2D polar system maybe used where the (119909 119910) to (119903 120579) transformation isgoverned by the equations 119903 = 119909 120579 = 2120587119910(2119899 minus 1)and 119909 119910 isin [0 2119899 minus 1] Note that 120579 remains in therange [0 2120587] irrespective of the number of inputs(Figure 8)The logic laws for such alternate coordinatesystemsmdashwhere every coordinate of interest120595 followsthe equation120595 = 119891(sum119898119896=1 2119894119896) 119894119896 isin Nmdashcan be devisedby recognising the inherent patterns which remainsan open problem with further scope for research

39 Implications to Other Fields of Study One can use thetemplate to establish three algebraic equalities as will bediscussed in detail in this section The method in general

z-axis

x-axisy-axis

(inputs = 2)

(inputs = 0)(inputs = 1)

Δz lt 1

z = z0planez = z0

+ dzplane

(x0 y

0 z0 + Δz)

(x0 y

0 z0 minus Δz)

(x0 y

0 z0 )

z = z minusdz

plane= 2

Output

= 1

Output

= 0

Output

Figure 7 Ternary logic representation (1199090 1199100 1199110 isin N) The point(1199090 1199100 1199110plusmnΔ119911 or 1199110) represents the input condition where all inputscorresponding to 119909-coordinate = 1 all inputs corresponding to 119910-coordinate = 0 and all inputs corresponding to 119911-coordinate = 2

Figure 8 Cartesian (119909 119910) coordinate system converted into polar(119903 120579) system where 119903 = 119909 120579 = 2120587119910(2119899 minus 1) and 119909 119910 isin [0 2119899 minus 1]Filled circles indicate the ldquoredundant pointsrdquo

is useful for alternative representation and processing ofdata whenever there is representation of information (ieencoding or decoding) in the form of distinct or discretestates The basic representation strategy can therefore beextended to represent and optimize operations on qubits [39]or to represent codon tables [40 41] or design digital syntheticgene circuits [42] Using the template used in the methodproposed we have derived the following three equalities inrelation to (4119899 minus 3119899) The method gives practical evidence ofthe equalities invented and presented next

Complexity 9

Theorem 3

3119899 + [119899minus2sum119894=0

3119899minus2minus1198942119894 (2119894+1 minus 1)] + (2119899 minus 1) 2119899minus1 = 4119899forall119899 isin N 119899 ge 2

(15)

or in other words

3119899 + [119899minus2sum119894=0

3119899minus2minus119894(2119894+12 )] + (21198992 ) = 4119899

forall119899 isin N 119899 ge 2(16)

Theorem 4

3119899 + [119899minus1sum119894=0

31198944(119899minus1minus119894)] = 4119899 forall119899 isin N 119899 ge 2 (17)

Theorem 5 As a consequence

[119899minus1sum119894=0

31198944(119899minus1minus119894)] = [119899minus2sum119894=0

3119899minus2minus119894(2119894+12 )] + (21198992 )

forall119899 isin N 119899 ge 2∵ Equations (16) and (17)

(18)

Let us first establish that the equalities being discussed are trueusing induction

Proof For Theorem 3 we observe that the equalities pre-sented in (15) or (16) are true for 119899 = 2 and 119899 = 3

For 119899 = 2LHS = 32 + [ 0sum

119894=0

30minus119894 (2119894+1 minus 1) 2119894] + (22 minus 1) 21= 9 + [(1 (2 minus 1) 1)] + (4 minus 1) 2 = 9 + 1 + 6= 16 = 42 = RHS

(19)

For 119899 = 3LHS = 33 + [ 1sum

119894=0

(31minus119894 (2119894+1 minus 1) 2119894)] + (23 minus 1) 22= 27 + [(31 (21 minus 1) 20) + (30 (22 minus 1) 21)]+ (7) 4 = 27 + [3 (1) (1) + 1 (3) (2)] + (7) 4

= 27 + 9 + 28 = 64 = 43 = RHS

(20)

Now say for some 119899 = 119898 ge 23119898 + [119898minus2sum

119894=0

(3119898minus2minus119894 (2119894+1 minus 1) 2119894)] + (2119898 minus 1) 2119898minus1= 22119898 = 4119898

(21)

Therefore

3119898 + (3119898minus2 (21 minus 1) 20 + 3119898minus3 (22 minus 1) 21 + sdot sdot sdot+ 31 (2119898minus2 minus 1) 2119898minus3 + 30 (2119898minus1 minus 1) 2119898minus2)+ (2119898 minus 1) 2119898minus1

= 22119898(22)

For 119899 = 119898 + 1 ge 2 thereforeLHS = 3119898+1 + [119898minus1sum

119894=0

(3119898minus1minus119894 (2119894+1 minus 1) 2119894)]+ (2119898+1 minus 1) 2119898

= 3119898+1 + (3119898minus1 (21 minus 1) 20 + 3119898minus2 (22 minus 1) 21 + sdot sdot sdot+ 31 (2119898minus1 minus 1) 2119898minus2 + 30 (2119898 minus 1) 2119898minus1)+ (2119898+1 minus 1) 2119898

= 3 (3119898 + (3119898minus2 (21 minus 1) 20 + 3119898minus1 (22 minus 1) 21 + sdot sdot sdot+ 30 (2119898minus1 minus 1) 2119898minus2)) + (2119898 minus 1) 2119898minus1+ (2119898+1 minus 1) 2119898

= (2 + 1) times (22119898 minus (2119898 minus 1) 2119898minus1) + (2119898 minus 1) 2119898minus1+ (2119898+1 minus 1) 2119898 (∵ Equation (22))

= (22119898+1 minus 22119898 + 2119898) + (22119898 minus 22119898minus1 + 2119898minus1)+ (22119898minus1 minus 2119898minus1 + 22119898+1 minus 2119898)

= 22119898+2 = 4119898+1 = RHS

(23)

Therefore if the statement is true for 119899 = 119898 then thestatement is true for 119899 = 119898 + 1 (119899119898 isin N) Because thestatement is true for 119899 = 2 and 3 it is true for every 119899 isin N

and 119899 ge 2Proof For Theorem 4 similarly we observe that the equalitypresented in (17) is true for 119899 = 2

LHS = 32 + [ 1sum119894=0

31198944(2minus1minus119894)] = 32 + [3041 + 3140]= 16 = 42 = RHS

(24)

Now say for some 119899 = 119898 ge 23119898 + [119898minus1sum

119894=0

31198944(119898minus1minus119894)] = 4119898 (25)

10 Complexity

For 119899 = 119898 + 1 ge 2 thereforeLHS = 3119898+1 + [ 119898sum

119894=0

31198944(119898minus119894)]

= 3119898+1 + 4 times [119898minus1sum119894=0

31198944(119898minus1minus119894)] + 311989840

= 3119898+1 + 4 times [4119898 minus 3119898] + 311989840= 3119898+1 + 4119898+1 minus (3 + 1) times 3119898 + 3119898 = 4119898+1= RHS

(26)

Because the statement is true for 119899 = 2 it is true for every119899 isin N and 119899 ge 2In the context of the template for the method proposed

the two theorems can be proven graphically by simplycounting the number of valid and redundant points viadifferent formulations If 3119899 + 119891(119899) = 4119899 for all 119899 isin N weknow the following

(i) 4119899 = 21198992119899 = (axis range)2 = total number of points

(ii) 3119899 = total number of ldquovalidrdquo data-points includingthe origin

(∵ Every input 119886119894 can manifest itself in the inputcombination represented by (119883119884) either in its orig-inal form (input combination represented by th 119883-coordinate) or as a negated input (input combinationrepresented by the119884-coordinate) ormay notmanifestitself at all)

(iii) 119891(119899) = total number of redundant points

(∵ Total number of points = total number of ldquovalidrdquopoints including the origin + total number of ldquoredun-dantrdquo points)

Proof To establish equality presented in the Theorem 3 weuse the formulation of 119891(119899) as presented in Figure 9 FromFigure 9 it is evident that

∵ 119896sum119897=1

119897 = 119896 (119896 + 1)2 forall119896 isin N119896 = 2119895 forall119895 isin N 0 le 119895 lt 119899

there4 119891 (119899) = [119899minus2sum119894=0

3119899minus2minus1198942119894 (2119894+1 minus 1)] + (2119899 minus 1) 2119899minus1(27)

The exponent of 3 translates to a multiplier that representsthe frequency of occurrence of the constituent triangle of thatspecific size in the template

1

1

2

22

3

4

568

7

32(2nminus3 minus 1)(2nminus4)31(2nminus2 minus 1)(2nminus3)

30(2nminus1 minus 1)(2nminus2)

(2n minus 1)(2nminus1)

3 points2 points1 point

2n minus 1 points

30

31

3 2

sum

Figure 9 Total number of ldquoredundant pointsrdquothe points in thedarkened region by counting the number of points in constituenttriangles separately

Proof AlternatelyTheorem4 can be proven using a recursiveformula for 119891(119899) as obtained from Figure 10

∵ 119891 (119899) = 3119891 (119899 minus 1) + 4119899minus1there4 119891 (119899) = 3 [3119891 (119899 minus 2) + 4119899minus2] + 4119899minus1

= 32119891 (119899 minus 2) + 3 times 4119899minus2 + 4119899minus1= [3119899minus1119891 (1) + 119899minus2sum

119894=0

3119894 (4(119899minus1minus119894))]

= [119899minus1sum119894=0

31198944(119899minus1minus119894)] ∵ 119891 (1) = 1

(28)

This method can be used in classrooms to quickly hand-calculate an optimized formof the logic function using a rulerand a compass alone (Figure 11)

4 Conclusion

A novel graphical technique for digital logic representationand optimization has been proposed which makes optimiza-tion algorithm much more instinctive and easy Multipleequations can be optimized simultaneously using the tem-plate presented One can theoretically therefore optimizesimultaneously multiple combinational logic circuits withany number of inputs or outputsWe propose a data structuretransformation that can compress a truth table into a fewparametersThe approach and the fundamentals involved arelikely to generate many novel solutions applicable to otherdisciplines A new paradigm is being proposed which opensup new avenues for research in terms of new methodologiesand pattern identification towards better logic reduction

Complexity 11

f(n minus 1)

f(n minus 1) f(n minus 1)

2nminus1 points in X2n

minus1

poin

ts in

Y

Figure 10 Total number of ldquoredundant pointsrdquothe points in thedarkened region by deriving a recursive formula for 119891(119899) Thus119891(119899) = 3 times 119891(119899 minus 1) + (2119899minus1)2

0 1 2 4 8 16

Figure 11 A compass and a ruler (marked with 2119899 units) canbe effectively used to quickly find the points that can be mergedtogether to generate amore optimized logic representation using thelogic laws proposed earlier (Section 35)

tailored to different implementation topologies such asSOP (ldquoAND-ORrdquoldquoNAND-onlyrdquo) POS (ldquoOR-ANDrdquoldquoNOR-onlyrdquo) and ldquoIMPLY-onlyrdquo realisations or the newer method-ologies such as ldquoreconfigurable asynchronous logic automata(RALA)rdquo [43] and the search formost suited template for eachin terms of the coordinate system of choice and the templategeneration rules

Our proposed technique currently establishes a one-to-one mapping between all of the possible variable combina-tions and the corresponding output statesmdashrepresenting theabsence and presence of every variable (in its original andthe negated form) for each of the variable combinations Onepossible future research direction is to investigate the rela-tionship between the proposed technique herein and otherrepresentation techniquesmdashsuch as QMDDs which too relyon quadrants and one-to-one mappings and which ratherextend way beyond the proposed technique to representtransformation matrices featuring complex entries useful forlogic involving qubits Further research may also be targetedtowards multilevel discrete systems beyond Boolean algebraand reversible [44 45] and hazard-free logic synthesis [9]

Conflicts of Interest

The authors declare that there are no conflicts of interestregarding the publication of this paper

References

[1] R K Brayton R Rudell A Sangiovanni-Vincentelli and AR Wang ldquoMIS A Multiple-Level Logic Optimization SystemrdquoIEEE Transactions on Computer-Aided Design of IntegratedCircuits and Systems vol 6 no 6 pp 1062ndash1081 1987

[2] A J De Geus and W Cohen ldquoA Rule-Based System for Opti-mizing Combinational Logicrdquo IEEE Design Test of Computersvol 2 no 4 pp 22ndash32 1985

[3] M Karnaugh ldquoThemapmethod for synthesis of combinationallogic circuitsrdquoTransactions of the American Institute of ElectricalEngineers Part I Communication and Electronics vol 72 no 5pp 593ndash599 1953

[4] M E Holder ldquoA modified karnaugh map techniquerdquo IEEETransactions on Education vol 48 no 1 pp 206-207 2005

[5] J Cavanagh Computer Arithmetic and Verilog HDL Fundamen-tals CRC Press 2009

[6] Z Kohavi and N K Jha Switching and finite automata theoryCambridge University Press 2009

[7] C Y Lee ldquoRepresentation of switching circuits by binary-decision programsrdquoBell Labs Technical Journal vol 38 pp 985ndash999 1959

[8] S B Akers ldquoBinary decision diagramsrdquo IEEE Transactions onComputers vol 27 no 6 pp 509ndash516 1978

[9] B Lin and S Devadas ldquoSynthesis of Hazard-Free MultilevelLogic Under Multiple-Input Changes from Binary DecisionDiagramsrdquo IEEE Transactions on Computer-Aided Design ofIntegrated Circuits and Systems vol 14 no 8 pp 974ndash985 1995

[10] C Yang and M Ciesielski ldquoBDS A BDD-based logic optimiza-tion systemrdquo IEEE Transactions on Computer-Aided Design ofIntegrated Circuits and Systems vol 21 no 7 pp 866ndash876 2002

[11] R E Bryant ldquoGraph-based algorithms for boolean functionmanipulationrdquo IEEE Transactions on Computers vol C-35 no8 pp 677ndash691 1986

[12] L Mauborgne ldquoAbstract interpretation using typed decisiongraphsrdquo Science of Computer Programming vol 31 no 1 pp 91ndash112 1998

[13] O Coudert and J C Madre ldquoA new implicit graph-based primeand essential prime computation techniquerdquo in Proceedings ofthe Proc International Symp Information Sciences FukuokaJapan 1992

[14] O Coudert and J C Madre ldquoA New Graph Based PrimeComputation Techniquerdquo in Logic Synthesis and Optimizationpp 33ndash57 Springer Boston MA USA 1993

[15] O Coudert J C Madre H Fraisse and H Touati ldquoImplicitprime cover computation An overviewrdquo in Proceedings of thein Proc Synthesis and Simulation Meeting and InternationalInterchange (SASIMI) Nara Japan 1993

[16] J Gu and R Puri ldquoAsynchronous circuit synthesis with Booleansatisfiabilityrdquo IEEE Transactions on Computer-Aided Design ofIntegrated Circuits and Systems vol 14 no 8 pp 961ndash973 1995

[17] W V Quine ldquoThe problem of simplifying truth functionsrdquoTheAmerican Mathematical Monthly vol 59 pp 521ndash531 1952

[18] W V Quine ldquoA way to simplify truth functionsrdquoThe AmericanMathematical Monthly vol 62 pp 627ndash631 1955

12 Complexity

[19] J McCluskey ldquoMinimization of Boolean functionsrdquo Bell LabsTechnical Journal vol 35 pp 1417ndash1444 1956

[20] S Petrick ldquoA direct determination of the irredundant forms of aboolean function from the set of prime implicantsrdquo Tech RepAir Force Cambridge Research Center 1956

[21] R L Rudell ldquoMultiple-Valued Logic Minimization for PLASynthesisrdquo Defense Technical Information Center 1986

[22] L Amaru P-E Gaillardon and G De Micheli ldquoMajority-Inverter Graph ANewParadigm for LogicOptimizationrdquo IEEETransactions on Computer-Aided Design of Integrated Circuitsand Systems vol 35 no 5 pp 806ndash819 2016

[23] D C Fielder ldquoClassroom Reduction of Boolean FunctionsrdquoIEEE Transactions on Education vol 9 no 4 pp 202ndash205 1966

[24] B C H Turton ldquoExtending Quine-McCluskey for exclusive-orlogic synthesisrdquo IEEE Transactions on Education vol 39 no 1pp 81ndash85 1996

[25] R Benzer and V Rozga ldquoThe Design and Application of aMinority Logic Gate-A Senior Projectrdquo IEEE Transactions onEducation vol 10 no 3 pp 141ndash146 1967

[26] N R Bell ldquoAMapMethod for the Teaching of the FundamentalConcepts of Compound-Input Logic Circuitsrdquo IEEE Transac-tions on Education vol 11 no 3 pp 173ndash177 1968

[27] R F Tinder ldquoMultilevel LogicMinimizationUsingK-mapXORPatternsrdquo IEEE Transactions on Education vol 38 no 4 pp370ndash375 1995

[28] B D Carroll and I Chen ldquoABALmdashA Language for BooleanFunction Representation andManipulationrdquo IEEE Transactionson Education vol 20 no 1 pp 70ndash72 1977

[29] C E Klock F R Schneider M V N Gomes D S MouraR P Ribas and A I Reis ldquoKARMA A didactic tool for two-level logic synthesisrdquo in Proceedings of theMSE 2007 2007 IEEEInternational Conference on Microelectronic Systems EducationEducating Systems Designers for the Global Economy and aSecure World pp 59-60 San Diego CA USA June 2007

[30] V P Correia and A I Reis ldquoA tutorial tool for switch logicrdquo inProceedings of the International Conference on MicroelectronicSystems Education MSE 2001 pp 28-29 Las Vegas NV USAJune 2001

[31] Z Stanisavljevic V Pavlovic B Nikolic and J DjordjevicldquoSDLDS-system for digital logic design and simulationrdquo IEEETransactions on Education vol 56 no 2 pp 235ndash245 2013

[32] P Corsini and L Rizzo ldquoSSCSSC A Tool for the Teaching ofDigital Circuitsrdquo IEEE Transactions on Education vol 34 no 1pp 70ndash75 1991

[33] G J Klir and M A Marin ldquoNew considerations in teachingswitching theoryrdquo IEEE Transactions on Education vol 12 no4 pp 257ndash261 1969

[34] M Gardner ldquoMathematical games The fantastic combinationsof John Conwayrsquos new solitaire game ldquoliferdquordquo Scientific Americanvol 223 no 4 pp 120ndash123 1970

[35] S Wolfram ldquoCellular automata as models of complexityrdquoNature vol 311 no 5985 pp 419ndash424 1984

[36] M Sierpinski ldquoSur une courbe dont tout point est un pointde ramificationrdquo Compte Rendus hebdomadaires des seance delAcademie des Science de Paris vol 160 pp 302ndash305 1915

[37] J-P Allouche and J Shallit Automatic SequencesTheory Appli-cations Generalizations Cambridge University Press 2003

[38] K A Bartlett R K Brayton G D Hachtel et al ldquoMultilevelLogic Minimization Using Implicit Donrsquot Caresrdquo IEEE Trans-actions on Computer-Aided Design of Integrated Circuits andSystems vol 7 no 6 pp 723ndash740 1988

[39] P Niemann R Wille D M Miller M A Thornton and RDrechsler ldquoQMDDs Efficient Quantum Function Representa-tion and Manipulationrdquo IEEE Transactions on Computer-AidedDesign of Integrated Circuits and Systems vol 35 no 1 pp 86ndash99 2016

[40] D Searls andMNoordewier ldquoPattern-matching search ofDNAsequences using logic grammarsrdquo in Proceedings of the SeventhIEEE Conference on Artificial Intelligence Application pp 3ndash9Miami Beach FL USA 1991

[41] C R Woese ldquoOrder in the genetic coderdquo Proceedings of theNational Acadamy of Sciences of the United States of Americavol 54 no 1 pp 71ndash75 1965

[42] M A Marchisio and J Stelling ldquoAutomatic design of digitalsynthetic gene circuitsrdquo PLoS Computational Biology vol 7 no2 Article ID e1001083 2011

[43] N Gershenfeld D Dalrymple K Chen et al ldquoReconfigurableasynchronous logic automata (RALA)rdquo in Proceedings of the37th Annual ACM SIGPLAN-SIGACT Symposium on Principlesof Programming Languages POPLrsquo10 vol 45 pp 1ndash6 MadridSpain January 2010

[44] V V Shende A K Prasad I L Markov and J P HayesldquoSynthesis of reversible logic circuitsrdquo IEEE Transactions onComputer-Aided Design of Integrated Circuits and Systems vol22 no 6 pp 710ndash722 2003

[45] P Gupta A Agrawal and N K Jha ldquoAn algorithm for synthesisof reversible logic circuitsrdquo IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems vol 25 no 11pp 2317ndash2329 2006

Submit your manuscripts athttpswwwhindawicom

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

MathematicsJournal of

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Mathematical Problems in Engineering

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Differential EquationsInternational Journal of

Volume 2014

Applied MathematicsJournal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Probability and StatisticsHindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Journal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Mathematical PhysicsAdvances in

Complex AnalysisJournal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

OptimizationJournal of

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CombinatoricsHindawi Publishing Corporationhttpwwwhindawicom Volume 2014

International Journal of

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Operations ResearchAdvances in

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Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Function Spaces

Abstract and Applied AnalysisHindawi Publishing Corporationhttpwwwhindawicom Volume 2014

International Journal of Mathematics and Mathematical Sciences

Hindawi Publishing Corporationhttpwwwhindawicom Volume 201

The Scientific World JournalHindawi Publishing Corporation httpwwwhindawicom Volume 2014

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Algebra

Discrete Dynamics in Nature and Society

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

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Decision SciencesAdvances in

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Volume 2014 Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Stochastic AnalysisInternational Journal of

6 Complexity

Two ldquovalidrdquo points symmetric about the ldquo119909 = 119910rdquo line in a POSplot can be effectively represented by a newly defined logicaloperation represented by operator ⋆ where119886119894 ⋆ 119886119895 = (sum119886119894 +sumnot119886119895) sdot (sumnot119886119894 +sum119886119895)

such that 119886119894 cap 119886119895 = 120601 (12)

Proof Two points symmetric about the ldquo119909 = 119910rdquo line will beof the forms 119860(1199090 1199100) and 119861(1199100 1199090) It follows that the setof direct inputs corresponding to the point 119860 (fl 119886119894) is thesame as the set of negated inputs that are represented by point119861 and vice versa (fl 119886119895)

Because points 119860 and 119861 are not redundant points itfollows that 119886119894 cap 119886119895 = 120601

Therefore for SOP

∵ 119891119860 = (prod119886119894) sdot (prodnot119886119895) there4 119891119861 = (prodnot119886119894) sdot (prod119886119895)

such that 119886119894 cap 119886119895 = 120601dArr

119891 = 119891119860 + 119865119861= (prod119886119894) sdot (prodnot119886119895) + (prodnot119886119894) sdot (prod119886119895)

(13)

Similarly for POS

∵ 119891119860 = (sum119886119894 +sumnot119886119895) there4 119891119861 = (sumnot119886119894 +sum119886119895)

such that 119886119894 cap 119886119895 = 120601dArr

119891 = 119891119860 sdot 119865119861 = (sum119886119894 +sumnot119886119895) sdot (sumnot119886119894 +sum119886119895)

(14)

For a system with just two inputs the ldquo⋆rdquo operator repre-sents simply an ldquoXORrdquo (oplus) operation while the ldquo⋆rdquo operatorrepresents an ldquoXNORrdquo (⊙) operation The ldquoNAND-onlyrdquoimplementation of ldquo⋆⋆rdquo operation is shown in Figure 5Thisnewly defined logic gate can then be optimized for given fan-in and fan-out values as necessary to be used as a buildingblock in the subsequent logic design

36 Process of Optimization While there is much scopefor further research in this area for effective algorithmdevelopment in terms of logic optimization including theones targeted to novel topologies such as the ones involvingIMPLY (not119860+119861) gates alone for example (instead of SOPPOSforms presented here effectively implemented using ldquoNANDalonerdquo and ldquoNOR alonerdquo topologies resp) one of the mostlikely logic flows for such optimization is presented next

Steps involved in this example algorithm are as follows

ai0 ai1 ai aj0 aj1 ajn

ajai

ai aj ai aj⋆ ⋆

Figure 5 ldquoNAND-onlyrdquo implementation of the newly definedlogical operations ldquo⋆ and ⋆rdquo that are essentially oplus (XOR) and ⊙(XNOR) operations respectively for a two-input system

(i) ldquoGeneraterdquo the template and plot the function(ii) ldquoExpandrdquo the expression to include every possible

product in SOP form (every possible sum for a POSform)

(iii) ldquoReducerdquo the expression using logic laws(iv) ldquoRepeatrdquo the above two steps in iteration until no

further reduction is possible as illustrated in Figure 6

As an example let 119891 = (not1198861 + 119886011988611198862) and let the represen-tation form chosen be SOP-based as well 119891 ultimately getsreduced to 119891 = not1198861 + 11988601198862 as shown in Figure 6

(1) Generate plot the product terms (Figure 6(a))(2) Expand plot points relevant to each of the current

data-points (Figure 6(b)) Here not1198861 is expanded toinclude points wherever not1198861 = 1 997904rArr 119891 = 1

(3) Reduce reduce the expression using logic laws If anew data-point replacing one or some of the originaldata-points is obtained through this process and ifthis data point cannot be further reduced then it isnoted and kept for the next iteration (We note anexample of such data-point with a label ldquoNEWrdquo inFigure 6(c))

(4) Repeat repeat steps (2) and (3) until no new replace-ment data-point closer to the origin can be obtained(Figure 6(d))

Similar to the Karnaugh-maps the ldquodo not carerdquo inputcombinations could be exploited for logic reduction [3 38]

Complexity 7

(0 0)

a2a1a0

a2a1

a2a0

a2

a1a0

a1

a0

7

6

5

4

3

2

1

7654321a2a1a0a2a1a2a0a2a1a0a1a0

(a) ldquoGeneraterdquo step illustrated for 119891 = (not1198861) + (1198860)(1198861)(1198862)

a2a1a0

a2a1

a2a0

a2

a1a0

a1

a0

7

6

5

4

3

2

1

(0 0) 7654321a2a1a0a2a1a2a0a2a1a0a1a0

(b) ldquoExpandrdquo step illustrated for the product ldquo(not1198861)rdquo

a2a1a0

a2a1

a2a0

a2

a1a0

a1

a0

7

6

5

4

3

2

1

(0 0) 7654321a2a1a0a2a1a2a0a2a1a0a1a0

NEW

(c) ldquoReductionrdquo using the ldquoradic2-integer-multiple hypotenuse rulerdquo

a2a1a0

a2a1

a2a0

a2

a1a0

a1

a0

7

6

5

4

3

2

1

(0 0) 7654321a2a1a0a2a1a2a0a2a1a0a1a0

(d) The final optimized expression 119891 = (not1198861) + (1198860)(1198862)

Figure 6 Process of optimization the steps in order are illustrated

37 As a Data Structure Because the individual Booleanterms are represented by only two coordinates (irrespectiveof the number of inputs) any combinational logic may berepresented by two parameters alone This can be viewedas a conversion of a graphical scheme to an equivalentnongraphical numerical scheme to be handled by computingsystems efficiently The two coordinates may be stored in thememory as a single unit

Because one can represent any logic expression througha set of coordinates alone we now investigate the numberof bits required to store each of the numbered coordinatesWhile a proposed template for 119899 inputs consists of 4119899 points(including the origin) the number of valid coordinates is only

3119899 minus 1 This is because a variable can manifest itself in aninput combination in its original form (119886119896) or as a negatedversion (not119886119896) or it could simply be absent Thus there arethree possibilities for every input 119886119896 The number of validpoints is therefore 3119899 minus 1 (excluding the origin indicativeof a trivial case where the output is independent of all of theinputs under consideration) Both the total number of points(120591 = 4119899 minus 1) in a template and the number of valid points(120592 = 3119899 minus 1) grow exponentially with 119899 The ratio of thenumber of bits thus required (with and without consideringthe redundant points) = ceil(log2(3119899 minus 1))ceil(log2(4119899 minus 1))which varies between 075 and 085 and eventually convergesto 08 for large 119899 As an example for 119899 = 3 120592 = 26 and

8 Complexity

120591 = 63 while for 119899 = 6 120592 = 728 and 120591 = 4095 Memorysavings thus grow with 119899 if we effectively take into accountthe redundancies in the template

However in comparison to K-maps (= 2119899 cells for an 119899-input system) our proposed method requires a much highernumber of points (= 3119899minus1 if we consider only the valid inputcombinations excluding the origin) This is because the K-maps do not take into account all of the input combinationsbut only the ones where each of the inputs manifests itselfby its presence in its original or in its negated form (thus 2119899possibilities) In the proposed method we explicitly take intoaccount also the reduced input combinations where some ofthe inputs are absent

38 Possible Extensions and Further Research Scope

(i) Beyond SOPPOS paradigms more patterns and theresulting optimization strategies need to be investi-gated in different logic gate methodologies for exam-ple SOP (ldquoAND-ORrdquo which is ldquoNAND-onlyrdquo) POS(ldquoOR-ANDrdquo which is ldquoNOR-onlyrdquo) and ldquoIMPLY-onlyrdquo realisations

(ii) Multilevel logic the concept could be extended tothree dimensions to represent a ternary logic systemwhere both inputs and outputs can have three possiblelogic levels (0 1 2) The resulting representation isthus in the form of a ldquologic latticerdquo instead ofthe two-dimensional grid presented here where thethird dimension would serve a dual purpose Firstit represents a condition where all the inputs arelogical level ldquo2rdquo (just as 119885 and 119884 represented statesldquo1rdquo and ldquo0rdquo resp) Secondly the 119911-axis may alsorepresent an output logic level within such a ldquologicslicerdquo As an example output level-1 may correspondto a point with integer (119883 119884 119885) coordinates level-0may correspond to a point just beneath this point andlevel-2 just above (Figure 7)

(iii) Alternate coordinate systems every data-point sym-bolises a huge degree of information but with onlytwo or three parameters (coordinates) Because thisinformation need not necessarily come about usinga Cartesian coordinate system alone one can chooseto alternatively employ some other coordinate systemand look for patterns and laws for optimizationwithinsuch schemes For example a 2D polar system maybe used where the (119909 119910) to (119903 120579) transformation isgoverned by the equations 119903 = 119909 120579 = 2120587119910(2119899 minus 1)and 119909 119910 isin [0 2119899 minus 1] Note that 120579 remains in therange [0 2120587] irrespective of the number of inputs(Figure 8)The logic laws for such alternate coordinatesystemsmdashwhere every coordinate of interest120595 followsthe equation120595 = 119891(sum119898119896=1 2119894119896) 119894119896 isin Nmdashcan be devisedby recognising the inherent patterns which remainsan open problem with further scope for research

39 Implications to Other Fields of Study One can use thetemplate to establish three algebraic equalities as will bediscussed in detail in this section The method in general

z-axis

x-axisy-axis

(inputs = 2)

(inputs = 0)(inputs = 1)

Δz lt 1

z = z0planez = z0

+ dzplane

(x0 y

0 z0 + Δz)

(x0 y

0 z0 minus Δz)

(x0 y

0 z0 )

z = z minusdz

plane= 2

Output

= 1

Output

= 0

Output

Figure 7 Ternary logic representation (1199090 1199100 1199110 isin N) The point(1199090 1199100 1199110plusmnΔ119911 or 1199110) represents the input condition where all inputscorresponding to 119909-coordinate = 1 all inputs corresponding to 119910-coordinate = 0 and all inputs corresponding to 119911-coordinate = 2

Figure 8 Cartesian (119909 119910) coordinate system converted into polar(119903 120579) system where 119903 = 119909 120579 = 2120587119910(2119899 minus 1) and 119909 119910 isin [0 2119899 minus 1]Filled circles indicate the ldquoredundant pointsrdquo

is useful for alternative representation and processing ofdata whenever there is representation of information (ieencoding or decoding) in the form of distinct or discretestates The basic representation strategy can therefore beextended to represent and optimize operations on qubits [39]or to represent codon tables [40 41] or design digital syntheticgene circuits [42] Using the template used in the methodproposed we have derived the following three equalities inrelation to (4119899 minus 3119899) The method gives practical evidence ofthe equalities invented and presented next

Complexity 9

Theorem 3

3119899 + [119899minus2sum119894=0

3119899minus2minus1198942119894 (2119894+1 minus 1)] + (2119899 minus 1) 2119899minus1 = 4119899forall119899 isin N 119899 ge 2

(15)

or in other words

3119899 + [119899minus2sum119894=0

3119899minus2minus119894(2119894+12 )] + (21198992 ) = 4119899

forall119899 isin N 119899 ge 2(16)

Theorem 4

3119899 + [119899minus1sum119894=0

31198944(119899minus1minus119894)] = 4119899 forall119899 isin N 119899 ge 2 (17)

Theorem 5 As a consequence

[119899minus1sum119894=0

31198944(119899minus1minus119894)] = [119899minus2sum119894=0

3119899minus2minus119894(2119894+12 )] + (21198992 )

forall119899 isin N 119899 ge 2∵ Equations (16) and (17)

(18)

Let us first establish that the equalities being discussed are trueusing induction

Proof For Theorem 3 we observe that the equalities pre-sented in (15) or (16) are true for 119899 = 2 and 119899 = 3

For 119899 = 2LHS = 32 + [ 0sum

119894=0

30minus119894 (2119894+1 minus 1) 2119894] + (22 minus 1) 21= 9 + [(1 (2 minus 1) 1)] + (4 minus 1) 2 = 9 + 1 + 6= 16 = 42 = RHS

(19)

For 119899 = 3LHS = 33 + [ 1sum

119894=0

(31minus119894 (2119894+1 minus 1) 2119894)] + (23 minus 1) 22= 27 + [(31 (21 minus 1) 20) + (30 (22 minus 1) 21)]+ (7) 4 = 27 + [3 (1) (1) + 1 (3) (2)] + (7) 4

= 27 + 9 + 28 = 64 = 43 = RHS

(20)

Now say for some 119899 = 119898 ge 23119898 + [119898minus2sum

119894=0

(3119898minus2minus119894 (2119894+1 minus 1) 2119894)] + (2119898 minus 1) 2119898minus1= 22119898 = 4119898

(21)

Therefore

3119898 + (3119898minus2 (21 minus 1) 20 + 3119898minus3 (22 minus 1) 21 + sdot sdot sdot+ 31 (2119898minus2 minus 1) 2119898minus3 + 30 (2119898minus1 minus 1) 2119898minus2)+ (2119898 minus 1) 2119898minus1

= 22119898(22)

For 119899 = 119898 + 1 ge 2 thereforeLHS = 3119898+1 + [119898minus1sum

119894=0

(3119898minus1minus119894 (2119894+1 minus 1) 2119894)]+ (2119898+1 minus 1) 2119898

= 3119898+1 + (3119898minus1 (21 minus 1) 20 + 3119898minus2 (22 minus 1) 21 + sdot sdot sdot+ 31 (2119898minus1 minus 1) 2119898minus2 + 30 (2119898 minus 1) 2119898minus1)+ (2119898+1 minus 1) 2119898

= 3 (3119898 + (3119898minus2 (21 minus 1) 20 + 3119898minus1 (22 minus 1) 21 + sdot sdot sdot+ 30 (2119898minus1 minus 1) 2119898minus2)) + (2119898 minus 1) 2119898minus1+ (2119898+1 minus 1) 2119898

= (2 + 1) times (22119898 minus (2119898 minus 1) 2119898minus1) + (2119898 minus 1) 2119898minus1+ (2119898+1 minus 1) 2119898 (∵ Equation (22))

= (22119898+1 minus 22119898 + 2119898) + (22119898 minus 22119898minus1 + 2119898minus1)+ (22119898minus1 minus 2119898minus1 + 22119898+1 minus 2119898)

= 22119898+2 = 4119898+1 = RHS

(23)

Therefore if the statement is true for 119899 = 119898 then thestatement is true for 119899 = 119898 + 1 (119899119898 isin N) Because thestatement is true for 119899 = 2 and 3 it is true for every 119899 isin N

and 119899 ge 2Proof For Theorem 4 similarly we observe that the equalitypresented in (17) is true for 119899 = 2

LHS = 32 + [ 1sum119894=0

31198944(2minus1minus119894)] = 32 + [3041 + 3140]= 16 = 42 = RHS

(24)

Now say for some 119899 = 119898 ge 23119898 + [119898minus1sum

119894=0

31198944(119898minus1minus119894)] = 4119898 (25)

10 Complexity

For 119899 = 119898 + 1 ge 2 thereforeLHS = 3119898+1 + [ 119898sum

119894=0

31198944(119898minus119894)]

= 3119898+1 + 4 times [119898minus1sum119894=0

31198944(119898minus1minus119894)] + 311989840

= 3119898+1 + 4 times [4119898 minus 3119898] + 311989840= 3119898+1 + 4119898+1 minus (3 + 1) times 3119898 + 3119898 = 4119898+1= RHS

(26)

Because the statement is true for 119899 = 2 it is true for every119899 isin N and 119899 ge 2In the context of the template for the method proposed

the two theorems can be proven graphically by simplycounting the number of valid and redundant points viadifferent formulations If 3119899 + 119891(119899) = 4119899 for all 119899 isin N weknow the following

(i) 4119899 = 21198992119899 = (axis range)2 = total number of points

(ii) 3119899 = total number of ldquovalidrdquo data-points includingthe origin

(∵ Every input 119886119894 can manifest itself in the inputcombination represented by (119883119884) either in its orig-inal form (input combination represented by th 119883-coordinate) or as a negated input (input combinationrepresented by the119884-coordinate) ormay notmanifestitself at all)

(iii) 119891(119899) = total number of redundant points

(∵ Total number of points = total number of ldquovalidrdquopoints including the origin + total number of ldquoredun-dantrdquo points)

Proof To establish equality presented in the Theorem 3 weuse the formulation of 119891(119899) as presented in Figure 9 FromFigure 9 it is evident that

∵ 119896sum119897=1

119897 = 119896 (119896 + 1)2 forall119896 isin N119896 = 2119895 forall119895 isin N 0 le 119895 lt 119899

there4 119891 (119899) = [119899minus2sum119894=0

3119899minus2minus1198942119894 (2119894+1 minus 1)] + (2119899 minus 1) 2119899minus1(27)

The exponent of 3 translates to a multiplier that representsthe frequency of occurrence of the constituent triangle of thatspecific size in the template

1

1

2

22

3

4

568

7

32(2nminus3 minus 1)(2nminus4)31(2nminus2 minus 1)(2nminus3)

30(2nminus1 minus 1)(2nminus2)

(2n minus 1)(2nminus1)

3 points2 points1 point

2n minus 1 points

30

31

3 2

sum

Figure 9 Total number of ldquoredundant pointsrdquothe points in thedarkened region by counting the number of points in constituenttriangles separately

Proof AlternatelyTheorem4 can be proven using a recursiveformula for 119891(119899) as obtained from Figure 10

∵ 119891 (119899) = 3119891 (119899 minus 1) + 4119899minus1there4 119891 (119899) = 3 [3119891 (119899 minus 2) + 4119899minus2] + 4119899minus1

= 32119891 (119899 minus 2) + 3 times 4119899minus2 + 4119899minus1= [3119899minus1119891 (1) + 119899minus2sum

119894=0

3119894 (4(119899minus1minus119894))]

= [119899minus1sum119894=0

31198944(119899minus1minus119894)] ∵ 119891 (1) = 1

(28)

This method can be used in classrooms to quickly hand-calculate an optimized formof the logic function using a rulerand a compass alone (Figure 11)

4 Conclusion

A novel graphical technique for digital logic representationand optimization has been proposed which makes optimiza-tion algorithm much more instinctive and easy Multipleequations can be optimized simultaneously using the tem-plate presented One can theoretically therefore optimizesimultaneously multiple combinational logic circuits withany number of inputs or outputsWe propose a data structuretransformation that can compress a truth table into a fewparametersThe approach and the fundamentals involved arelikely to generate many novel solutions applicable to otherdisciplines A new paradigm is being proposed which opensup new avenues for research in terms of new methodologiesand pattern identification towards better logic reduction

Complexity 11

f(n minus 1)

f(n minus 1) f(n minus 1)

2nminus1 points in X2n

minus1

poin

ts in

Y

Figure 10 Total number of ldquoredundant pointsrdquothe points in thedarkened region by deriving a recursive formula for 119891(119899) Thus119891(119899) = 3 times 119891(119899 minus 1) + (2119899minus1)2

0 1 2 4 8 16

Figure 11 A compass and a ruler (marked with 2119899 units) canbe effectively used to quickly find the points that can be mergedtogether to generate amore optimized logic representation using thelogic laws proposed earlier (Section 35)

tailored to different implementation topologies such asSOP (ldquoAND-ORrdquoldquoNAND-onlyrdquo) POS (ldquoOR-ANDrdquoldquoNOR-onlyrdquo) and ldquoIMPLY-onlyrdquo realisations or the newer method-ologies such as ldquoreconfigurable asynchronous logic automata(RALA)rdquo [43] and the search formost suited template for eachin terms of the coordinate system of choice and the templategeneration rules

Our proposed technique currently establishes a one-to-one mapping between all of the possible variable combina-tions and the corresponding output statesmdashrepresenting theabsence and presence of every variable (in its original andthe negated form) for each of the variable combinations Onepossible future research direction is to investigate the rela-tionship between the proposed technique herein and otherrepresentation techniquesmdashsuch as QMDDs which too relyon quadrants and one-to-one mappings and which ratherextend way beyond the proposed technique to representtransformation matrices featuring complex entries useful forlogic involving qubits Further research may also be targetedtowards multilevel discrete systems beyond Boolean algebraand reversible [44 45] and hazard-free logic synthesis [9]

Conflicts of Interest

The authors declare that there are no conflicts of interestregarding the publication of this paper

References

[1] R K Brayton R Rudell A Sangiovanni-Vincentelli and AR Wang ldquoMIS A Multiple-Level Logic Optimization SystemrdquoIEEE Transactions on Computer-Aided Design of IntegratedCircuits and Systems vol 6 no 6 pp 1062ndash1081 1987

[2] A J De Geus and W Cohen ldquoA Rule-Based System for Opti-mizing Combinational Logicrdquo IEEE Design Test of Computersvol 2 no 4 pp 22ndash32 1985

[3] M Karnaugh ldquoThemapmethod for synthesis of combinationallogic circuitsrdquoTransactions of the American Institute of ElectricalEngineers Part I Communication and Electronics vol 72 no 5pp 593ndash599 1953

[4] M E Holder ldquoA modified karnaugh map techniquerdquo IEEETransactions on Education vol 48 no 1 pp 206-207 2005

[5] J Cavanagh Computer Arithmetic and Verilog HDL Fundamen-tals CRC Press 2009

[6] Z Kohavi and N K Jha Switching and finite automata theoryCambridge University Press 2009

[7] C Y Lee ldquoRepresentation of switching circuits by binary-decision programsrdquoBell Labs Technical Journal vol 38 pp 985ndash999 1959

[8] S B Akers ldquoBinary decision diagramsrdquo IEEE Transactions onComputers vol 27 no 6 pp 509ndash516 1978

[9] B Lin and S Devadas ldquoSynthesis of Hazard-Free MultilevelLogic Under Multiple-Input Changes from Binary DecisionDiagramsrdquo IEEE Transactions on Computer-Aided Design ofIntegrated Circuits and Systems vol 14 no 8 pp 974ndash985 1995

[10] C Yang and M Ciesielski ldquoBDS A BDD-based logic optimiza-tion systemrdquo IEEE Transactions on Computer-Aided Design ofIntegrated Circuits and Systems vol 21 no 7 pp 866ndash876 2002

[11] R E Bryant ldquoGraph-based algorithms for boolean functionmanipulationrdquo IEEE Transactions on Computers vol C-35 no8 pp 677ndash691 1986

[12] L Mauborgne ldquoAbstract interpretation using typed decisiongraphsrdquo Science of Computer Programming vol 31 no 1 pp 91ndash112 1998

[13] O Coudert and J C Madre ldquoA new implicit graph-based primeand essential prime computation techniquerdquo in Proceedings ofthe Proc International Symp Information Sciences FukuokaJapan 1992

[14] O Coudert and J C Madre ldquoA New Graph Based PrimeComputation Techniquerdquo in Logic Synthesis and Optimizationpp 33ndash57 Springer Boston MA USA 1993

[15] O Coudert J C Madre H Fraisse and H Touati ldquoImplicitprime cover computation An overviewrdquo in Proceedings of thein Proc Synthesis and Simulation Meeting and InternationalInterchange (SASIMI) Nara Japan 1993

[16] J Gu and R Puri ldquoAsynchronous circuit synthesis with Booleansatisfiabilityrdquo IEEE Transactions on Computer-Aided Design ofIntegrated Circuits and Systems vol 14 no 8 pp 961ndash973 1995

[17] W V Quine ldquoThe problem of simplifying truth functionsrdquoTheAmerican Mathematical Monthly vol 59 pp 521ndash531 1952

[18] W V Quine ldquoA way to simplify truth functionsrdquoThe AmericanMathematical Monthly vol 62 pp 627ndash631 1955

12 Complexity

[19] J McCluskey ldquoMinimization of Boolean functionsrdquo Bell LabsTechnical Journal vol 35 pp 1417ndash1444 1956

[20] S Petrick ldquoA direct determination of the irredundant forms of aboolean function from the set of prime implicantsrdquo Tech RepAir Force Cambridge Research Center 1956

[21] R L Rudell ldquoMultiple-Valued Logic Minimization for PLASynthesisrdquo Defense Technical Information Center 1986

[22] L Amaru P-E Gaillardon and G De Micheli ldquoMajority-Inverter Graph ANewParadigm for LogicOptimizationrdquo IEEETransactions on Computer-Aided Design of Integrated Circuitsand Systems vol 35 no 5 pp 806ndash819 2016

[23] D C Fielder ldquoClassroom Reduction of Boolean FunctionsrdquoIEEE Transactions on Education vol 9 no 4 pp 202ndash205 1966

[24] B C H Turton ldquoExtending Quine-McCluskey for exclusive-orlogic synthesisrdquo IEEE Transactions on Education vol 39 no 1pp 81ndash85 1996

[25] R Benzer and V Rozga ldquoThe Design and Application of aMinority Logic Gate-A Senior Projectrdquo IEEE Transactions onEducation vol 10 no 3 pp 141ndash146 1967

[26] N R Bell ldquoAMapMethod for the Teaching of the FundamentalConcepts of Compound-Input Logic Circuitsrdquo IEEE Transac-tions on Education vol 11 no 3 pp 173ndash177 1968

[27] R F Tinder ldquoMultilevel LogicMinimizationUsingK-mapXORPatternsrdquo IEEE Transactions on Education vol 38 no 4 pp370ndash375 1995

[28] B D Carroll and I Chen ldquoABALmdashA Language for BooleanFunction Representation andManipulationrdquo IEEE Transactionson Education vol 20 no 1 pp 70ndash72 1977

[29] C E Klock F R Schneider M V N Gomes D S MouraR P Ribas and A I Reis ldquoKARMA A didactic tool for two-level logic synthesisrdquo in Proceedings of theMSE 2007 2007 IEEEInternational Conference on Microelectronic Systems EducationEducating Systems Designers for the Global Economy and aSecure World pp 59-60 San Diego CA USA June 2007

[30] V P Correia and A I Reis ldquoA tutorial tool for switch logicrdquo inProceedings of the International Conference on MicroelectronicSystems Education MSE 2001 pp 28-29 Las Vegas NV USAJune 2001

[31] Z Stanisavljevic V Pavlovic B Nikolic and J DjordjevicldquoSDLDS-system for digital logic design and simulationrdquo IEEETransactions on Education vol 56 no 2 pp 235ndash245 2013

[32] P Corsini and L Rizzo ldquoSSCSSC A Tool for the Teaching ofDigital Circuitsrdquo IEEE Transactions on Education vol 34 no 1pp 70ndash75 1991

[33] G J Klir and M A Marin ldquoNew considerations in teachingswitching theoryrdquo IEEE Transactions on Education vol 12 no4 pp 257ndash261 1969

[34] M Gardner ldquoMathematical games The fantastic combinationsof John Conwayrsquos new solitaire game ldquoliferdquordquo Scientific Americanvol 223 no 4 pp 120ndash123 1970

[35] S Wolfram ldquoCellular automata as models of complexityrdquoNature vol 311 no 5985 pp 419ndash424 1984

[36] M Sierpinski ldquoSur une courbe dont tout point est un pointde ramificationrdquo Compte Rendus hebdomadaires des seance delAcademie des Science de Paris vol 160 pp 302ndash305 1915

[37] J-P Allouche and J Shallit Automatic SequencesTheory Appli-cations Generalizations Cambridge University Press 2003

[38] K A Bartlett R K Brayton G D Hachtel et al ldquoMultilevelLogic Minimization Using Implicit Donrsquot Caresrdquo IEEE Trans-actions on Computer-Aided Design of Integrated Circuits andSystems vol 7 no 6 pp 723ndash740 1988

[39] P Niemann R Wille D M Miller M A Thornton and RDrechsler ldquoQMDDs Efficient Quantum Function Representa-tion and Manipulationrdquo IEEE Transactions on Computer-AidedDesign of Integrated Circuits and Systems vol 35 no 1 pp 86ndash99 2016

[40] D Searls andMNoordewier ldquoPattern-matching search ofDNAsequences using logic grammarsrdquo in Proceedings of the SeventhIEEE Conference on Artificial Intelligence Application pp 3ndash9Miami Beach FL USA 1991

[41] C R Woese ldquoOrder in the genetic coderdquo Proceedings of theNational Acadamy of Sciences of the United States of Americavol 54 no 1 pp 71ndash75 1965

[42] M A Marchisio and J Stelling ldquoAutomatic design of digitalsynthetic gene circuitsrdquo PLoS Computational Biology vol 7 no2 Article ID e1001083 2011

[43] N Gershenfeld D Dalrymple K Chen et al ldquoReconfigurableasynchronous logic automata (RALA)rdquo in Proceedings of the37th Annual ACM SIGPLAN-SIGACT Symposium on Principlesof Programming Languages POPLrsquo10 vol 45 pp 1ndash6 MadridSpain January 2010

[44] V V Shende A K Prasad I L Markov and J P HayesldquoSynthesis of reversible logic circuitsrdquo IEEE Transactions onComputer-Aided Design of Integrated Circuits and Systems vol22 no 6 pp 710ndash722 2003

[45] P Gupta A Agrawal and N K Jha ldquoAn algorithm for synthesisof reversible logic circuitsrdquo IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems vol 25 no 11pp 2317ndash2329 2006

Submit your manuscripts athttpswwwhindawicom

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

MathematicsJournal of

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Mathematical Problems in Engineering

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Differential EquationsInternational Journal of

Volume 2014

Applied MathematicsJournal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Probability and StatisticsHindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Journal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Mathematical PhysicsAdvances in

Complex AnalysisJournal of

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OptimizationJournal of

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CombinatoricsHindawi Publishing Corporationhttpwwwhindawicom Volume 2014

International Journal of

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Operations ResearchAdvances in

Journal of

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Function Spaces

Abstract and Applied AnalysisHindawi Publishing Corporationhttpwwwhindawicom Volume 2014

International Journal of Mathematics and Mathematical Sciences

Hindawi Publishing Corporationhttpwwwhindawicom Volume 201

The Scientific World JournalHindawi Publishing Corporation httpwwwhindawicom Volume 2014

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Algebra

Discrete Dynamics in Nature and Society

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Decision SciencesAdvances in

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Volume 2014 Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Stochastic AnalysisInternational Journal of

Complexity 7

(0 0)

a2a1a0

a2a1

a2a0

a2

a1a0

a1

a0

7

6

5

4

3

2

1

7654321a2a1a0a2a1a2a0a2a1a0a1a0

(a) ldquoGeneraterdquo step illustrated for 119891 = (not1198861) + (1198860)(1198861)(1198862)

a2a1a0

a2a1

a2a0

a2

a1a0

a1

a0

7

6

5

4

3

2

1

(0 0) 7654321a2a1a0a2a1a2a0a2a1a0a1a0

(b) ldquoExpandrdquo step illustrated for the product ldquo(not1198861)rdquo

a2a1a0

a2a1

a2a0

a2

a1a0

a1

a0

7

6

5

4

3

2

1

(0 0) 7654321a2a1a0a2a1a2a0a2a1a0a1a0

NEW

(c) ldquoReductionrdquo using the ldquoradic2-integer-multiple hypotenuse rulerdquo

a2a1a0

a2a1

a2a0

a2

a1a0

a1

a0

7

6

5

4

3

2

1

(0 0) 7654321a2a1a0a2a1a2a0a2a1a0a1a0

(d) The final optimized expression 119891 = (not1198861) + (1198860)(1198862)

Figure 6 Process of optimization the steps in order are illustrated

37 As a Data Structure Because the individual Booleanterms are represented by only two coordinates (irrespectiveof the number of inputs) any combinational logic may berepresented by two parameters alone This can be viewedas a conversion of a graphical scheme to an equivalentnongraphical numerical scheme to be handled by computingsystems efficiently The two coordinates may be stored in thememory as a single unit

Because one can represent any logic expression througha set of coordinates alone we now investigate the numberof bits required to store each of the numbered coordinatesWhile a proposed template for 119899 inputs consists of 4119899 points(including the origin) the number of valid coordinates is only

3119899 minus 1 This is because a variable can manifest itself in aninput combination in its original form (119886119896) or as a negatedversion (not119886119896) or it could simply be absent Thus there arethree possibilities for every input 119886119896 The number of validpoints is therefore 3119899 minus 1 (excluding the origin indicativeof a trivial case where the output is independent of all of theinputs under consideration) Both the total number of points(120591 = 4119899 minus 1) in a template and the number of valid points(120592 = 3119899 minus 1) grow exponentially with 119899 The ratio of thenumber of bits thus required (with and without consideringthe redundant points) = ceil(log2(3119899 minus 1))ceil(log2(4119899 minus 1))which varies between 075 and 085 and eventually convergesto 08 for large 119899 As an example for 119899 = 3 120592 = 26 and

8 Complexity

120591 = 63 while for 119899 = 6 120592 = 728 and 120591 = 4095 Memorysavings thus grow with 119899 if we effectively take into accountthe redundancies in the template

However in comparison to K-maps (= 2119899 cells for an 119899-input system) our proposed method requires a much highernumber of points (= 3119899minus1 if we consider only the valid inputcombinations excluding the origin) This is because the K-maps do not take into account all of the input combinationsbut only the ones where each of the inputs manifests itselfby its presence in its original or in its negated form (thus 2119899possibilities) In the proposed method we explicitly take intoaccount also the reduced input combinations where some ofthe inputs are absent

38 Possible Extensions and Further Research Scope

(i) Beyond SOPPOS paradigms more patterns and theresulting optimization strategies need to be investi-gated in different logic gate methodologies for exam-ple SOP (ldquoAND-ORrdquo which is ldquoNAND-onlyrdquo) POS(ldquoOR-ANDrdquo which is ldquoNOR-onlyrdquo) and ldquoIMPLY-onlyrdquo realisations

(ii) Multilevel logic the concept could be extended tothree dimensions to represent a ternary logic systemwhere both inputs and outputs can have three possiblelogic levels (0 1 2) The resulting representation isthus in the form of a ldquologic latticerdquo instead ofthe two-dimensional grid presented here where thethird dimension would serve a dual purpose Firstit represents a condition where all the inputs arelogical level ldquo2rdquo (just as 119885 and 119884 represented statesldquo1rdquo and ldquo0rdquo resp) Secondly the 119911-axis may alsorepresent an output logic level within such a ldquologicslicerdquo As an example output level-1 may correspondto a point with integer (119883 119884 119885) coordinates level-0may correspond to a point just beneath this point andlevel-2 just above (Figure 7)

(iii) Alternate coordinate systems every data-point sym-bolises a huge degree of information but with onlytwo or three parameters (coordinates) Because thisinformation need not necessarily come about usinga Cartesian coordinate system alone one can chooseto alternatively employ some other coordinate systemand look for patterns and laws for optimizationwithinsuch schemes For example a 2D polar system maybe used where the (119909 119910) to (119903 120579) transformation isgoverned by the equations 119903 = 119909 120579 = 2120587119910(2119899 minus 1)and 119909 119910 isin [0 2119899 minus 1] Note that 120579 remains in therange [0 2120587] irrespective of the number of inputs(Figure 8)The logic laws for such alternate coordinatesystemsmdashwhere every coordinate of interest120595 followsthe equation120595 = 119891(sum119898119896=1 2119894119896) 119894119896 isin Nmdashcan be devisedby recognising the inherent patterns which remainsan open problem with further scope for research

39 Implications to Other Fields of Study One can use thetemplate to establish three algebraic equalities as will bediscussed in detail in this section The method in general

z-axis

x-axisy-axis

(inputs = 2)

(inputs = 0)(inputs = 1)

Δz lt 1

z = z0planez = z0

+ dzplane

(x0 y

0 z0 + Δz)

(x0 y

0 z0 minus Δz)

(x0 y

0 z0 )

z = z minusdz

plane= 2

Output

= 1

Output

= 0

Output

Figure 7 Ternary logic representation (1199090 1199100 1199110 isin N) The point(1199090 1199100 1199110plusmnΔ119911 or 1199110) represents the input condition where all inputscorresponding to 119909-coordinate = 1 all inputs corresponding to 119910-coordinate = 0 and all inputs corresponding to 119911-coordinate = 2

Figure 8 Cartesian (119909 119910) coordinate system converted into polar(119903 120579) system where 119903 = 119909 120579 = 2120587119910(2119899 minus 1) and 119909 119910 isin [0 2119899 minus 1]Filled circles indicate the ldquoredundant pointsrdquo

is useful for alternative representation and processing ofdata whenever there is representation of information (ieencoding or decoding) in the form of distinct or discretestates The basic representation strategy can therefore beextended to represent and optimize operations on qubits [39]or to represent codon tables [40 41] or design digital syntheticgene circuits [42] Using the template used in the methodproposed we have derived the following three equalities inrelation to (4119899 minus 3119899) The method gives practical evidence ofthe equalities invented and presented next

Complexity 9

Theorem 3

3119899 + [119899minus2sum119894=0

3119899minus2minus1198942119894 (2119894+1 minus 1)] + (2119899 minus 1) 2119899minus1 = 4119899forall119899 isin N 119899 ge 2

(15)

or in other words

3119899 + [119899minus2sum119894=0

3119899minus2minus119894(2119894+12 )] + (21198992 ) = 4119899

forall119899 isin N 119899 ge 2(16)

Theorem 4

3119899 + [119899minus1sum119894=0

31198944(119899minus1minus119894)] = 4119899 forall119899 isin N 119899 ge 2 (17)

Theorem 5 As a consequence

[119899minus1sum119894=0

31198944(119899minus1minus119894)] = [119899minus2sum119894=0

3119899minus2minus119894(2119894+12 )] + (21198992 )

forall119899 isin N 119899 ge 2∵ Equations (16) and (17)

(18)

Let us first establish that the equalities being discussed are trueusing induction

Proof For Theorem 3 we observe that the equalities pre-sented in (15) or (16) are true for 119899 = 2 and 119899 = 3

For 119899 = 2LHS = 32 + [ 0sum

119894=0

30minus119894 (2119894+1 minus 1) 2119894] + (22 minus 1) 21= 9 + [(1 (2 minus 1) 1)] + (4 minus 1) 2 = 9 + 1 + 6= 16 = 42 = RHS

(19)

For 119899 = 3LHS = 33 + [ 1sum

119894=0

(31minus119894 (2119894+1 minus 1) 2119894)] + (23 minus 1) 22= 27 + [(31 (21 minus 1) 20) + (30 (22 minus 1) 21)]+ (7) 4 = 27 + [3 (1) (1) + 1 (3) (2)] + (7) 4

= 27 + 9 + 28 = 64 = 43 = RHS

(20)

Now say for some 119899 = 119898 ge 23119898 + [119898minus2sum

119894=0

(3119898minus2minus119894 (2119894+1 minus 1) 2119894)] + (2119898 minus 1) 2119898minus1= 22119898 = 4119898

(21)

Therefore

3119898 + (3119898minus2 (21 minus 1) 20 + 3119898minus3 (22 minus 1) 21 + sdot sdot sdot+ 31 (2119898minus2 minus 1) 2119898minus3 + 30 (2119898minus1 minus 1) 2119898minus2)+ (2119898 minus 1) 2119898minus1

= 22119898(22)

For 119899 = 119898 + 1 ge 2 thereforeLHS = 3119898+1 + [119898minus1sum

119894=0

(3119898minus1minus119894 (2119894+1 minus 1) 2119894)]+ (2119898+1 minus 1) 2119898

= 3119898+1 + (3119898minus1 (21 minus 1) 20 + 3119898minus2 (22 minus 1) 21 + sdot sdot sdot+ 31 (2119898minus1 minus 1) 2119898minus2 + 30 (2119898 minus 1) 2119898minus1)+ (2119898+1 minus 1) 2119898

= 3 (3119898 + (3119898minus2 (21 minus 1) 20 + 3119898minus1 (22 minus 1) 21 + sdot sdot sdot+ 30 (2119898minus1 minus 1) 2119898minus2)) + (2119898 minus 1) 2119898minus1+ (2119898+1 minus 1) 2119898

= (2 + 1) times (22119898 minus (2119898 minus 1) 2119898minus1) + (2119898 minus 1) 2119898minus1+ (2119898+1 minus 1) 2119898 (∵ Equation (22))

= (22119898+1 minus 22119898 + 2119898) + (22119898 minus 22119898minus1 + 2119898minus1)+ (22119898minus1 minus 2119898minus1 + 22119898+1 minus 2119898)

= 22119898+2 = 4119898+1 = RHS

(23)

Therefore if the statement is true for 119899 = 119898 then thestatement is true for 119899 = 119898 + 1 (119899119898 isin N) Because thestatement is true for 119899 = 2 and 3 it is true for every 119899 isin N

and 119899 ge 2Proof For Theorem 4 similarly we observe that the equalitypresented in (17) is true for 119899 = 2

LHS = 32 + [ 1sum119894=0

31198944(2minus1minus119894)] = 32 + [3041 + 3140]= 16 = 42 = RHS

(24)

Now say for some 119899 = 119898 ge 23119898 + [119898minus1sum

119894=0

31198944(119898minus1minus119894)] = 4119898 (25)

10 Complexity

For 119899 = 119898 + 1 ge 2 thereforeLHS = 3119898+1 + [ 119898sum

119894=0

31198944(119898minus119894)]

= 3119898+1 + 4 times [119898minus1sum119894=0

31198944(119898minus1minus119894)] + 311989840

= 3119898+1 + 4 times [4119898 minus 3119898] + 311989840= 3119898+1 + 4119898+1 minus (3 + 1) times 3119898 + 3119898 = 4119898+1= RHS

(26)

Because the statement is true for 119899 = 2 it is true for every119899 isin N and 119899 ge 2In the context of the template for the method proposed

the two theorems can be proven graphically by simplycounting the number of valid and redundant points viadifferent formulations If 3119899 + 119891(119899) = 4119899 for all 119899 isin N weknow the following

(i) 4119899 = 21198992119899 = (axis range)2 = total number of points

(ii) 3119899 = total number of ldquovalidrdquo data-points includingthe origin

(∵ Every input 119886119894 can manifest itself in the inputcombination represented by (119883119884) either in its orig-inal form (input combination represented by th 119883-coordinate) or as a negated input (input combinationrepresented by the119884-coordinate) ormay notmanifestitself at all)

(iii) 119891(119899) = total number of redundant points

(∵ Total number of points = total number of ldquovalidrdquopoints including the origin + total number of ldquoredun-dantrdquo points)

Proof To establish equality presented in the Theorem 3 weuse the formulation of 119891(119899) as presented in Figure 9 FromFigure 9 it is evident that

∵ 119896sum119897=1

119897 = 119896 (119896 + 1)2 forall119896 isin N119896 = 2119895 forall119895 isin N 0 le 119895 lt 119899

there4 119891 (119899) = [119899minus2sum119894=0

3119899minus2minus1198942119894 (2119894+1 minus 1)] + (2119899 minus 1) 2119899minus1(27)

The exponent of 3 translates to a multiplier that representsthe frequency of occurrence of the constituent triangle of thatspecific size in the template

1

1

2

22

3

4

568

7

32(2nminus3 minus 1)(2nminus4)31(2nminus2 minus 1)(2nminus3)

30(2nminus1 minus 1)(2nminus2)

(2n minus 1)(2nminus1)

3 points2 points1 point

2n minus 1 points

30

31

3 2

sum

Figure 9 Total number of ldquoredundant pointsrdquothe points in thedarkened region by counting the number of points in constituenttriangles separately

Proof AlternatelyTheorem4 can be proven using a recursiveformula for 119891(119899) as obtained from Figure 10

∵ 119891 (119899) = 3119891 (119899 minus 1) + 4119899minus1there4 119891 (119899) = 3 [3119891 (119899 minus 2) + 4119899minus2] + 4119899minus1

= 32119891 (119899 minus 2) + 3 times 4119899minus2 + 4119899minus1= [3119899minus1119891 (1) + 119899minus2sum

119894=0

3119894 (4(119899minus1minus119894))]

= [119899minus1sum119894=0

31198944(119899minus1minus119894)] ∵ 119891 (1) = 1

(28)

This method can be used in classrooms to quickly hand-calculate an optimized formof the logic function using a rulerand a compass alone (Figure 11)

4 Conclusion

A novel graphical technique for digital logic representationand optimization has been proposed which makes optimiza-tion algorithm much more instinctive and easy Multipleequations can be optimized simultaneously using the tem-plate presented One can theoretically therefore optimizesimultaneously multiple combinational logic circuits withany number of inputs or outputsWe propose a data structuretransformation that can compress a truth table into a fewparametersThe approach and the fundamentals involved arelikely to generate many novel solutions applicable to otherdisciplines A new paradigm is being proposed which opensup new avenues for research in terms of new methodologiesand pattern identification towards better logic reduction

Complexity 11

f(n minus 1)

f(n minus 1) f(n minus 1)

2nminus1 points in X2n

minus1

poin

ts in

Y

Figure 10 Total number of ldquoredundant pointsrdquothe points in thedarkened region by deriving a recursive formula for 119891(119899) Thus119891(119899) = 3 times 119891(119899 minus 1) + (2119899minus1)2

0 1 2 4 8 16

Figure 11 A compass and a ruler (marked with 2119899 units) canbe effectively used to quickly find the points that can be mergedtogether to generate amore optimized logic representation using thelogic laws proposed earlier (Section 35)

tailored to different implementation topologies such asSOP (ldquoAND-ORrdquoldquoNAND-onlyrdquo) POS (ldquoOR-ANDrdquoldquoNOR-onlyrdquo) and ldquoIMPLY-onlyrdquo realisations or the newer method-ologies such as ldquoreconfigurable asynchronous logic automata(RALA)rdquo [43] and the search formost suited template for eachin terms of the coordinate system of choice and the templategeneration rules

Our proposed technique currently establishes a one-to-one mapping between all of the possible variable combina-tions and the corresponding output statesmdashrepresenting theabsence and presence of every variable (in its original andthe negated form) for each of the variable combinations Onepossible future research direction is to investigate the rela-tionship between the proposed technique herein and otherrepresentation techniquesmdashsuch as QMDDs which too relyon quadrants and one-to-one mappings and which ratherextend way beyond the proposed technique to representtransformation matrices featuring complex entries useful forlogic involving qubits Further research may also be targetedtowards multilevel discrete systems beyond Boolean algebraand reversible [44 45] and hazard-free logic synthesis [9]

Conflicts of Interest

The authors declare that there are no conflicts of interestregarding the publication of this paper

References

[1] R K Brayton R Rudell A Sangiovanni-Vincentelli and AR Wang ldquoMIS A Multiple-Level Logic Optimization SystemrdquoIEEE Transactions on Computer-Aided Design of IntegratedCircuits and Systems vol 6 no 6 pp 1062ndash1081 1987

[2] A J De Geus and W Cohen ldquoA Rule-Based System for Opti-mizing Combinational Logicrdquo IEEE Design Test of Computersvol 2 no 4 pp 22ndash32 1985

[3] M Karnaugh ldquoThemapmethod for synthesis of combinationallogic circuitsrdquoTransactions of the American Institute of ElectricalEngineers Part I Communication and Electronics vol 72 no 5pp 593ndash599 1953

[4] M E Holder ldquoA modified karnaugh map techniquerdquo IEEETransactions on Education vol 48 no 1 pp 206-207 2005

[5] J Cavanagh Computer Arithmetic and Verilog HDL Fundamen-tals CRC Press 2009

[6] Z Kohavi and N K Jha Switching and finite automata theoryCambridge University Press 2009

[7] C Y Lee ldquoRepresentation of switching circuits by binary-decision programsrdquoBell Labs Technical Journal vol 38 pp 985ndash999 1959

[8] S B Akers ldquoBinary decision diagramsrdquo IEEE Transactions onComputers vol 27 no 6 pp 509ndash516 1978

[9] B Lin and S Devadas ldquoSynthesis of Hazard-Free MultilevelLogic Under Multiple-Input Changes from Binary DecisionDiagramsrdquo IEEE Transactions on Computer-Aided Design ofIntegrated Circuits and Systems vol 14 no 8 pp 974ndash985 1995

[10] C Yang and M Ciesielski ldquoBDS A BDD-based logic optimiza-tion systemrdquo IEEE Transactions on Computer-Aided Design ofIntegrated Circuits and Systems vol 21 no 7 pp 866ndash876 2002

[11] R E Bryant ldquoGraph-based algorithms for boolean functionmanipulationrdquo IEEE Transactions on Computers vol C-35 no8 pp 677ndash691 1986

[12] L Mauborgne ldquoAbstract interpretation using typed decisiongraphsrdquo Science of Computer Programming vol 31 no 1 pp 91ndash112 1998

[13] O Coudert and J C Madre ldquoA new implicit graph-based primeand essential prime computation techniquerdquo in Proceedings ofthe Proc International Symp Information Sciences FukuokaJapan 1992

[14] O Coudert and J C Madre ldquoA New Graph Based PrimeComputation Techniquerdquo in Logic Synthesis and Optimizationpp 33ndash57 Springer Boston MA USA 1993

[15] O Coudert J C Madre H Fraisse and H Touati ldquoImplicitprime cover computation An overviewrdquo in Proceedings of thein Proc Synthesis and Simulation Meeting and InternationalInterchange (SASIMI) Nara Japan 1993

[16] J Gu and R Puri ldquoAsynchronous circuit synthesis with Booleansatisfiabilityrdquo IEEE Transactions on Computer-Aided Design ofIntegrated Circuits and Systems vol 14 no 8 pp 961ndash973 1995

[17] W V Quine ldquoThe problem of simplifying truth functionsrdquoTheAmerican Mathematical Monthly vol 59 pp 521ndash531 1952

[18] W V Quine ldquoA way to simplify truth functionsrdquoThe AmericanMathematical Monthly vol 62 pp 627ndash631 1955

12 Complexity

[19] J McCluskey ldquoMinimization of Boolean functionsrdquo Bell LabsTechnical Journal vol 35 pp 1417ndash1444 1956

[20] S Petrick ldquoA direct determination of the irredundant forms of aboolean function from the set of prime implicantsrdquo Tech RepAir Force Cambridge Research Center 1956

[21] R L Rudell ldquoMultiple-Valued Logic Minimization for PLASynthesisrdquo Defense Technical Information Center 1986

[22] L Amaru P-E Gaillardon and G De Micheli ldquoMajority-Inverter Graph ANewParadigm for LogicOptimizationrdquo IEEETransactions on Computer-Aided Design of Integrated Circuitsand Systems vol 35 no 5 pp 806ndash819 2016

[23] D C Fielder ldquoClassroom Reduction of Boolean FunctionsrdquoIEEE Transactions on Education vol 9 no 4 pp 202ndash205 1966

[24] B C H Turton ldquoExtending Quine-McCluskey for exclusive-orlogic synthesisrdquo IEEE Transactions on Education vol 39 no 1pp 81ndash85 1996

[25] R Benzer and V Rozga ldquoThe Design and Application of aMinority Logic Gate-A Senior Projectrdquo IEEE Transactions onEducation vol 10 no 3 pp 141ndash146 1967

[26] N R Bell ldquoAMapMethod for the Teaching of the FundamentalConcepts of Compound-Input Logic Circuitsrdquo IEEE Transac-tions on Education vol 11 no 3 pp 173ndash177 1968

[27] R F Tinder ldquoMultilevel LogicMinimizationUsingK-mapXORPatternsrdquo IEEE Transactions on Education vol 38 no 4 pp370ndash375 1995

[28] B D Carroll and I Chen ldquoABALmdashA Language for BooleanFunction Representation andManipulationrdquo IEEE Transactionson Education vol 20 no 1 pp 70ndash72 1977

[29] C E Klock F R Schneider M V N Gomes D S MouraR P Ribas and A I Reis ldquoKARMA A didactic tool for two-level logic synthesisrdquo in Proceedings of theMSE 2007 2007 IEEEInternational Conference on Microelectronic Systems EducationEducating Systems Designers for the Global Economy and aSecure World pp 59-60 San Diego CA USA June 2007

[30] V P Correia and A I Reis ldquoA tutorial tool for switch logicrdquo inProceedings of the International Conference on MicroelectronicSystems Education MSE 2001 pp 28-29 Las Vegas NV USAJune 2001

[31] Z Stanisavljevic V Pavlovic B Nikolic and J DjordjevicldquoSDLDS-system for digital logic design and simulationrdquo IEEETransactions on Education vol 56 no 2 pp 235ndash245 2013

[32] P Corsini and L Rizzo ldquoSSCSSC A Tool for the Teaching ofDigital Circuitsrdquo IEEE Transactions on Education vol 34 no 1pp 70ndash75 1991

[33] G J Klir and M A Marin ldquoNew considerations in teachingswitching theoryrdquo IEEE Transactions on Education vol 12 no4 pp 257ndash261 1969

[34] M Gardner ldquoMathematical games The fantastic combinationsof John Conwayrsquos new solitaire game ldquoliferdquordquo Scientific Americanvol 223 no 4 pp 120ndash123 1970

[35] S Wolfram ldquoCellular automata as models of complexityrdquoNature vol 311 no 5985 pp 419ndash424 1984

[36] M Sierpinski ldquoSur une courbe dont tout point est un pointde ramificationrdquo Compte Rendus hebdomadaires des seance delAcademie des Science de Paris vol 160 pp 302ndash305 1915

[37] J-P Allouche and J Shallit Automatic SequencesTheory Appli-cations Generalizations Cambridge University Press 2003

[38] K A Bartlett R K Brayton G D Hachtel et al ldquoMultilevelLogic Minimization Using Implicit Donrsquot Caresrdquo IEEE Trans-actions on Computer-Aided Design of Integrated Circuits andSystems vol 7 no 6 pp 723ndash740 1988

[39] P Niemann R Wille D M Miller M A Thornton and RDrechsler ldquoQMDDs Efficient Quantum Function Representa-tion and Manipulationrdquo IEEE Transactions on Computer-AidedDesign of Integrated Circuits and Systems vol 35 no 1 pp 86ndash99 2016

[40] D Searls andMNoordewier ldquoPattern-matching search ofDNAsequences using logic grammarsrdquo in Proceedings of the SeventhIEEE Conference on Artificial Intelligence Application pp 3ndash9Miami Beach FL USA 1991

[41] C R Woese ldquoOrder in the genetic coderdquo Proceedings of theNational Acadamy of Sciences of the United States of Americavol 54 no 1 pp 71ndash75 1965

[42] M A Marchisio and J Stelling ldquoAutomatic design of digitalsynthetic gene circuitsrdquo PLoS Computational Biology vol 7 no2 Article ID e1001083 2011

[43] N Gershenfeld D Dalrymple K Chen et al ldquoReconfigurableasynchronous logic automata (RALA)rdquo in Proceedings of the37th Annual ACM SIGPLAN-SIGACT Symposium on Principlesof Programming Languages POPLrsquo10 vol 45 pp 1ndash6 MadridSpain January 2010

[44] V V Shende A K Prasad I L Markov and J P HayesldquoSynthesis of reversible logic circuitsrdquo IEEE Transactions onComputer-Aided Design of Integrated Circuits and Systems vol22 no 6 pp 710ndash722 2003

[45] P Gupta A Agrawal and N K Jha ldquoAn algorithm for synthesisof reversible logic circuitsrdquo IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems vol 25 no 11pp 2317ndash2329 2006

Submit your manuscripts athttpswwwhindawicom

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

MathematicsJournal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Mathematical Problems in Engineering

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Differential EquationsInternational Journal of

Volume 2014

Applied MathematicsJournal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Probability and StatisticsHindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Journal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Mathematical PhysicsAdvances in

Complex AnalysisJournal of

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OptimizationJournal of

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CombinatoricsHindawi Publishing Corporationhttpwwwhindawicom Volume 2014

International Journal of

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Operations ResearchAdvances in

Journal of

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Function Spaces

Abstract and Applied AnalysisHindawi Publishing Corporationhttpwwwhindawicom Volume 2014

International Journal of Mathematics and Mathematical Sciences

Hindawi Publishing Corporationhttpwwwhindawicom Volume 201

The Scientific World JournalHindawi Publishing Corporation httpwwwhindawicom Volume 2014

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Algebra

Discrete Dynamics in Nature and Society

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Decision SciencesAdvances in

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Volume 2014 Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Stochastic AnalysisInternational Journal of

8 Complexity

120591 = 63 while for 119899 = 6 120592 = 728 and 120591 = 4095 Memorysavings thus grow with 119899 if we effectively take into accountthe redundancies in the template

However in comparison to K-maps (= 2119899 cells for an 119899-input system) our proposed method requires a much highernumber of points (= 3119899minus1 if we consider only the valid inputcombinations excluding the origin) This is because the K-maps do not take into account all of the input combinationsbut only the ones where each of the inputs manifests itselfby its presence in its original or in its negated form (thus 2119899possibilities) In the proposed method we explicitly take intoaccount also the reduced input combinations where some ofthe inputs are absent

38 Possible Extensions and Further Research Scope

(i) Beyond SOPPOS paradigms more patterns and theresulting optimization strategies need to be investi-gated in different logic gate methodologies for exam-ple SOP (ldquoAND-ORrdquo which is ldquoNAND-onlyrdquo) POS(ldquoOR-ANDrdquo which is ldquoNOR-onlyrdquo) and ldquoIMPLY-onlyrdquo realisations

(ii) Multilevel logic the concept could be extended tothree dimensions to represent a ternary logic systemwhere both inputs and outputs can have three possiblelogic levels (0 1 2) The resulting representation isthus in the form of a ldquologic latticerdquo instead ofthe two-dimensional grid presented here where thethird dimension would serve a dual purpose Firstit represents a condition where all the inputs arelogical level ldquo2rdquo (just as 119885 and 119884 represented statesldquo1rdquo and ldquo0rdquo resp) Secondly the 119911-axis may alsorepresent an output logic level within such a ldquologicslicerdquo As an example output level-1 may correspondto a point with integer (119883 119884 119885) coordinates level-0may correspond to a point just beneath this point andlevel-2 just above (Figure 7)

(iii) Alternate coordinate systems every data-point sym-bolises a huge degree of information but with onlytwo or three parameters (coordinates) Because thisinformation need not necessarily come about usinga Cartesian coordinate system alone one can chooseto alternatively employ some other coordinate systemand look for patterns and laws for optimizationwithinsuch schemes For example a 2D polar system maybe used where the (119909 119910) to (119903 120579) transformation isgoverned by the equations 119903 = 119909 120579 = 2120587119910(2119899 minus 1)and 119909 119910 isin [0 2119899 minus 1] Note that 120579 remains in therange [0 2120587] irrespective of the number of inputs(Figure 8)The logic laws for such alternate coordinatesystemsmdashwhere every coordinate of interest120595 followsthe equation120595 = 119891(sum119898119896=1 2119894119896) 119894119896 isin Nmdashcan be devisedby recognising the inherent patterns which remainsan open problem with further scope for research

39 Implications to Other Fields of Study One can use thetemplate to establish three algebraic equalities as will bediscussed in detail in this section The method in general

z-axis

x-axisy-axis

(inputs = 2)

(inputs = 0)(inputs = 1)

Δz lt 1

z = z0planez = z0

+ dzplane

(x0 y

0 z0 + Δz)

(x0 y

0 z0 minus Δz)

(x0 y

0 z0 )

z = z minusdz

plane= 2

Output

= 1

Output

= 0

Output

Figure 7 Ternary logic representation (1199090 1199100 1199110 isin N) The point(1199090 1199100 1199110plusmnΔ119911 or 1199110) represents the input condition where all inputscorresponding to 119909-coordinate = 1 all inputs corresponding to 119910-coordinate = 0 and all inputs corresponding to 119911-coordinate = 2

Figure 8 Cartesian (119909 119910) coordinate system converted into polar(119903 120579) system where 119903 = 119909 120579 = 2120587119910(2119899 minus 1) and 119909 119910 isin [0 2119899 minus 1]Filled circles indicate the ldquoredundant pointsrdquo

is useful for alternative representation and processing ofdata whenever there is representation of information (ieencoding or decoding) in the form of distinct or discretestates The basic representation strategy can therefore beextended to represent and optimize operations on qubits [39]or to represent codon tables [40 41] or design digital syntheticgene circuits [42] Using the template used in the methodproposed we have derived the following three equalities inrelation to (4119899 minus 3119899) The method gives practical evidence ofthe equalities invented and presented next

Complexity 9

Theorem 3

3119899 + [119899minus2sum119894=0

3119899minus2minus1198942119894 (2119894+1 minus 1)] + (2119899 minus 1) 2119899minus1 = 4119899forall119899 isin N 119899 ge 2

(15)

or in other words

3119899 + [119899minus2sum119894=0

3119899minus2minus119894(2119894+12 )] + (21198992 ) = 4119899

forall119899 isin N 119899 ge 2(16)

Theorem 4

3119899 + [119899minus1sum119894=0

31198944(119899minus1minus119894)] = 4119899 forall119899 isin N 119899 ge 2 (17)

Theorem 5 As a consequence

[119899minus1sum119894=0

31198944(119899minus1minus119894)] = [119899minus2sum119894=0

3119899minus2minus119894(2119894+12 )] + (21198992 )

forall119899 isin N 119899 ge 2∵ Equations (16) and (17)

(18)

Let us first establish that the equalities being discussed are trueusing induction

Proof For Theorem 3 we observe that the equalities pre-sented in (15) or (16) are true for 119899 = 2 and 119899 = 3

For 119899 = 2LHS = 32 + [ 0sum

119894=0

30minus119894 (2119894+1 minus 1) 2119894] + (22 minus 1) 21= 9 + [(1 (2 minus 1) 1)] + (4 minus 1) 2 = 9 + 1 + 6= 16 = 42 = RHS

(19)

For 119899 = 3LHS = 33 + [ 1sum

119894=0

(31minus119894 (2119894+1 minus 1) 2119894)] + (23 minus 1) 22= 27 + [(31 (21 minus 1) 20) + (30 (22 minus 1) 21)]+ (7) 4 = 27 + [3 (1) (1) + 1 (3) (2)] + (7) 4

= 27 + 9 + 28 = 64 = 43 = RHS

(20)

Now say for some 119899 = 119898 ge 23119898 + [119898minus2sum

119894=0

(3119898minus2minus119894 (2119894+1 minus 1) 2119894)] + (2119898 minus 1) 2119898minus1= 22119898 = 4119898

(21)

Therefore

3119898 + (3119898minus2 (21 minus 1) 20 + 3119898minus3 (22 minus 1) 21 + sdot sdot sdot+ 31 (2119898minus2 minus 1) 2119898minus3 + 30 (2119898minus1 minus 1) 2119898minus2)+ (2119898 minus 1) 2119898minus1

= 22119898(22)

For 119899 = 119898 + 1 ge 2 thereforeLHS = 3119898+1 + [119898minus1sum

119894=0

(3119898minus1minus119894 (2119894+1 minus 1) 2119894)]+ (2119898+1 minus 1) 2119898

= 3119898+1 + (3119898minus1 (21 minus 1) 20 + 3119898minus2 (22 minus 1) 21 + sdot sdot sdot+ 31 (2119898minus1 minus 1) 2119898minus2 + 30 (2119898 minus 1) 2119898minus1)+ (2119898+1 minus 1) 2119898

= 3 (3119898 + (3119898minus2 (21 minus 1) 20 + 3119898minus1 (22 minus 1) 21 + sdot sdot sdot+ 30 (2119898minus1 minus 1) 2119898minus2)) + (2119898 minus 1) 2119898minus1+ (2119898+1 minus 1) 2119898

= (2 + 1) times (22119898 minus (2119898 minus 1) 2119898minus1) + (2119898 minus 1) 2119898minus1+ (2119898+1 minus 1) 2119898 (∵ Equation (22))

= (22119898+1 minus 22119898 + 2119898) + (22119898 minus 22119898minus1 + 2119898minus1)+ (22119898minus1 minus 2119898minus1 + 22119898+1 minus 2119898)

= 22119898+2 = 4119898+1 = RHS

(23)

Therefore if the statement is true for 119899 = 119898 then thestatement is true for 119899 = 119898 + 1 (119899119898 isin N) Because thestatement is true for 119899 = 2 and 3 it is true for every 119899 isin N

and 119899 ge 2Proof For Theorem 4 similarly we observe that the equalitypresented in (17) is true for 119899 = 2

LHS = 32 + [ 1sum119894=0

31198944(2minus1minus119894)] = 32 + [3041 + 3140]= 16 = 42 = RHS

(24)

Now say for some 119899 = 119898 ge 23119898 + [119898minus1sum

119894=0

31198944(119898minus1minus119894)] = 4119898 (25)

10 Complexity

For 119899 = 119898 + 1 ge 2 thereforeLHS = 3119898+1 + [ 119898sum

119894=0

31198944(119898minus119894)]

= 3119898+1 + 4 times [119898minus1sum119894=0

31198944(119898minus1minus119894)] + 311989840

= 3119898+1 + 4 times [4119898 minus 3119898] + 311989840= 3119898+1 + 4119898+1 minus (3 + 1) times 3119898 + 3119898 = 4119898+1= RHS

(26)

Because the statement is true for 119899 = 2 it is true for every119899 isin N and 119899 ge 2In the context of the template for the method proposed

the two theorems can be proven graphically by simplycounting the number of valid and redundant points viadifferent formulations If 3119899 + 119891(119899) = 4119899 for all 119899 isin N weknow the following

(i) 4119899 = 21198992119899 = (axis range)2 = total number of points

(ii) 3119899 = total number of ldquovalidrdquo data-points includingthe origin

(∵ Every input 119886119894 can manifest itself in the inputcombination represented by (119883119884) either in its orig-inal form (input combination represented by th 119883-coordinate) or as a negated input (input combinationrepresented by the119884-coordinate) ormay notmanifestitself at all)

(iii) 119891(119899) = total number of redundant points

(∵ Total number of points = total number of ldquovalidrdquopoints including the origin + total number of ldquoredun-dantrdquo points)

Proof To establish equality presented in the Theorem 3 weuse the formulation of 119891(119899) as presented in Figure 9 FromFigure 9 it is evident that

∵ 119896sum119897=1

119897 = 119896 (119896 + 1)2 forall119896 isin N119896 = 2119895 forall119895 isin N 0 le 119895 lt 119899

there4 119891 (119899) = [119899minus2sum119894=0

3119899minus2minus1198942119894 (2119894+1 minus 1)] + (2119899 minus 1) 2119899minus1(27)

The exponent of 3 translates to a multiplier that representsthe frequency of occurrence of the constituent triangle of thatspecific size in the template

1

1

2

22

3

4

568

7

32(2nminus3 minus 1)(2nminus4)31(2nminus2 minus 1)(2nminus3)

30(2nminus1 minus 1)(2nminus2)

(2n minus 1)(2nminus1)

3 points2 points1 point

2n minus 1 points

30

31

3 2

sum

Figure 9 Total number of ldquoredundant pointsrdquothe points in thedarkened region by counting the number of points in constituenttriangles separately

Proof AlternatelyTheorem4 can be proven using a recursiveformula for 119891(119899) as obtained from Figure 10

∵ 119891 (119899) = 3119891 (119899 minus 1) + 4119899minus1there4 119891 (119899) = 3 [3119891 (119899 minus 2) + 4119899minus2] + 4119899minus1

= 32119891 (119899 minus 2) + 3 times 4119899minus2 + 4119899minus1= [3119899minus1119891 (1) + 119899minus2sum

119894=0

3119894 (4(119899minus1minus119894))]

= [119899minus1sum119894=0

31198944(119899minus1minus119894)] ∵ 119891 (1) = 1

(28)

This method can be used in classrooms to quickly hand-calculate an optimized formof the logic function using a rulerand a compass alone (Figure 11)

4 Conclusion

A novel graphical technique for digital logic representationand optimization has been proposed which makes optimiza-tion algorithm much more instinctive and easy Multipleequations can be optimized simultaneously using the tem-plate presented One can theoretically therefore optimizesimultaneously multiple combinational logic circuits withany number of inputs or outputsWe propose a data structuretransformation that can compress a truth table into a fewparametersThe approach and the fundamentals involved arelikely to generate many novel solutions applicable to otherdisciplines A new paradigm is being proposed which opensup new avenues for research in terms of new methodologiesand pattern identification towards better logic reduction

Complexity 11

f(n minus 1)

f(n minus 1) f(n minus 1)

2nminus1 points in X2n

minus1

poin

ts in

Y

Figure 10 Total number of ldquoredundant pointsrdquothe points in thedarkened region by deriving a recursive formula for 119891(119899) Thus119891(119899) = 3 times 119891(119899 minus 1) + (2119899minus1)2

0 1 2 4 8 16

Figure 11 A compass and a ruler (marked with 2119899 units) canbe effectively used to quickly find the points that can be mergedtogether to generate amore optimized logic representation using thelogic laws proposed earlier (Section 35)

tailored to different implementation topologies such asSOP (ldquoAND-ORrdquoldquoNAND-onlyrdquo) POS (ldquoOR-ANDrdquoldquoNOR-onlyrdquo) and ldquoIMPLY-onlyrdquo realisations or the newer method-ologies such as ldquoreconfigurable asynchronous logic automata(RALA)rdquo [43] and the search formost suited template for eachin terms of the coordinate system of choice and the templategeneration rules

Our proposed technique currently establishes a one-to-one mapping between all of the possible variable combina-tions and the corresponding output statesmdashrepresenting theabsence and presence of every variable (in its original andthe negated form) for each of the variable combinations Onepossible future research direction is to investigate the rela-tionship between the proposed technique herein and otherrepresentation techniquesmdashsuch as QMDDs which too relyon quadrants and one-to-one mappings and which ratherextend way beyond the proposed technique to representtransformation matrices featuring complex entries useful forlogic involving qubits Further research may also be targetedtowards multilevel discrete systems beyond Boolean algebraand reversible [44 45] and hazard-free logic synthesis [9]

Conflicts of Interest

The authors declare that there are no conflicts of interestregarding the publication of this paper

References

[1] R K Brayton R Rudell A Sangiovanni-Vincentelli and AR Wang ldquoMIS A Multiple-Level Logic Optimization SystemrdquoIEEE Transactions on Computer-Aided Design of IntegratedCircuits and Systems vol 6 no 6 pp 1062ndash1081 1987

[2] A J De Geus and W Cohen ldquoA Rule-Based System for Opti-mizing Combinational Logicrdquo IEEE Design Test of Computersvol 2 no 4 pp 22ndash32 1985

[3] M Karnaugh ldquoThemapmethod for synthesis of combinationallogic circuitsrdquoTransactions of the American Institute of ElectricalEngineers Part I Communication and Electronics vol 72 no 5pp 593ndash599 1953

[4] M E Holder ldquoA modified karnaugh map techniquerdquo IEEETransactions on Education vol 48 no 1 pp 206-207 2005

[5] J Cavanagh Computer Arithmetic and Verilog HDL Fundamen-tals CRC Press 2009

[6] Z Kohavi and N K Jha Switching and finite automata theoryCambridge University Press 2009

[7] C Y Lee ldquoRepresentation of switching circuits by binary-decision programsrdquoBell Labs Technical Journal vol 38 pp 985ndash999 1959

[8] S B Akers ldquoBinary decision diagramsrdquo IEEE Transactions onComputers vol 27 no 6 pp 509ndash516 1978

[9] B Lin and S Devadas ldquoSynthesis of Hazard-Free MultilevelLogic Under Multiple-Input Changes from Binary DecisionDiagramsrdquo IEEE Transactions on Computer-Aided Design ofIntegrated Circuits and Systems vol 14 no 8 pp 974ndash985 1995

[10] C Yang and M Ciesielski ldquoBDS A BDD-based logic optimiza-tion systemrdquo IEEE Transactions on Computer-Aided Design ofIntegrated Circuits and Systems vol 21 no 7 pp 866ndash876 2002

[11] R E Bryant ldquoGraph-based algorithms for boolean functionmanipulationrdquo IEEE Transactions on Computers vol C-35 no8 pp 677ndash691 1986

[12] L Mauborgne ldquoAbstract interpretation using typed decisiongraphsrdquo Science of Computer Programming vol 31 no 1 pp 91ndash112 1998

[13] O Coudert and J C Madre ldquoA new implicit graph-based primeand essential prime computation techniquerdquo in Proceedings ofthe Proc International Symp Information Sciences FukuokaJapan 1992

[14] O Coudert and J C Madre ldquoA New Graph Based PrimeComputation Techniquerdquo in Logic Synthesis and Optimizationpp 33ndash57 Springer Boston MA USA 1993

[15] O Coudert J C Madre H Fraisse and H Touati ldquoImplicitprime cover computation An overviewrdquo in Proceedings of thein Proc Synthesis and Simulation Meeting and InternationalInterchange (SASIMI) Nara Japan 1993

[16] J Gu and R Puri ldquoAsynchronous circuit synthesis with Booleansatisfiabilityrdquo IEEE Transactions on Computer-Aided Design ofIntegrated Circuits and Systems vol 14 no 8 pp 961ndash973 1995

[17] W V Quine ldquoThe problem of simplifying truth functionsrdquoTheAmerican Mathematical Monthly vol 59 pp 521ndash531 1952

[18] W V Quine ldquoA way to simplify truth functionsrdquoThe AmericanMathematical Monthly vol 62 pp 627ndash631 1955

12 Complexity

[19] J McCluskey ldquoMinimization of Boolean functionsrdquo Bell LabsTechnical Journal vol 35 pp 1417ndash1444 1956

[20] S Petrick ldquoA direct determination of the irredundant forms of aboolean function from the set of prime implicantsrdquo Tech RepAir Force Cambridge Research Center 1956

[21] R L Rudell ldquoMultiple-Valued Logic Minimization for PLASynthesisrdquo Defense Technical Information Center 1986

[22] L Amaru P-E Gaillardon and G De Micheli ldquoMajority-Inverter Graph ANewParadigm for LogicOptimizationrdquo IEEETransactions on Computer-Aided Design of Integrated Circuitsand Systems vol 35 no 5 pp 806ndash819 2016

[23] D C Fielder ldquoClassroom Reduction of Boolean FunctionsrdquoIEEE Transactions on Education vol 9 no 4 pp 202ndash205 1966

[24] B C H Turton ldquoExtending Quine-McCluskey for exclusive-orlogic synthesisrdquo IEEE Transactions on Education vol 39 no 1pp 81ndash85 1996

[25] R Benzer and V Rozga ldquoThe Design and Application of aMinority Logic Gate-A Senior Projectrdquo IEEE Transactions onEducation vol 10 no 3 pp 141ndash146 1967

[26] N R Bell ldquoAMapMethod for the Teaching of the FundamentalConcepts of Compound-Input Logic Circuitsrdquo IEEE Transac-tions on Education vol 11 no 3 pp 173ndash177 1968

[27] R F Tinder ldquoMultilevel LogicMinimizationUsingK-mapXORPatternsrdquo IEEE Transactions on Education vol 38 no 4 pp370ndash375 1995

[28] B D Carroll and I Chen ldquoABALmdashA Language for BooleanFunction Representation andManipulationrdquo IEEE Transactionson Education vol 20 no 1 pp 70ndash72 1977

[29] C E Klock F R Schneider M V N Gomes D S MouraR P Ribas and A I Reis ldquoKARMA A didactic tool for two-level logic synthesisrdquo in Proceedings of theMSE 2007 2007 IEEEInternational Conference on Microelectronic Systems EducationEducating Systems Designers for the Global Economy and aSecure World pp 59-60 San Diego CA USA June 2007

[30] V P Correia and A I Reis ldquoA tutorial tool for switch logicrdquo inProceedings of the International Conference on MicroelectronicSystems Education MSE 2001 pp 28-29 Las Vegas NV USAJune 2001

[31] Z Stanisavljevic V Pavlovic B Nikolic and J DjordjevicldquoSDLDS-system for digital logic design and simulationrdquo IEEETransactions on Education vol 56 no 2 pp 235ndash245 2013

[32] P Corsini and L Rizzo ldquoSSCSSC A Tool for the Teaching ofDigital Circuitsrdquo IEEE Transactions on Education vol 34 no 1pp 70ndash75 1991

[33] G J Klir and M A Marin ldquoNew considerations in teachingswitching theoryrdquo IEEE Transactions on Education vol 12 no4 pp 257ndash261 1969

[34] M Gardner ldquoMathematical games The fantastic combinationsof John Conwayrsquos new solitaire game ldquoliferdquordquo Scientific Americanvol 223 no 4 pp 120ndash123 1970

[35] S Wolfram ldquoCellular automata as models of complexityrdquoNature vol 311 no 5985 pp 419ndash424 1984

[36] M Sierpinski ldquoSur une courbe dont tout point est un pointde ramificationrdquo Compte Rendus hebdomadaires des seance delAcademie des Science de Paris vol 160 pp 302ndash305 1915

[37] J-P Allouche and J Shallit Automatic SequencesTheory Appli-cations Generalizations Cambridge University Press 2003

[38] K A Bartlett R K Brayton G D Hachtel et al ldquoMultilevelLogic Minimization Using Implicit Donrsquot Caresrdquo IEEE Trans-actions on Computer-Aided Design of Integrated Circuits andSystems vol 7 no 6 pp 723ndash740 1988

[39] P Niemann R Wille D M Miller M A Thornton and RDrechsler ldquoQMDDs Efficient Quantum Function Representa-tion and Manipulationrdquo IEEE Transactions on Computer-AidedDesign of Integrated Circuits and Systems vol 35 no 1 pp 86ndash99 2016

[40] D Searls andMNoordewier ldquoPattern-matching search ofDNAsequences using logic grammarsrdquo in Proceedings of the SeventhIEEE Conference on Artificial Intelligence Application pp 3ndash9Miami Beach FL USA 1991

[41] C R Woese ldquoOrder in the genetic coderdquo Proceedings of theNational Acadamy of Sciences of the United States of Americavol 54 no 1 pp 71ndash75 1965

[42] M A Marchisio and J Stelling ldquoAutomatic design of digitalsynthetic gene circuitsrdquo PLoS Computational Biology vol 7 no2 Article ID e1001083 2011

[43] N Gershenfeld D Dalrymple K Chen et al ldquoReconfigurableasynchronous logic automata (RALA)rdquo in Proceedings of the37th Annual ACM SIGPLAN-SIGACT Symposium on Principlesof Programming Languages POPLrsquo10 vol 45 pp 1ndash6 MadridSpain January 2010

[44] V V Shende A K Prasad I L Markov and J P HayesldquoSynthesis of reversible logic circuitsrdquo IEEE Transactions onComputer-Aided Design of Integrated Circuits and Systems vol22 no 6 pp 710ndash722 2003

[45] P Gupta A Agrawal and N K Jha ldquoAn algorithm for synthesisof reversible logic circuitsrdquo IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems vol 25 no 11pp 2317ndash2329 2006

Submit your manuscripts athttpswwwhindawicom

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

MathematicsJournal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Mathematical Problems in Engineering

Hindawi Publishing Corporationhttpwwwhindawicom

Differential EquationsInternational Journal of

Volume 2014

Applied MathematicsJournal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Probability and StatisticsHindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Journal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Mathematical PhysicsAdvances in

Complex AnalysisJournal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

OptimizationJournal of

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CombinatoricsHindawi Publishing Corporationhttpwwwhindawicom Volume 2014

International Journal of

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Operations ResearchAdvances in

Journal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Function Spaces

Abstract and Applied AnalysisHindawi Publishing Corporationhttpwwwhindawicom Volume 2014

International Journal of Mathematics and Mathematical Sciences

Hindawi Publishing Corporationhttpwwwhindawicom Volume 201

The Scientific World JournalHindawi Publishing Corporation httpwwwhindawicom Volume 2014

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Algebra

Discrete Dynamics in Nature and Society

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Decision SciencesAdvances in

Journal of

Hindawi Publishing Corporationhttpwwwhindawicom

Volume 2014 Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Stochastic AnalysisInternational Journal of

Complexity 9

Theorem 3

3119899 + [119899minus2sum119894=0

3119899minus2minus1198942119894 (2119894+1 minus 1)] + (2119899 minus 1) 2119899minus1 = 4119899forall119899 isin N 119899 ge 2

(15)

or in other words

3119899 + [119899minus2sum119894=0

3119899minus2minus119894(2119894+12 )] + (21198992 ) = 4119899

forall119899 isin N 119899 ge 2(16)

Theorem 4

3119899 + [119899minus1sum119894=0

31198944(119899minus1minus119894)] = 4119899 forall119899 isin N 119899 ge 2 (17)

Theorem 5 As a consequence

[119899minus1sum119894=0

31198944(119899minus1minus119894)] = [119899minus2sum119894=0

3119899minus2minus119894(2119894+12 )] + (21198992 )

forall119899 isin N 119899 ge 2∵ Equations (16) and (17)

(18)

Let us first establish that the equalities being discussed are trueusing induction

Proof For Theorem 3 we observe that the equalities pre-sented in (15) or (16) are true for 119899 = 2 and 119899 = 3

For 119899 = 2LHS = 32 + [ 0sum

119894=0

30minus119894 (2119894+1 minus 1) 2119894] + (22 minus 1) 21= 9 + [(1 (2 minus 1) 1)] + (4 minus 1) 2 = 9 + 1 + 6= 16 = 42 = RHS

(19)

For 119899 = 3LHS = 33 + [ 1sum

119894=0

(31minus119894 (2119894+1 minus 1) 2119894)] + (23 minus 1) 22= 27 + [(31 (21 minus 1) 20) + (30 (22 minus 1) 21)]+ (7) 4 = 27 + [3 (1) (1) + 1 (3) (2)] + (7) 4

= 27 + 9 + 28 = 64 = 43 = RHS

(20)

Now say for some 119899 = 119898 ge 23119898 + [119898minus2sum

119894=0

(3119898minus2minus119894 (2119894+1 minus 1) 2119894)] + (2119898 minus 1) 2119898minus1= 22119898 = 4119898

(21)

Therefore

3119898 + (3119898minus2 (21 minus 1) 20 + 3119898minus3 (22 minus 1) 21 + sdot sdot sdot+ 31 (2119898minus2 minus 1) 2119898minus3 + 30 (2119898minus1 minus 1) 2119898minus2)+ (2119898 minus 1) 2119898minus1

= 22119898(22)

For 119899 = 119898 + 1 ge 2 thereforeLHS = 3119898+1 + [119898minus1sum

119894=0

(3119898minus1minus119894 (2119894+1 minus 1) 2119894)]+ (2119898+1 minus 1) 2119898

= 3119898+1 + (3119898minus1 (21 minus 1) 20 + 3119898minus2 (22 minus 1) 21 + sdot sdot sdot+ 31 (2119898minus1 minus 1) 2119898minus2 + 30 (2119898 minus 1) 2119898minus1)+ (2119898+1 minus 1) 2119898

= 3 (3119898 + (3119898minus2 (21 minus 1) 20 + 3119898minus1 (22 minus 1) 21 + sdot sdot sdot+ 30 (2119898minus1 minus 1) 2119898minus2)) + (2119898 minus 1) 2119898minus1+ (2119898+1 minus 1) 2119898

= (2 + 1) times (22119898 minus (2119898 minus 1) 2119898minus1) + (2119898 minus 1) 2119898minus1+ (2119898+1 minus 1) 2119898 (∵ Equation (22))

= (22119898+1 minus 22119898 + 2119898) + (22119898 minus 22119898minus1 + 2119898minus1)+ (22119898minus1 minus 2119898minus1 + 22119898+1 minus 2119898)

= 22119898+2 = 4119898+1 = RHS

(23)

Therefore if the statement is true for 119899 = 119898 then thestatement is true for 119899 = 119898 + 1 (119899119898 isin N) Because thestatement is true for 119899 = 2 and 3 it is true for every 119899 isin N

and 119899 ge 2Proof For Theorem 4 similarly we observe that the equalitypresented in (17) is true for 119899 = 2

LHS = 32 + [ 1sum119894=0

31198944(2minus1minus119894)] = 32 + [3041 + 3140]= 16 = 42 = RHS

(24)

Now say for some 119899 = 119898 ge 23119898 + [119898minus1sum

119894=0

31198944(119898minus1minus119894)] = 4119898 (25)

10 Complexity

For 119899 = 119898 + 1 ge 2 thereforeLHS = 3119898+1 + [ 119898sum

119894=0

31198944(119898minus119894)]

= 3119898+1 + 4 times [119898minus1sum119894=0

31198944(119898minus1minus119894)] + 311989840

= 3119898+1 + 4 times [4119898 minus 3119898] + 311989840= 3119898+1 + 4119898+1 minus (3 + 1) times 3119898 + 3119898 = 4119898+1= RHS

(26)

Because the statement is true for 119899 = 2 it is true for every119899 isin N and 119899 ge 2In the context of the template for the method proposed

the two theorems can be proven graphically by simplycounting the number of valid and redundant points viadifferent formulations If 3119899 + 119891(119899) = 4119899 for all 119899 isin N weknow the following

(i) 4119899 = 21198992119899 = (axis range)2 = total number of points

(ii) 3119899 = total number of ldquovalidrdquo data-points includingthe origin

(∵ Every input 119886119894 can manifest itself in the inputcombination represented by (119883119884) either in its orig-inal form (input combination represented by th 119883-coordinate) or as a negated input (input combinationrepresented by the119884-coordinate) ormay notmanifestitself at all)

(iii) 119891(119899) = total number of redundant points

(∵ Total number of points = total number of ldquovalidrdquopoints including the origin + total number of ldquoredun-dantrdquo points)

Proof To establish equality presented in the Theorem 3 weuse the formulation of 119891(119899) as presented in Figure 9 FromFigure 9 it is evident that

∵ 119896sum119897=1

119897 = 119896 (119896 + 1)2 forall119896 isin N119896 = 2119895 forall119895 isin N 0 le 119895 lt 119899

there4 119891 (119899) = [119899minus2sum119894=0

3119899minus2minus1198942119894 (2119894+1 minus 1)] + (2119899 minus 1) 2119899minus1(27)

The exponent of 3 translates to a multiplier that representsthe frequency of occurrence of the constituent triangle of thatspecific size in the template

1

1

2

22

3

4

568

7

32(2nminus3 minus 1)(2nminus4)31(2nminus2 minus 1)(2nminus3)

30(2nminus1 minus 1)(2nminus2)

(2n minus 1)(2nminus1)

3 points2 points1 point

2n minus 1 points

30

31

3 2

sum

Figure 9 Total number of ldquoredundant pointsrdquothe points in thedarkened region by counting the number of points in constituenttriangles separately

Proof AlternatelyTheorem4 can be proven using a recursiveformula for 119891(119899) as obtained from Figure 10

∵ 119891 (119899) = 3119891 (119899 minus 1) + 4119899minus1there4 119891 (119899) = 3 [3119891 (119899 minus 2) + 4119899minus2] + 4119899minus1

= 32119891 (119899 minus 2) + 3 times 4119899minus2 + 4119899minus1= [3119899minus1119891 (1) + 119899minus2sum

119894=0

3119894 (4(119899minus1minus119894))]

= [119899minus1sum119894=0

31198944(119899minus1minus119894)] ∵ 119891 (1) = 1

(28)

This method can be used in classrooms to quickly hand-calculate an optimized formof the logic function using a rulerand a compass alone (Figure 11)

4 Conclusion

A novel graphical technique for digital logic representationand optimization has been proposed which makes optimiza-tion algorithm much more instinctive and easy Multipleequations can be optimized simultaneously using the tem-plate presented One can theoretically therefore optimizesimultaneously multiple combinational logic circuits withany number of inputs or outputsWe propose a data structuretransformation that can compress a truth table into a fewparametersThe approach and the fundamentals involved arelikely to generate many novel solutions applicable to otherdisciplines A new paradigm is being proposed which opensup new avenues for research in terms of new methodologiesand pattern identification towards better logic reduction

Complexity 11

f(n minus 1)

f(n minus 1) f(n minus 1)

2nminus1 points in X2n

minus1

poin

ts in

Y

Figure 10 Total number of ldquoredundant pointsrdquothe points in thedarkened region by deriving a recursive formula for 119891(119899) Thus119891(119899) = 3 times 119891(119899 minus 1) + (2119899minus1)2

0 1 2 4 8 16

Figure 11 A compass and a ruler (marked with 2119899 units) canbe effectively used to quickly find the points that can be mergedtogether to generate amore optimized logic representation using thelogic laws proposed earlier (Section 35)

tailored to different implementation topologies such asSOP (ldquoAND-ORrdquoldquoNAND-onlyrdquo) POS (ldquoOR-ANDrdquoldquoNOR-onlyrdquo) and ldquoIMPLY-onlyrdquo realisations or the newer method-ologies such as ldquoreconfigurable asynchronous logic automata(RALA)rdquo [43] and the search formost suited template for eachin terms of the coordinate system of choice and the templategeneration rules

Our proposed technique currently establishes a one-to-one mapping between all of the possible variable combina-tions and the corresponding output statesmdashrepresenting theabsence and presence of every variable (in its original andthe negated form) for each of the variable combinations Onepossible future research direction is to investigate the rela-tionship between the proposed technique herein and otherrepresentation techniquesmdashsuch as QMDDs which too relyon quadrants and one-to-one mappings and which ratherextend way beyond the proposed technique to representtransformation matrices featuring complex entries useful forlogic involving qubits Further research may also be targetedtowards multilevel discrete systems beyond Boolean algebraand reversible [44 45] and hazard-free logic synthesis [9]

Conflicts of Interest

The authors declare that there are no conflicts of interestregarding the publication of this paper

References

[1] R K Brayton R Rudell A Sangiovanni-Vincentelli and AR Wang ldquoMIS A Multiple-Level Logic Optimization SystemrdquoIEEE Transactions on Computer-Aided Design of IntegratedCircuits and Systems vol 6 no 6 pp 1062ndash1081 1987

[2] A J De Geus and W Cohen ldquoA Rule-Based System for Opti-mizing Combinational Logicrdquo IEEE Design Test of Computersvol 2 no 4 pp 22ndash32 1985

[3] M Karnaugh ldquoThemapmethod for synthesis of combinationallogic circuitsrdquoTransactions of the American Institute of ElectricalEngineers Part I Communication and Electronics vol 72 no 5pp 593ndash599 1953

[4] M E Holder ldquoA modified karnaugh map techniquerdquo IEEETransactions on Education vol 48 no 1 pp 206-207 2005

[5] J Cavanagh Computer Arithmetic and Verilog HDL Fundamen-tals CRC Press 2009

[6] Z Kohavi and N K Jha Switching and finite automata theoryCambridge University Press 2009

[7] C Y Lee ldquoRepresentation of switching circuits by binary-decision programsrdquoBell Labs Technical Journal vol 38 pp 985ndash999 1959

[8] S B Akers ldquoBinary decision diagramsrdquo IEEE Transactions onComputers vol 27 no 6 pp 509ndash516 1978

[9] B Lin and S Devadas ldquoSynthesis of Hazard-Free MultilevelLogic Under Multiple-Input Changes from Binary DecisionDiagramsrdquo IEEE Transactions on Computer-Aided Design ofIntegrated Circuits and Systems vol 14 no 8 pp 974ndash985 1995

[10] C Yang and M Ciesielski ldquoBDS A BDD-based logic optimiza-tion systemrdquo IEEE Transactions on Computer-Aided Design ofIntegrated Circuits and Systems vol 21 no 7 pp 866ndash876 2002

[11] R E Bryant ldquoGraph-based algorithms for boolean functionmanipulationrdquo IEEE Transactions on Computers vol C-35 no8 pp 677ndash691 1986

[12] L Mauborgne ldquoAbstract interpretation using typed decisiongraphsrdquo Science of Computer Programming vol 31 no 1 pp 91ndash112 1998

[13] O Coudert and J C Madre ldquoA new implicit graph-based primeand essential prime computation techniquerdquo in Proceedings ofthe Proc International Symp Information Sciences FukuokaJapan 1992

[14] O Coudert and J C Madre ldquoA New Graph Based PrimeComputation Techniquerdquo in Logic Synthesis and Optimizationpp 33ndash57 Springer Boston MA USA 1993

[15] O Coudert J C Madre H Fraisse and H Touati ldquoImplicitprime cover computation An overviewrdquo in Proceedings of thein Proc Synthesis and Simulation Meeting and InternationalInterchange (SASIMI) Nara Japan 1993

[16] J Gu and R Puri ldquoAsynchronous circuit synthesis with Booleansatisfiabilityrdquo IEEE Transactions on Computer-Aided Design ofIntegrated Circuits and Systems vol 14 no 8 pp 961ndash973 1995

[17] W V Quine ldquoThe problem of simplifying truth functionsrdquoTheAmerican Mathematical Monthly vol 59 pp 521ndash531 1952

[18] W V Quine ldquoA way to simplify truth functionsrdquoThe AmericanMathematical Monthly vol 62 pp 627ndash631 1955

12 Complexity

[19] J McCluskey ldquoMinimization of Boolean functionsrdquo Bell LabsTechnical Journal vol 35 pp 1417ndash1444 1956

[20] S Petrick ldquoA direct determination of the irredundant forms of aboolean function from the set of prime implicantsrdquo Tech RepAir Force Cambridge Research Center 1956

[21] R L Rudell ldquoMultiple-Valued Logic Minimization for PLASynthesisrdquo Defense Technical Information Center 1986

[22] L Amaru P-E Gaillardon and G De Micheli ldquoMajority-Inverter Graph ANewParadigm for LogicOptimizationrdquo IEEETransactions on Computer-Aided Design of Integrated Circuitsand Systems vol 35 no 5 pp 806ndash819 2016

[23] D C Fielder ldquoClassroom Reduction of Boolean FunctionsrdquoIEEE Transactions on Education vol 9 no 4 pp 202ndash205 1966

[24] B C H Turton ldquoExtending Quine-McCluskey for exclusive-orlogic synthesisrdquo IEEE Transactions on Education vol 39 no 1pp 81ndash85 1996

[25] R Benzer and V Rozga ldquoThe Design and Application of aMinority Logic Gate-A Senior Projectrdquo IEEE Transactions onEducation vol 10 no 3 pp 141ndash146 1967

[26] N R Bell ldquoAMapMethod for the Teaching of the FundamentalConcepts of Compound-Input Logic Circuitsrdquo IEEE Transac-tions on Education vol 11 no 3 pp 173ndash177 1968

[27] R F Tinder ldquoMultilevel LogicMinimizationUsingK-mapXORPatternsrdquo IEEE Transactions on Education vol 38 no 4 pp370ndash375 1995

[28] B D Carroll and I Chen ldquoABALmdashA Language for BooleanFunction Representation andManipulationrdquo IEEE Transactionson Education vol 20 no 1 pp 70ndash72 1977

[29] C E Klock F R Schneider M V N Gomes D S MouraR P Ribas and A I Reis ldquoKARMA A didactic tool for two-level logic synthesisrdquo in Proceedings of theMSE 2007 2007 IEEEInternational Conference on Microelectronic Systems EducationEducating Systems Designers for the Global Economy and aSecure World pp 59-60 San Diego CA USA June 2007

[30] V P Correia and A I Reis ldquoA tutorial tool for switch logicrdquo inProceedings of the International Conference on MicroelectronicSystems Education MSE 2001 pp 28-29 Las Vegas NV USAJune 2001

[31] Z Stanisavljevic V Pavlovic B Nikolic and J DjordjevicldquoSDLDS-system for digital logic design and simulationrdquo IEEETransactions on Education vol 56 no 2 pp 235ndash245 2013

[32] P Corsini and L Rizzo ldquoSSCSSC A Tool for the Teaching ofDigital Circuitsrdquo IEEE Transactions on Education vol 34 no 1pp 70ndash75 1991

[33] G J Klir and M A Marin ldquoNew considerations in teachingswitching theoryrdquo IEEE Transactions on Education vol 12 no4 pp 257ndash261 1969

[34] M Gardner ldquoMathematical games The fantastic combinationsof John Conwayrsquos new solitaire game ldquoliferdquordquo Scientific Americanvol 223 no 4 pp 120ndash123 1970

[35] S Wolfram ldquoCellular automata as models of complexityrdquoNature vol 311 no 5985 pp 419ndash424 1984

[36] M Sierpinski ldquoSur une courbe dont tout point est un pointde ramificationrdquo Compte Rendus hebdomadaires des seance delAcademie des Science de Paris vol 160 pp 302ndash305 1915

[37] J-P Allouche and J Shallit Automatic SequencesTheory Appli-cations Generalizations Cambridge University Press 2003

[38] K A Bartlett R K Brayton G D Hachtel et al ldquoMultilevelLogic Minimization Using Implicit Donrsquot Caresrdquo IEEE Trans-actions on Computer-Aided Design of Integrated Circuits andSystems vol 7 no 6 pp 723ndash740 1988

[39] P Niemann R Wille D M Miller M A Thornton and RDrechsler ldquoQMDDs Efficient Quantum Function Representa-tion and Manipulationrdquo IEEE Transactions on Computer-AidedDesign of Integrated Circuits and Systems vol 35 no 1 pp 86ndash99 2016

[40] D Searls andMNoordewier ldquoPattern-matching search ofDNAsequences using logic grammarsrdquo in Proceedings of the SeventhIEEE Conference on Artificial Intelligence Application pp 3ndash9Miami Beach FL USA 1991

[41] C R Woese ldquoOrder in the genetic coderdquo Proceedings of theNational Acadamy of Sciences of the United States of Americavol 54 no 1 pp 71ndash75 1965

[42] M A Marchisio and J Stelling ldquoAutomatic design of digitalsynthetic gene circuitsrdquo PLoS Computational Biology vol 7 no2 Article ID e1001083 2011

[43] N Gershenfeld D Dalrymple K Chen et al ldquoReconfigurableasynchronous logic automata (RALA)rdquo in Proceedings of the37th Annual ACM SIGPLAN-SIGACT Symposium on Principlesof Programming Languages POPLrsquo10 vol 45 pp 1ndash6 MadridSpain January 2010

[44] V V Shende A K Prasad I L Markov and J P HayesldquoSynthesis of reversible logic circuitsrdquo IEEE Transactions onComputer-Aided Design of Integrated Circuits and Systems vol22 no 6 pp 710ndash722 2003

[45] P Gupta A Agrawal and N K Jha ldquoAn algorithm for synthesisof reversible logic circuitsrdquo IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems vol 25 no 11pp 2317ndash2329 2006

Submit your manuscripts athttpswwwhindawicom

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

MathematicsJournal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Mathematical Problems in Engineering

Hindawi Publishing Corporationhttpwwwhindawicom

Differential EquationsInternational Journal of

Volume 2014

Applied MathematicsJournal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Probability and StatisticsHindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Journal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Mathematical PhysicsAdvances in

Complex AnalysisJournal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

OptimizationJournal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

CombinatoricsHindawi Publishing Corporationhttpwwwhindawicom Volume 2014

International Journal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Operations ResearchAdvances in

Journal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Function Spaces

Abstract and Applied AnalysisHindawi Publishing Corporationhttpwwwhindawicom Volume 2014

International Journal of Mathematics and Mathematical Sciences

Hindawi Publishing Corporationhttpwwwhindawicom Volume 201

The Scientific World JournalHindawi Publishing Corporation httpwwwhindawicom Volume 2014

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Algebra

Discrete Dynamics in Nature and Society

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Decision SciencesAdvances in

Journal of

Hindawi Publishing Corporationhttpwwwhindawicom

Volume 2014 Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Stochastic AnalysisInternational Journal of

10 Complexity

For 119899 = 119898 + 1 ge 2 thereforeLHS = 3119898+1 + [ 119898sum

119894=0

31198944(119898minus119894)]

= 3119898+1 + 4 times [119898minus1sum119894=0

31198944(119898minus1minus119894)] + 311989840

= 3119898+1 + 4 times [4119898 minus 3119898] + 311989840= 3119898+1 + 4119898+1 minus (3 + 1) times 3119898 + 3119898 = 4119898+1= RHS

(26)

Because the statement is true for 119899 = 2 it is true for every119899 isin N and 119899 ge 2In the context of the template for the method proposed

the two theorems can be proven graphically by simplycounting the number of valid and redundant points viadifferent formulations If 3119899 + 119891(119899) = 4119899 for all 119899 isin N weknow the following

(i) 4119899 = 21198992119899 = (axis range)2 = total number of points

(ii) 3119899 = total number of ldquovalidrdquo data-points includingthe origin

(∵ Every input 119886119894 can manifest itself in the inputcombination represented by (119883119884) either in its orig-inal form (input combination represented by th 119883-coordinate) or as a negated input (input combinationrepresented by the119884-coordinate) ormay notmanifestitself at all)

(iii) 119891(119899) = total number of redundant points

(∵ Total number of points = total number of ldquovalidrdquopoints including the origin + total number of ldquoredun-dantrdquo points)

Proof To establish equality presented in the Theorem 3 weuse the formulation of 119891(119899) as presented in Figure 9 FromFigure 9 it is evident that

∵ 119896sum119897=1

119897 = 119896 (119896 + 1)2 forall119896 isin N119896 = 2119895 forall119895 isin N 0 le 119895 lt 119899

there4 119891 (119899) = [119899minus2sum119894=0

3119899minus2minus1198942119894 (2119894+1 minus 1)] + (2119899 minus 1) 2119899minus1(27)

The exponent of 3 translates to a multiplier that representsthe frequency of occurrence of the constituent triangle of thatspecific size in the template

1

1

2

22

3

4

568

7

32(2nminus3 minus 1)(2nminus4)31(2nminus2 minus 1)(2nminus3)

30(2nminus1 minus 1)(2nminus2)

(2n minus 1)(2nminus1)

3 points2 points1 point

2n minus 1 points

30

31

3 2

sum

Figure 9 Total number of ldquoredundant pointsrdquothe points in thedarkened region by counting the number of points in constituenttriangles separately

Proof AlternatelyTheorem4 can be proven using a recursiveformula for 119891(119899) as obtained from Figure 10

∵ 119891 (119899) = 3119891 (119899 minus 1) + 4119899minus1there4 119891 (119899) = 3 [3119891 (119899 minus 2) + 4119899minus2] + 4119899minus1

= 32119891 (119899 minus 2) + 3 times 4119899minus2 + 4119899minus1= [3119899minus1119891 (1) + 119899minus2sum

119894=0

3119894 (4(119899minus1minus119894))]

= [119899minus1sum119894=0

31198944(119899minus1minus119894)] ∵ 119891 (1) = 1

(28)

This method can be used in classrooms to quickly hand-calculate an optimized formof the logic function using a rulerand a compass alone (Figure 11)

4 Conclusion

A novel graphical technique for digital logic representationand optimization has been proposed which makes optimiza-tion algorithm much more instinctive and easy Multipleequations can be optimized simultaneously using the tem-plate presented One can theoretically therefore optimizesimultaneously multiple combinational logic circuits withany number of inputs or outputsWe propose a data structuretransformation that can compress a truth table into a fewparametersThe approach and the fundamentals involved arelikely to generate many novel solutions applicable to otherdisciplines A new paradigm is being proposed which opensup new avenues for research in terms of new methodologiesand pattern identification towards better logic reduction

Complexity 11

f(n minus 1)

f(n minus 1) f(n minus 1)

2nminus1 points in X2n

minus1

poin

ts in

Y

Figure 10 Total number of ldquoredundant pointsrdquothe points in thedarkened region by deriving a recursive formula for 119891(119899) Thus119891(119899) = 3 times 119891(119899 minus 1) + (2119899minus1)2

0 1 2 4 8 16

Figure 11 A compass and a ruler (marked with 2119899 units) canbe effectively used to quickly find the points that can be mergedtogether to generate amore optimized logic representation using thelogic laws proposed earlier (Section 35)

tailored to different implementation topologies such asSOP (ldquoAND-ORrdquoldquoNAND-onlyrdquo) POS (ldquoOR-ANDrdquoldquoNOR-onlyrdquo) and ldquoIMPLY-onlyrdquo realisations or the newer method-ologies such as ldquoreconfigurable asynchronous logic automata(RALA)rdquo [43] and the search formost suited template for eachin terms of the coordinate system of choice and the templategeneration rules

Our proposed technique currently establishes a one-to-one mapping between all of the possible variable combina-tions and the corresponding output statesmdashrepresenting theabsence and presence of every variable (in its original andthe negated form) for each of the variable combinations Onepossible future research direction is to investigate the rela-tionship between the proposed technique herein and otherrepresentation techniquesmdashsuch as QMDDs which too relyon quadrants and one-to-one mappings and which ratherextend way beyond the proposed technique to representtransformation matrices featuring complex entries useful forlogic involving qubits Further research may also be targetedtowards multilevel discrete systems beyond Boolean algebraand reversible [44 45] and hazard-free logic synthesis [9]

Conflicts of Interest

The authors declare that there are no conflicts of interestregarding the publication of this paper

References

[1] R K Brayton R Rudell A Sangiovanni-Vincentelli and AR Wang ldquoMIS A Multiple-Level Logic Optimization SystemrdquoIEEE Transactions on Computer-Aided Design of IntegratedCircuits and Systems vol 6 no 6 pp 1062ndash1081 1987

[2] A J De Geus and W Cohen ldquoA Rule-Based System for Opti-mizing Combinational Logicrdquo IEEE Design Test of Computersvol 2 no 4 pp 22ndash32 1985

[3] M Karnaugh ldquoThemapmethod for synthesis of combinationallogic circuitsrdquoTransactions of the American Institute of ElectricalEngineers Part I Communication and Electronics vol 72 no 5pp 593ndash599 1953

[4] M E Holder ldquoA modified karnaugh map techniquerdquo IEEETransactions on Education vol 48 no 1 pp 206-207 2005

[5] J Cavanagh Computer Arithmetic and Verilog HDL Fundamen-tals CRC Press 2009

[6] Z Kohavi and N K Jha Switching and finite automata theoryCambridge University Press 2009

[7] C Y Lee ldquoRepresentation of switching circuits by binary-decision programsrdquoBell Labs Technical Journal vol 38 pp 985ndash999 1959

[8] S B Akers ldquoBinary decision diagramsrdquo IEEE Transactions onComputers vol 27 no 6 pp 509ndash516 1978

[9] B Lin and S Devadas ldquoSynthesis of Hazard-Free MultilevelLogic Under Multiple-Input Changes from Binary DecisionDiagramsrdquo IEEE Transactions on Computer-Aided Design ofIntegrated Circuits and Systems vol 14 no 8 pp 974ndash985 1995

[10] C Yang and M Ciesielski ldquoBDS A BDD-based logic optimiza-tion systemrdquo IEEE Transactions on Computer-Aided Design ofIntegrated Circuits and Systems vol 21 no 7 pp 866ndash876 2002

[11] R E Bryant ldquoGraph-based algorithms for boolean functionmanipulationrdquo IEEE Transactions on Computers vol C-35 no8 pp 677ndash691 1986

[12] L Mauborgne ldquoAbstract interpretation using typed decisiongraphsrdquo Science of Computer Programming vol 31 no 1 pp 91ndash112 1998

[13] O Coudert and J C Madre ldquoA new implicit graph-based primeand essential prime computation techniquerdquo in Proceedings ofthe Proc International Symp Information Sciences FukuokaJapan 1992

[14] O Coudert and J C Madre ldquoA New Graph Based PrimeComputation Techniquerdquo in Logic Synthesis and Optimizationpp 33ndash57 Springer Boston MA USA 1993

[15] O Coudert J C Madre H Fraisse and H Touati ldquoImplicitprime cover computation An overviewrdquo in Proceedings of thein Proc Synthesis and Simulation Meeting and InternationalInterchange (SASIMI) Nara Japan 1993

[16] J Gu and R Puri ldquoAsynchronous circuit synthesis with Booleansatisfiabilityrdquo IEEE Transactions on Computer-Aided Design ofIntegrated Circuits and Systems vol 14 no 8 pp 961ndash973 1995

[17] W V Quine ldquoThe problem of simplifying truth functionsrdquoTheAmerican Mathematical Monthly vol 59 pp 521ndash531 1952

[18] W V Quine ldquoA way to simplify truth functionsrdquoThe AmericanMathematical Monthly vol 62 pp 627ndash631 1955

12 Complexity

[19] J McCluskey ldquoMinimization of Boolean functionsrdquo Bell LabsTechnical Journal vol 35 pp 1417ndash1444 1956

[20] S Petrick ldquoA direct determination of the irredundant forms of aboolean function from the set of prime implicantsrdquo Tech RepAir Force Cambridge Research Center 1956

[21] R L Rudell ldquoMultiple-Valued Logic Minimization for PLASynthesisrdquo Defense Technical Information Center 1986

[22] L Amaru P-E Gaillardon and G De Micheli ldquoMajority-Inverter Graph ANewParadigm for LogicOptimizationrdquo IEEETransactions on Computer-Aided Design of Integrated Circuitsand Systems vol 35 no 5 pp 806ndash819 2016

[23] D C Fielder ldquoClassroom Reduction of Boolean FunctionsrdquoIEEE Transactions on Education vol 9 no 4 pp 202ndash205 1966

[24] B C H Turton ldquoExtending Quine-McCluskey for exclusive-orlogic synthesisrdquo IEEE Transactions on Education vol 39 no 1pp 81ndash85 1996

[25] R Benzer and V Rozga ldquoThe Design and Application of aMinority Logic Gate-A Senior Projectrdquo IEEE Transactions onEducation vol 10 no 3 pp 141ndash146 1967

[26] N R Bell ldquoAMapMethod for the Teaching of the FundamentalConcepts of Compound-Input Logic Circuitsrdquo IEEE Transac-tions on Education vol 11 no 3 pp 173ndash177 1968

[27] R F Tinder ldquoMultilevel LogicMinimizationUsingK-mapXORPatternsrdquo IEEE Transactions on Education vol 38 no 4 pp370ndash375 1995

[28] B D Carroll and I Chen ldquoABALmdashA Language for BooleanFunction Representation andManipulationrdquo IEEE Transactionson Education vol 20 no 1 pp 70ndash72 1977

[29] C E Klock F R Schneider M V N Gomes D S MouraR P Ribas and A I Reis ldquoKARMA A didactic tool for two-level logic synthesisrdquo in Proceedings of theMSE 2007 2007 IEEEInternational Conference on Microelectronic Systems EducationEducating Systems Designers for the Global Economy and aSecure World pp 59-60 San Diego CA USA June 2007

[30] V P Correia and A I Reis ldquoA tutorial tool for switch logicrdquo inProceedings of the International Conference on MicroelectronicSystems Education MSE 2001 pp 28-29 Las Vegas NV USAJune 2001

[31] Z Stanisavljevic V Pavlovic B Nikolic and J DjordjevicldquoSDLDS-system for digital logic design and simulationrdquo IEEETransactions on Education vol 56 no 2 pp 235ndash245 2013

[32] P Corsini and L Rizzo ldquoSSCSSC A Tool for the Teaching ofDigital Circuitsrdquo IEEE Transactions on Education vol 34 no 1pp 70ndash75 1991

[33] G J Klir and M A Marin ldquoNew considerations in teachingswitching theoryrdquo IEEE Transactions on Education vol 12 no4 pp 257ndash261 1969

[34] M Gardner ldquoMathematical games The fantastic combinationsof John Conwayrsquos new solitaire game ldquoliferdquordquo Scientific Americanvol 223 no 4 pp 120ndash123 1970

[35] S Wolfram ldquoCellular automata as models of complexityrdquoNature vol 311 no 5985 pp 419ndash424 1984

[36] M Sierpinski ldquoSur une courbe dont tout point est un pointde ramificationrdquo Compte Rendus hebdomadaires des seance delAcademie des Science de Paris vol 160 pp 302ndash305 1915

[37] J-P Allouche and J Shallit Automatic SequencesTheory Appli-cations Generalizations Cambridge University Press 2003

[38] K A Bartlett R K Brayton G D Hachtel et al ldquoMultilevelLogic Minimization Using Implicit Donrsquot Caresrdquo IEEE Trans-actions on Computer-Aided Design of Integrated Circuits andSystems vol 7 no 6 pp 723ndash740 1988

[39] P Niemann R Wille D M Miller M A Thornton and RDrechsler ldquoQMDDs Efficient Quantum Function Representa-tion and Manipulationrdquo IEEE Transactions on Computer-AidedDesign of Integrated Circuits and Systems vol 35 no 1 pp 86ndash99 2016

[40] D Searls andMNoordewier ldquoPattern-matching search ofDNAsequences using logic grammarsrdquo in Proceedings of the SeventhIEEE Conference on Artificial Intelligence Application pp 3ndash9Miami Beach FL USA 1991

[41] C R Woese ldquoOrder in the genetic coderdquo Proceedings of theNational Acadamy of Sciences of the United States of Americavol 54 no 1 pp 71ndash75 1965

[42] M A Marchisio and J Stelling ldquoAutomatic design of digitalsynthetic gene circuitsrdquo PLoS Computational Biology vol 7 no2 Article ID e1001083 2011

[43] N Gershenfeld D Dalrymple K Chen et al ldquoReconfigurableasynchronous logic automata (RALA)rdquo in Proceedings of the37th Annual ACM SIGPLAN-SIGACT Symposium on Principlesof Programming Languages POPLrsquo10 vol 45 pp 1ndash6 MadridSpain January 2010

[44] V V Shende A K Prasad I L Markov and J P HayesldquoSynthesis of reversible logic circuitsrdquo IEEE Transactions onComputer-Aided Design of Integrated Circuits and Systems vol22 no 6 pp 710ndash722 2003

[45] P Gupta A Agrawal and N K Jha ldquoAn algorithm for synthesisof reversible logic circuitsrdquo IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems vol 25 no 11pp 2317ndash2329 2006

Submit your manuscripts athttpswwwhindawicom

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

MathematicsJournal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Mathematical Problems in Engineering

Hindawi Publishing Corporationhttpwwwhindawicom

Differential EquationsInternational Journal of

Volume 2014

Applied MathematicsJournal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Probability and StatisticsHindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Journal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Mathematical PhysicsAdvances in

Complex AnalysisJournal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

OptimizationJournal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

CombinatoricsHindawi Publishing Corporationhttpwwwhindawicom Volume 2014

International Journal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Operations ResearchAdvances in

Journal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Function Spaces

Abstract and Applied AnalysisHindawi Publishing Corporationhttpwwwhindawicom Volume 2014

International Journal of Mathematics and Mathematical Sciences

Hindawi Publishing Corporationhttpwwwhindawicom Volume 201

The Scientific World JournalHindawi Publishing Corporation httpwwwhindawicom Volume 2014

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Algebra

Discrete Dynamics in Nature and Society

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Decision SciencesAdvances in

Journal of

Hindawi Publishing Corporationhttpwwwhindawicom

Volume 2014 Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Stochastic AnalysisInternational Journal of

Complexity 11

f(n minus 1)

f(n minus 1) f(n minus 1)

2nminus1 points in X2n

minus1

poin

ts in

Y

Figure 10 Total number of ldquoredundant pointsrdquothe points in thedarkened region by deriving a recursive formula for 119891(119899) Thus119891(119899) = 3 times 119891(119899 minus 1) + (2119899minus1)2

0 1 2 4 8 16

Figure 11 A compass and a ruler (marked with 2119899 units) canbe effectively used to quickly find the points that can be mergedtogether to generate amore optimized logic representation using thelogic laws proposed earlier (Section 35)

tailored to different implementation topologies such asSOP (ldquoAND-ORrdquoldquoNAND-onlyrdquo) POS (ldquoOR-ANDrdquoldquoNOR-onlyrdquo) and ldquoIMPLY-onlyrdquo realisations or the newer method-ologies such as ldquoreconfigurable asynchronous logic automata(RALA)rdquo [43] and the search formost suited template for eachin terms of the coordinate system of choice and the templategeneration rules

Our proposed technique currently establishes a one-to-one mapping between all of the possible variable combina-tions and the corresponding output statesmdashrepresenting theabsence and presence of every variable (in its original andthe negated form) for each of the variable combinations Onepossible future research direction is to investigate the rela-tionship between the proposed technique herein and otherrepresentation techniquesmdashsuch as QMDDs which too relyon quadrants and one-to-one mappings and which ratherextend way beyond the proposed technique to representtransformation matrices featuring complex entries useful forlogic involving qubits Further research may also be targetedtowards multilevel discrete systems beyond Boolean algebraand reversible [44 45] and hazard-free logic synthesis [9]

Conflicts of Interest

The authors declare that there are no conflicts of interestregarding the publication of this paper

References

[1] R K Brayton R Rudell A Sangiovanni-Vincentelli and AR Wang ldquoMIS A Multiple-Level Logic Optimization SystemrdquoIEEE Transactions on Computer-Aided Design of IntegratedCircuits and Systems vol 6 no 6 pp 1062ndash1081 1987

[2] A J De Geus and W Cohen ldquoA Rule-Based System for Opti-mizing Combinational Logicrdquo IEEE Design Test of Computersvol 2 no 4 pp 22ndash32 1985

[3] M Karnaugh ldquoThemapmethod for synthesis of combinationallogic circuitsrdquoTransactions of the American Institute of ElectricalEngineers Part I Communication and Electronics vol 72 no 5pp 593ndash599 1953

[4] M E Holder ldquoA modified karnaugh map techniquerdquo IEEETransactions on Education vol 48 no 1 pp 206-207 2005

[5] J Cavanagh Computer Arithmetic and Verilog HDL Fundamen-tals CRC Press 2009

[6] Z Kohavi and N K Jha Switching and finite automata theoryCambridge University Press 2009

[7] C Y Lee ldquoRepresentation of switching circuits by binary-decision programsrdquoBell Labs Technical Journal vol 38 pp 985ndash999 1959

[8] S B Akers ldquoBinary decision diagramsrdquo IEEE Transactions onComputers vol 27 no 6 pp 509ndash516 1978

[9] B Lin and S Devadas ldquoSynthesis of Hazard-Free MultilevelLogic Under Multiple-Input Changes from Binary DecisionDiagramsrdquo IEEE Transactions on Computer-Aided Design ofIntegrated Circuits and Systems vol 14 no 8 pp 974ndash985 1995

[10] C Yang and M Ciesielski ldquoBDS A BDD-based logic optimiza-tion systemrdquo IEEE Transactions on Computer-Aided Design ofIntegrated Circuits and Systems vol 21 no 7 pp 866ndash876 2002

[11] R E Bryant ldquoGraph-based algorithms for boolean functionmanipulationrdquo IEEE Transactions on Computers vol C-35 no8 pp 677ndash691 1986

[12] L Mauborgne ldquoAbstract interpretation using typed decisiongraphsrdquo Science of Computer Programming vol 31 no 1 pp 91ndash112 1998

[13] O Coudert and J C Madre ldquoA new implicit graph-based primeand essential prime computation techniquerdquo in Proceedings ofthe Proc International Symp Information Sciences FukuokaJapan 1992

[14] O Coudert and J C Madre ldquoA New Graph Based PrimeComputation Techniquerdquo in Logic Synthesis and Optimizationpp 33ndash57 Springer Boston MA USA 1993

[15] O Coudert J C Madre H Fraisse and H Touati ldquoImplicitprime cover computation An overviewrdquo in Proceedings of thein Proc Synthesis and Simulation Meeting and InternationalInterchange (SASIMI) Nara Japan 1993

[16] J Gu and R Puri ldquoAsynchronous circuit synthesis with Booleansatisfiabilityrdquo IEEE Transactions on Computer-Aided Design ofIntegrated Circuits and Systems vol 14 no 8 pp 961ndash973 1995

[17] W V Quine ldquoThe problem of simplifying truth functionsrdquoTheAmerican Mathematical Monthly vol 59 pp 521ndash531 1952

[18] W V Quine ldquoA way to simplify truth functionsrdquoThe AmericanMathematical Monthly vol 62 pp 627ndash631 1955

12 Complexity

[19] J McCluskey ldquoMinimization of Boolean functionsrdquo Bell LabsTechnical Journal vol 35 pp 1417ndash1444 1956

[20] S Petrick ldquoA direct determination of the irredundant forms of aboolean function from the set of prime implicantsrdquo Tech RepAir Force Cambridge Research Center 1956

[21] R L Rudell ldquoMultiple-Valued Logic Minimization for PLASynthesisrdquo Defense Technical Information Center 1986

[22] L Amaru P-E Gaillardon and G De Micheli ldquoMajority-Inverter Graph ANewParadigm for LogicOptimizationrdquo IEEETransactions on Computer-Aided Design of Integrated Circuitsand Systems vol 35 no 5 pp 806ndash819 2016

[23] D C Fielder ldquoClassroom Reduction of Boolean FunctionsrdquoIEEE Transactions on Education vol 9 no 4 pp 202ndash205 1966

[24] B C H Turton ldquoExtending Quine-McCluskey for exclusive-orlogic synthesisrdquo IEEE Transactions on Education vol 39 no 1pp 81ndash85 1996

[25] R Benzer and V Rozga ldquoThe Design and Application of aMinority Logic Gate-A Senior Projectrdquo IEEE Transactions onEducation vol 10 no 3 pp 141ndash146 1967

[26] N R Bell ldquoAMapMethod for the Teaching of the FundamentalConcepts of Compound-Input Logic Circuitsrdquo IEEE Transac-tions on Education vol 11 no 3 pp 173ndash177 1968

[27] R F Tinder ldquoMultilevel LogicMinimizationUsingK-mapXORPatternsrdquo IEEE Transactions on Education vol 38 no 4 pp370ndash375 1995

[28] B D Carroll and I Chen ldquoABALmdashA Language for BooleanFunction Representation andManipulationrdquo IEEE Transactionson Education vol 20 no 1 pp 70ndash72 1977

[29] C E Klock F R Schneider M V N Gomes D S MouraR P Ribas and A I Reis ldquoKARMA A didactic tool for two-level logic synthesisrdquo in Proceedings of theMSE 2007 2007 IEEEInternational Conference on Microelectronic Systems EducationEducating Systems Designers for the Global Economy and aSecure World pp 59-60 San Diego CA USA June 2007

[30] V P Correia and A I Reis ldquoA tutorial tool for switch logicrdquo inProceedings of the International Conference on MicroelectronicSystems Education MSE 2001 pp 28-29 Las Vegas NV USAJune 2001

[31] Z Stanisavljevic V Pavlovic B Nikolic and J DjordjevicldquoSDLDS-system for digital logic design and simulationrdquo IEEETransactions on Education vol 56 no 2 pp 235ndash245 2013

[32] P Corsini and L Rizzo ldquoSSCSSC A Tool for the Teaching ofDigital Circuitsrdquo IEEE Transactions on Education vol 34 no 1pp 70ndash75 1991

[33] G J Klir and M A Marin ldquoNew considerations in teachingswitching theoryrdquo IEEE Transactions on Education vol 12 no4 pp 257ndash261 1969

[34] M Gardner ldquoMathematical games The fantastic combinationsof John Conwayrsquos new solitaire game ldquoliferdquordquo Scientific Americanvol 223 no 4 pp 120ndash123 1970

[35] S Wolfram ldquoCellular automata as models of complexityrdquoNature vol 311 no 5985 pp 419ndash424 1984

[36] M Sierpinski ldquoSur une courbe dont tout point est un pointde ramificationrdquo Compte Rendus hebdomadaires des seance delAcademie des Science de Paris vol 160 pp 302ndash305 1915

[37] J-P Allouche and J Shallit Automatic SequencesTheory Appli-cations Generalizations Cambridge University Press 2003

[38] K A Bartlett R K Brayton G D Hachtel et al ldquoMultilevelLogic Minimization Using Implicit Donrsquot Caresrdquo IEEE Trans-actions on Computer-Aided Design of Integrated Circuits andSystems vol 7 no 6 pp 723ndash740 1988

[39] P Niemann R Wille D M Miller M A Thornton and RDrechsler ldquoQMDDs Efficient Quantum Function Representa-tion and Manipulationrdquo IEEE Transactions on Computer-AidedDesign of Integrated Circuits and Systems vol 35 no 1 pp 86ndash99 2016

[40] D Searls andMNoordewier ldquoPattern-matching search ofDNAsequences using logic grammarsrdquo in Proceedings of the SeventhIEEE Conference on Artificial Intelligence Application pp 3ndash9Miami Beach FL USA 1991

[41] C R Woese ldquoOrder in the genetic coderdquo Proceedings of theNational Acadamy of Sciences of the United States of Americavol 54 no 1 pp 71ndash75 1965

[42] M A Marchisio and J Stelling ldquoAutomatic design of digitalsynthetic gene circuitsrdquo PLoS Computational Biology vol 7 no2 Article ID e1001083 2011

[43] N Gershenfeld D Dalrymple K Chen et al ldquoReconfigurableasynchronous logic automata (RALA)rdquo in Proceedings of the37th Annual ACM SIGPLAN-SIGACT Symposium on Principlesof Programming Languages POPLrsquo10 vol 45 pp 1ndash6 MadridSpain January 2010

[44] V V Shende A K Prasad I L Markov and J P HayesldquoSynthesis of reversible logic circuitsrdquo IEEE Transactions onComputer-Aided Design of Integrated Circuits and Systems vol22 no 6 pp 710ndash722 2003

[45] P Gupta A Agrawal and N K Jha ldquoAn algorithm for synthesisof reversible logic circuitsrdquo IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems vol 25 no 11pp 2317ndash2329 2006

Submit your manuscripts athttpswwwhindawicom

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

MathematicsJournal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Mathematical Problems in Engineering

Hindawi Publishing Corporationhttpwwwhindawicom

Differential EquationsInternational Journal of

Volume 2014

Applied MathematicsJournal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Probability and StatisticsHindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Journal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Mathematical PhysicsAdvances in

Complex AnalysisJournal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

OptimizationJournal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

CombinatoricsHindawi Publishing Corporationhttpwwwhindawicom Volume 2014

International Journal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Operations ResearchAdvances in

Journal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Function Spaces

Abstract and Applied AnalysisHindawi Publishing Corporationhttpwwwhindawicom Volume 2014

International Journal of Mathematics and Mathematical Sciences

Hindawi Publishing Corporationhttpwwwhindawicom Volume 201

The Scientific World JournalHindawi Publishing Corporation httpwwwhindawicom Volume 2014

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Algebra

Discrete Dynamics in Nature and Society

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Decision SciencesAdvances in

Journal of

Hindawi Publishing Corporationhttpwwwhindawicom

Volume 2014 Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Stochastic AnalysisInternational Journal of

12 Complexity

[19] J McCluskey ldquoMinimization of Boolean functionsrdquo Bell LabsTechnical Journal vol 35 pp 1417ndash1444 1956

[20] S Petrick ldquoA direct determination of the irredundant forms of aboolean function from the set of prime implicantsrdquo Tech RepAir Force Cambridge Research Center 1956

[21] R L Rudell ldquoMultiple-Valued Logic Minimization for PLASynthesisrdquo Defense Technical Information Center 1986

[22] L Amaru P-E Gaillardon and G De Micheli ldquoMajority-Inverter Graph ANewParadigm for LogicOptimizationrdquo IEEETransactions on Computer-Aided Design of Integrated Circuitsand Systems vol 35 no 5 pp 806ndash819 2016

[23] D C Fielder ldquoClassroom Reduction of Boolean FunctionsrdquoIEEE Transactions on Education vol 9 no 4 pp 202ndash205 1966

[24] B C H Turton ldquoExtending Quine-McCluskey for exclusive-orlogic synthesisrdquo IEEE Transactions on Education vol 39 no 1pp 81ndash85 1996

[25] R Benzer and V Rozga ldquoThe Design and Application of aMinority Logic Gate-A Senior Projectrdquo IEEE Transactions onEducation vol 10 no 3 pp 141ndash146 1967

[26] N R Bell ldquoAMapMethod for the Teaching of the FundamentalConcepts of Compound-Input Logic Circuitsrdquo IEEE Transac-tions on Education vol 11 no 3 pp 173ndash177 1968

[27] R F Tinder ldquoMultilevel LogicMinimizationUsingK-mapXORPatternsrdquo IEEE Transactions on Education vol 38 no 4 pp370ndash375 1995

[28] B D Carroll and I Chen ldquoABALmdashA Language for BooleanFunction Representation andManipulationrdquo IEEE Transactionson Education vol 20 no 1 pp 70ndash72 1977

[29] C E Klock F R Schneider M V N Gomes D S MouraR P Ribas and A I Reis ldquoKARMA A didactic tool for two-level logic synthesisrdquo in Proceedings of theMSE 2007 2007 IEEEInternational Conference on Microelectronic Systems EducationEducating Systems Designers for the Global Economy and aSecure World pp 59-60 San Diego CA USA June 2007

[30] V P Correia and A I Reis ldquoA tutorial tool for switch logicrdquo inProceedings of the International Conference on MicroelectronicSystems Education MSE 2001 pp 28-29 Las Vegas NV USAJune 2001

[31] Z Stanisavljevic V Pavlovic B Nikolic and J DjordjevicldquoSDLDS-system for digital logic design and simulationrdquo IEEETransactions on Education vol 56 no 2 pp 235ndash245 2013

[32] P Corsini and L Rizzo ldquoSSCSSC A Tool for the Teaching ofDigital Circuitsrdquo IEEE Transactions on Education vol 34 no 1pp 70ndash75 1991

[33] G J Klir and M A Marin ldquoNew considerations in teachingswitching theoryrdquo IEEE Transactions on Education vol 12 no4 pp 257ndash261 1969

[34] M Gardner ldquoMathematical games The fantastic combinationsof John Conwayrsquos new solitaire game ldquoliferdquordquo Scientific Americanvol 223 no 4 pp 120ndash123 1970

[35] S Wolfram ldquoCellular automata as models of complexityrdquoNature vol 311 no 5985 pp 419ndash424 1984

[36] M Sierpinski ldquoSur une courbe dont tout point est un pointde ramificationrdquo Compte Rendus hebdomadaires des seance delAcademie des Science de Paris vol 160 pp 302ndash305 1915

[37] J-P Allouche and J Shallit Automatic SequencesTheory Appli-cations Generalizations Cambridge University Press 2003

[38] K A Bartlett R K Brayton G D Hachtel et al ldquoMultilevelLogic Minimization Using Implicit Donrsquot Caresrdquo IEEE Trans-actions on Computer-Aided Design of Integrated Circuits andSystems vol 7 no 6 pp 723ndash740 1988

[39] P Niemann R Wille D M Miller M A Thornton and RDrechsler ldquoQMDDs Efficient Quantum Function Representa-tion and Manipulationrdquo IEEE Transactions on Computer-AidedDesign of Integrated Circuits and Systems vol 35 no 1 pp 86ndash99 2016

[40] D Searls andMNoordewier ldquoPattern-matching search ofDNAsequences using logic grammarsrdquo in Proceedings of the SeventhIEEE Conference on Artificial Intelligence Application pp 3ndash9Miami Beach FL USA 1991

[41] C R Woese ldquoOrder in the genetic coderdquo Proceedings of theNational Acadamy of Sciences of the United States of Americavol 54 no 1 pp 71ndash75 1965

[42] M A Marchisio and J Stelling ldquoAutomatic design of digitalsynthetic gene circuitsrdquo PLoS Computational Biology vol 7 no2 Article ID e1001083 2011

[43] N Gershenfeld D Dalrymple K Chen et al ldquoReconfigurableasynchronous logic automata (RALA)rdquo in Proceedings of the37th Annual ACM SIGPLAN-SIGACT Symposium on Principlesof Programming Languages POPLrsquo10 vol 45 pp 1ndash6 MadridSpain January 2010

[44] V V Shende A K Prasad I L Markov and J P HayesldquoSynthesis of reversible logic circuitsrdquo IEEE Transactions onComputer-Aided Design of Integrated Circuits and Systems vol22 no 6 pp 710ndash722 2003

[45] P Gupta A Agrawal and N K Jha ldquoAn algorithm for synthesisof reversible logic circuitsrdquo IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems vol 25 no 11pp 2317ndash2329 2006

Submit your manuscripts athttpswwwhindawicom

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

MathematicsJournal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Mathematical Problems in Engineering

Hindawi Publishing Corporationhttpwwwhindawicom

Differential EquationsInternational Journal of

Volume 2014

Applied MathematicsJournal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Probability and StatisticsHindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Journal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Mathematical PhysicsAdvances in

Complex AnalysisJournal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

OptimizationJournal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

CombinatoricsHindawi Publishing Corporationhttpwwwhindawicom Volume 2014

International Journal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Operations ResearchAdvances in

Journal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Function Spaces

Abstract and Applied AnalysisHindawi Publishing Corporationhttpwwwhindawicom Volume 2014

International Journal of Mathematics and Mathematical Sciences

Hindawi Publishing Corporationhttpwwwhindawicom Volume 201

The Scientific World JournalHindawi Publishing Corporation httpwwwhindawicom Volume 2014

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Algebra

Discrete Dynamics in Nature and Society

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Decision SciencesAdvances in

Journal of

Hindawi Publishing Corporationhttpwwwhindawicom

Volume 2014 Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Stochastic AnalysisInternational Journal of

Submit your manuscripts athttpswwwhindawicom

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

MathematicsJournal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Mathematical Problems in Engineering

Hindawi Publishing Corporationhttpwwwhindawicom

Differential EquationsInternational Journal of

Volume 2014

Applied MathematicsJournal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Probability and StatisticsHindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Journal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Mathematical PhysicsAdvances in

Complex AnalysisJournal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

OptimizationJournal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

CombinatoricsHindawi Publishing Corporationhttpwwwhindawicom Volume 2014

International Journal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Operations ResearchAdvances in

Journal of

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Function Spaces

Abstract and Applied AnalysisHindawi Publishing Corporationhttpwwwhindawicom Volume 2014

International Journal of Mathematics and Mathematical Sciences

Hindawi Publishing Corporationhttpwwwhindawicom Volume 201

The Scientific World JournalHindawi Publishing Corporation httpwwwhindawicom Volume 2014

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Algebra

Discrete Dynamics in Nature and Society

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Decision SciencesAdvances in

Journal of

Hindawi Publishing Corporationhttpwwwhindawicom

Volume 2014 Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014

Stochastic AnalysisInternational Journal of