a deep dive of isolated gate driver robustness dv/dt (cmti) · why cmti is so critical? vcc gnd in...

Applied Power Electronics Conference, March 2018Applied Power Electronics Conference, March 2018

A Deep Dive of Isolated Gate Driver

Robustness – dv/dt (CMTI)

Zhang, Wei, Texas Instruments

Mar. 6th, 2018

1

Applied Power Electronics Conference, March 2018

Why is Isolation Required?

Voltage

Line-to-neutral VRMS

1min DC Test Voltage *Basic Insulation and

Supplementary Insulation

Reinforced

Insulation

≤150 1900V 3800V

>150, ≤300 2100V 4200V

* IEC61010-1 ed. 3.0

Lm

CR

Lkp

12/48VVDC-Link 400V

85V~265V

EMIFilter

L

N

PE

Insulation

Feedback,

controllerHalf/Full bridge

Gate driver

Primary Secondary

CB

• A) Safety

• B) Breaking ground loop – CM noise

• C) Power delivery – V1/V2=N1/N2

• D) Signal Communication

2


What is the Popular Isolation methods in gate driver ?

• A) Optocoupler

– Signal transfer between two isolated circuits using light –LED + phototransistor, 1970s ~ (Avago, Fairchild, Toshiba and others)

• B) Transformer

– Integrated micro-transformer and electronic circuitry, 2001~ (ADI, Infineon, Rohm and others)

• C) Capacitor

– Signal transmission through capacitive isolation with On-Off-Keying (OOK) modulation, 2004~ (Silabs, TI and others)

3


TI’s Capacitive Isolation Technology

• SiO2 is the most stable dielectric over temperature and moisture

• Distance through insulator is commensurate with dielectric strength

– Breakdown field is 500-800V/um ( vs. <50V/um for silicon/mold compound in optocoupler*)

– Highest lifetime in the industry, >1.5 kVRMS for >40 years

– Superior transient protection for harsh environments, >12.8kV

– High CMTI

Package

Leadframe Leadframe

Left Die Right Die500um

Series Cap

4* Typical values are used. Data is for approximate comparison purposes only


What is CMTI?

Definition: Common mode transient immunity, CMTI, is the maximum tolerable

rate-of-rise (or fall) of the common-mode voltage. It is given in kV/us, or V/ns.

CByp

VCC

GND

IN

ISO

LA

TIO

N B

AR

RIE

R

CByp

VDD

OUT

CLoad

+ -VCM

VCM

dV/dt(V/ns)

5


What is the Static CMTI?

Static CMTI Criteria: Maximum slew rate of VCM at which the output of the

coupler (OUT) remain at the specified (logic) high or low level.

IN

OUT

CMT

VOH(min)

IN

OUT

CMT

VOL(max)

Static CMTI - CMH Static CMTI - CML

6


IN

OUT

CMT

What is the Dynamic CMTI?

Dynamic CMTI Criteria: Maximum slew rate of VCM with switching edge

(HL, LH) coincident or near to the common mode transient pulse.

Normal Missing

pulse

Delay H or L

error

Latch

7


Why CMTI is so Critical?

State-of-Art SiliconGaN - Cascode

Parameter 600V Si 600V GaN

Static

VDS 600V 600V

RDS 0.14Ω[0] 0.15Ω[0]

Dynamic COSS(Tr) 314pF[2] 71pF[2]

Reverse

Operation

Qrr 8200nC[3] 42nC[4]

trr 460ns[3] 24ns[4]

[1] GaN: TPH2006; Si:IPx60R160C6

159

145

130

102

90

52.7

37.429.5

23.7 19.8

0

20

40

60

80

100

120

140

160

180

0 5 10 15 20

109

87.4

6.75

1.02 0.65 0.55 0.5 0.4

0

2

4

6

8

10

12

0 5 10 15 20

GaN GaN

SJ-MOSFET

SJ-MOSFET

dv/dt (V/ns) di/dt (A/ns)

(a) (b)

V/n

s

dv/dt (IOFF=15A)

RG-EXT(Ω)

8


Why CMTI is so Critical?

VCC

GND

IN

VCC_T

VSW

VIN

PW

M_T

PW

M_B

Low Side Driver

High Side

Driver

GND

Level Shiftor

Isolation; VgsT

VgsB

OUT

GND

IL

CIO

CIO

IL(5A/div)

VSW(100V/div)

VgsT (10V/div)

PWM_T(5V/div)

Primary GND noise

W. Zhang, X. Huang, F. C. Lee and Q. Li, "Gate drive design considerations for high voltage cascode GaN HEMT," APEC 20149


UCC2152x: 4A, 6A, 5.7kVRMS Isolated Dual Channel Gate Driver

10

9

11

Driver

VDDB

OUTB

VSSB

12

13

NC

NC

UVLODEMODMOD

15

14

16

Driver

VDDA

OUTA

VSSA

UVLODEMODMOD

Functional Isolation

Re

info

rce

d Iso

latio

n

Disable,

UVLO

and

Deadtime

2

1

3,8

4

6

5

7

GND

INB

DT

NC

DIS

INA

VCCI

Copyright © 2017, Texas Instruments Incorporated

5.7kVrms isolation voltage with 100V/ns Min. CMTI

The first of a new isolation family in TI’s gate driver portfolio

DT, UVLO, etc. and optimized switching performance

Flexible – used as a low-, high-, high-/low- or half-bridge driver.

10


10

9

11VDDB

OUTB

VSSB

15

14

16VDDA

OUTA

VSSA

Functional

Isolation

Re

info

rce

d Iso

latio

n

Inp

ut L

og

ic

6

2

1

8

5

3

4

VCCI

DT

DIS

GND

VCCI

INB

INA

OUTB

OUTA

VSS

Common Mode Surge

Generator

GND

VDDVCC

VCC

VSS

How to Characterize CMTI for UCC2152x?

LDO

3V

~18V

Ba

ttery

≈28V

Passive Probe

BW=1GHz

11


Off-the-Shelf Common Mode Surge Generator

Typical Features

R-C Charge/Discharge

No parasitic induced

overshoot or undershoot

≤400V, or ≥4kV

12

Source: NoiseKen


How to Generate Programmable CMTI Rising Slew Rate to Emulate End Equipment?

LfVCM

(400V, 800V,

1200V)

IL

VChg

𝐼𝐿 =𝑉𝐶ℎ𝑔 ∙ 𝑇𝑂𝑁

𝐿𝑓

𝑑𝑉𝐶𝑀𝑇

𝑑𝑡=

𝐼𝐿2 ∙ 𝐶𝑂𝑆𝑆 + 𝐶𝐷

COSS

CD


𝑑𝑡=

𝑉𝐶ℎ𝑔 ∙ 𝑇𝑂𝑁

2 ∙ 𝐿𝑓 ∙ 𝐶𝑂𝑆𝑆 + 𝐶𝐷


𝑑𝑡∝ ቚ𝑉𝐶ℎ𝑔

𝑇𝑜𝑛, 𝐿𝑓=𝐶𝑜𝑛𝑠𝑡.

VCMT

13


CMTI Rising Slew Rate Example Waveform

LfVCM

(400V, 800V,

1200V)

IL

VChgCOSS

CD




Rising VCMT (100V/div)

OUTA/B

IL (5A/div)

VCMT

14


System Configuration for Rising Slew Rate

10

9

11VDDB

OUTB

VSSB

15

14

16VDDA

OUTA

VSSA

Functional

Isolation

Re

info

rce

d Iso

latio

n

Inp

ut L

og

ic

6

2

1

8

5

3

4

VCCI

DT

DIS

GND

VCCI

INB

INA

OUTB

OUTA

VSS

Common Mode Surge

Generator

GND

VDDVCC

VCC

VSS

Passive

Probe

BW=1GHz

Lf

VChg

VGSPW-100us

fS=200Hz

LDO

3V

~18V

Ba

ttery

≈28V

15


How to Generate Programmable CMTI Falling Slew Rate?

VChgLf IL

COSS CD

VCM(400V, 800V, 1200V)

VChgLf IL

COSS

CD

VCM

VCMTVCMT

16


How to Generate Programmable CMTI Falling Slew Rate?

(400V,

800V,

1200V)

VChgLf IL

COSS

CD

VCM

𝑑𝑉



Negative CMTI

OUTA/B

Falling CMTI (100V/ns)

IL (5A/div)

VCMT

17


CMTI PCB Design

Bottom Layer

Falling Slew

Rising Slew

Top Layer

Daughter Card with DUT

18


CMTI Hardware Design and Measurement Considerations

• MOSFET, SiC-MOSFET, or GaN with small COSS;

• SiC Diode with small CD;

• Air core inductor with small parasitic winding capacitance;

• Minimization of two separate ground capacitive coupling;

• Use floating battery to drive the high side switch for falling slew CMTI, instead of

isolated power supply

• Characterization on measurement location and DUT

19


CMTI Measurement Location

Right Next to DUT Under PCB due to Thermal Stream

20


CMTI Test Setup Characterization

Strike Measured

on DUT

Strike Measured

below PCB

Same Test Condition

Strike Measured

on DUT

Strike Measured

below PCB

175V/ns 201V/ns21


CMTI Test Setup Characterization

y = 0.0005x2 + 0.0467x + 4.4635

-20

0

20

40

60

80

100 120 140 160 180

∆CMTI-Rising-Char

Delta-CMTI-Char

Poly. (Delta-CMTI-Char)

∆CMTI

(V/ns)

CMTI (V/ns)

y = 0.0368x + 24.864

-20

0

20

40

60

80

90 110 130 150 170 190

∆CMTI-Falling-Char

Delta-CMTI-NEG-Char

Linear (Delta-CMTI-NEG-Char)

CMTI (V/ns)

22


CMTI Measurement Data for UCC21520

• VCCI=12V, VDD=25V

0

50

100

150

200

250

300

-50 0 50 100 150

Positive-ChA

Positive-ChB

Negative-ChA

Negative-ChB

CMTI(V/ns)

Temperature

(°C)

23


Summary• Isolation in gate driver

• Deep dive of common mode transient immunity (CMTI)

• Bench CMTI design, measurement and design considerations

THANK YOU

24

a deep dive of isolated gate driver robustness dv/dt (cmti) · why cmti is so critical? vcc gnd in...

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