a 5-bit cmos phase shifter with low phase and amplitude error using a new 180° phase shifter...
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VC 2010 Wiley Periodicals, Inc.
A 5-BIT CMOS PHASE SHIFTER WITHLOW PHASE AND AMPLITUDE ERRORUSING A NEW 180� PHASE SHIFTERFEATURING PROCESS-VARIATIONIMMUNITY
Dong-Woo Kang1 and Songcheol Hong2
1 Department of Electrical Engineering and Computer Science,University of California, San Diego, CA 92093; Correspondingauthor: [email protected] of Electrical Engineering, Korea Advanced Institute ofScience and Technology, 373-1 Guseong-Dong, Yuseong-Gu,Daejeon, Republic of Korea 305-701
Received 1 September 2009
ABSTRACT: In this letter, a high-performance 5-bit CMOS phaseshifter using a newly proposed 180� bit is presented for a Ku-band
mobile satellite phased array receiver. The 180� phase shifter exhibitsgood tolerance to substrate parasitic capacitances when compared with
a conventional high-pass/low-pass type one. The designed 5-bit CMOS
phase shifter demonstrates a typical 11.7 dB 6 0.5 dB insertion loss
and a 2.1� rms phase shift error at 12.2 GHz. VC 2010 Wiley
Periodicals, Inc. Microwave Opt Technol Lett 52: 1325–1328, 2010;
Published online in Wiley InterScience (www.interscience.wiley.com).
DOI 10.1002/mop.25214
Key words: CMOS-integrated circuits; phase shifter; phased array
radar; satellite communication
1. INTRODUCTION
Phase shifters have been used in a variety of communication sys-
tems, radar systems, and industrial applications. To develop low-
profile, electronic steering, and computer-controlled phased array
system, it is necessary to develop digital monolithic microwave-
integrated circuit phase shifters. Recently, RF phase shifters using
standard silicon technology have been developed for wireless-
integrated transceivers such as multi-input and multioutput sys-
tems [1, 2]. In spite of their compact size, these consume rela-
tively high DC power and have a low linearity. On the other
hand, cascaded phase shifters for multibit operation have been
demonstrated by using a FET or PIN switch [3–6]. However,
they suffer from large insertion loss, loss variation, and phase
error, mainly caused by errors of the 180� phase bit using a high-
pass/low-pass configuration. This topology is extremely sensitive
to process variations and modeling accuracy of lumped elements.
In this letter, an 180� phase shifter using two quarter-wave trans-
mission lines is presented. The designed 5-bit phase shifter using
the proposed 180� bit shows low phase and amplitude errors for
Ku-band land mobile satellite phased array receivers.
2. CIRCUIT DESIGN
Figure 1(a) shows the conventional high-pass/low-pass phase
shifter. The phase difference can be obtained by switching
between T-type high-pass filter and low-pass filter. However,
parasitic capacitances nearby series capacitors of the high-pass
filter result in large phase error of the phase shifter. These
capacitances come from the substrate capacitance of MIM
capacitors and switches and layout interconnections. The simu-
lated phase errors caused by the parasitic capacitance are plotted
Figure 1 (a) The conventional high-pass/low-pass phase shifter and (b) the proposed 180� phase shifter
DOI 10.1002/mop MICROWAVE AND OPTICAL TECHNOLOGY LETTERS / Vol. 52, No. 6, June 2010 1325
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in Figure 2(a). The phase difference significantly varies when
even small capacitance is accounted. Figure 1(b) shows a sche-
matic diagram of the proposed 180� phase shifter. The differen-
tial phase shift is obtained by switching the parallel transmission
line resonator and two k/4 lines. In the parallel resonant mode,
all switches are turned on. The RF signal cannot pass through
the k/4 lines because the input and the output are located k/4length away from the short circuit. The transmission phase /R
passing through Q1 and Q2 can be written as follows:
/R ¼ tan�1 Z02ðYp cotðb‘pÞ � xCÞ
� �; (1)
where x0 is the desired frequency, b0 is the propagation con-
stant at x0, and Yp is the characteristic admittance of the trans-
mission line.
The phase shifter is perfectly matched when a signal trans-
fers through the on-resistance of Q1 and Q2 while effectively
having a zero insertion phase. Therefore, we can obtain the im-
pedance matching condition using (1).
C ¼ Ypx0
cotðb0‘pÞ: (2)
When all switches are turned off, the k/4 line with an open-
circuited stub presents a short circuit at the input or the output.
The RF signal passes through two k/4 lines and has �180�
insertion phase.
The variation in capacitance due to the manufacturing pro-
cess is given by Eq. (3):
C0 ¼ aC0 ¼ aYp cotðb0‘pÞ=x0; (3)
where a is the ratio of the capacitance variation, and C0 is the
designed initial capacitance.
The phase error caused by capacitance variation corresponds
with the transmission phase change of the parallel resonant state.
From Eq. (1), we can derive the phase deviation D/R using (3):
D/Rj j � p 1� að Þj j cotðhpÞ½hpð1þ cot2ðhpÞÞ þ cotðhpÞ� ; (4)
where b0‘p ¼ hp.
For D/R ¼ 3� and a ¼ 1.15 (capacitance variation is 15%),
Eq. (4) can be solved numerically, and this results in hp ¼ 80�,C0 ¼ 0.18 pF.
Figure 2(b) shows the phase variations according to different
capacitance values using Eq. (4). The phase difference only
varies within a range of 63� (61.7%) when DC is 615% (627
fF). Figure 3 shows the simulated and measured relative phase
characteristics of the 180� phase shifter. The phase error is less
than 2.5� in an 11.7–12.8 GHz frequency range.
The 5-bit phase shifter circuit consists of five digital bits cor-
responding to differential phase shifts of 180�, 90�, 45�, 22.5�,and 11.25�. Each phase bit uses an NMOS switch with a body-
to-source short and a microstrip line with a first-metal ground.
The 180� phase bit is designed using the proposed phase shifter.
The other bits use a bridged T-type configuration, where the
MOSFET switches become part of the phase shift high-pass/
low-pass network. The important feature of the 180� phase
shifter is that a single control line toggles each phase state,
whereas the others are controlled by two complementary signals,
0 V and 1.8 V. Each phase bit is designed to have a minimum
return loss of less than �16 dB so that interactions between
individual bits are minimized.
Figure 2 Simulated phase deviation according to capacitance variations: (a) conventional high-pass/low-pass phase shifter and (b) proposed 180� phase
shifter
Figure 3 Measured and simulated phase differences of the 180� phase
shifter
1326 MICROWAVE AND OPTICAL TECHNOLOGY LETTERS / Vol. 52, No. 6, June 2010 DOI 10.1002/mop
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Figure 4 presents the chip photograph of the 6-bit phase
shifter. It was fabricated using TSMC’s 0.18-lm CMOS process,
which provides six metal layers including a top thick metal. All
microstrip lines and a spiral inductor were simulated by a full-
wave EM simulator (ADS momentum). The chip size, including
pads, is 3.6 � 1.6 mm2.
3. MEASUREMENT RESULTS
The phase shifter was tested on a Cascade Microtech probe sta-
tion using a computer-controlled Agilent 8510C network ana-
lyzer using SOLT calibration setup. Measured relative phase
shift of the phase shifter in a 11.7–12.8 GHz frequency range is
depicted in Figure 5. Measured circuit performances for all 32
states are plotted in Figure 6. The phase shifter exhibits an aver-
age insertion loss of 11.7 dB with a maximum deviation of
60.77 dB. Both input and output return losses are better than
�12 dB over the band of interest. The calculated RMS phase
error is less than 4.2� with 2.1� at the designed frequency.
4. CONCLUSIONS
A new 180� phase shifter topology is proposed and analyzed to
obtain minimum phase variation at the operation frequency band.
Figure 4 The chip photograph of the fabricated phase shifter
Figure 5 Measured relative phase shifter for all 32 states
Figure 6 Measured performances for all 32 states: (a) input/output return losses, (b) insertion loss, and (c) RMS phase error and RMS amplitude
error
DOI 10.1002/mop MICROWAVE AND OPTICAL TECHNOLOGY LETTERS / Vol. 52, No. 6, June 2010 1327
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This new topology provides a stable phase response as it is rela-
tively insensitive to process variation and modeling accuracy.
The developed 5-bit phase shifter with 0.18-lm CMOS technol-
ogy demonstrates 11.7 dB 6 0.5 dB insertion loss and 2.1� rms
phase shift error at 12.2 GHz. This phase shifter is suitable for
low-profile commercial DBS terminals for mobile reception.
ACKNOWLEDGMENTS
This work was supported in part by Teltron Inc. and the Agency for
Defense Development, Korea, through the Radio Detection
Research Center at the Korea Advanced Institute of Science and
Technology.
REFERENCES
1. D. R. Banbury, N. Fayyaz, S. Safavi-Naeini, and S. Nikenshan, A
CMOS 5.5/2.4 GHz dual-band smart-antenna transceiver with a
novel RF dual-band phase shifter for WLAN 802.11a/b/g, In IEEE
RFIC Symposium Digest, Fort Worth, TX, 2004, pp. 157–160.
2. H. Zarei and D. J. Allstot, A low-loss phase shifter in 180 nm
CMOS for multiple-antenna receivers, IEEE Int Solid-State Cir-
cuits Conf Symp 1 (2004), 392–393.
3. M. Teshiba, R. Van Leeuwen, G. Sakamoto, and T. Cisco, A SiGe
MMIC 6-bit PIN diode phase shifter, IEEE Microwave Wireless
Compon Lett 12 (2002), 500–501.
4. T. M. Hancock and G. M. Rebeiz, A 12-GHz SiGe phase shifter
with integrated LNA, IEEE Trans Microwave Theory Tech, 53
(2005), 977–983.
5. D. W. Kang, H. D. Lee, C. H. Kim, and S. Hong, Ku-band MMIC
phase shifter using a parallel resonator with 0.18-lm CMOS tech-
nology, IEEE Trans Microwave Theory Tech, 54 (2006), 294–301.
6. M. A. Morton, J. P. Comeau, J. D. Cressler, M. Mitchell, and J.
Papaolymerou, 5 Bit, silicon-based, X-band phase shifter using a
hybrid pi/t high-pass/low-pass technology, In IET Microwave
Antenna Propagation, 2008, pp. 19–22.
VC 2010 Wiley Periodicals, Inc.
A NEW COMPACT BAND-PASS FILTERBASED ON AN ASYMMETRIC SHORT-CIRCUITED SPURLINE RESONATOR
P. Rodriguez-Cepeda,1 M. Ribo,1 F. J. Pajares,1
A. M. Sanchez,1 J. R. Regue,1 A. Perez,1 and L. Pradell21 Research Group in Electromagnetism and Communications(GRECO), La Salle—Universitat Ramon Llull, 08022 Barcelona,Spain; Corresponding author: [email protected] of Signal Theory and Communications, UniversitatPolitecnica de Catalunya, Campus Nord UPC, 08034 Barcelona,Spain
Received 31 July 2009
ABSTRACT: In this letter, a new compact two-pole band-pass filter
(BPF) based on an asymmetric short-circuited spurline resonator ispresented. The filter is modeled by means of a new multimodal circuitmodel for a microstrip to three-line-microstrip cross, which allows a
rigorous study of a very generic new family of filters. A BPF centered at1.9 GHz has been designed, measured, and simulated using this
multimodal model. A good agreement between measurements andsimulations has been obtained. VC 2010 Wiley Periodicals, Inc.
Microwave Opt Technol Lett 52: 1328–1331, 2010; Published online in
Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/
mop.25161
Key words: band-pass filter; three-line-microstrip; spurline resonator;
coupled microstrip; multimodal analysis
1. INTRODUCTION
Three-conductor spurline resonators are suitable structures to
implement compact band-pass filters (BPFs). In the literature,
several configurations have been presented and analyzed
[1–5].
As spurline resonators are built upon coupled microstrip
lines, several electromagnetic modes propagate simultaneously.
Any transition or asymmetry in the coupled lines (for instance a
gap or a via hole) will affect each mode differently and cause
an energy exchange among them. Therefore, these structures are
best understood by means of a modal analysis, which confines
each propagating mode in a different transmission line or circuit
port. This kind of analysis provides a quantitative and simple
interpretation of the propagation and modal interaction of all
propagating modes in coupled transmission line structures.
In this letter, a new compact two-pole BPF using an asym-
metric short-circuited spurline resonator is presented. The new
filter is more compact than analogous BPFs presented in the lit-
erature because either it is shorter [3–5] or, having a similar
length, is narrower [1, 2] (the physical length of the wide k/4structure in [1, 2] is similar to the one of the narrow k/2 struc-
ture proposed in this letter). In contrast to [1–5], the compact-
ness is achieved by allowing an additional mode—generated by
means of transversal asymmetries (via holes or stubs in the outer
strips)—in the resonance process. To analyze this new filter
structure, a new multimodal circuit model is derived and applied
to study the response of a very general class of spurline filters
of which the proposed filter is a particular case. Finally, meas-
urements and simulations for a fabricated BPF with a center
frequency of 1.9 GHz are presented. A good agreement between
measurements and simulations is achieved.
2. NEW COMPACT BPF USING AN ASYMMETRICSHORT-CIRCUITED SPURLINE RESONATOR
Figure 1 shows the configuration of the proposed new BPF
using an asymmetric short-circuited spurline resonator. It con-
sists of a k/2 three-line-microstrip section embedded in a micro-
strip section and with the two outer strips connected to the
ground plane at opposite sides by two via holes. The microstrip
propagates only the microstrip mode [Fig. 2(a)]. The three-line-
microstrip is a multimodal transmission line as it can propagate
three quasi-TEM modes simultaneously, namely, the ‘‘ee’’
mode, the ‘‘oo’’ mode and the ‘‘oe’’ mode, whose mode vol-
tages and currents are defined in Figure 2(b)–2(d), respectively
[6]. These modes interact among them at any asymmetry or
transition.
At the microstrip to three-line-microstrip transitions (see Fig.
1), the microstrip mode is converted into the ee mode (and vice
Figure 1 Configuration of a new compact BPF using an asymmetric
short-circuited spurline resonator
1328 MICROWAVE AND OPTICAL TECHNOLOGY LETTERS / Vol. 52, No. 6, June 2010 DOI 10.1002/mop