a 45nm soi monolithic photonics chip-to- chip link with...
TRANSCRIPT
Symposia on VLSI Technology and Circuits
A 45nm SOI Monolithic Photonics Chip-to-Chip Link with Bit-Statistics-Based Resonant Microring Thermal Tuning
Chen Sun1,2, Mark Wade3, Michael Georgas2, Sen Lin1, Luca Alloatti2, Benjamin Moss2
Rajesh Kumar2, Amir Atabaki2, Fabio Pavanello3, Rajeev Ram2, Milos Popovic3, Vladimir Stojanovic1
1 University of California, Berkeley 2 Massachusetts Institute of Technology
3 University of Colorado, Boulder
Electrical Link Scaling
• Efficiency vs. reach vs. data-rate tradeoffs limits data-rate
• Bandwidth density hard to scale – High-performance chips are I/O bandwidth starved
Electrical Wire 1 x 10 Gb/s
Silicon Photonic Links
• Dense wavelength division multiplexing (DWDM) provides a way to scale bandwidth density
• Distance insensitive loss, low distortion optical signaling
Optical Fiber
16 x 10 Gb/s … …
Ring Resonators
• Enabler of DWDM • Very high-Q resonant
notch filter
λ0
In Thru
DropThru
Drop
T
λ0λ
1
Slide 4
Ring Modulators
• Modulation: – On-off key the laser by electrically shifting notch
wavelength – Modulator ring is a PN diode – carrier dispersion ( free carriers => index of refraction)
Slide 5
λ0Tx Out
0101101... T λ0
λ
λ0
T1
T0
1
λ0Tx Out
0101101... T λ0
λ
λ0
T1
T0
1
Ring Modulators
• Modulation: – On-off key the laser by electrically shifting notch
wavelength – Modulator ring is a PN diode – Carrier dispersion ( free carriers => index of refraction)
Δ
0V -1V
Slide 6
Critical Gating Issue
Slide 7
• Drop-port spectra of 55 nominally identical rings (process variations) – [Selvaraja IEEE LEOS 2009]
• Thermal variations cause drift of 0.05nm/K, can use to tune • Resonance alignment a critical gating issue
Outline
• Active Wavelength Locking • Bit-Statistical Thermal Tuner Concept
– Level-tracking – Optimal auto-locking – Self-heating
• 45nm SOI monolithic photonic platform • Chip-to-link link demonstration
Slide 8
Active Wavelength Locking
• Amount of light resonating in the ring changes based on alignment of resonance (λ0) to laser wavelength (λ)
Slide 9
Laser Laser λ
PR
PR
λ0
Active Wavelength Locking
• Weakly couple photodetector to ring (drop port), PD photocurrent (IPD) is proportional to PR – IPD electrically-measurable indicator of alignment
Slide 10
Laser Laser λ
IPD
PR
PD PDPD
IPD
λ0
Active Wavelength Locking
• Tracker circuit which track value of (IPD) • Embed resistive heater in the ring and driver to control ring
temperature
Slide 11
Laser
PD
R Laser
Tracker
RR
PDPDPDPPDPDPDP Heater Driver
Ring Waveguide
Resistive Heater
Active Wavelength Locking
• Controller uses information from tracker, controls heater to maintain alignment of λ0 to laser λ
Slide 12
Laser
PD
R Laser
Tracker Controller
RR
C
PDPDPDPPDPDPDP Heater Driver
Tuning Control (Lock-To-Reference)
λ
IPD Laser
IREF
Lock IPD to IREF
Heat up Heat upcool down cool down
Tuning Control (Lock-To-Reference)
λ
IPD
IREF
Lock IPD to IREF
• If IPD > IREF, heat more • If IPD < IREF, heat less
IPD
Laser
cooled cooled
Tuning Control (Lock-To-Reference)
λ
IPD
IREF
Lock IPD to IREF
Heat More HMIPD
Laser
• If IPD > IREF, heat more • If IPD < IREF, heat less
Tuning Control (Lock-To-Reference)
λ
IPD Laser
IREF
Lock IPD to IREF
• If IPD > IREF, heat more • If IPD < IREF, heat less
IPD Heated up Heated up
Tuning Control (Lock-To-Reference)
λ
IPD Laser
IREF
Lock IPD to IREF
• If IPD > IREF, heat more • If IPD < IREF, heat less
Heat Less
at s
IPD
Challenge #1: Data-Dependent IPD
Slide 18
• Data is amplitude-modulated – IPD changes based on data 0 and data 1
• If balance of 1s to 0s is changing – Controller can think ring is drifting away when it is not
• Level-track Bit 1s and Bit 0s separately
λ
IPD Laser IPD
0 1 I0
I1
Integrating Frontend
• Goal: find i0 and i1 (0 level and 1 level) • Integrate drop-port photocurrent over N bits • Final voltage dependent on number of 0s and 1s
Slide 19
Integrating Frontend
• Integrate bits over two intervals close in time:
Slide 20
Integrating Frontend
• Integrate bits over two intervals close in time:
• Thermals are slow (10 , so I0 and I1 stay the same:
Slide 21
Integrating Frontend
• Solve 2 equations with 2 unknowns digitally – Implemented with 2 Multipliers, 4 adders, at low speed
• Integrate bits over two intervals close in time:
• Thermals are slow (10 , so I0 and I1 stay the same:
Slide 22
Challenge #2: Picking IREF
• Want to pick a lock point that maximizes eye opening (P1 - P0)
• If both 1-level and 0-levels are both known – Search to find IREF where I1 – I0 is maximized during lock
Slide 23
λ
IPD Laser IPD
0 1 IREF?
Lock-On Procedure
init search
PH-initRsweep
Rsweep
L0-opt
Ldiff-opt
• Initialize heater to a high value (PH-init), then stride heater value down until there is drop-port photocurrent > Rsweep
Slide 24
init search sweep
PH-init
L0-opt
Rsweep
PH-opt
L0-opt
Ldiff-opt
Ldiff-opt
Lock-On Procedure
• Step heater value down and remember where I1 – I0 (Idiff) is maximized (I0-opt) – corresponds to the lock point with maximum eye-height
Slide 25
Lock-On Procedure
init search sweep lockreset return
PH-init
L0-opt
Rsweep
PH-opt
Rsweep
L0-opt
Ldiff-opt
Ldiff-opt
• Once photocurrent < Rsweep again, return to I0-opt and lock onto it
Slide 26
Challenge #3: Self-Heating
λ
PR Laser
• Significant fraction (>50%) of PR is absorbed by the ring (usually free-carrier absorption) heating it up
0 PR0 500
Slide 27
Challenge #3: Self-Heating
λ
PR Laser
Mod
• When modulating 1s or 0s, laser power resonating in ring (PR) changes
• Here, ΔPR= 400 ring wants to cool down by 10K – Enough to blue-shift by 0.5nm (Modulator shift is ~0.05nm)
1 PR0
PR1
500
100
Self-Heat
Slide 28
Challenge #3: Self-Heating
λ
PR Laser PR
• Average PR dependent on ratio of 1s to 0s
• Very large amplitude effect – Transient eye-closure when ratio of 1s to 0s changes
0 1
Self-Heat
PR0
PR1
500
100 Mod
Slide 29
Self-Heating Cancellation
• Difference in self-heating power between 0s and 1s is proportional to I0, I1
• Since I0 and I1 are known, then exact amount of cancellation power to apply can be calculated
Slide 30
PC = K (I1 – I0)
Self-Heating Cancellation
• Difference in self-heating power between 0s and 1s is proportional to I0, I1
• Since I0 and I1 are known, then exact amount of cancellation power to apply can be calculated
Slide 31
PC = K (I1 – I0)
• Can apply cancellation in N-bit intervals – where tbit x N << thermal time constant:
PC = K (N1/N) (I1 – I0)
∫
8:1
CLK
Bit-Statistics Based Thermal Tuner
• Integrating frontend ADC integrates drop-port photocurrent
Slide 32
∫
8:1
CLK
Bit-Statistics Based Thermal Tuner
• Tap from the transmit datapath and count the number of 1s and 0s
Slide 33
∫
L1 L0Ldiff
8:1
CLK
Bit-Statistics Based Thermal Tuner
• Solver performs algebra to find optical power level (I1, I0)
Slide 34
∫
L1 L0Ldiff
8:1
CLK
PH
Bit-Statistics Based Thermal Tuner
• Controller FSM controls the strength of a heater DAC
Slide 35
∫
L1 L0Ldiff
8:1
CLK
PH
Bit-Statistics Based Thermal Tuner
• Self-heating canceller cancels fast transients from laser self-heating effects
Slide 36
IBM 12SOI (45nm) CMOS
IBM Cell IBM Power7
• 300mm wafer, commercial process • Fast process used in microprocessors
• N-FET transistor fT = 485 GHz [Lee, IEDM 2007]
IBM Espresso
Photonics in IBM 45nm SOI
• Thin BOX SOI process – Enable photonics through partial substrate release
• Demonstrated monolithic optical transceivers – [Georgas VLSI 2014]
Slide 38
Auto-Locked Transmitter
• Integrate the tuning circuitry with the transmitter
In
PRBS31
8:1
Tuning Backend
VBIAS
VPD
Outen
rst
Slide 39
Resonator Tuning Efficiency
Slide 40
• Substrate release process provides good tuning efficiency • 0.75mW/nm (3.8μW/GHz), 2.2mW maximum heater output • 3nm (600GHz, ~60K) total tuning range
PRBS31
8:1
Thermal Tuner
Tx
Auto-locked Transmitter Demo
• Ring resonance at 1187.2nm, laser at 1189nm
• Tuning circuits auto-locked to maximize I1 – I0
Slide 41
Lock
Laser λ
Auto-locked Transmitter Demo
• Open eyes demonstrated with PRBS31 random number sequence – 5-8 Gb/s modulation at a 1.2V swing – Modulator driver is 30 fJ/b
Slide 42
1/0 Level Tracking
• 1/0 Level tracking allows controller to track 1/0 levels separately, and the controller can maintain the lock to the correct levels
• Uncompensated self-heating causes transient eye-closures
5Gb/s DC-Balanced Data (PRBS31) 5Gb/s non-DC balanced data
Slide 43
1/0 Level Tracking + Heating Cancellation
• Self-heating cancellation cancels the sudden change in laser self-heating power
• Open eye is maintained
1/0 tracking only 1/0 tracking + heating cancellation
Slide 44
45nm SOI Receiver
• Photodetector leverages SiGe available for PMOS strain – 0.02 A/W and 0.1 A/W variants
• Single-Stage TIA with 5kΩ feedback resistance – Two-way time-interleaved slicers – Optimized version of [Georgas VLSI 2014]
Slide 45
Receiver Measurements
• 10 Gb/s operation at less than 10-12 Bit-error rate
– 16.5uApp sensitivity at 10Gb/s (-21dBm normalized) – 6uApp sensitivity at 5Gb/s (-26dBm normalized)
• 290 fJ/bit at 10Gb/s, 374 fJ/bit at 5Gb/s
Slide 46
statistical eye shape 10 Gb/s BER eye measurement
Time [ps]
Dec
isio
n T
hres
hold
[uA
]
0 50 100 150 200
-2
0
2
1e-0011e-0021e-0031e-0041e-0051e-0061e-0071e-0081e-0091e-010<1e-010
Chip-to-Chip Link Demonstration
• Open eye at <10-10 BER • Optical amplifier provides 8dB optical gain
– 4dB loss per grating coupler, 1.2 dB loss couplers available [Wade, OI 2015] – 0.02 A/W photodetector in link test site
• 0.1-0.2 A/W photodetectors available
Slide 47
2.5 mW 1 mW 0.25 mW
0.1 mW
0.6 mW
0.25 mW
Link Energy Breakdown (5 Gb/s)
• Backend synthesized for 3.125 GHz as opposed to 625 MHz, so still room for improvement on energy/bit
*1.8nm is the tuned range in the demo shown, corresponding to 1.4 mW Slide 48
Conclusion
• Ring resonator thermal tuning is a gating issue for DWDM optical links
• Modulator level-tracking using bit statistics • Level-tracking enables optimal lock and self-
heating cancellation, crucial to unencoded links • Demonstrated tuning subsystem and chip-to-chip
optical link in 45nm SOI monolithic platform
Slide 49
Acknowledgements - POEM Team at MIT, CU Boulder, and UC Berkeley - This work was supported in part by DARPA, NSF, MIT CICS, Trusted
Foundry, NSERC Thank you!
Backup
Slide 50
Chip-to-Chip DWDM Links
• Vertical grating couplers couple light from a fiber into or out of a chip
• A pair of resonators aligned to the same wavelength form a wavelength channel
• High selectivity (Q ~10000) enables many channels on the same waveguide
Receiver Measurements
• 10 Gb/s operation at less than 10-12 Bit-error rate
– 8.3uA sensitivity at 10Gb/s (-21dBm normalized sensitivity) – 4.3uA sensitivity at 8Gb/s (-24dBm normalized sensitivity)
• These are connected to a 0.02A/W photodetector – -4dBm @ 10Gb/s, -7dBm @ 8Gb/s – Have a 0.1A/W detector, but not connected to these circuits
• 290 fJ/bit at 10Gb/s, 310 fJ/bit at 8Gb/s
Slide 52
statistical eye shape Bit-error rate eye measurement
Modulators and Receivers
• Receive: – Ring captures light of a specific wavelength, drops light
onto a wideband photodetector
λ0Tx Out
0101101... T λ0
λ λ0Rx In
0101101...
λ0
T1
T0
1
Slide 53
Optical Bistability
Slide 54
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 11280
1280.1
1280.2
1280.3
1280.4
1280.5
1280.6
1280.7
1280.8
1280.9
1281
0 [nm
]
Heater Power [mW]
≈H
≈H
λ ≈
Thermal Tuning: Drop-Port Sensing
• Average drop port IPD also dependent on ratio of 1/0s in data (on-off keyed data) – OK for link demonstrations (PRBS data is 1/0 balanced) – Will break in real system, unless data encoded to
maintain constant 1/0 ratios
Laser
Low BW TIA >
PD
DAC
Reference IPD
IPD
R Laser
[Li, ISSCC 2013] [Padmaraju, Opt Exp 2012] [Amberg, ASSCC 2012] [Timurdogan, CLEO 2012]
(more/less heat) +1/-1
Partial Substrate Removal Die Photo
Slide 56
New Photodetector Test Data
0
0.02
0.04
0.06
0.08
0.1
0.12
0.14
0.16
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
Resp
onsi
vity
[A
/W]
Input Power [mW]
1283nm (-1.5V) 1283nm (-0.8V) 1283nm (-0.5V) 1185nm (-1.5V) 1185nm (-0.8V) 1185nm (-0.5V) 1172nm (-1.5V) 1172nm (-0.8V) 1172nm (-0.5V)
Gratings
Slide 58
Average Drop Power (Large vs. Small Shift)
• Drop-port average is different dependent on large vs. small shift modulators
Slide 59
Self-Heating Eye Closure (Random Data)
• Plotted for different ratios tbit/thermal time constant • Different self-heating loop gains
Slide 60
−10 −8 −6 −4 −2 00
0.01
0.02
0.03
0.04
0.05
0.06
0.07
σ/Δ
α
GL(0)
tbit
/τT = 1e−5
tbit
/τT = 1e−4
tbit
/τT = 1e−3
-0.25 -0.2 -0.15 -0.1 -0.05 0 0.05 0.1 0.15 0.2 0.25-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0.8
1
1.2
- 0 [nm]
Val
ue (
arb.
uni
ts)
Real L0
Real L1
Real Ld
Calc L0
Calc L1
Calc Ld
Updates to LD = L0 – L1
• If LD cannot update, controller still returns ring to the correct point
Slide 61
Ld = N [LN(ta) − LN(tb)]N0(tb) − N0(ta)
L1 = LN + N0
N· Ld
L0 = L1 − Ld
Averaged Power Tracking
• Experiment with random, non-DC balanced data with ratios of 1s-to-0s changing every 200ms
• Averaged power tracking completely fails – Controller unable to discern loss of power due to
resonance change from a change in ratio of 1s to 0s
5Gb/s DC-Balanced Data (PRBS31) 5Gb/s non-DC balanced data
Slide 62