800g product roadmap - multilane

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800G Product Roadmap April 2021 1

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Page 1: 800G Product Roadmap - MultiLane

800G Product RoadmapApril 2021

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Page 2: 800G Product Roadmap - MultiLane

800G Roadmap Overview

Company Profile

Products and Solutions

Transceiver Characterization

DAC Characterization

Host Characterization

CMIS Testing

RF Cable Solutions

112G Channel Emulation Board

At-speed Testing on ATE

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Page 3: 800G Product Roadmap - MultiLane

Company Profile

Highly agile and innovative company

Data Center Interconnect and High-Speed IO test solutions

10G to 800G support

More than 200 products released

Over 500 customers

Worldwide presence 3

10120

7

Lebanon

Taiwan

Fremont, CAUSA

12

GermanyFrance

Page 4: 800G Product Roadmap - MultiLane

Worldwide Customers

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Page 5: 800G Product Roadmap - MultiLane

Physical Layer Instrument Market

PRICE

PERFORMANCE

Broad solution portfolio

More than 4000 instruments deployed worldwide

Production testing focus

High value solutions

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Low-end BERTs

Page 6: 800G Product Roadmap - MultiLane

Solutions for the Complete HSIO Ecosystem

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Page 7: 800G Product Roadmap - MultiLane

800G Module Validation

Block Diagram

ML4079E

ML4062-MCB-112

High-resolution error tracking

Instantaneous and cumulative BER

Real Hardware FEC Analysis

Channel Emulation

Advanced TX/RX equalization

CMIS testing

Multi-corner module environment testing

Transceiver

Transceiver Characterization

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Page 8: 800G Product Roadmap - MultiLane

800G Module Compliance Board (QSFP-DD|OSFP)

ML4062-MCB-112 Insertion Loss

Support for 8x112G

802.3ck, CEI-112G-VSR-PAM4 and CEI-56G-VSR-NRZ compliant

Matched differential trace length

I2C master driven

On-board MSA output LEDs

User-friendly GUI: I2C R/W commands

Loading MSA memory maps

Transceiver Characterization

ML4064-MCB-112 Insertion loss

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Page 9: 800G Product Roadmap - MultiLane

23-29 GBaud and 46-58 GBaud PAM4 and NRZ

Gray coding & polarity inversion supported

Independent control of inner eye levels

3-tap pre-and post-emphasis or 7-tap linear FFE

Real Hardware KP and KR FEC

Automatic pattern detection

ThunderBERT: fast, responsive and user-friendly GUI

ML4079E – Full Featured 800G BERT

Transceiver Characterization

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Page 10: 800G Product Roadmap - MultiLane

BER Testing Setup For TransceiversML4079E – Error Tracking and FEC Analysis

Single and multichannel BER

Accumulated and instant BER

Real-time SNR levels

Histogram of density distribution of the samples

Real encoding and decoding of FEC blocks

Comprehensive FEC analysis software Codeword Counters

SER Histogram

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Page 11: 800G Product Roadmap - MultiLane

800G DAC Characterization

ML4035 – TDR |BERT|DSO

4-Lane Sampling Scope

4-Lane 58 GBd PPG

Electrical BW: 35 GHz

Automation SW for DAC Testing

Impedance Profile Return Loss (S11)

Insertion Loss (S21)

Crosstalk (NEXT, FEXT)

ICN - COM

Effective Return Loss

Eye Measurements

BER Measurement

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Page 12: 800G Product Roadmap - MultiLane

800G DAC Characterization

Bidirectional Testing

Return Loss and Insertion Loss

Crosstalk (FEXT, NEXT)

ICN – COM

Eye Measurements

Characterizing both sides at the same time

Minimize test time with single-plug test

ML4035

ML4035

MCB

MCB

2xML4035 MCB

MCB2xML4035

Unidirectional Bidirectional

Unidirectional Testing:

Return Loss and Insertion Loss

Crosstalk (FEXT, NEXT)

ICN – COM

Eye Measurements

Characterizing one side at a time

S-Parametric Validation Setup

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Page 13: 800G Product Roadmap - MultiLane

800G DAC Characterization

ML1105 – Automated Cable Test Solution

TDR and S-parameters: Impedance profile

Return loss (S11)

Insertion loss (S21)

Crosstalk (NEXT, FEXT)

Manual software for debugging and verifications

Automated software for production/RMA

Bit error rate

Eye diagram

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Page 14: 800G Product Roadmap - MultiLane

Supported host testing:

SI margin testing

Hi-speed lane access

Noise injection

Shallow loopback

Host Characterization

800G Host Test Setup

Block Diagram

ML4079EN

ML4062-HCB-112 ML4062-LB-112

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Page 15: 800G Product Roadmap - MultiLane

Host Characterization

800G Host Compliance Board (QSFP-DD|OSFP)

High performance signal integrity traces

Compliant with 802.3ck, CEI-112G-VSR-PAM4 and CEI-56G-VSR-NRZ

8x112G lane access via single board (OSFP) or two board pair (QSFP-DD)

Low insertion loss traces

Built with high performance PCB material

High speed signals accessiblethrough 2.4- or 1.85-mm connectors

ML4062-HCB-112 Insertion LossML4064-HCB-112 Insertion Loss

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Page 16: 800G Product Roadmap - MultiLane

Host Characterization

ML4079EN – 800G BERT with Noise injection

23-29 GBaud and 46-58 GBaud PAM4/NRZ

Gray coding & polarity inversion

Independent control of inner eye levels

Pre- and post-emphasis FFE taps

Real Hardware KP and KR FEC

Integrated Crosstalk Noise, available on a per lane basis

ThunderBERT: fast, responsive and user-friendly GUI

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Page 17: 800G Product Roadmap - MultiLane

Host Characterization

ML4079EN – 800G BERT with Noise injection

Noise injection: Continuous interference

Burst crosstalk

Single shot noise

Shallow loopback testing: Loop FEC, PRBS or idle traffic

Re-transmission to the host

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Page 18: 800G Product Roadmap - MultiLane

Host Characterization

Passive Loopback Overview

Support of all key MSAs

Industrial temperature range available: -40 to 85 C (-IND)

Smart Loopback line Program MSA memory pages

Control & alarm signals

Real-time diagnostics

Highly customizable Part number

Location and magnitude of thermal loads

Register content across memory map pages

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Page 19: 800G Product Roadmap - MultiLane

Suitable for: System testing

Thermal validation

SI validation

CMIS compliance

Host Characterization

Passive Loopback Lineup

Part Number Form Factor Description

ML4062-LB-112 QSFP-DD Type 1 8x112GEL loopback with 16 W programmable power dissipation, optimized SI and MSA-compliant EEProm

ML4062-LB2a-112 QSFP-DD Type 2A 8x112GEL loopback with 30 W programmable power dissipation, optimized SI and MSA-compliant EEProm

ML4064-LB-112 OSFP 8x112GEL loopback with 17.5 W/24 W/30 W programmable power dissipation, optimized SI and MSA-compliant EEProm

Passive loopback test coverage of 8x112GEL is limited due to added insertion loss

Active loopbacks are necessary to realize full test coverage of 8x112GEL ports19

Page 20: 800G Product Roadmap - MultiLane

Host Characterization

Active Loopback

Introducing retimer + equalizer into loopback design

CR Stress Mode (Emulate DAC RX signal to ASIC)

Pre-defined TX/RX EQ for variety of profiles

Supports 8x 25, 26 and 53 GBd NRZ/PAM4

CMIS compliant interface

Pattern generation and detection

Gray coding and polarity flipping

S21 and ILD extraction

Suitable for: Host ports

SI testing

Port margin testing

TX

RX

I2C

CNT/ALM

Retimer + Equalizer

UC

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Page 21: 800G Product Roadmap - MultiLane

CMIS Test Suite

Validate host/module implementation of Common Management Interface Specification

Certify that parameters like optic DOM and ID, errors and alarms are monitored correctly on host

Pass/Fail state machine test - see top right

Monitor and save I2C transactions between host and pluggable

Force host alarms (high/low/tri-state)

Enable versatile CMIS testing in three modes:

1) Master mode: Analyzer behaves as a host for a module DUT

2) Slave mode: Analyzer behaves as a module for a Switch DUT

3) Bypass/Sniffer mode: Analyzer reports on communication between module and switch

Learn more by visiting our website

Using ML4066 Analyzer

(1) (2) (3)

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Page 22: 800G Product Roadmap - MultiLane

RF Cables

26.5, 40, 50, 67 GHz bandwidth

Single phase-stable cables, or phase matched cable pairs

Phase-matched cable groups (4, 8, 16, 32) also available

Minimal attenuation and signal distortion

Test instrumentation connection to DUT evaluation boards

Connecting test fixtures to instruments

SMA (3.5), 2.92, 2.4, or 1.85 mm available

Maximum intrapair skew of 1ps

High Bandwidth RF Coax Cables

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Page 23: 800G Product Roadmap - MultiLane

112G Channel Emulation Board

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ML4063-24-112 Channel Board with a range of insertion loss targets at 26

GHz (Nyquist for 112G PAM4)

Characterize equalization capability of active DUT designs

Leverage up to 24 dB of ISI loss via 2 dB increments

Terminated by 2.4 mm precise connectors

Page 24: 800G Product Roadmap - MultiLane

At-Speed Production Testing on ATE

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32x112 GEL BERTs and SCOPEs fully integrated into Advantest’s V93000

Multilane high-speed instruments are routed to the DUT board through blind mate RF cables

Inside V93000 test head

Shortest cabling to DUT

32 synchronized lanes

56 GBd NRZ & PAM4

Smartest Software API’s

Multisite ready

Direct Docking

At-Speed Wafer sort testing

At-Speed Package testing

BERTs

SCOPEs

11

2 G

EL

11

2 G

EL

Blindmate

Page 25: 800G Product Roadmap - MultiLane

THANK YOU