55:036 embedded systems and systems software spring, 2011 final exam...
TRANSCRIPT
55:036
Embedded Systems and Systems Software
Spring, 2011
FINAL EXAM
________________|_______________
last name first name
Notes:
This is an open-book, open-notes exam
Be sure to write legibly and clearly mark your
answers
Show your work for partial credit
Total = 131 points
Maximum score = 125 points
1
Question 1. Complete the following glossary of terminology encountered in this course. Write
a single phrase/sentence rather than detailed explanations. (1 point each)
ALU Arithmetic Logic Unit
PID
UART
USART
Dekker’s
Algorithm
Mutex
Atomic
Operation
RTOS
FIFO
RMA
RTC
SecureCRT®
TWI
SOC (Batteries)
MISO
2
Question 2. (6 points) Explain what is the difference between synchronous and asynchronous
serial communication. Address the issue of which transfer is inherently faster.
Question 3. (3 points) In the table below, fill in “asynchronous” or “synchronous” as
appropriate.
Type of Communication
RS232 Asynchronous
SPI Synchronous
I2C Synchronous
Question 4. (1 point) Explain briefly (one/two sentences) the terms “mark” and “space” with
respect to RS232 communications.
These terms refer to the state of the communication line. “Mark” is – 15 V, −5 V or −3 V
depending the RS232 variant. “Space” is +15 V, +5 V or +3 V. RS232 uses negative logic:
logic “1” is a mark on the Rx/Tx line and a logic “0” is a space on the Rx/Tx line. The idle state
is mark.
3
Question 5. (5 points) An ATmega88PA controller uses an external 3.6864 MHz clock that is
internally divided (using the CLKDIV option) by 8. What values should one load into
UBRR0H:UBRR0L for proper operation of a 9600 8N1, serial communications link?
Answer From the ATmega88PA documentation:
𝐵𝐴𝑈𝐷 =𝑓𝑂𝑆𝐶
16(𝑈𝐵𝑅𝑅𝑛 + 1) 𝑈𝐵𝑅𝑅𝑛 =
𝑓𝑂𝑆𝐶
16 × 𝐵𝐴𝑈𝐷− 1
The effective clock frequency is (3.68642 × 106) 8 = 460,800 ⁄ Hz. Thus
𝑈𝐵𝑅𝑅0 =460,800
16 × 9600− 1 = 2
which means one should load 0:2 into UBRR0H:UBRR0L.
Question 6. (5 points) Consider the serial (RS232) communication routine below, which uses
the ATmega88’s USART hardware and polling to transmit a NULL-terminated string. The
routine works reliably in an engineer’s embedded application, until she turns on interrupts to
service the INT0 interrupt. Explain what is going on, and provide a solution.
void usart_print(const char *ptr){
// Send NULL-terminated data from SRAM.
// Uses polling (and it blocks).
while(*ptr) {
while (!( UCSR0A & (1<<UDRE0)))
;
UDR0 = *(ptr++);
}
}
Answer: The statement: UDR0 = *(ptr++); is causing the problem. While this is a single C
statement, it will compile to 10 or more assembly language statements. If the INT0 (or any
interrupt) fires during the sequence, then the bit timing of the characters that the USART is
generating, may be compromised ,which could confuse the serial receiver. The other C
statements will also compile to several assembly language statements, but delays here are not
problematic. A solution is to bracket the statement with cli and sei instructions:
:
cli(); // Disable off interrupts
UDR0 = *(ptr++);
sei(); // Enable interrupts
:
4
Question 7. (2 points) Provide a C (gcc) code snippet that declares and initializes a string msg
with the contents “Slide Card”. Make sure the string is in Flash memory.
Answer:
const char msg[] PROGMEM = “Slide Card”;
Question 8. ( 1 point) What is the duration of a bit in RS232 serial communication with the
following parameters: 19,200 7N1?
Answer: The bit duration is 1 19,200 = 52 𝜇s⁄
Question 9. (2 points) Explain in a short paragraph what is a “NACK” when discussing I2C.
Answer:
5
Question 10. (10 points) An embedded system engineer’s supervisor assigns him the
following task: explore two options to reduce the power consumption of a 5-V, 10-MHz
embedded system by 45% or more. The first option is reducing the clock to 4 MHz, since this
will still leave enough cycles available for the system to perform properly. The second option is
to convert the system to a 3.3 V system.
Explore each of these options, estimating the possible power savings, and comment on the
downside/pitfalls of each option.
Hint: start with the simple mathematical model for power consumption covered in the lectures.
Solution
A model for the power consumption of a microcontroller is
𝑃 = 𝛼𝐶𝑉2𝑓
where 𝑓 is the operating frequency and 𝑉2 is the operating voltage, 𝐶 represents the total
capacitance of all the microcontroller’s gates, and 𝛼 the faction of active gates. Since not other
information is available, we will assume 𝛼𝐶 is fixed.
Option 1 If the embedded system is converted to a 3.3-V system while keeping the 10 MHz
clock, the new system could conceivably consume
(3.3
5)
2
= 0.44 = 44%
of the power of the 5-V system. The downside of switching from a 5-V system to a 3.3 V system
is that one may need additional hardware to interface with peripherals (i.e., logic – and analog
level translators), as well as a new 3.3-V power supply.
Option 2 Converting the embedded system to a 4-MHz will give a 40% saving in power, since
power consumption is proportional to the clock frequency. However, even though the controller
has enough cycles to perform properly, the code may contain cycle wasting (loops, nops, …)
timing sections. Reducing the clock to 4 MHz may cause the system to malfunction because of
these sections. These failures may be very subtle and hard to detect and one should carefully
scrutinize the code.
6
Question 11. (5 points) An embedded systems programmer finds that the following ISR is
extremely slow. Explain in 3–5 sentences what the cause is.
my_isr()
{
save_registers();
disable_interrupts();
y = getADC(1); /* measure voltage on ADC channel 1 */
printf(“%3d”,y); /* send value to PC over serial link
*/
enable_interrupts()
restore_registers();
}
Answer:
On the surface, the ISR seems short and robust. The reason it is slow, is the printf statement.
The printf statement is a large, complex, and slow function. Consequently, the single
printf statement represents a large number of assembly language statements that takes many
cycles to complete.
Question 12. (5 points) Explain, by writing a sentence or two and providing a code snippet,
how one can use WinAVR/gcc’s stdio libraries to implement a routine that will convert a string
to its corresponding number. For example, convert the string “123.2” to the number 123.3.
What are two disadvantages of this method?
Answer:
A simple method is to use the C language string scan function, namely sscanf. For example,
assuming the string is in a variable str, the following will convert and place the result in a
variable n:
float n;
:
sscanf(str,“%f”,&n);
The sscanf function is large and complex, which leads to the two advantages of this method,
namely, it is slow, and the amount of code the compiler will include will be large.
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Question 13. (10 points) Consider a battery-operated consumer electronics device that uses an
embedded microcontroller that will accept 2.7–5.5 V power. The device can also be powered
from a power supply that plugs into a mains outlet. Consumers’ expectation is that the
switchover between battery- and mains power is transparent. That is, the instant a user inserts
the power supply connector, the device switches to the power supply, and the instant the user
unplugs the device, it switches to battery power.
Draw a block diagram/schematic that shows how to implement this functionality using diode(s),
linear regulator(s), battery, etc. Explain how the circuit works. Provide as much details as you
can. For example, specify the type of diodes, indicate voltages on the diagram, include critical
capacitors, and so on. You can assume that unregulated 9 V dc power is available.
Answer:
8
Question 14. The table below shows the periods and worst-case execution times for two
periodic real-time tasks.
Task Period Duration
1 60 30
2 100 35
(a) Determine the processor utilization.
(b) Using the result from (a), explain whether one can or cannot properly schedule these tasks.
(3 points each)
Answer:
Part (a) The processor utilization is
𝑈 =𝐶1
𝑇1+
𝐶2
𝑇2=
30
60+
35
100= 0.85 = 85%
Part (b) The processor utilization is less than 100% but this is a necessary but not sufficient
condition for scheduling. Without knowledge of the task deadlines one cannot determine if one
can schedule the tasks.
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Question 15. (20 points) Consider a set of three periodic real-time tasks with period and
duration as shown below. (Assume that the deadlines are equal to the periods.) These are to be
preemptively scheduled using rate-monotonic scheduling.
Task Period (ms) Duration (ms)
A 6 2
B 20 3
C 9 2
On the diagram below, show a possible execution schedule for the three tasks using rate-
monotonic scheduling over a 40 ms interval. Note that task A will execute 7 times during this
interval, task B will execute twice, and task C will execute 5 times. Denote the task executions
as A1–A7, B1–B2, and C1–C5. Be sure to show accurate timings on your diagram and clearly
indicate where preemptions (if any) occur.
Hint: use different styles of hatching and shading to indicate the different tasks, for example:
Answer
10
Question 16. (10 points) A preemptive task switcher on an embedded controller switches
between task1 and task2 below. The routines access a shared variable N that has initial value
N = 3.
shared int N = 3;
task1() {
N = N + 1;
print N;
}
task2() {
N = N + 1;
print N;
}
Depending on when context switches occur, one scenario is that task1 and then task2
increments N. Alternatively, task2 can increment first, followed by task1. These are labeled
as A and B in the table below, along with the expected result, namely N = 5, since each task
increments N.
The table also shows cases C and D, where despite the fact that the scheduler runs both tasks, N’s
value is 4 rather than 5. Explain how this can happen. Note, this is a 10-point question, so you
must provide sufficient amount of detail.
Order Result
A task1(), task2() 5
B task2(), task1() 5
C task1(), task2() 4
D task1(), task2() 4
Answer: The key statement that is causing the undesired behavior is N = N + 1. Even though
this is a single statement, the compiler generates several assembly language statement and the C
statement is NOT atomic.
11
Question 17. (5 points) Assume a 1-byte variable called FLAG has been defined. Specific bits
of FLAG are used to pass information from any one of several ISRs back to the mainline code to
indicate that its interrupt event has occurred and that the mainline code can take action
accordingly, and then clear the specific FLAG bit. Multiple ISRs and the mainline code therefore
access and change FLAG. Why do the accesses and changes in the mainline code of this shared
resource NOT constitute a critical region?
Answer
Thinking of FLAG as an array of 8 bits it is clear that individual bits are not shared between ISRs
and are therefore not a shared resource. The following code will provide the same functionality
unsigned char FLAG[8]
where each of FLAG[0], FLAG[1], …, FLAG[7] are accessed by a single ISR. However this
would be less space-efficient compared to treating FLAG as an bit array.
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Question 18. (5 points) Explain, by giving an example, why critical damping (that is, no
overshoot) is an essential requirement in many industrial control systems. Expanding on your
example, explain how you would guard against overshoot.
Answer:
Question 19. (6 points) An engineer designs an AVR-based PID controller for maintaining the
water level in an open tank. Unfortunately, the engineer does not have a plant model, so she had
to make assumptions about reasonable values for the P, I, and D gain constants.
(a) After deploying her controller, she found the water level in the tank was too low. How
should she adjust P, or I, or D (or their combinations) to address the problem?
(b) On the other hand, if she found that the water level in the tank was too high, how should she
adjust P, or I, or D (or their combinations) to address this problem?
Answer:
Either case (water level too high and water level too low) is a tracking error. She should increase
the I and P constants. If this leads to oscillation, she can increase I only. If this still leads to
oscillation, she could decrease P and D.
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Question 20. (10 points) Consider a PID controller that uses the previous 5 error values for the
“I” and the 2 previous error values for the “𝐷”, and has P = 0.1, I = 0.5, D = 0.1. Use the table
below and determine the next actuator output (u27).
t … 20 21 22 23 24 25 26 27 …
et … 10 11 10 9 7 4 5 ? …
Answer:
For (discrete) PID control that use the 5 previous error values for 𝐼 and the two previous error
values for 𝐷, we have
𝑢𝑡+1 = 𝑃𝑒𝑡 + 𝐼(𝑒𝑡 + 𝑒𝑡−1 + 𝑒𝑡−3 + 𝑒𝑡−4 + 𝑒𝑡−5) + 𝐷(𝑒𝑡 − 𝑒𝑡−1)
Thus, with 𝑡 = 26 and the next actuator output at 𝑡 = 27 is
𝑢27 = (0.1)(5) + 0.5(5 + 4 + 7 + 9 + 10) + (0.1)(5 − 4) = 0.5 + 17.5 + 0.1 = 18.1
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Appendix
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