51mp6200dtrainingmanual[1]
TRANSCRIPT
Philips Consumer Electronics North America64 Perimeter Center EastAtlanta, GA 30346
EBJ1.0U RA TV CHASSIS
TECHNICAL TRAINING MANUAL
Table of Contents
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1Board Level Repair . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7Troubleshooting Flow Charts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9Circuit Board Locations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9Video Signal Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12MSB Video Signal Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14CRT Panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16Audio Signal Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17Audio Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17Fixed level output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21Audio Shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21Horizontal Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24Vertical Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24High Voltage and Dynamic Focus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25Sweep Failure Detection and Blanking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28AC Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30Standby Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30Main Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32MSB Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35SSB DC-DC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36Convergence Processor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38Convergence Horizontal output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38Convergence Vertical output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38SSB System Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42MSB System Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .44Service Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45Disassembly . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .54
Introduction
The EBJ1.0 chassis is designed for introduction in the 2006 model year. This chassis uses afully integrated tuning system capable of tuning both NTSC and ATSC channels. The HDTVtuner can decode both terrestrial 8VSB and unscrambled cable (64/256 QAM) signals. Thechassis uses a scaled down version of the BP and BL chassis from 2005. These sets comein a 51 and 60 inch screen sizes.
Models
51MP6200D/37 51 inch51PP9200D/37 51 inch60PP9200D/37 60 inch
Features
Supported Display Resolutions
Resolution Refresh Rate
1080i 60Hz480i 60Hz480p 60Hz720p 60Hz
Regardless of the input, the picture will be displayed in a 1080iformat.
Sound
Sound output power 2 x 10WSound Enhancement Auto Volume Leveller,
balance, Treble, Bass controlsSound System AC-3 Dolby Digital Decoding
Connectivity (Figure 1)
AV1 CVBS in, HDMI, CVIAV2 CVBS, Component Video inAV3 S-Video, Y/C, CVBS inSide CVBS in, Y/COutput Rear Audio L/R outAudio out Digital SPDIF
The EBJ1.0 chassis has a 208 point convergence system to provide the best picturealignment possible.
FIGURE 1 - JACK PANEL
Page 1
My Content button selects between the TVand the contents of the USB Memory.
SAM (Service Alignment Mode) Press 0 6 25 9 6 Info
Colored buttons are necessary toprogram the set and to enter theservice alignment mode.
Page 2
Transporting the TV or magnetic fields in the room where the TV is located may cause thethree picture tubes to become misaligned. A Multi-Point convergence is present in the cus-tomer menu to adjust for minor changes. This is accomplished by adjusted 35 points on theTV screen using the Convergence section inthe Picture menu.
After inserting a USB Memory device into the sidejack panel, this menu will appear. Picture files inthe *.JPG format stored on the USB Memory canbe viewed. MP3 files can also be played. (Figure2)
Press the “My Content” button on the remote toselect the USB port.
If it should become necessary to update software inthe set, the new software can be placed on theUSB Memory. (Figure 3) If the software is laterthan the version in the set, it will automaticallyload. The latest software can be found atwww.philips.com/usasupport.
The current software version of the set can befound in the Settings\Installation\Softwareupgrade\Current software info menu.
After downloading the software, rename it to“autorun.upg” and copy it to the root directory ofthe USB Memory. Turn the TV Off and insert theMemory. Turn the TV On. The TV will automati-cally go to the upgrade mode. (Figure 4) After afew seconds, it will display the status of theupgrade procedure.
Manual Upgrade
To reload the present software version or aprevious version, select Settings\Installation\soft-ware upgrade” in the menu. (Figure 5)
Load the “autorun.upg” file in a directory called“Upgrades” on the USB Memory.
For additional information refer to the Directionsfor Use supplied with the set. To download theDFU, go to the Philips support site.
FIGURE 2
FIGURE 3
FIGURE 4
FIGURE 5
Page 3
Screen FormatsFigure 6
There are sevenscreen formats avail-able when viewing anAnalog (NTSC) orDigital (ATSC) signalbeing transmitted inthe StandardDefinition (SD)format. Notice that insome of theseformats, not all of thepicture is visible.
There are two screenformats availablewhen viewing aDigital (ATSC) signaltransmitted in the HDHigh Definition for-mat. The two formats available in withATSC are Automatic and Wide Screen.In Automatic the screen will expand tofill the screen regardless of the formatbeing transmitted. In the Wide Screenmode, the broadcast station may besending the signal with black bars oneach side.
Weak Channel (Figure 7)
As in previous sets with ATSC tuning,a Weak Channel Installation selectionis available when tuning terrestrial sig-nals. During setup these are programmed when the antenna selection is made. Thisselection provides a signal level indicator when tuning additional channels as the antenna isturned.
This selection is not available when tuning in the cable mode.
FIGURE 6
FIGURE 7
Page 4
Manual convergence
Clock
Preferences
Source
Convergence
Settings
Setup 4 Convergence
Convergence redManual convergence
Convergence blue
Multipoint red
Multipoint blue
Save multipoint
Save undo multipoint
Restore factory
Settings | Setup
Convergence Manual convergence 7
Convergence red
Convergence blue
Multipoint red
Multipoint blue
Save multipoint
Save undo multipoint
Restore factory
Start now
Settings | Setup
Manual convergence 7Manual convergence
Manual convergence 7Multipoint red
Settings | Setup | Convergence
Multipoint red
Convergence blue
Multipoint red
Convergence red
Save multipoint
Save undo multipoint
Restore factory
Start now
Customer Convergence (Figure 8)
A rear projection television has three tubes,Red, Green and Blue with the pictures of eachconverged with each other to display a perfectlyaligned picture on the screen. An electronicconvergence system provides the correctionsignals to keep the beams perfectly aligned.These beams are aligned at the factory toproduce a converged picture. When the set ismoved, subjected to mechanical stress orplaced in an area where the magnetic field maychange will cause the beams to mis-align.
Customer adjustments are available to thecustomer to make minor corrections in case thebeams become mis-aligned.
The customer can make multi-point adjustments oradjust just the picture center. (Figure 9) Thecustomer can select one center cross or a 35 pointadjustment.
Figure 10
Using the Info button on the remote, the customercan switch between Navigate or Adjust.
When in the Navigate mode, use the cursor buttonsto select the desired location to adjust.
When in the adjust mode, use the cursor buttons toalign the colors.
A map showing the customer menus is shown in figure 11.
FIGURE 8
FIGURE 9
FIGURE 10
Page 5
TV SETU
PIN
STAL
LATI
ON
DEM
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CON
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FIGURE 11 - CUSTOMER MENU MAPPage 6
Board Level Circuit Explanation (Figure 12)
The EBJ1.0 is designed for module level replacement. However if circumstances shoulddictate, component level repair is possible.
The chassis has three main boards, SSB, MSB, and LSB. There is also an LED Keyboardpanel, a Side Jack panel, a Constant Level Audio output panel, and three CRT panels.
The SSB (Small Signal Board) performs set control, video processing, audio processing, andaudio amplification. All of the AV inputs except those located on the Side Jack panel arelocated on the SSB. The SSB uses large scale circuit integration using BGAs and surfacemounted components. Special soldering equipment is required to perform component levelrepair on this board. The NTSC/ATSC turner is also located on the SSB.
The MSB (Main Signal Board) interfaces with the SSB. Some power switching functions areperformed on this panel. Output video processing and CRT drives are located on this board.The convergence processor and outputs are located on this panel. A separate microproces-sor located on this panel performs the control functions for this and the LSB. An NVM islocated on this panel which stores the convergence, geometry, and white drive settings. Thisprocessor is controlled by the SSB.
The LSB (Large Signal Board) has the standby power supply, main power supply, horizontaldrive, vertical drive, and high voltage circuits. In standby, only the standby supply is operat-ing. When the set is switched On, all the other circuits are switched On.
Troubleshooting
Dead Set
When AC power is applied to the set, 5 volts should be present on Pin 1 of 1504 on the LSB.If this voltage is not present, the LSB (Large Signal Board) should be repaired or replaced.Next, check the 5 volt supply on Pin 4 of connector 1523 on the MSB. This is the standbyvoltage for the SSB. If the circuits on the SSB are working correctly, the Standby line on Pin11 of 1J02 on the SSB or 1523 on the MSB should be High. When the power button ispressed on the front keyboard or the remote, this line should go Low. If not, the SSB shouldbe repaired or replaced.
When the Standby line goes Low on the SSB, the main power supply located on the LSBshould turn On. If the main supply does not switch On, check Pin 12 of 1504 on the LSB. Ifthis point does not go Low, check connections on the MSB.
If all of the supplies have switched On, the High voltage on the LSB should turn On. Thisvoltage is developed by the HVG (High Voltage Generator) on the LSB. Horizontal (line) andVertical (frame) drive is generated on the MSB and fed to the LSB. If either of these drivesare missing, the HVG will not turn On. These drives can only be checked with an oscillo-scope.
Page 7
1 2 3 4 5 6 7 8 9 10 11 12 13
8 12 1310 1194 6 752 31N
CN
CN
C+5
V2+5
V2G
ND
GN
DG
ND
+12V
+12V
STAN
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NC
NC
1J02
1523
1D50
RXD
8 109N
CTX
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D4 6 75
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HD
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8
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1094 6 752 31
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1516
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1517
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119 107 85 63 41 2
86 74 52 31G
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1M36
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FQ02
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654321
42 31
1M60
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3 41 2
1740
LEFT
RIG
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HVG
FOCU
S
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EHT
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S
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S
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E
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EL
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GRE
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TO 1
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1201
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SSB
MSB
LSB
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3 41 2
GN
DL-
HD
PHR-
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PH
123
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1526
1003
1001
GN
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VG
ND
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D
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CON
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TOR
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M L
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SSB
1M02
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1M36
1M60
1M21
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1740
B8B
B1B
B4G
B3A
B5A
B5F
B5F
B8B
1517
1553
1504
1801
1802
1803
1809
1904
1910
E1 E1 E2 E3 E3 E3 E3 E4 E4
LSB
1516
1526
1519
1523
1720
1710
1702
1620
1721
M1
M1
M1
M1
M3
M3
M3
M3
M3
MSB
1003
1001
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0712
1012
0212
1212
17
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1214
1103
K K13
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CON
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N
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CON
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1204
1204
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BLU
E G
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TO 1
204
RED
CRT
PAN
EL
TO 1
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GRE
EN C
RT P
ANEL
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BLU
E CR
T PA
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FIGURE 12 - WIRING INTERCONNECT DIAGRAMPage 8
NO PICTURE
IS THE POWER LEDBLINKING?
DOES THE POWER LED TURNON WHEN THE POWERBUTTON IS PRESSED?
NO
SELECT A CHANNEL ANDSELECT AN ACTIVE
CHANNEL USING THEREMOTE KEYPAD. TURN
THE VOLUME UP.
YES
IS AUDIOPRESENT? AYES
IS +5V DCPRESENT ON PIN 1
OF 1504 ON THELSB?
NO
IS 115V ACPRESENT ON 1505
ON THE LSB?
NO
CHECK THE AC POWERCORD NO
REPAIR OR REPLACETHE LSB
YES
IS +5V DCPRESENT ON PIN 4
OF 1523 ON THEMSB?
YES CHECK CONNECTIONSON MSBNO
DOES PIN 11 OF1523 ON THE MSB GO LOW
WHEN THE POWER BUTTONIS PRESSED?
YES
B YES
YES
DOES PIN 2 OF 1M01 ON THE SSBCHANGE WHEN THE POWER BUTTON
IS PRESSED?
NO
REPAIR OR REPLACESSB
YES
IS > 3 VOLTS PRESENT ON PIN 2OF 1M01 ON THE SSB? NO
REPAIR OR REPLACE SSB
NO
CHECK KEYBOARDAND REMOTE
RECEIVER
YES
REPLACE SSBNO
REPAIR OR REPLACESSB
TROUBLESHOOTING FLOW CHART PART 1 Page 9
IS APPROXIMATELY 200 VOLTS PRESENTON 1204 ON THE CRT BOARD?
IS RGB DRIVE PRESENT ON PINS 1, 2,AND 3 ON 1612 OF MSB.
YES
YES
A
REPAIR OR REPLACELSB
NO
REPAIR OR REPLACESSB
NO
REPAIR OR REPLACEMSB
B ERROR 1, 2, 3, 4, 5,6, 8, 9, 14, OR 11
REPAIR OR REPLACETHE SSB
YES
ERROR 12
NO
ERROR 13
NO
ERROR 62
NO
ERROR 61
ERROR 68
NO
NO
SSB
NO
IS HORIZONTAL DRIVEPRESENT ON PIN 9 OF 1910
ON LSB?
YES
MSB
NO
LSB
YES
IS VERTICAL DRIVE PRESENTON PIN 3 OF 1910 ON LSB?
MSB
LSB
NO
YES YESMSB
YES
IS +18 AND -18 VOLTSPRESENT ON CONNECTOR
1517 ON LSB?
YES
LSB
NO
SSB
YES
IS +12 VOLTS PRESENT ON PIN 9OF 1523 ON MSB WHEN THE
STANDBY LINE IS PULLED LOW?
YES
SSB
YES
IS +12 VOLTSPRESENT ON PIN 10 OF 1504
ON LSB WHEN THE STBY LINEIS PULLED LOW?
NOLSB
NO
MSB
YES
Page 10 TROUBLESHOOTING FLOW CHART PART 2
SSB MSB
CONSTANT LEVELOUT
LSB
RED CRT
CIRCUIT BOARD LOCATIONS Page 11
GREEN CRT BLUE CRT
Video Signal Flow
SSB Video Signal Flow (Figure 13)
The SSB tuner tunes both NTSC and ATSC channels. On the ATSC side, both terrestrial8VSB and unscrambled Cable QAM signals are tuned. The Tuner is powered by the+5VTUN voltage which is derived from the +12SW voltage.
If the selected channel is analog, IF is output on Pin 9 to 1A10, Saw Filter, and then to 7A00.IC 7A00 has the Video IF Demodulator. Composite video is output on Pin 120 and then sentto an internal AV switch via Pin 123. The AV switch selects between the composite videofrom the tuner or from one of the AV inputs. The selected composite video or YC is fed toone of two A/D converters. This signal is not broken into components as is done in a digitaltransmission. The signal is converted from analog to digital as is. If the signal is YC, it isoutput on DLINK1. Composite video is output on DLINK3. The signal is fed to IC 7J00, AVIP.If the signal is from a YC source, it is fed to a multiplexer and output on DV3. If the signal iscomposite video, it is fed to the internal Columbus circuit. The Columbus is a 3D digital combfilter. The 3D comb processes the whole frame instead of two lines at a time as in previouscomb filters. This results in a sharper picture without cross luminance or cross color.
The AVIP converts the video to a YUV format. It is then output on the DV3 data line to 7V00,Viper.
The YUV video is fed to a Switch and video processor in the Viper which rescales the videoto fit the screen. A memory controller interfaces with two SDRAM ICs 7V01 and 7V02 whichstores the video frames as they are being processed. In the case of LCD and Plasma sets,the video is converted to a progressive scan format. In the case where this SSB is used in aPTV, the video is converted to a 1080i format. Video is output from the Viper on three 8 bitdata lines to 7G40, D/A converter. The analog 1080i signal is then fed to the MSB in aRGB+HV format.
Component video signals, 480i, 480p, 720p, and 1080i is fed to 7B50, HDMI processor. ThisIC performs a A/D conversion before feeding the signal to the AVIP on the DV4 and DV5 datalines. The HDMI signal is also fed to this IC which separates the video part of the data beforefeeding it to the AVIP on DV4 and DV5.
If the customer selects an ATSC channel, the ATSC IF signal is output from the tuner on Pins14 and 15. The signal is fed to a 44 Mhz SAW filter 1T01 and IF amplifier 7T13. The signalis then fed to the ATSC decoder 7T22. The ATSC decoder captures the compressed datastream and outputs it on a 8 bit data line, DVIF. This signal is then fed to the Viper forprocessing. The Viper then rescales the video to fit the screen.
Page 12
DVI
F-8B
QAM
8VSB
DEC
ADC
7T22
ATSC
DEC
44M
SAW
91 90
11 28 914 15
14117
04TU
NER
7 8
7 8
4342
+12S
W3T
20 47
3T10 47
7510
7T10
5T11
SAW
45.7
5
1T01 1A
10
12
123
126
AV1_
CVBS
AV2-
Y_CV
BS
AV2-
C
FRO
NT-
Y_CV
BS
FRO
NT
C
107
108
120
4
7 8VI
FD
EMO
D
A
D
A
D
Y/CV
BS
C CVBS
AV3
AV2
7A11
AV7_
Y-CV
BSAV
1
5 15 8 9
SID
E JP
AV SW
Y PB PR Y1 PB1
PR1
AV2
AV1
SW HD
MI
REC
VID
EOO
UTP
UT
FORM
AT
AD
+5VT
UN
2 3
7 6
7T13
IF A
MP
1
+5VT
UN
I2C-
SDA-
TUN
ER
I2C-
SCL-
TUN
ER
SDA-
DM
A
SCL-
DM
A
81 68 96 79 66 94
7B50
HD
MI
HD
MI
7A00
PNX3
000
MPI
F
7J00
PNX2
015
AVIP
LVD
S_TX
DV4
DV5
VID
EOIN
PUT
PRO
CESS
OR
COLU
MBU
SCO
MB
FILT
ER
DV3
DLI
NK1
DLI
NK3
7L50
DD
R SD
RAM
VID
EOSW PR
OCE
SSO
R
MEM
ORY
CON
TRO
LLER
7V01
SD R
AM 1
7V02
SD R
AM 2
7V00
VIPE
RVI
DEO
SCAL
ERPN
X855
0
VID
EOO
UTP
UT
1M36
2 4
MUX
DV3
F28
F27
MP-
OU
T-VS
MP-
OU
T-H
S
AV-R
OU
T
AV-G
OU
T
AV-B
OU
T
1D50
DV-
OU
T-VS
DV-
OU
T-H
S
34 32 28
7G40
DAC
DV-
R
DV-
G
DV-
B
TO M
SB
B04G
B06
B05C
B05B
B07A
B07B
B07CB0
7C
B02A
B02B
B03A
B03C
B04B
FIGURE 13 - SSB VIDEO SIGNAL FLOW Page 13
Main Signal Board Video Signal Flow (Figure 14)
Red, Green, and Blue drive from the SSB is fed to Pins 30, 31, and 32 of 7600. The signal isfed to the RGB insertion circuits where the OSD is inserted. The signal is then fed to a WhitePoint circuit and then to the Output Amplifier. The White Point and Output Amplifier have theDrive controls and Cutoff controls. Input from the ABL line on Pin 43 makes adjustments inthe brightness levels to adjust for changes in beam current. The AKB pulses from the CRTsare fed to Pin 44 to the Cathode Calibration circuit. The Cathode Calibration circuit adjuststhe cutoff levels of the CRTs to maintain the correct gray-scale tracking. When the set is firstturned On, a calibration pulse is output on the RGB lines. The Cathode Calibration circuitmonitors this pulse on the AKB line to set the Black level and the maximum drive voltage forthe cathode. Once the Calibration has taken place, the Output Amplifier switches to the RGBdrive signal as the output.
Horizontal and Vertical Sync is fed to 7600 on Pins 23 and 24. IC 7600 processes the syncto provide the geometry for the picture. Horizontal drive is output to the sweep circuit on Pin8. Vertical drive is output on Pins 1 and 2. East West drive is output on Pin 3.
Sandcastle (SCO) is output on Pin 9. An internal current sense circuit is internally connectedto this Pin. Transistor 7902, located on the LSB, monitors the -200 volt supply. As long asthe -200-volt supply is present, the resistor divider network keeps 7902 turned Off. If the-200-volt is missing, the +15 volts supply will turn 7902 On. This will mute the Sandcastlesignal on Pin 9 of 7600 causing the IC to blank the RGB drive to the CRT’s. This is toprevent damage to the CRTs in the event that the -200 volt supply should fail.
Horizontal Feedback (HFB) from the collector of the Horizontal Output Transistor is fed intothe Phase Loop to phase correct the Horizontal drive.
IC 7600 is controlled by the GDE Microprocessor on the MSB via the I2C bus on Pins 10 and11. Geometry and Drive settings are stored in the Memory IC located on the MSB.IC 7600 is controlled by the Painter Microprocessor on the SSM via the I2C bus on Pins 10and 11. Geometry and Drive settings are stored in the Memory IC located on the SSM.
Red drive is output on Pin 40 and is buffered by 7702 before being fed to its respective CRTpanel. Green is output on Pin 41 and buffered by 7712 before being fed to its respectiveCRT panel. Blue drive is output on Pin 42 and is fed to a blue stretch circuit consisting oftransistors 7722, 7721, and 7720. IC 7661 is a comparator circuit which compares the com-bined output off the Red and Green with the Blue. If the Blue output is greater, the voltage onthe ABL line will increase causing the overall drive to decrease. This is to prevent the BlueCRT from being excessively driven.
Page 14
RGB/
YUV
MAT
RIX
Y U V
28 27 26 31 3230
SATU
RATI
ON
CON
TRO
LCO
LOR
DIF
FERE
NCE
MAT
RIX
RGB
INSE
RTIO
N
WH
ITE
POIN
TAN
DBR
IGH
TNES
SCO
NTR
OL
BLU
E
OU
TPU
TAM
PLIF
IER
STRE
TCH
BEAM
CURR
ENT
LIM
ITER
CATH
OD
E
STRE
TCH
CAL
CON
T
CLO
CKG
ENER
ATIO
NAN
D
1ST
LOO
P
PHAS
E-2
LOO
PH
ORI
ZON
TAL
OU
TPU
T
H/V
DIV
IDER
RAM
PG
ENER
ATO
RVE
RTIC
ALG
EOM
ETRY
E-W
GEO
MET
RYSO
FTST
ART
2324
VDHD
2021
913
145
81
2
3EW
O
VERT
VERT
HO
UT
FLAS
H
DPC
HFB
SCO
RED
CRT
GRE
EN C
RT
BLU
E CR
T
40 41 42 44 43BC
L(AB
L)
BLKI
N(A
KB)
35363738
REDTXTGRNTXTBLUTXT
TXTFBL
7600
HO
PTD
A933
1H
10 11
SCL
SDA
17
39
+8V
+8V
1 2 3 5 6
RED
GRE
EN
BLU
E HD VD
3630
10 3631
10 3632
10
2630
2631
2632
3624
100
3623
100
FRO
MSS
B1D
50
1612
R G B
3791
100
7702
3756
680
3793
100
+8V
+8V 77
12
3765
680
3790
100
3792
100
+8V
5601 37
8156
077
2177
22
3782
100
3797
1K
+8V
3789
100
772037
7268
0
6644
3784
560
3783
3.3K
5602
+8V
3786
680
7723
3792
180
3787
1.5K
3788
560
3667
47K3668
47K
3662
47K
3795
100
1 2 31702
1710
2 31 31720
1 2
7661
LM39
3 123
4
5 67
8
3751
1.5K 37
5256
0
3660
560
3661
18K
1620
1TO
LSB
1910
6643
3643
100
ABL
+12V
-HO
P
3931
1K
3926
10K 69
02
V-PU
LSE
3930
100
7902
3932
18K
3935
2.2M
3927
2.2M
-200
V
3926
220K
+15V
3933
1039
4010
0K69
068.
2V69
10
3934
4.7K
2907
2908
HO
T-C
2906
LSB
-+-+
FIGURE 14 - MSB VIDEO PROCESSING Page 15
R
G
B
CRT Panel (Figure 15)
The Red, Green, and Blue signals from the HOP panel are fed to their respective CRT panel.The signal is fed to the emitter of 7200 and then to 7202. The output of 7202 is fed to Pin 2of 7201 which drives the cathode of the CRT. AKB drive is output on Pin 7 and fed to theHOP panel.
The CRT circuit is powered by the +200-volt supply from the LSB. If there is a problem inthis circuit, the one resistor, 3217, will open. If this resistor opens, the CRT will have exces-sive drive causing it to go to maximum brightness. This will cause an over current shutdownon the LSB. In normal operation, the G1 voltage will measure approximately minus 20 volts.During blanking, this voltage will go to a minus 200 volts. The Filament voltage will measureapproximately 6 volts DC. If drive is removed to any of the CRT boards, the CRT will bedriven into saturation, causing an over current shutdown.
+8V
+8V
2211
2209
320122
320075
7200
6204
2201 32036.8K
3208100
3213680
32231.5K 3204
100
7202
3209330+8V
32252.2K
3226470
32272.2K
3220100
2207 2204
32241K
3215680
AKB
2210
2
1
3
4
8
7
610
513
12
2203
321222K
2219
+200V
32171
2217
2214+12V
321610
2213
2216
320647
321110K
5202
5203
6201
3218220
FOCUS
CRT
G2321010K
G1
32021.5K
62002218
FIL
22212200
5201
5200
7201TDA6120QCRT AMP
100UF
1n
100n 1n
100uF
1uF
1n 1n
47uF
2.2p
47n
100n1n
100p
6 7
8
4,5
10
FIGURE 15 - CRT PANEL
Page 16
Audio Signal Flow (Figure 16)
All of the audio processing including the amplifier is located on the SSB. The amplifier is aclass D with an output of 10 watts per channel.
If the customer has selected an analog channel, the 4.5 Mhz sound carrier is included withthe video IF output on Pin 9 of the Tuner. The IF is fed to 7A00, MPIF, and to the VideoDemodulator and Audio Demodulator. The baseband audio is fed to an A/D converter and toData Link 3. AV inputs are fed to a switch located in 7A00 and then to one of two A/D con-verters. The audio is then output on Data Link 1 or Data Link 2.
The audio is separated in the AVIP and fed to the Audio processor. The audio processorperforms the following functions:
Master Volume control and Balance5 band equalizerVirtual Dolby processingStereo processingHeadphone volume
Processed audio is output in a I2S format and fed to the Viper. The Viper performs an Audio
Delay based on preset levels in the software. The audio is then fed back to the AVIP wherethe selected signal is fed to a D/A converter and fed to the monitor audio output panel andaudio amplifier.
If the customer has selected an ATSC channel, the audio data is encoded in the data streamwhich is fed to the Viper from the ATSC decoder. The selected data streams are decoded inthe MPEG2 processor and fed to the Audio Delay circuit. The I2S audio is then fed to theAVIP where it is processed and fed to the main audio and headphone amplifiers. The mainaudio is output from the Viper on AB29 to the digital output jack labeled SPDIF.
When the customer selects the HDMI input, the HDMI receiver removes the digital audio fromthe data stream and outputs it to the Viper in a I2S format.
Audio Amplifier (Figure 17)
The audio amplifier consists of two class D 10 watt amplifiers. The amplifiers are powered bya +18 and -18 power supplies. Since the right amplifier is identical, only the left amplifier isshown.
Audio from the AVIP is fed to Pin 11 of 7D10 which is a comparator. Feedback from the out-put is filtered and wave-shaped by an RC network which generates a saw wave. The saw-tooth waveform is applied to Pin 10. When the audio input equals the voltage on the sawwave ramp, Pin 13 will go High. This feeds the drivers, 7D15, 7D16 and 7D17. They thendrive the outputs in 7D18. During muting, the Mute line goes High turning 7D14 On forcing7D17 into saturation, blocking the drive signal. Transistor pack 7D18 is the output for the Left
Page 17
DVI
F-8B
QAM
8VSB
DEC
ADC
7T22
ATSC
DEC
44M
SAW
91 90
11 28 914 15
14117
04TU
NER
7 8
7 8
4342
+12S
W3T
20 47
3T10 47
7510
7T10
5T11
SAW
45.7
5
1T01 1A
10
9
107
108
7 8VI
FD
EMO
D
+5VT
UN
2 3
7 6
7T13
IF A
MP
1
+5VT
UN
I2C-
SDA-
TUN
ER
I2C-
SCL-
TUN
ER
SDA-
DM
A
SCL-
DM
A
VID
EOSW PR
OCE
SSO
R
AUD
IOIF D
EM
AD
DAT
ALI
NK
3
AD
1DAT
ALI
NK
DAT
ALI
NK
2
AD
AUD
IOSW
PRO
CESS
OR
MPE
G2
PRO
CLI
NK
DAT
A
LIN
KD
ATA
PRO
C
LIN
KPR
OC
DAT
A
DIGITAL INPUT CROSSBAR
AD D
A
W3
V4
I2S-MAIN-ND
I2S-MAIN-D
W28
R29
SPD
IF-H
DM
I18
3AA
27
7B50
HD
MI
RECE
IVER
AUD
IOPR
OC
DEL
AY7V00
VIPE
RPN
X855
0AU
DIO
AB29
SPD
IF-O
UT1
7J00
PNX2
015
AVIP
AUD
IOPR
OC
ADAC
1
ADAC
2
AH1
AG1
LEFT
AU
DIO
RIG
HT
AUD
IO
TO A
UD
IO A
MP
7A00
PNX3
000
MPI
F
AV1
AV2
AV3
AUD
IO-IN
-4-R
AUD
IO-IN
-4-L
AUD
IO-IN
1-R
AUD
IO-IN
1-L
AUD
IO-IN
2-R
AUD
IO-IN
2-L
79 80 85 86 83 84
8 6
127
128
AUD
IO-IN
-5-R
AUD
IO-IN
-5-L
SID
E JP
1M36
A
DA
ADAC
8AA
1
DAD
AC7
AB1
LEFT
AU
DIO
TO M
ON
ITO
R AU
DIO
OU
T
RIG
HT
AUD
IO
B04A
TO D
IAG
RAM
B03
E
FIGURE 16 - AUDIO SIGNAL PROCESSINGPage 18
channel.
The base and emitter of Transistor 7D30 is connected to Resistor 3D60. When the currentreaches the point where the base is 0.6 volts less than the emitter, the Transistor will turn On.This overcurrent condition will cause the set to shut down.
Page 19
AUDIO OUTPUTS
+18V
-18V
3D4310
3D4915K
3D5447K 2D55
7D24
ADAC1AUDIO IN 3D50
10K
2D26
3D5615K
7D10-2
11
10
3
12
13
5D16-18V
2D47
3.9K
2D482D45
3D68100K
3D7110K
3D73560
MUTE
2D30
3D81680
3D641.2K
3D39-1
22K
7D14
7D17
3D39-322K
7D16-2
7D16-1
3D7622K
3D44330
7D18-2
7D18-1
7D30
3D600.1
3D343.3K
3D39-222K
3D351.2K
7D15
3D39-422K
3D7722K
CPROT
5D12
2D56
2D59
LEFT-SPEAKER
-18V
+18V
1
2
3
4
5,6
7,8-
+
FIGU
RE
17 - AU
DIO
AM
PLIFIE
RP
age 20
Fixed Level Output (Figure 18)
Since there is no Headphone output on the PTV, this circuit is used for the Fixed LevelOutput. This signal is developed in the AVIP. This signal is fed to Pins 3 and 5 of 7A04.During Power-On, the Reset-Audio line from the Viper goes High which turns Transistors7J01, 7J02, 7A08, 7A15, 7A16 and 7A14 muting the fixed level output.
Audio Shutdown (Figure 19)
The audio circuits are protected against DC voltage on the outputs and overcurrent in theamplifier.
If a DC voltage appears on the speaker lines, positive or negative, the op-amps of 7D10 willswitch On causing Pin 14 or 1 to go Low. This will cause Transistor 7D11-1 to turn Offcausing the Prot-Audio_Supply to go High. Transistor 7D11-2 will turn On, latching the circuit.the High on the Prot-Audio_Supply line will cause the processor to shut the set down. Whenthis circuit latches, it will stay latched until power is removed from the set.
The High on the CPROT line will turn Transistor 7D12-1 On, turning 7D12-2 Off. This willturn On 7D10 causing a shutdown latch as described above. A discussed before, theCPROT line will go High if there is an overcurrent in either the left or right audio amplifiers.
FIXED LEVEL OUTPUT PANEL
Page 21
1
23
4
56
1
2
3
4
5
6
7
8
8
4
3A5127K
2A79
3A30
15K
3A32
27K3A3115K
2A78
+5V
ADAC7
3A2733
3A2833
+5V
3A36
2A84
3A38
15K3A37 27K
27K3A52
15K
ADAC8
2A83
3A3433
3A3333
+5V2STBY
7A153A2410K
3A23100K
+5V2STBY
7A08
3A25680K
3A2647K
2A761uF
6A113L03470K
7J01
7J02-1
7J02-2
3L01100K
3L00100K
3L0210K
+12VSW +5V2STBY
6J07 6J08
7A163A291K
AUDIO-HDPH-L-AP
7A143A351K
AUDIO-HDPH-R-AP
RESET-AUDIOFROMVIPER
7A04-1
7A04-2
B03EB04A
-
+
-
+
FIGU
RE
18 - FIXE
D LE
VE
L OU
TPU
TP
age 22
-9.5V
-18.4V
1
2
3
4
56
1
23
4
5
6
1
23
4
5
6
1
2
3
4
5
6
-17.4V
0V
1.08V
3D14220K
3D17220K
LEFT SPEAKER
RIGHT SPEAKER
+18V
3D1047K
3D132.7K
7D10
8
914
12
3
7
61
3D8922K
3D125.6K
+3V3STBY
6D10
VP
VN
301947K
7D11-2
7D11-1
+3V3STBY
3D125.6K
3D2022K
3D2210K
2D63
PROT-AUDIOSUPPLY
CPROT
-18V3D232.2K
2D70
3D262.2K
7D12-2
7D12-1
-18V
3D4247K
3D251K
+18V
3D8247K
3D8347K
2D51
7D25-1
7D25-2
SOUND-ENABLE
3D8447K
3D8547K
7D25-2
+18
7D26-2 7D26-1
3D8747K
3D8833K
-18V
3D86100K
3D7547K
MUTE
+18
+18
3D1847K
3D214.7K
+18V
6D1127V
3D2410K
2D11
3D1547K
SOUND-ENABLE
-
+
-
+
FIGU
RE
19 - AU
DIO
SH
UTD
OW
NP
age 23
Horizontal Output circuit (Figure 20)
Horizontal drive from the HOP circuit located on the MSB is fed to 7807 on the Large Signalpanel. Transistor 7807 drives the Horizontal Output Transistor 7801, which drives the Yokesand the Horizontal Output Transformer 5801. Transformer 5801 produces a plus and minus13-volt supply for the Vertical Output circuit. Voltage from Pin 7 of 5801 is rectified by 6802to produce the +200-volt supply for the CRTs. Voltage from Pin 5 is rectified by 6801 to pro-duce the Filament voltage. This voltage is filtered by 2804 to provide approximately 6 voltsDC. This circuit is protected by fuse 1801 and resistor 3801. The negative Horizontal pulsefrom Pin 5 feeds the Blanking and Sweep failure detection circuit.
The output of 7807 drives IC 7803 and transistor 7802. This circuit drives the Dynamic Focusand Horizontal Geometry correction. The Horizontal component of the correction drives thereturn side of the Horizontal yokes via the DYN-FOCUS-HIGH and DYN-FOCUS-LOW lines.
Vertical Amplifier (Figure 21)
The Vertical drive from the HOP circuit on the MSB drives the Vertical Output IC 7811. ThisIC is located on the Large Signal panel. Drive is fed to Pin 7 and is output on Pin 5 to drivethe three Vertical Yokes. This IC is powered by the plus and minus 13-volt supplies from theHorizontal Output circuit. A Vertical pulse on Pin 6 is fed to the sweep failure detection cir-cuit. If there is a failure in the Horizontal or Vertical sweep, the High Voltage will be shutdown.
High Voltage and Dynamic Focus drive (Figure 22)
The High Voltage module is an integrated High Voltage supply with its own switching powersupply. When the set is turned On, approximately 10 to 11 volts from the Sweep Failuredetection circuit is fed to diode 6913 and to Pin 8 of the High Voltage module. A supply volt-age of 130 volts is also fed to Pin 10 of the module. The Module then outputs High voltage,Focus voltage, and G2 voltage for the three CRTs.
Output on Pin 4 is rectified by 6917 to produce a negative 200-volt source for the CRT G1voltage. The voltage is also rectified by 6919 to produce a 330-volt source for the DynamicFocus drive. The Dag line along with the output on Pin 2 is connected to 7903 to produce theABL voltage for the set. If an overcurrent condition should develop with the drive, the ABLvoltage will go Low, turning 7905 On, latching 7904, which will remove drive to Pin 8 of theHVG. This will cause the High voltage to shut Off. The DM-INPUT is mixed with the EastWest drive EWO and fed to transistor 7903 which drives 7901. Transistor 7901 drives theDynamic Focus and geometry correction drive which is fed to the return side of the HorizontalYokes via the DYN-FOCUS-LOW and DYN-FOCUS-HIGH connections.
Page 24
HO
UT
3834
47
284638
3547
0
3836
2.2K
6813
10V
780758
08
1 234
2836
3840
4.7K
3839
4.7K
+130
VS
+200
V
2802
22uF
6802
2803
3810
1
3838
1
2835
1500
uF28
21
3809
4.7
7801
HO
T
2817
6810
8 7 5 6 3 1
NEG
-HO
RIZ-
PULS
E28
05
6801
1806
2
2804
470u
F
3801
0.68
FILA
MEN
T
9 10 12 13 14 15 16
3803
1038
021K
6804
4.7V
+130
VS28
07
6803
2808
47uF
DEF
GN
D
HBL
ANK
+30V
_CLA
MP +1
3V
-13V
6805
2811
6806
2814
1805
1
1804
1
2812
1000
uF
2813
1000
uF
6807
6808
5801
HO
RIZ
YOKE
S
DYN
-FO
CUS-
HIG
H
DYN
-FO
CUS-
LOW
DM
INPU
T
VERT
_PAR
ABO
LA
2818
6809
3808
470
5804
3807
47
2815
10uF
5803
2816
+15V
3823
47k28
29
5807
3829
68K
6827
2847
2833
47uF
+30V
_CLA
MP
+15V
+15V
+15V
7803
7802 68
2510
V
3825
100
3824
1.5K
2832
3833
18K
3826
27K
3832
100K
2831
2834
3837
4.7K
470p
10n
1n
100n
560p47
0p
100n
8.2n
22n
2819
430n
470p
1n
470p
470p
470p
470p
3810
1
3816
1
+ -
+ -
FIGURE 20 - HORIZONTAL OUTPUT Page 25
AMPLIFIERPOWER
PROTECTIONTHERMAL
GENERATORFLYBACK
VD0A
VD0B
3812100
282438131.8K
2823
3811100
2822
1
2 3
4
5
6
7
-13V
+13V
68112825100uF
VPULSE
682618V
38152.7K
38652.2K
-13V
38141.8K
38191K
38211.5
38201
38181.5
2828
3804220
3805220
3806220
VERTICALYOKES
VBLANK
7811TDA8177
+
-4.7n
2.2n
4.7n
FIGU
RE
21 - VE
RTIC
AL O
UTP
UT
Page 26
DRI
VER
& CON
TRO
L
IFT &
SPLI
TTER
FOCU
S
HV
23
4
8
9
10
2917
470u
F
5902
130V
HV
6914 29
1669
13
2921
3917
22K
7905
7904 39
1668
029
15
HVG
-ON
6912
2914
2.2u
F
3919
120K
+15V
3920
120k
3923
470
6904
6903
3.9V
3924
27K
3937
4.7
2911
100u
F
6905
4.7V39
3610
ABL
EWO
3925
1K
DM
-INPU
T
2927
3921
470K
6919
3922
10K
2926
3915
2.2K
+15V
6908
7903
6909
3916
10
-13V
+130
VS
3914
1K
3910
5.6K 39
1156
K39
121.
5K
3913
8.2K
2913
2912
10uF
3905
27K
2903
4.7u
F
VERT
-PAR
ABLA
2910
3900
2.7K
3904
22K
2904
7901
+330
V
3903
330K 39
0969
01
DYN
-FO
CUS-
LOW
5901
2901
3901
100
3902
1.5K
DYN
FO
CUS
DYN
-FO
CUS-
HIG
H
3908
22
2919
2922
6917
2924
6916
2920
4.7u
F
2918
2.2u
F
-200
V
+375
V
5904
HVG
2902
2925
10.9
V
11.5
V
3.47
V
2.9V
-12.
7V
100n
100n10
0n
1n
100p
100p
100p
100n
2.2n
100n
4.7n
33n
10n
1900
3907
10019
04
FOCU
S
FOCU
S
6915
G2
G2
G2
1.5K
FIGURE 22 - HIGH VOLTAGE SECTION Page 27
Sweep Failure detection and Blanking (Figure 23)
The Shutdown circuit will shut the High voltage Off if the Horizontal or Vertical Sweep should fail. Itwill also shut the High voltage Off if the Power Fail line goes High or the +200-volt source shouldfail.
The Vertical pulse is fed to zener diodes 6824 and 6814, which keep capacitor 2837 charged.This pulse is rectified by 6815 to keep the base of 7808 at a negative voltage. This keeps thetransistor turned Off. In the same manner, the Negative Horizontal pulses keep the base of7810 at a negative voltage to keep it turned Off. The Protect line is normally Low, keeping7809 turned Off. The +200-volt source is fed through zener diodes 6812 and 6816, resistor3850, the base-emitter of 7906, the base emitter of 7812 to keep transistor 7813 turned On.This turns transistor 7814 On, which switches the On voltage to the High Voltage module.The conduction of 7812 keeps the voltage on the G1 line at approximately -18 volts, whichturns the CRTs On. If the Vertical Pulse should fail, transistor 7808 will turn On, which willturn 7906, 7812, 7813, and 7814 Off. This will turn the HVG module Off. In addition, when7812 turns Off, the G1 voltage will go to -200 volts, blanking the CRTs. The same sequencewill occur if Horizontal should fail. The Protect line should go High, or the +200-volt sourceshould fail.
Page 28 HIGH VOLTAGE GENERATOR
6824
10V
6824
10V 38
4210
K28
371u
F3841
470K
3843
2.2K
+15V
6815
7808
VPU
LSE
PRO
TECT
2838
3844
22K
2839
3845
22K
7809
NEG
-HO
RIZ-
PULS
E38
461
6822 28
40
3847
100k 28
4168
23
3848
27K
3861
10K
7810
+15V
+200
V
6812
68V
6816
68V
3850
47K 38
492.
2K
3851
1K 7906
6817
6818
7812
6819
18V
5809
G1
2842
1uF
3860
47K
3859
15K
3862
15K
3864
15K
3852
100 38
5310
K
7813
3854
10K
3855
330
2844
10uF
6820
10V
3856
4.7K38
5710
K
6821
3858
4.7K
+15V
7814
HVG
-ON
+15V
+15V
-200
V
2.69
V
-0.4
1V
0.23
V
-0.3
4V
-18.
4V
1.33
V
0.3V
15.5
5V
15.5
V
14.7
9V
0.78
V
1n1n
10n
10n
FIGURE 23 - CRT BIAS AND HV SHUTDOWN Page 29
1505
1
4
15066.3
250335101.5M
3501V
35064.7M
1530
15312516
35194.7M
1511
TUNER GND
5511
35134.7M
6500 MAINS_POS
25611000uF
STBY-STARTUP
FIGURE 24 - AC INPUT
Power Supplies
There are two power supplies which both are located on the LSB. The Standby supplyprovides a +5 and +12 volt supplies. There is also a switching circuit on MSB and additionalregulation circuits located on the SSB.
AC Input (Figure 24)
AC voltage is input to the set on connector 1505. Protection against excessive current is pro-vided by fuse 1506. AC filtering is performed by 5511. Bridge rectifier 6501 rectifies theMains voltage to provide raw DC to the Standby and Full supplies.
Standby Supply (Figure 25)
When power is applied to the set, Capacitor 2533 begins charging via startup Resistor 3527.When the voltage on Pin 4 of 7510 reaches approximately 19 volts, the IC begins switchingPin 1 of 7510. When Pin 1 goes Low, current flows through the windings of 5501 via Pins 8and 6. Energy is coupled to the secondary windings. Operating voltage for the Standby sup-ply after startup is supplied by windings connected to Pins 2 and 3.
The +5STDBY is the reference supply for the regulation circuit. The +5STDBY supply is fedto the input of Shunt Regulator 7516 which drives Opto-isolator 7511. If the 5-volt supplyincreases, 7511 will turn on harder, reducing the feedback voltage on Pin 6 of 7510. If the 5volt supply decreases, the voltage on Pin 6 will increase, causing the internal switch of 7510to stay on longer.
Page 30
OCP
OLP
OSC
CON
TREG
Vcc
RAW
DCST
BY
3515
1M 3516
6.8K
75123514
220K
7513
3550
135
511
6516
5V
3537
1K
65
4 1
3
7
GND_
HBGN
D_HB
GND_
HB
3549
330
6514
2543
3536
1.5K
6511
3527
100K
ACHO
T
253365
0935
3110
MAI
NS P
OS
3543
1M25
39
8 7 6 2 3
7510
STBY
REG
431 2
7511
7516
3539
1K
2542
3530
1K
3547
2.2K
3533
2.2K
3534
220
2548
10uF
9 11 10 12 15 16 14
5501
21.1V
2.1V
154V
7.3V
3.1V
2521
2519
5508
+5V2
6512
6505
2514
5515
2518
3524
4.7K
+12V
IC_S
UP
250965
10
0V
FIGURE 25 - STANDBY SUPPLY Page 31
Over voltage protection is accomplished by monitoring the voltage on Pin 5 of 7510. Voltagefrom Pin 2 of 5501 is rectified by Diode 6511 and is fed to Pin 5 via diode 6514. If this volt-age goes above a certain level, 7510 will turn Off.
If the DC voltage feeding 7510 decreases, the Feedback voltage on Pin 6 will increase. Toprevent the IC from being over driven, the voltage on Pin 6 is limited to 5 volts. In normaloperation, DC from the bridge rectifier is fed to the base of 7512, keeping it turned On. Thiskeeps Transistor 7513 turned Off. If the DC voltage drops to approximately 75 volts,Transistor 7512 will turn Off, Transistor 7513 will turn On, putting the anode of Zener 6516 toground, clamping the voltage on Pin 6 at 5 volts.
The Standby supply produces a +5V2 and +12 volt supplies.
Main Power supply (Figure 26)
When the set is in Standby, the Standby line is High which turns transistor 7556 On. This willturn the opto-isolator 7554 On hard causing the internal transistor to turn On completely. TheVcc line on Pin 2 of 7551 must reach 11 volts for the IC to switch On. With 7554 switched Onhard, the voltage on Pin 2 of 7551 will stay at approximately 3 volts DC. The +5V2 supplyfrom the standby supplies power to the opto-isolator.
When the set is turned On, the Standby line goes Low. The opto-isolator will be completelyturned Off at this point. Capacitor 2551 will charge to 11 volts switching IC7511 On. The ICwill output drive on Pin 11 which drives 7552. Voltage across current sensing resistors 3558and 3559 is fed back to the IC on Pin 9 to control the On time of 7552. When 7552 is On,energy is stored in transformer 5552. Polarity on the secondary windings reverse during theOff time of 7552. The voltage from Pin 11 of 5552 turns transistor 7553 On, keeping 7552turned Off until the field on 5552 completely collapses. When the voltage on capacitor 2551goes below 8.7 volts, IC 7551 switches Off. The startup cycle then repeats. After severalstartup cycles, sufficient energy is stored in 5552 to supply the operating voltage for 7551.Voltage from Pin 11 of 5552 is rectified by 6551 to supply the operating voltage for the IC.
The +130VS secondary supply is the reference voltage for the supply. This voltage is fed toa resistor network and is applied to Pin 3 of Shunt Regulator 7555, which drives the opto-iso-lator 7554. An increase in the +130VS supply will cause the Shunt Regulator to conductmore making the LED inside the opto-isolator brighter which increases the voltage on Pin 6 of7551. This will decrease the On time of 7552 having the effect of reducing the outputvoltage.
The control voltage on Pin 6 of 7551has a range of 1 to 1.5 volts. This signal controls the Ontime of transistor 7552 to regulate the secondary voltages.
The Main supply produces two 130 volt supplies, plus and minus 35 volt supplies, plus andminus 18 volt supplies for the audio, and a minus 22 volt supply. The +35 volt supply is also
Page 32
fed to resistor 3587 and Zener 6566 to produce the +15 volt supply
When the set is turned Off, the Standby line goes High turning 7756 On. Opto-isolator 7554then turns on hard causing the voltage on Pin 6 of 7551 to go above 1.5 volts. This will resultin 7551 shutting down. With the opto-isolator turned on hard, the Vcc voltage is kept atapproximately 3 volts preventing 7551 from starting up.
Troubleshooting
Check the RAW DC from the bridge rectifier.
When the set is turned on, Pin 2 of 7551 should be ramping up to 11 volts.
Check for short on the +130 volt lines.
Check for drive on Pin 11 of 7551.
Check opto-isolator operation.
Page 33
SUPP
LY
UVL
O
INT
SUPP
STAR
T
FREQ
PW CTL
OVE
RPO
WER
PRO
T
SHU
TD
OW
N0.
88V
100M
V
7551
TEA1
506
3
2 6 7
14 11 9
3554 3.3K
2553
3553
1.2K
5 4 7554
IC_S
UP
3551
27K
2551
100u
F6551
DEM
AG
CTL
VCC
3551
22
7552
7553 35
6147
K35
632.
2K65
533562
3.3K
5551
3556
56K
3557
1K
2555
100n
2556
180p
3558
0.1
3559
0.1
6552
2557
4.7n
11 10 7 6 5 4 2 1
3560
4.7
+5V2
3570
330
7555
1 2 1 2
3
3574
15K
2587
100n
+130
VS
3575
82K
3576
10K
3577
1.8K
12 13 14 15 16 17 18 19 20 21 22
5553
6555
5569
5555
2564
100u
F25
7810
0n
1554
3.15
2562
-VAU
DIO
5556
2565
6556
5570 55
5825
6710
0uF
2577
100n
1555
3.15
+VAU
DIO
+35V
2581
100n
3567
4.7K
2570
100u
F
5571
5560
2568
6557
5559
-22V
2580
100n
3567
4.7K
2573
100u
F
5573
5564
2574
5561
6558
5563
2571
6559
2576
100u
F
5572
5562
5565
3568
4.7K
2579
100n
-35V
2582
6560
2583
150u
F65
62
3569
150
2593
47uF
+130
VS55
67
2584
6561
2585
150u
F
+130
VHV
9506
3587
470
6566
15V
+15V
RAW
DC
7556
+5V2
3584
10K
6565
6564
PRO
TECT
PWRF
AIL
3581
3.3K
3582
6.8K35
8368
K
+130
VS
7557
1
2
3
2591
100n
3580
100
3578
4.7K3579
18K
6563
2588
100p
2589
100n
STAN
DBY
-+ -+
-+
FIGURE 26 - FULL POWER SUPPLYPage 34
+12VA
350022K
350122K
7502-1
351010K
7504
7505251910n
350810K
350910K
STBY
7502-2
5509
35071K
350410K
251147uF
+5V2
+5V
250747uF
+12V
251747uF
250347uF
7500
7501251847uF
+9V
250647uF
+8V
-22VR
5508
2514100uF
7506 -8V251210uF
6503
7357
1
23
2347100n
234810uF
5305+3V3-PAINTER
350622K
MSB Power Switching (Figure 27)
In the Standby mode, only the +5V2 supply is fed to the SSB. When the set is switched On,the STBY line from the SSB goes Low. This turns Transistor 7505 Off. Transistor 7504 willthen turn On switching 7502-1 On. This switches the +12 volt supply On. The +12 volt sup-ply switches 7502-2 On switching the +5V supply On. The +12 volt supply is also supplied toIC 7500 to produce the +8 volt supply and IC 7501 to produce the +9 volt supply. The 5 voltsupply is fed to IC 7357 to produce the +3V3 Painter supply.
The minus 22 volt supply is applied to 7506 to produce the -8 volt supply.
FIGURE 27 - MSB POWER SWITCHING
Page 35
3V20V30V2
2U51
100p
100p
2U52
2U49
100p
100p
2U50
GND-D FU12
FU20
100p
2U48
3U48100R100R
3U47
FU17
FU14
FU15
1u0
2U40
-12-16V-NF
+5V2-STBY
2U54
100n
100n
2U53
9
FU21FU22
1213
2345678
1J02
B13B-PH-K-S(LF)(SN)
1
1011
FU16
+12-16V-NF
+12VS
FU11FU10
+5V2-STBY
FU04
5U375U38
5U355U36
BACKLIGHT-CNTRL-OUTSTANDBY
LAMP-ON-OUT
SSB Power Input (Figure 28)
Power is applied to the SSB via connector 1J02. A 12 and 5 volt supplies are applied to thisconnector. The Standby line and and display lamp control are also located on this connector.
SSB DC-DC (Figure 29)
The +3V3, +2V5 and 1V2 supplies are generated by the DC to DC converter. The fullschematic can be found in the service manual on B01A. The converter is switched On by theEnable 1V2 and Enable 3V3 lines from the Standby processor, 7J00. Drive from 7U00 drivesTransistor 7U01 to produce the +3V3 supply. The +2V5 supply is derived from this supply viaTransistor 7U28. Drive from 7U00 to Transistor 7U03 produces the 1V2 supply.
This regulator has a short protection circuit which monitors the voltage across coils 5U00 and5U09. This make troubleshooting difficult since the impedance of a scope probe will load thecircuit causing the IC to shut down. This can be overcome by using a higher impedanceprobe.
FIGURE 28 - SSB POWER INPUT
Page 36
OSC
SHO
RTPR
OT
R S
RAM
PG
EN
RAM
PG
EN
R SRE
F
REF
7U00
NCP
5422
ADR2
1 2
3
45 6
78 9 10
11 12
13
14
1516
7U29
-2
3UA2
7U29
-1
3UA1
+12V
S
+12V
S
3U22
3U86
3U85
+12V
S
VCC
+2V5
D
+12V
S+1
2VS
+12S
W
1U01
+12V
S
+12V
S
7U01
-1
7U01
-2
3U24
3U25
5U00
2U24
3U82
3U83
3U08
3U08
7U03
-2
7U03
-1
5U093U
973U
10
3U96
2U22
2U26
3UA9
3UA8
3U11
6U22
7U07
6U21
6U23
3U05
2U15
7U05
-2
3U043U
03
2U37
3U19
ENAB
LE-3
V32U
13
3U02
7U05
-1
3U013U
00
ENAB
LE-1
V2
+3V3
7U28
7U27
3UA4
3UA5
+2V5
3UA3
+1V2
6U06
6U05
6U08
3U39
3UA6
3UA7
3U94
3U95
3U93
7U15
-23U
383U
37
7U15
-1
3U56
3U54
3U18
3U55
3U17
3U16
7U13
-2
+12V
S
7U13
-1
3U88
SUPP
LY-F
AULT
3U87
3U89
3U31
3U33
7U10
-17U
10-2
3U32
3U29
3U30
7U11
3U42
3U41
3U45
2U38
3U46
+12V
S
3U06
12V
UN
DER
VOLT
AGE
DET
ECT
250k
HZ
- ++-
+-
+-
7,8
2
1 5,6
4
3 7,8
2
15,6
4
3
2U41
FIGURE 29 - SSB DC - DC Page 37
Convergence processor (Figure 30)
The Convergence processing and drive circuits are all located on the MSB (Main SignalBoard). The Convergence data is stored in the EEPROM, 7000. The Microprocessor reads1,971 bytes of data from 7000 and writes it to the Convergence Processor, 7352. Horizontalsync is inverted by 7069, buffered by 7068, and fed to Pin 27 of 7052. Vertical sync is invert-ed by 7070, buffered by 7071, and fed to Pin 28 of 7052. The data is processed to producethe desired convergence correction waveforms which are output on six DACS. During theconvergence adjustment procedure, a 180-point alignment grid is output on Pins 16, 17, and18. This signal is mixed with the OSD to be displayed on the screen. There is only one con-vergence mode for this set, 1080i. The output of the DACS is fed to six op-amps beforebeing fed to the Power Amplifiers. When screen centering is being performed, it is necessaryto disable the convergence drive waveform. This is performed in the SAM (Service AlignmentMode).
Convergence Horizontal Output (Figure 31)
IC 7044 amplifies the Horizontal convergence waveforms. The correction waveforms are fedto the IC on Pins 6, 14, and 15. They are output to the Convergence Yokes on Pins 9, 11,and 18. The IC is powered by four supply inputs. A +35-volt supply is fed to Pin 5, a -35-voltsupply is fed to Pin 4, and a -22-volt supply is fed to Pin 8, 12, and 17. The supply fed to Pin10 is normally a +22-volt supply. During signal peak drives, the voltage on Pin 10 isincreased to +35 volts. Feedback sense voltage is developed across the 6.8 ohm resistorson the return side of each yoke. Transistor 7007 is part of a Soft Start circuit. When the set isturned On, Transistor 7007 turns On until capacitor 2043 is fully charged. While 7007 isbeing turned On, a negative voltage is placed on Pin 3 muting the output of the IC. A 100-ohm snubber resistor is across each of the yoke windings. This resistor will overheat if theunit is operated with the Convergence Yokes unplugged.
Convergence Vertical Output (Figure 32)
IC 7045 amplifies the Vertical convergence waveforms. The correction waveforms are fed tothe IC on Pins 6, 14, and 15. Output is on Pins 9, 11, and 18 to the Vertical Convergenceyokes. Feedback sense voltage is developed across the 6.8-ohm resistors on the return side ofeach yoke. A Snubber resistor is across each yoke. These resistors will overheat if the circuitis operated without the Convergence Yokes being plugged in. The IC is powered by four sup-plies: a +35 volt, -35 volt, VccPSW-V, and VCCNSW-V. The VccPSW-V supply is normally at+22 volts. The BV_OUT, GV_OUT, and RV_OUT lines are connected to a Vertical Power upcircuit which senses the drive to the Convergence Yokes. If the drive to the yokes reaches 10to 12 volts, the Vertical Power up circuit will switch the VccPSW-V supply to +35 volts. If theVertical Power up circuit senses a negative 10 to 12 volt drive to the Vertical Convergenceyokes, the VccNSW-V supply will switch from -22 volts to -35 volts. As with the Horizontal drivecircuit, 7005 mutes the output of 7045 during power up.
Page 38
D/A
D/A
D/A
D/A
D/A
D/A
D/A
D/A
D/A
65
66
63
64
60
61
48
49
45
46
51
52
16
17
18
RED
GREEN
BLUE
BLANK
RV
GV
BV
RH
GH
BH
GRN_ST
BLUE_ST
RED_ST
HORFIL
VERFIL
VIDEOPATTERNGEN
CONVERGPROC
RED_UP
GRN_UP
BLU_UP
BLANK_UP
7014
7015
7016
701710383940
TBU2
TBU1
TBU0
7354-2
7354-1
7353-2
7353-1
7353-2
7355-1
SDA_B
SCL_B
7365-2 7365-1
7364-2 7364-1
7367
7
8
9
7301RESET
13
27
28
SYNC_H
SYNC_V
7369-1 7369-2
7370-1 7370-2
HBLNK
VBLNK
7352STV2050A
+
-
+-
+
-
+-
+
-
+-
+
-
+-
+
-
+-
+
-
+-
FIGU
RE
30 - CO
NV
ER
GE
NC
E P
RO
CE
SS
ING
Page 39
7044STK392CONVERGENCEOUTPUT
+35V
2030 2032
BH
GH
RH
30903.3K 2056
30913.3K
206030923.3K
2057
3
6
7
14
13
15
16
9
11
18
5 10
VccPSW-H
7007MUTE
31674.7K
303422K
2043
2037 213231716.8
-35V
1 24 8 12 17
-22V
BLUE HORIZCONVYOKE
31496.8
31506.8
3166220
30933.3K
2105
31516.8
GREEN HORIZCONVYOKE
31526.8
30943.3K
2107
RED HORIZCONVYOKE
3162220
31536.8
31546.8
30953.3K
2109
100uF 100uF
150p
10uF
150p
150p
100uF 100n
150p
150p
150p
+35V
-
+
-
+
-
+
3161100
FIGU
RE
31 - CO
NV
ER
GE
NC
E H
OR
IZON
TAL O
UTP
UT
Page 40
7045STK392CONVERGENCEOUTPUT
+35V
2030 2008
BV
GV
RV
31473.3K
2026
30993.3K
206131483.3K
2096
3
6
7
14
13
15
16
9
11
18
5 10
VccPSW-V
7005MUTE
30694.7K
303322K
2042
2009 213031736.8
-35V
1 24 8 12 17
VccNSW-V
BLUE VERTCONVYOKE
31586.8
31576.8
3163220
30963.3K
2111
31566.8
GREEN VERTCONVYOKE
31556.8
21133.3K
2107
RED VERTCONVYOKE
3165220
31596.8
31606.8
30983.3K
2115
3164220
100uF 100uF
150p
150p
150p
150p
150p
150p10uF
100uF 100n
-
+
-
+
-
+
FIGU
RE
32 - VE
RTIC
AL C
ON
VE
RG
EN
CE
OU
TPU
TP
age 41
SSB System Control (Figure 33)
IC 7J00 (AVIP) has the Standby processor. This is the only processor that is powered upduring Standby. The POD-MODE from the AVIP Standby processor goes Low when the setis turned On, turning on Transistors 7U24 and 7U25 switching the +5 volt supply On. TheON-MODE also switches On pulling the Standby line Low. The Keyboard and Remote sen-sor are connected to the Standby processor. When the set is turned On, the +5, 8V6, 1V2,and 3.3 volt supplies are switched On. If any of these supplies fail to turn On, the Standbyprocessor will shut the set down. The display will indicate an error by the presence of a blink-ing LED.
At power On, the Viper IC, 7V00, is switched On. It also receives a reset from the AVIP. TheViper performs most of the control functions when the set is On. It communicates with thePainter processor located on the MSB via the GLINK-TXD and GLINK-RXD lines.
Page 42
SSB WITH COVER REMOVED
1
2
3
4
7,85,6
AK15
AJ15
ON
-MO
DE
POD
-MO
DE
7M01
3M00
+3V3
-STA
ND
BY
+5V2
-STB
Y 3M02
STAN
DBY
B05F
7M11
AK26
RESE
T-ST
BY
3M71
3M72
STAN
DBY
PRO
CESS
OR
7J00
AK12
VCC
1.2V
B4E
2AK
23KB
AK13
2
KEY
BOAR
D
1M01
E1 LED
PAN
ELKE
YBO
ARD
SEN
SED
ETEC
T-5V
AG17
+5V
SEN
SE8V
6SW
DET
ECT-
8V6
AK18
SEN
SE+1
2VSW
DET
ECT-
12V
AJ18
SEN
SE_1
V2D
ETEC
T-1V
2AF
16
SEN
SE+3
V3D
ETEC
T-3V
3AH
17
B01B
3U42
47K 3U
4447
K
7U24
3U39
100K
+5V2
-STB
Y
2U55
+5V2
-STB
Y+1
2SW
7U25
-17U
25-2
+5V
+3V3
-STA
ND
BY+5
V2-S
TBY
6M10
3.9V
3M72
680
7M06
+5V2
-STB
Y
RESE
T
1M21
1214
2 311
03
7V00
PNX8
550
E24
B26
AD4
AJ21
RESE
T
VIPE
R
B5A
B4C
ID50
8
9
GLINK-TXD
GLINK-RXD
FIGURE 33 - SSB SYSTEM CONTROL Page 43
SSB +3.3V MSB
SDA-B
SCL-B
SDA-C
SCL-C
1200
7000NVM
75
28
13
84
83
69
70
52
48
47
46
WC
+5V
56
7
8
1
BLANK-UP
RED-UP
GRN-UP
BLUE-UP
55
53SYNC-V
SYNC-H
7100ACSCONTROL
16
17
30
RESET72
CONVPROC
TO HOP
7201RESET RESET_ST
RESET_N72
GLINK_TXD
GLINK_RXD
FIGURE 34 - MSB SYSTEM CONTROLMSB System Control (Figure 34)
The Painter Processor, 7200, is located on the MSB. It provides the control functions for theMSB and LSB. Power is only applied to this IC after the set is turned On. IC 7201 providesreset for the IC. The I2C “B” bus communicates with the NVM, 7351and the Convergenceprocessor. The I2C “C” bus communicates with the HOP IC. The NVM stores all of theConvergence data, White Tone settings, and Geometry settings. Pins 48, 47, 46, and 52generate OSD when the GDE SAM mode is selected. Vertical sync is applied to Pin 55 andHorizontal sync is applied to Pin 52 to synchronize the OSD.
Page 44
Service Modes
Customer Service Mode (CSM)
The customer can view information about the setby entering the CSM. Enter the CSM by press-ing 1 2 3 6 5 4 on the remote control. Use thecursor up-down button to select the next menu.Exit the mode by pressing the Menu button. Thesoftware version shown here is not correct forthis set.
The service technician can use this informa-tion to obtain information about faults in theset by using the error codes.
This is useful for the call center representativeas it gives information about customer set-tings and defeats customer unfriendly modes.
The status of the TV, Movie, and Channelblocking can be viewed.
SAM (Service Alignment Mode)
A map of the SAM is shown in figure 35.
Service Alignment Mode (SAM)
The service alignment mode allows the service technician to check errors, clear errors,change options, read operation hours and perform alignments. The SAM procedure shouldnever be given to the customer as changes could be made which could make the set inop-erable. To enter SAM, press 0 6 2 5 9 6 Info on the remote control. A customer warningwill then appear on the screen. Press the Red button on the remote to continue. Theremote must be from a EBJ1.0, BP, BL, or EM1.1 chassis.
Press the cursor down or cursor up buttons on the remote to select the item in the menu.The top line indicates the menu or sub menu along with number of items in the menu.
Page 45
General and whitepoint alignments can be made while in the SAM.
In the personal options menu, the picture mute can show show or a blue screen with nosignal depending on the selection made here. The Virgin mode puts the set in a new out ofthe box condition.
Feature options can be set individually or by changing the option numbers. Changing theoptions will change the option numbers.
To change the option numbers, select option numbers in the menu, the cursor right. Select the Group number. Enter the Option number. After entering the last number, thenumbers will be set. If the numbers are changed without entering the last number, press theOK button on the remote after entering all of the changes. If the numbers are entered andthe cursor is shifted to the Group selection, the number will revert to the previous number set.A label on the chassis of each set list the correct Option Codes. If the option numbers havebeen changed or the SSB has been replaced, the option numbers should be changed tomatch the option code label.
Any changes in customer setting will cause the Option Code to change. For example, afterentering the Option Code on the label, the set will be in the Virgin (out of box) mode. Afterauto-programming the channels, the Option Code will change. The Option Code should onlybe entered if the SSB has been changed or if someone has entered the wrong code.
After making any changes in the SAM, cursor left to the main SAM menu and select Storeand press OK.
Reading the Error codes can assist in troubleshooting intermittent problems. Notice that
Page 46
Protection Errors - Error will be indicated by a blinking LEDSet will not turn OnError Description Defect Device Diagram ID Board1 I2C1 I2C1 blocked SSB2 I2C2 I2C2 blocked SSB3 I2C3 I2C3 blocked B05E/B05A SSB4 I2C4 I2C4 blocked SSB5 Viper control PNX8550 B01B/B05A SSB6 5V supply 5V supply B04E SSB7 8V6 supply 8.6 volt supply MSB/SSB8 1.2V DC/DC 1v2 supply SSB9 2.5V DC/DC 2v5 supply SSB11 3.3V DC/DC 3v3 supply B04E SSB12 12V supply 12v supply B04E MSB/SSB13 Audio Supply audio supply LSB14 Class D amplifiers Audio amplifier B08A SSB25 Supply fault DC/DC B01A SSB61 Vertical Sweep fail Vertical MSB/LSB62 HOP POR fail MSB65 GDE Communication I2C B04G SSB/MSB68 Horizontal Sweep fail Horizontal MSB/LSB
SSB ERROR CODES
errors 1 to 14 are protection errors which will place the set in the SDM (Service DefaultMode) when power is applied to the set or it is turned On. These errors can be read bycounting the blinks. A long blink indicates the decimal digit while the short blink indicates theunits.
The GDE SAMsub menuallows theServiceTechnician toset Geometryand White Tone(Gray Scale).This mode iscontrolled bythe Paintermicroprocessorlocated on theMSB module.These settingsare stored on aEEPROM locat-ed on the ASC
module. The GDE SAM displays the Software version of the GDE microprocessor and theGDE Errors.
The Convergence Processor selection will enable or disable Convergence drive.Convergence should be disabled when performing Centering or Geometry alignments.
Convergence
In the EBJ1.0, the Convergence section is a sub section of the SAM. Once this section isentered, the only way to exit is to turn the set Off.
As with recent Philips PTVs, the EBJ1.0 incorporates a Digital Convergence system using208 adjustment points. Since all signals are converted to 1080i before being fed to the MSB,this set only has one convergence mode. To make an accurate convergence and geometryalignment, a signal should be applied to the set. When a complete convergence alignmentis necessary, a convergence template must be used to ensure linear geometry.
The convergence templates for these sets are:
51MP6200D/37 16x9 ST418351PP9200D/37 16x9 ST418360PP9200D/37 16x9 ST4182
Page 47
Non Protection Errors - Error can be read in the SAM or CSM modes
Error Description Defect Device Diagram ID Board16 MPIF1 main supply if-io KN10241C SSB17 MPIF1 audio supply if-io KN10241C B03D SSB18 MPIF1 ref freq if-io KN10241C B03B SSB21 MPIF2 main supply if-io2 KN10241C SSB22 MPIF2 audio supply if-io2 KN10241C SSB26 Power Dip detected St by uP SSB29 AVIP1 AV input proc PNX3000 SSB31 AVIP2 AV input proc PNX3000 SSB34 Tuner1 Tuner B02B SSB36 OFDM digital if TDA10046 SSB37 Channel decoder Ch decoder NXT2003 B02A SSB43 Hi rate front end HDMI TDA8751 B07B SSB44 Main NVM NVM M24C32 B05E SSB66 GDE non critical error GDE MSB67 System Integrity Fail viper B04G SSB
0 6
2 5
9 6
INFO
CUST
OM
ERW
ARN
ING
RED
BUTT
ON
HAR
DW
ARE
INFO
OPE
RATI
ON
HO
URS
ERRO
RSD
EFEC
TIVE
MO
DU
LERE
SET
ERRO
R BU
FFER
ALIG
NM
ENTS
DEA
LER
OPT
ION
SO
PTIO
NS
GEN
ERAL
WH
ITEP
OIN
TTU
NER
AG
C
COLO
R TE
MPE
RATU
REW
HIT
E PO
INT
RED
WH
ITE
POIN
T G
REEN
WH
ITE
POIN
T BL
UE
RED
BL
OFF
SET
GRE
EN B
L O
FFSE
T
NO
RMAL
WAR
MCO
OL
PERS
ON
AL O
PTIO
NS
PICT
URE
MU
TEVI
RGIN
MO
DE
2 CS
KO
REA
PIP/
DS
DAT
AD
ISPL
AYVI
DEO
REP
ROSO
URC
E SE
LECT
ION
AUD
IO R
EPRO
MIS
CELL
ANEO
US
OPT
ION
S N
UM
BERS
DU
AL S
CREE
N
EPG
SCRE
ENSC
ANN
ING
BAC
KLIG
HT
DIM
MIN
G B
ACKL
IGH
T
PICT
URE
PRO
CESS
ING
COM
B FI
LTER
AMBI
ENT
LIG
HT
MO
P
NO
NE
2D C
OM
B3D
CO
MB
OFF
MO
NO
STER
EO
HD
MI1
HD
MI2
USB
VER
SIO
NIE
E139
4ET
HER
NET
SPD
IF IN
PUTS
NO
NE
WIT
H A
NAL
OG
AU
DIO
WIT
HO
UT
ANAL
OG
AU
DIO
NO
NE
USB
1.1
USB
2.0+
CARD
READ
ER
NO
NE
1 CO
NN
ECTO
R2
CON
NEC
TORS
SUBW
OO
FER
INTE
RNAL
ACO
UST
IC S
YSTE
MO
N/O
FF
TOP
ENTR
Y+EC
O M
E5 5
WEC
O M
E5 1
5W51
WM
AG51
PH
IL60
PH
IL
ALTE
RNAT
IVE
TUN
ERTU
NER
TYP
E
GRO
UP1
GRO
UP2
STO
RE
INIT
IALI
SE N
VMST
ORE
SW M
AIN
TEN
ANCE
SW E
VEN
TSH
W E
VEN
TS
DIS
PLAY
CLEA
RTE
ST R
EBO
T
DIS
PLAY
CLEA
R
RRT
NO
NE
HO
TEL
MO
DE
GD
E SA
MD
CSM
GD
E SA
MIN
PUT
HO
ST
ERR:
DIS
PLAY
MO
DE
SERV
BLA
NK
GEO
MET
RY
PICT
URE
WH
ITE
TON
E
CLAM
P PU
LSE
CON
V.PR
OC
SWID
: HD
PTV6
GD
E1.4
0
1080
i FU
LLO
N/O
FF
> > >
NO
RMAL
/HD
TV
ENAB
LE/D
ISAB
LE
WID
E BL
ANK
HD
R SH
IFT
HO
R_PA
RALL
ELEW
WID
THEW
PAR
AEW
TRA
PH
OR
BOW
VER
SLO
PEVE
R AM
PLS
CORR
VER
SHIF
TFA
ST B
LAN
K
8 11 8 45 47 15 7 33 25 31 31 1
PICT
URE
BRIG
HTN
ESS
PICT
URE
COLO
RSU
B-BR
IGH
T
31 40 31 31
NO
RMAL
CU
TOFF
RED
NO
RMAL
CU
TOFF
GRE
EN
NO
RMAL
DRI
VE R
EDN
ORM
AL D
RIVE
GRE
ENN
ORM
AL D
RIVE
BLU
ECO
OL
CUTO
FF R
EDCO
OL
CUTO
FF G
REEN
COO
L D
RIVE
RED
COO
L D
RIVE
GRE
ENCO
OL
DRI
VE B
LUE
WAR
M C
UTO
FF R
EDW
ARM
CU
TOFF
GRE
EN
WAR
M D
RIVE
RED
WAR
M D
RIVE
GRE
ENW
ARM
DRI
VE B
LUE
7 7 15 45 45 +0 +0 +0 +0 +0 +0 +0 +0 +0+0
GO
TO
CON
VERG
ENCE
MEN
U
FIGURE 35 - SERVICE ALIGNMENT MODE MENUPage 48
FROM MAIN
USE CURSOR KEYS TO HIGHLIGHTUSE MENU KEY TO SELECTUSE INO KEY TO RETURN
CONVERGENCE ADJUSTMENTSSENSOR TEST
MANUAL CONVERGENCE WO VIDEOMANUAL CONVERGENCE W VIDEO
RESTORE FACTORY
RESTORE DEFAULTS
GREENRED TO GREENBLUE TO GREENGREEN TO REDBLUE TO REDSP REDSP BLUEMP REDMP BLUESTORE
I+
CURSOR RIGHT MENU
INFO
CURSOR KEYS TO ADJUST
MENU TO CHANGESTEP SIZE
INFO TO RETURN
CURSOR KEYS TO NAVIGATE
MENU TO ADJUST
INFO TO RETURN
1
2 3
4
SENSORS NOT VERIFIEDAT LOCATIONS______
MENU TO TEST AGAININFO TO RETURN
MENU TO SAVE DATA
INFO TO RETURN
MENU TO SAVE DATA
INFO TO RETURN
INFO
INFO MEN
U
CURSOR RIGHT TO SELECTINFO TO RETURN
CURSOR RIGHT TO SELECTPOWER OFF TO EXIT CONVERGENCE
INTELLISENSENOT USED
MENU
FIGURE 36 - CONVERGENCE ALIGNMENT MENU
Convergence Alignment (Figure 36)
Use the Cursor Up-Down button to highlight the selection. Press the Cursor Right button tomake the selection. In the second menu, MANUAL CONVERGENCE WO VIDEO means thatthe screen behind the adjustment grid will be blank. This does not mean that Convergencecan be performed without a signal being applied to the set. MANUAL CONVERGENCE WVIDEO displays the applied video behind the adjustment grid. RESTORE FACTORY loadsthe values from the last saved convergence alignment. RESTORE DEFAULT loads valuesfrom the ROM on the GDE Microprocessor. RESTORE FACTORY or RESTORE DEFAULTwill overwrite all eight Convergence modes. If the SSM has been changed, there may not bedata in the NVM for RESTORE FACTORY. The RESTORE DEFAULT settings will then beloaded.
An internally generated grid will be displayed in the Convergence mode as shown in figure37. The area inside the dotted lines are the visible picture area. Horizontal lines A and Mare displayed on the top and bottom edge of the visible screen area. Lines 1 and 15 are alsodisplayed on the left and right edge of the visible screen area. Vertical line 0 is adjustable butnot visible.
Page 49
A B C D E F G H I J K L M N O P1
2
3
4
5
6
7
8
9
10
11
12
13
FIGURE 37 - CONVERGENCE ALIGNMENT PATTERN
Touch Up Convergence
When making minor Convergence corrections, move the Cursor to the location to be adjustedthen press the Menu button to adjust that location. When in the adjustment mode, press theMenu button a second time if it is desired to change the step size of the adjustment. Whenmaking minor Convergence corrections, you may adjust the following:
RED TO GREENBLUE TO GREENSP REDMP REDSP BLUEMP BLUE
Do not make changes to the Green Geometry without placing a Template over the screen.
Page 50
Green Geometry
The Green Geometry must be done first when performing a complete convergence alignment.A Screen Template is necessary to obtain the correct geometry. Failure to use the ScreenTemplate or mis-adjustment of the convergence will result in reduced life of the Convergenceamplifiers.
Place the Screen template on the TV screen. Select GREEN in the selection menu. TheCursor will appear in the center of the screen as shown in the picture.
When the SSM has been replaced, it would be advisable to load Default settings. Press the Menubutton to adjust, and then use the Cursor buttons to move the Green cross onto the Template.The adjustment of the cross has two step sizes, large and small. Press the Menu button to toggle
between the two. After a point has been adjusted, press the Index button to return to Navigate.When Default settings have been loaded, the left most line that is not visible should be adjustedfirst. Adjust the Vertical line 0 while observing line 1 to make line 1 parallel with the left edge of thescreen. The adjustment should only be made in small steps. Do not adjust any one point morethan 1/4 the distance of one grid in each pass. After the left most line is adjusted, start at the cen-ter left of the screen and work to the right, aligning the Horizontal lines. When adjusting theHorizontal lines, best results are obtained when working from left to right. After the Center line isadjusted, go to the next line down until all of the lines have been adjusted, then work from the cen-ter up to adjust the Horizontal lines. Using the same method, work from center out to adjust theVertical lines. At least three passes will be necessary to complete the alignment. Press the Indexbutton to return to the selection menu.
When the Green geometry is complete, Store the data. Remove the Template from thescreen. Select Red to Green in the selection menu. Using the same method that was usedto adjust the Green Grid to the Template, adjust the Red Grid onto the Green Grid. If the setis a later production, select SP RED to center the Red grid onto the Green grid. Exit thismode by pressing the Menu button. Then select the MP RED to adjust the Red onto theGreen using the 35-point adjustment. When this is complete, select the RED TO GREEN toperform the 208-point adjustment.
When the RED TO GREEN is complete, select the BLUE TO GREEN using the samealignment method as the RED TO GREEN.
Select STORE to save your the alignments after adjusting each color. Exiting the ConvergenceMode without saving will cause the alignments to be lost.
Repeat the adjustment for each of the remaining modes.
A full explanation of the Service modes are available in the service manual.
Page 51
Remove the service cover screws.
Disassembly and Service positions
Remove the side mountingblocks.
Remove circuit bracket screws
Loosen cable ties and slide the chassisinto the service position.
Page 52
CONVERGENCE YOKE CONNECTORS
RED GREEN BLUE
Page 53
Abbreviation list
Description
1080i 1080 visible lines, interlaced1080p 1080 visible lines, progressive scan480i 480 visible lines, interlaced480p 480 visible lines, progressive scanADC A/D Analogue to Digital ConverterAFC Automatic Frequency Control: control signal used to tune to the correct
frequencyAGC Automatic Gain Control: algorithm that controls the video input of the
feature boxAM Amplitude ModulationAV Audio VideoC-FRONT Chrominance front inputCBA Circuit Board Assembly (or PWB)ComPair Computer aided rePairCSM Customer Service ModeCVBS Composite Video Blanking and SynchronizationCVBS-EXT CVBS signal from external source (VCR, VCD, etc.)CVBS-INT CVBS signal from TunerCVBS-MON CVBS monitor signalCVBS-TER-OUT CVBS terrestrial outDAC Digital to Analogue ConverterDFU Directions For Use: owner's manualDNR Dynamic Noise ReductionDRAM Dynamic RAMDSP Digital Signal ProcessingDTS Digital Theatre SoundDVD Digital Video DiscEEPROM Electrically Erasable and Programmable Read Only MemoryEPLD Electronic Programmable DeviceEXT EXTernal (source), entering the set by cinches (jacks)FBL Fast Blanking: DC signal accompanying RGB signalsFLASH FLASH memoryFM Field Memory / Frequency ModulationFMR FM RadioFRC Frame Rate ConverterFRONT-C Front input chrominance (SVHS)FRONT-DETECT Front input detectionFRONT-Y_CVBS Front input luminance or CVBS (SVHS)H H_sync to the module HD High DefinitionHDMI High Definition Multimedia Interface HP HeadPhonePage 54
I2C Integrated IC busI2S Integrated IC Sound busIC Integrated CircuitIF Intermediate FrequencyInterlaced Scan mode where two fields are used to form one frame. Each field contains
half the number of the total amount of lines. The fields are written in 'pairs', causing line flicker.
IR Infra RedIRQ Interrupt ReQuestLast Status The settings last chosen by the customer and read and stored in RAM or in the
NVM. They are called at start-up of the set to configure it according the customers wishes.
LCD Liquid Crystal DisplayLED Light Emitting DiodeLINE-DRIVE Line drive signalLSB Large Signal BoardLVDS Low Voltage Differential Signalling, data transmission system for high speed
and low EMI communication.MPEG Motion Pictures Experts GroupMSB Main Signal BoardNVM Non Volatile Memory: IC containing TV related data (for example, options)OSD On Screen DisplayProgressive Scan Scan mode where all scan lines are displayed in one frame at the same
time, creating a double vertical resolution.RAM Random Access MemoryRC Remote Control transmitterRC5 Remote Control system 5, the signal from the remote control receiver RGB Red, Green, and Blue. The primary colour signals for TV. By mixing
levels of R, G, and B, all colors (Y/C) are reproduced.RGBHV Red, Green, Blue, Horizontal sync, and Vertical syncROM Read Only MemorySAM Service Alignment ModeSIF Sound Intermediate FrequencySC SandCastle: two-level pulse derived from sync signalsSCL CLock Signal on I2C busSDA DAta Signal on I2C busSDRAM Synchronous DRAMSIF Sound Intermediate FrequencySTBY STandBYSSB Small Signal BoardVGA Video Graphics ArrayXTAL Quartz crystalYPbPr Component video (Y= Luminance, Pb/Pr= Colour difference signals)Y/C Luminance (Y) and Chrominance (C) signalY-OUT Luminance-signal
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MM 062806 Rev091406