32008-based single-board microcomputer Jacob Davidson describes a simple low-cost NS32008 evaluation board

A single-board microcomputer was built based on the NS32008 microprocessor. It was designed for evaluation of the processor's performance and ease of use, and illustrates some design ideas relevant to those evaluating 16/32-bff microprocessors in the 32000 series.

microprocessors evaluation boards NS32008

The advent of 16-bit and 32-bit microprocessors has led to the rapid replacement of their 8-bit counterparts in many applications. National Semiconductor's Series 32000 microprocessor family includes the NS32008, which has a 32-bit internal architecture, an 8-bit data bus and a 24-bit address bus, allowing for a total c~" 16 Mbyte of memory addressing. In this respect it compares favourably with Motorola's 68008 and Intel's 8088, both of which possess an 8-bit data bus and a 20-bit address bus. An application of the 32008 is in colour graphics terminal controllers, in which the amount of RAM associated with the graphics functions may exceed I Mbyte.

There are not many commercially available 32008-based microcomputers and potential users sometimes have trouble evaluatingthe performance and ease of use of this microprocessor. The design of the single-board micro- computer presented in this paper is intended for those considering the 32000 series for development of advanced microprocessor-based products.

N S 3 2 0 0 8 MICROPROCESSOR

floating point bit is not set in the configuration register the respective instructions are trapped, allowing the imple- mentation of floating point routines in software.

The instruction set is characterized by

• two address instructions • addressing optimized for high-level language • restricted instructions depending on the mode of

operation (supervisor or user mode) • instruction set expansion via traps or slave processors

The 32008 has two pins, INT and NMI, allowing for maskable or nonmaskable hardware interrupts. In addition, a set of internally generated traps is used for software interrupt service as a result of an exceptional condition or a specific trap instruction.

H A R D W A R E

The design goals were a simple low-cost 32008-based single-board microcomputer with two serial interfaces allowing crossassemblers and crosslinkers to be used on a host computer for software development.

The schematics in Figures 1 and 2 show the design of the board. This consists of 24 integrated circuits (ICs), the functions of which can be divided into timing, decoding, bus interface, communication interface and miscellaneous support. A list of components is given in Table 1.

The Series 32000 microprocessor family was designed around a 32-bit architecture with the goal of obtaining good performance, efficient management of large address space and facilities for high-level language program development. The main features of the 32008 are

• 32-bit internal architecture • eight 32-bit general-purpose registers • six 32-bit dedicated registers • two 16-bit special registers • one 4-bit configuration register • 8-bit data bus • 24-bit address bus creating a 16Mbyte uniform

addressing space

The configuration register is used to indicate the presence of different hardware units such as a floating point unit, an interrupt control unit or a custom slave processor. If the

University of Quebec at Montreal, Case postale 8888, Succursale 'A', Montreal PQ H3C 3P8, Canada

Timing

The 32008 (labelled U1 in Figure 1) needs an NS32201 TCU (labelled U2) to provide timing signals. Clock signals 01 and ~2 are received from the TCU which in turn is connected to a 4.9152 MHz crystal. The TCU also sends such signals as reset, address strobe, read, write and data bus enable.

Decoding

The memory map is shown in Table 2. Memory is divided into eight blocks of 8 kbyte each with the monitor residing at address 0. Decoding is done by two 74LS138 decoders (U17, U18) and a 74LS00 NAND gate (U20). At the output of the decoder there are eight memory select signals (CSO-CS7) and two select signals to enable the asynchronous interfaces at addresses CO0000 and C00040.

O141-9331/86/10028-05 $03.00 © 1986 Butterworth & Co. (Publishers) Ltd

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Table 1. Parts list

IC Part number Description

U1 NS32008-6 U2 NS32201-6 U3 74LS245 U4 74LS373 U5 AM2764 U6 HM6264 U7 HM6264 U8 HM6264 U9 HM6264 UI0 HM6264 U11 HM6264 U12 HM6264 U13 18251A U14 18251A

U15 1488 U16 1489 U17 74LS138 U18 74LS138 U19 14040

U20 74LS00 U21 74LS373 U22 74LS373 U23 74LS04 U24 74LS00 CY SW1 - DSI -

CPU TCU Data bus transceiver Address bus latch buffer EPROM (8 kbyte) RAM (kbyte) RAM (8 kbyte) RAM (8 kbyte) RAM (8 kbyte) RAM (8 kbyte) RAM (8 kbyte) RAM (8 kbyte) Host serial communication adapter Terminal serial communication

adapter RS232 transmitter RS232 receiver Decoder 3/8 Decoder 3/8 12-stage counter (baud rate

generator) Quad two-input NAND gate Address bus latch buffer Address bus latch buffer Hex inverter Quad two-input NAND gate 4.9152 MHz crystal Push button reset switch Eight-position DIP switch (baud

rate switch) Capacitors, resistors, connectors

Table 2. Memory map

Address Device

$000000-$001 FFF $002000-$00FFFF

$C00000-C000002 $C00040-C000042

(1) 8 kbyte EPROM (monitor) (7) 8 x 8 kbyte RAMs (56 kbyte

memory) (1) Inte18251A (terminal serial port) (1) Intel 8251A (host computer

serial port)

Communication interface

The asynchronous communication interface consists of two Inte18251A serial adapters (U13, U14). One is used to communicate with an alphanumeric terminal (address CO0000) and the other with a host computer for program development (address C00040). A circuit 14040 (U19) is used as a baud rate generator deriving different baud rates

from the frequency of 2.4576 MHz (half of the crystal frequency) by using the microprocessor signal CTTL The DS1 dip switch is used for sending different baud rates to 8251A interfaces. The RS232C interface is obtained by using a 1489 RS232C receiver (U16) and a 1488 RS232C transmitter (U15). Both are transferring signals through two DB-25 connectors normally used for RS232 communi- cation interfacing.

Bus interface

The address bus interface consists of three 74LS373 ICs (U4, U21, U22) and a 74LS245 transceiver (U3) is used for the data bus. All four circuits are enabled by the DBE (data bus enable) signal sent by the TCU. The U4 circuit is used to separate the 8-bit data bus from the lowest address byte (A0-A7).

MONITOR

The monitor program provides a set of program develop- ment services such as

• communication with aterminal and a host computer in transparent mode for program development via cross- support software

• debugging • interrupt and trap handling • object code downloading • data manipulation • program execution • supervisor call routines

Monitor commands are received from the terminal as an ASCII string followed by a carriage return.

SOFTWARE

The NSX cross-support software package is provided by National Semiconductor for program development and debugging. The package runs on VAX/VMS systems and is composed of a crossassembler, a crosslinker, a cross PASCAL compiler (ANSI compatible), a librarian, an object code formatter and a symbolic debugger.

This software development package is intended to facilitate the development of software for Series 32000 based systems. The object code that is obtained (after the programs are edited and assembled on VAX computers) can be downloaded via the serial ports to the develop- ment board for execution and debugging.

A 'floating point support library' is also available. This provides floating point mathematical routines, which can be called from PASCAL or assembly language programs, and supports emulation of the NS32081 floating point unit.

vol 10 no 1 january~february 1986 37

CONCLUSION

A simple low-cost single-board microcomputer based on the NS32008 8/32-bit microprocessor is described. This may be used as an evaluation board by microcomputer designers and engineers interested in Series 32000 microprocessors.

BIBLIOGRAPHY

Series 32000 data book National Semiconductor Corp, Santa Clara, CA, USA NSW-ASSEMB-gVMR National Semiconductor Corp, Santa Clara, CA, USA NSS-SYS32-3001 Pascal compiler National Semicon- ductor Corp, Santa Clara, CA, USA

Jacob Davidson is a professor of microelectronics at the University of Quebec in Montreal, Canada. He has participated in several com- puter process control projects in the Montreal area as chief engineer of the Computer Control and Automation Department at Tecsult Inter- national Inc, a consulting

~ engineering company in Quebec, Canada. He obtained his PhD in electrical engineering from the Ecole Polytechnique, Montreal, Canada, in 1984. His current research interests include distributed computer control, microprocessor applica- tJons, robotics and digital communications.

32 microprocessors and microsystems