16-bit microcontrollers with large, dual partition flash ... · • 32-bit by 16-bit hardware...

PIC24FJ1024GA610/GB610 FAMILY16-Bit Microcontrollers with Large, Dual Partition

Flash Program Memory and USB On-The-Go (OTG)

High-Performance CPU• Modified Harvard Architecture• Largest Program Memory Available for PIC24

(1024 Kbytes) for the Most Complex Applications• 32 Kbytes SRAM for All Part Variants• Up to 16 MIPS Operation @ 32 MHz • 8 MHz Fast RC Internal Oscillator:

- 96 MHz PLL option- Multiple clock divide options- Run-time self-calibration capability for maintaining

better than ±0.20% accuracy- Fast start-up

• 17-Bit x 17-Bit Single-Cycle Hardware Fractional/Integer Multiplier

• 32-Bit by 16-Bit Hardware Divider• 16-Bit x 16-Bit Working Register Array• C Compiler Optimized Instruction Set Architecture• Two Address Generation Units for Separate Read

and Write Addressing of Data Memory

Universal Serial Bus Features• USB v2.0 On-The-Go (OTG) Compliant• Dual Role Capable – Can Act as Either Host or Peripheral• Low-Speed (1.5 Mb/s) and Full-Speed (12 Mb/s)

USB Operation in Host mode• Full-Speed USB Operation in Device mode• High-Precision PLL for USB• USB Device mode Operation from FRC Oscillator –

No Crystal Oscillator Required• Supports up to 32 Endpoints (16 bidirectional):

- USB module can use any RAM location on the device as USB endpoint buffers

• On-Chip USB Transceiver with Interface for Off-Chip USB Transceiver

• Supports Control, Interrupt, Isochronous and Bulk Transfers

• On-Chip Pull-up and Pull-Down Resistors

Analog Features• 10/12-Bit, up to 24-Channel Analog-to-Digital (A/D)

Converter:- 12-bit conversion rate of 200 ksps- Auto-scan and threshold compare features- Conversion available during Sleep

• Three Rail-to-Rail, Enhanced Analog Comparators with Programmable Input/Output Configuration

• Charge Time Measurement Unit (CTMU):- Used for capacitive touch sensing, up to 24 channels- Time measurement down to 100 ps resolution

Low-Power Features• Sleep and Idle modes Selectively Shut Down

Peripherals and/or Core for Substantial Power Reduction and Fast Wake-up

• Doze mode Allows CPU to Run at a Lower Clock Speed than Peripherals

• Alternate Clock modes Allow On-the-Fly Switching to a Lower Clock Speed for Selective Power Reduction

• Wide Range Digitally Controlled Oscillator (DCO) for Fast Start-up and Low-Power Operation

Special Microcontroller Features• Large, Dual Partition Flash Program Array:

- Capable of holding two independent software applications, including bootloader

- Permits simultaneous programming of one partition while executing application code from the other

- Allows run-time switching between Active Partitions

• 10,000 Erase/Write Cycle Endurance, Typical• Data Retention: 20 Years Minimum• Self-Programmable under Software Control• Supply Voltage Range of 2.0V to 3.6V• Operating Ambient Temperature from -40°C to

+85°C for Industrial and from -40°C to +125°C for Extended Temperature Range Devices

• On-Chip Voltage Regulators (1.8V) for Low-Power Operation

• Programmable Reference Clock Output• In-Circuit Serial Programming™ (ICSP™) and

In-Circuit Emulation (ICE) via Two Pins• JTAG Boundary Scan Support • Fail-Safe Clock Monitor Operation:

- Detects clock failure and switches to on-chip, low-power RC Oscillator

• Power-on Reset (POR), Brown-out Reset (BOR), Power-up Timer (PWRT) and Oscillator Start-up Timer (OST)

• Programmable High/Low-Voltage Detect (HLVD)• Flexible Watchdog Timer (WDT) with its Own

RC Oscillator for Reliable Operation

2015-2019 Microchip Technology Inc. DS30010074G-page 1

PIC24FJ1024GA610/GB610 FAMILY

Peripheral Features• Peripheral Pin Select (PPS) –Allows Independent

I/O Mapping of Many Peripherals• Up to Five External Interrupt Sources• Configurable Interrupt-on-Change on All I/O Pins:

- Each pin is independently configurable for rising edge or falling edge change detection

• Eight-Channel DMA Supports All Peripheral modules:- Minimizes CPU overhead and increases data

throughput• Five 16-Bit Timers/Counters with Prescalers:

- Can be paired as 32-bit timers/counters• Six Input Capture modules, Each with a Dedicated

16-Bit Timer• Six Output Compare/PWM modules, Each with a

Dedicated 16-Bit Timer• Four Single Output CCPs (SCCPs) and Three

Multiple Output CCPs (MCCPs):- Independent 16/32-bit time base for each module- Internal time base and period registers- Legacy PIC24F Capture and Compare modes

(16 and 32-bit)- Special Variable Frequency Pulse and Brushless

DC Motor Output modes

• Enhanced Parallel Master/Slave Port (EPMP/EPSP)• Hardware Real-Time Clock/Calendar (RTCC) with

Timestamping• Three 3-Wire/4-Wire SPI modules:

- Support four Frame modes - Eight-level FIFO buffer- Support I2S operation

• Three I2C modules Support Multi-Master/Slave mode and 7-Bit/10-Bit Addressing

• Six UART modules:- Support RS-485, RS-232 and LIN/J2602- On-chip hardware encoder/decoder for IrDA®- Auto-wake-up on Auto-Baud Detect (ABD)- Four-level deep FIFO buffer

• Programmable 32-Bit Cyclic Redundancy Check (CRC) Generator

• Four Configurable Logic Cells (CLCs):- Two inputs and one output, all mappable to

peripherals or I/O pins- AND/OR/XOR logic and D/JK flip-flop functions

• High-Current Sink/Source (18 mA/18 mA) on All I/O Pins• Configurable Open-Drain Outputs on Digital I/O Pins• 5.5V Tolerant Inputs on Multiple I/O Pins

DS30010074G-page 2 2015-2019 Microchip Technology Inc.


PIC24FJ1024GA610/GB610 FAMILY PRODUCT FAMILIESThe device names, pin counts, memory sizes andperipheral availability of each device are listed inTable 1. Their pinout diagrams appear on the followingpages.

TABLE 1: PIC24FJ1024GA610/GB610 GENERAL PURPOSE FAMILIES

Device

Memory Pins Analog Digital

RTC

C

USB

OTG

Prog

ram

(byt

es)

Dat

a(b

ytes

)

Tota

l

I/O

10/1

2-B

it A

/D (c

h)

Com

para

tor

CTM

U

1

6/32

-Bit

Tim

er

IC/O

C/P

WM

MC

CP/

SCC

P

I2C

SPI

UA

RT

w/Ir

DA

®

EPM

P/EP

SP

CLC

PIC24FJ128GA606 128K 32K 64 53 16 3 Y 5/2 6/6 3/4 3 3 6/2 Y 4 Y NPIC24FJ256GA606 256K 32K 64 53 16 3 Y 5/2 6/6 3/4 3 3 6/2 Y 4 Y NPIC24FJ512GA606 512K 32K 64 53 16 3 Y 5/2 6/6 3/4 3 3 6/2 Y 4 Y NPIC24FJ1024GA606 1024K 32K 64 53 16 3 Y 5/2 6/6 3/4 3 3 6/2 Y 4 Y NPIC24FJ128GA610 128K 32K 100 85 24 3 Y 5/2 6/6 3/4 3 3 6/2 Y 4 Y NPIC24FJ256GA610 256K 32K 100 85 24 3 Y 5/2 6/6 3/4 3 3 6/2 Y 4 Y NPIC24FJ512GA610 512K 32K 100 85 24 3 Y 5/2 6/6 3/4 3 3 6/2 Y 4 Y NPIC24FJ1024GA610 1024K 32K 100 85 24 3 Y 5/2 6/6 3/4 3 3 6/2 Y 4 Y NPIC24FJ128GB606 128K 32K 64 53 16 3 Y 5/2 6/6 3/4 3 3 6/2 Y 4 Y YPIC24FJ256GB606 256K 32K 64 53 16 3 Y 5/2 6/6 3/4 3 3 6/2 Y 4 Y YPIC24FJ512GB606 512K 32K 64 53 16 3 Y 5/2 6/6 3/4 3 3 6/2 Y 4 Y YPIC24FJ1024GB606 1024K 32K 64 53 16 3 Y 5/2 6/6 3/4 3 3 6/2 Y 4 Y YPIC24FJ128GB610 128K 32K 100 85 24 3 Y 5/2 6/6 3/4 3 3 6/2 Y 4 Y YPIC24FJ256GB610 256K 32K 100 85 24 3 Y 5/2 6/6 3/4 3 3 6/2 Y 4 Y YPIC24FJ512GB610 512K 32K 100 85 24 3 Y 5/2 6/6 3/4 3 3 6/2 Y 4 Y YPIC24FJ1024GB610 1024K 32K 100 85 24 3 Y 5/2 6/6 3/4 3 3 6/2 Y 4 Y Y



Pin Diagrams(2)

Legend: See Table 2 for a complete description of pin functions. Note 1: It is recommended to connect the metal pad on the bottom of the 64-pin QFN package to VSS.

2: Gray shading indicates 5.5V tolerant input pins.

64-Pin TQFP 64-Pin QFN(1)

2345678910111213141516

4847

22

44

24 25 26 27 28 29 30 31 32

1

4645

23

4342414039

63 62 61 5960 58 57 56 5455 53 52 51 4950

3837

34

3635

33

17 19 20 211864

VDDVSS

RG9MCLR

RG8RG7RG6RE7RE6RE5

RB5RB4RB3RB2RB1RB0

OSCI/RC12OSCO/RC15VSSRD8RD9RD10RD11RD0RC13RC14

VDD RG2RG3RF6RF2RF3

VDD

VSS

RB1

1R

B10

RB9

RB8

AVSS

AVD

D

RB7

RB6

RB1

2R

B13

RB1

4R

B15

RF4

RF5

RD

7V C

APN

/CR

F0R

F1R

E0R

E1R

E2R

E3R

E4

RD

6R

D5

RD

4R

D3

RD

2R

D1

PIC24FJXXXXGA606



TABLE 2: COMPLETE PIN FUNCTION DESCRIPTIONS (PIC24FJXXXGA606 TQFP/QFN)Pin Function Pin Function

1 IC4/CTED4/PMD5/RE5 33 RP16/RF32 SCL3/IC5/PMD6/RE6 34 RP30/RF23 SDA3/IC6/PMD7/RE7 35 INT0/RF6

4 C1IND/RP21/ICM1/OCM1A/PMA5/RG6 36 SDA1/RG35 C1INC/RP26/OCM1B/PMA4/RG7 37 SCL1/RG26 C2IND/RP19/ICM2/OCM2A/PMA3/RG8 38 VDD

7 MCLR 39 OSCI/CLKI/RC12

8 C1INC/C2INC/C3INC/RP27/OCM2B/PMA2/PMALU/RG9 40 OSCO/CLKO/RC159 VSS 41 VSS

10 VDD 42 CLC4OUT/RP2/U6RTS/U6BCLK/ICM5/RD811 PGEC3/AN5/C1INA/RP18/ICM3/OCM3A/RB5 43 RP4/PMACK2/RD912 PGED3/AN4/C1INB/RP28/OCM3B/RB4 44 RP3/PMA15/PMCS2/RD1013 AN3/C2INA/RB3 45 RP12/PMA14/PMCS1/RD11

14 AN2/CTCMP/C2INB/RP13/CTED13/RB2 46 CLC3OUT/RP11/U6CTS/ICM6/RD015 PGEC1/ALTCVREF-/ALTVREF-/AN1/RP1/CTED12/RB1 47 SOSCI/C3IND/RC1316 PGED1/ALTCVREF+/ALTVREF+/AN0/RP0/PMA6/RB0 48 SOSCO/C3INC/RPI37/PWRLCLK/RC1417 PGEC2/AN6/RP6/RB6 49 RP24/U5TX/ICM4/RD118 PGED2/AN7/RP7/U6TX/RB7 50 RP23/PMACK1/RD219 AVDD 51 RP22/ICM7/PMBE0/RD320 AVSS 52 RP25/PMWR/PMENB/RD4

21 AN8/RP8/PWRGT/RB8 53 RP20/PMRD/PMWR/RD5

22 AN9/TMPR/RP9/T1CK/PMA7/RB9 54 C3INB/U5RX/OC4/RD6

23 TMS/CVREF/AN10/PMA13/RB10 55 C3INA/U5RTS/U5BCLK/OC5/RD7

24 TDO/AN11/REFI/PMA12/RB11 56 VCAP

25 VSS 57 N/C

26 VDD 58 U5CTS/OC6/RF0

27 TCK/AN12/U6RX/CTED2/PMA11/RB12 59 RF1

28 TDI/AN13/CTED1/PMA10/RB13 60 PMD0/RE0

29 AN14/RP14/CTED5/CTPLS/PMA1/PMALH/RB14 61 PMD1/RE130 AN15/RP29/CTED6/PMA0/PMALL/RB15 62 PMD2/RE231 RP10/SDA2/PMA9/RF4 63 CTED9/PMD3/RE332 RP17/SCL2/PMA8/RF5 64 HLVDIN/CTED8/PMD4/RE4

Legend: RPn and RPIn represent remappable pins for Peripheral Pin Select (PPS) functions.



Pin Diagrams(2) (Continued)

Legend: See Table 3 for a complete description of pin functions.Note 1: It is recommended to connect the metal pad on the bottom of the 64-pin QFN package to VSS.

2: Gray shading indicates 5.5V tolerant input pins.

64-Pin TQFP 64-Pin QFN(1)

2345678910111213141516

4847

22

44

24 25 26 27 28 29 30 31 32

1

4645

23

4342414039

63 62 61 5960 58 57 56 5455 53 52 51 4950

3837

34

3635

33

17 19 20 211864

VDDVSS

RG9MCLR

RG8RG7RG6RE7RE6RE5

RB5RB4RB3RB2RB1RB0

OSCI/RC12OSCO/RC15VSSRD8RD9RD10RD11RD0RC13RC14

VDD D+/RG2D-/RG3VUSB3V3VBUS/RF7RF3

VDD

VSS

RB1

1R

B10

RB9

RB8

AVS

S

AVD

D

RB7

RB6

RB1

2R

B13

RB1

4R

B15

RF4

RF5

RD

7V C

APN

/CR

F0R

F1R

E0R

E1R

E2R

E3R

E4

RD

6R

D5

RD

4R

D3

RD

2R

D1

PIC24FJXXXXGB606

15



TABLE 3: COMPLETE PIN FUNCTION DESCRIPTIONS (PIC24FJXXXGB606 TQFP/QFN)Pin Function Pin Function

1 IC4/CTED4/PMD5/RE5 33 RP16/USBID/RF32 SCL3/IC5/PMD6/RE6 34 VBUS/RF7

3 SDA3/IC6/PMD7/RE7 35 VUSB3V3

4 C1IND/RP21/ICM1/OCM1A/PMA5/RG6 36 D-/RG35 C1INC/RP26/OCM1B/PMA4/RG7 37 D+/RG26 C2IND/RP19/ICM2/OCM2A/PMA3/RG8 38 VDD

7 MCLR 39 OSCI/CLKI/RC12

8 C1INC/C2INC/C3INC/RP27/OCM2B/PMA2/PMALU/RG9 40 OSCO/CLKO/RC159 VSS 41 VSS

10 VDD 42 CLC4OUT/RP2/U6RTS/U6BCLK/ICM5/RD811 PGEC3/AN5/C1INA/RP18/ICM3/OCM3A/RB5 43 RP4/SDA1/PMACK2/RD9

12 PGED3/AN4/C1INB/RP28/USBOEN/OCM3B/RB4 44 RP3/SCL1/PMA15/PMCS2/RD1013 AN3/C2INA/RB3 45 RP12/PMA14/PMCS1/RD11

14 AN2/CTCMP/C2INB/RP13/CTED13/RB2 46 CLC3OUT/RP11/U6CTS/ICM6/INT0/RD015 PGEC1/ALTCVREF-/ALTVREF-/AN1/RP1/CTED12/RB1 47 SOSCI/C3IND/RC1316 PGED1/ALTCVREF+/ALTVREF+/AN0/RP0/PMA6/RB0 48 SOSCO/C3INC/RPI37/PWRLCLK/RC1417 PGEC2/AN6/RP6/RB6 49 RP24/U5TX/ICM4/RD118 PGED2/AN7/RP7/U6TX/RB7 50 RP23/PMACK1/RD219 AVDD 51 RP22/ICM7/PMBE0/RD320 AVSS 52 RP25/PMWR/PMENB/RD4

21 AN8/RP8/PWRGT/RB8 53 RP20/PMRD/PMWR/RD5

22 AN9/TMPR/RP9/T1CK/PMA7/RB9 54 C3INB/U5RX/OC4/RD6

23 TMS/CVREF/AN10/PMA13/RB10 55 C3INA/U5RTS/U5BCLK/OC5/RD7

24 TDO/AN11/REFI/PMA12/RB11 56 VCAP

25 VSS 57 N/C

26 VDD 58 U5CTS/OC6/RF0

27 TCK/AN12/U6RX/CTED2/PMA11/RB12 59 RF1

28 TDI/AN13/CTED1/PMA10/RB13 60 PMD0/RE0

29 AN14/RP14/CTED5/CTPLS/PMA1/PMALH/RB14 61 PMD1/RE130 AN15/RP29/CTED6/PMA0/PMALL/RB15 62 PMD2/RE231 RP10/SDA2/PMA9/RF4 63 CTED9/PMD3/RE332 RP17/SCL2/PMA8/RF5 64 HLVDIN/CTED8/PMD4/RE4





Legend: See Table 4 for a complete description of pin functions.Note 1: Gray shading indicates 5.5V tolerant input pins.

100-Pin TQFP

9294 93 91 90 89 88 87 86 85 84 83 82 81 80 79 78

20

2345678910111213141516

65646362616059

26

56

4544434241403928 29 30 31 32 33 34 35 36 37 38

171819

2122

95

1

7677

72717069686766

757473

5857

2423

25

9698 979927 46 47 48 49 50

5554535251

100

RD

5R

D4

RD

13R

D12

RD

3R

D2

RD

1

RA7

RA6

RE2

RG

13R

G12

RG

14R

E1R

E0

RG

0

RE4

RE3

RF0

VCAP

RC13RD0

RD10RD9RD8

RD11

RA15RA14

OSCO/RC15OSCI/RC12VDD

RG2

RF6RF7RF8

RG3

RF2RF3

VSSRC14

RA1

0R

A9

AVD

DAV

SSR

B8R

B9R

B10

RB1

1

V DD

RF1

2R

F13

VSS

VDD

RD

15R

D14

RB6

RB7 RF5

RF4

RE5RE6RE7RC1RC2RC3RC4RG6

VDDRA0RE8RE9RB5RB4RB3RB2

RG7RG8

RB1RB0

RG15VDD

RG9MCLR

RB1

2R

B13

RB1

4R

B15

RG

1R

F1

RD

7R

D6

RA5

RA3RA2

VSS

VSS

VSS

N/C

RA4

RA1

PIC24FJXXXXGA610



TABLE 4: COMPLETE PIN FUNCTION DESCRIPTIONS (PIC24FJXXXGA610 TQFP)Pin Function Pin Function

1 OCM1C/CTED3/RG15 51 RP16/RF32 VDD 52 RP30/RF23 IC4/CTED4/PMD5/RE5 53 RP15/RF84 SCL3/IC5/PMD6/RE6 54 RF75 SDA3/IC6/PMD7/RE7 55 INT0/RF66 RPI38/OCM1D/RC1 56 SDA1/RG37 RPI39/OCM2C/RC2 57 SCL1/RG28 RPI40/OCM2D/RC3 58 PMPCS1/SCL2/RA29 AN16/RPI41/OCM3C/PMCS2/RC4 59 SDA2/PMA20/RA310 AN17/C1IND/RP21/ICM1/OCM1A/PMA5/RG6 60 TDI/PMA21/RA411 AN18/C1INC/RP26/OCM1B/PMA4/RG7 61 TDO/RA512 AN19/C2IND/RP19/ICM2/OCM2A/PMA3/RG8 62 VDD13 MCLR 63 OSCI/CLKI/RC1214 AN20/C1INC/C2INC/C3INC/RP27/OCM2B/PMA2/PMALU/RG9 64 OSCO/CLKO/RC1515 VSS 65 VSS16 VDD 66 RPI36/PMA22/RA1417 TMS/OCM3D/RA0 67 RPI35/PMBE1/RA1518 RPI33/PMCS1/RE8 68 CLC4OUT/RP2/U6RTS/U6BCLK/ICM5/RD819 AN21/RPI34/PMA19/RE9 69 RP4/PMACK2/RD920 PGEC3/AN5/C1INA/RP18/ICM3/OCM3A/RB5 70 RP3/PMA15/PMCS2/RD1021 PGED3/AN4/C1INB/RP28/OCM3B/RB4 71 RP12/PMA14/PMCS1/RD1122 AN3/C2INA/RB3 72 CLC3OUT/RP11/U6CTS/ICM6/RD023 AN2/CTCMP/C2INB/RP13/CTED13/RB2 73 SOSCI/C3IND/RC1324 PGEC1/ALTCVREF-/ALTVREF-/AN1/RP1/CTED12/RB1 74 SOSCO/C3INC/RPI37/PWRLCLK/RC1425 PGED1/ALTCVREF+/ALTVREF+/AN0/RP0/RB0 75 VSS26 PGEC2/AN6/RP6/RB6 76 RP24/U5TX/ICM4/RD127 PGED2/AN7/RP7/U6TX/RB7 77 RP23/PMACK1/RD228 CVREF-/VREF-/PMA7/RA9 78 RP22/ICM7/PMBE0/RD329 CVREF+/VREF+/PMA6/RA10 79 RPI42/OCM3E/PMD12/RD1230 AVDD 80 OCM3F/PMD13/RD1331 AVSS 81 RP25/PMWR/PMENB/RD432 AN8/RP8/PWRGT/RB8 82 RP20/PMRD/PMWR/RD533 AN9/TMPR/RP9/T1CK/RB9 83 C3INB/U5RX/OC4/PMD14/RD634 CVREF/AN10/PMA13/RB10 84 C3INA/U5RTS/U5BCLK/OC5/PMD15/RD735 AN11/REFI/PMA12/RB11 85 VCAP36 VSS 86 N/C

37 VDD 87 U5CTS/OC6/PMD11/RF038 TCK/RA1 88 PMD10/RF139 RP31/RF13 89 PMD9/RG140 RPI32/CTED7/PMA18/RF12 90 PMD8/RG041 AN12/U6RX/CTED2/PMA11/RB12 91 AN23/OCM1E/RA642 AN13/CTED1/PMA10/RB13 92 AN22/OCM1F/PMA17/RA743 AN14/RP14/CTED5/CTPLS/PMA1/PMALH/RB14 93 PMD0/RE044 AN15/RP29/CTED6/PMA0/PMALL/RB15 94 PMD1/RE145 VSS 95 CTED11/PMA16/RG1446 VDD 96 OCM2E/RG1247 RPI43/RD14 97 OCM2F/CTED10/RG1348 RP5/RD15 98 PMD2/RE249 RP10/PMA9/RF4 99 CTED9/PMD3/RE350 RP17/PMA8/RF5 100 HLVDIN/CTED8/PMD4/RE4






100-Pin TQFP

9294 93 91 90 89 88 87 86 85 84 83 82 81 80 79 78

20

2345678910111213141516

65646362616059

26

56

4544434241403928 29 30 31 32 33 34 35 36 37 38

171819

2122

95

1

7677

72717069686766

757473

5857

2423

25

9698 979927 46 47 48 49 50

5554535251

100

RD

5R

D4

RD

13R

D12

RD

3R

D2

RD

1

RA7

RA6

RE2

RG

13R

G12

RG

14R

E1R

E0

RG

0

RE4

RE3

RF0

VCAP

RC13RD0

RD10RD9RD8

RD11

RA15RA14

OSCO/RC15OSCI/RC12VDD

D+/RG2

VUSB3V3VBUS/RF7RF8

D-/RG3

RF2RF3

VSSRC14

RA1

0R

A9

AVD

DAV

SSR

B8R

B9R

B10

RB1

1

V DD

RF1

2R

F13

VSS

VDD

RD

15R

D14

RB6

RB7 RF5

RF4

RE5RE6RE7RC1RC2RC3RC4RG6

VDDRA0RE8RE9RB5RB4RB3RB2

RG7RG8

RB1RB0

RG15VDD

RG9MCLR

RB1

2R

B13

RB1

4R

B15

RG

1R

F1

RD

7R

D6

RA5

RA3RA2

VSS

VSS

VSS

N/C

RA4

RA1

PIC24FJXXXXGB610



TABLE 5: COMPLETE PIN FUNCTION DESCRIPTIONS (PIC24FJXXXGB610 TQFP)Pin Function Pin Function

1 OCM1C/CTED3/RG15 51 RP16/USBID/RF32 VDD 52 RP30/RF23 IC4/CTED4/PMD5/RE5 53 RP15/RF84 SCL3/IC5/PMD6/RE6 54 VBUS/RF75 SDA3/IC6/PMD7/RE7 55 VUSB3V36 RPI38/OCM1D/RC1 56 D-/RG37 RPI39/OCM2C/RC2 57 D+/RG28 RPI40/OCM2D/RC3 58 PMPCS1/SCL2/RA29 AN16/RPI41/OCM3C/PMCS2/RC4 59 SDA2/PMA20/RA310 AN17/C1IND/RP21/ICM1/OCM1A/PMA5/RG6 60 TDI/PMA21/RA411 AN18/C1INC/RP26/OCM1B/PMA4/RG7 61 TDO/RA512 AN19/C2IND/RP19/ICM2/OCM2A/PMA3/RG8 62 VDD13 MCLR 63 OSCI/CLKI/RC1214 AN20/C1INC/C2INC/C3INC/RP27/OCM2B/PMA2/PMALU/RG9 64 OSCO/CLKO/RC1515 VSS 65 VSS16 VDD 66 RPI36/SCL1/PMA22/RA1417 TMS/OCM3D/RA0 67 RPI35/SDA1/PMBE1/RA1518 RPI33/PMCS1/RE8 68 CLC4OUT/RP2/U6RTS/U6BCLK/ICM5/RD819 AN21/RPI34/PMA19/RE9 69 RP4/PMACK2/RD920 PGEC3/AN5/C1INA/RP18/ICM3/OCM3A/RB5 70 RP3/PMA15/PMCS2/RD1021 PGED3/AN4/C1INB/RP28/USBOEN/OCM3B/RB4 71 RP12/PMA14/PMCS1/RD1122 AN3/C2INA/RB3 72 CLC3OUT/RP11/U6CTS/ICM6/INT0/RD023 AN2/CTCMP/C2INB/RP13/CTED13/RB2 73 SOSCI/C3IND/RC1324 PGEC1/ALTCVREF-/ALTVREF-/AN1/RP1/CTED12/RB1 74 SOSCO/C3INC/RPI37/PWRLCLK/RC1425 PGED1/ALTCVREF+/ALTVREF+/AN0/RP0/RB0 75 VSS26 PGEC2/AN6/RP6/RB6 76 RP24/U5TX/ICM4/RD127 PGED2/AN7/RP7/U6TX/RB7 77 RP23/PMACK1/RD228 CVREF-/VREF-/PMA7/RA9 78 RP22/ICM7/PMBE0/RD329 CVREF+/VREF+/PMA6/RA10 79 RPI42/OCM3E/PMD12/RD1230 AVDD 80 OCM3F/PMD13/RD1331 AVSS 81 RP25/PMWR/PMENB/RD432 AN8/RP8/PWRGT/RB8 82 RP20/PMRD/PMWR/RD533 AN9/TMPR/RP9/T1CK/RB9 83 C3INB/U5RX/OC4/PMD14/RD634 CVREF/AN10/PMA13/RB10 84 C3INA/U5RTS/U5BCLK/OC5/PMD15/RD735 AN11/REFI/PMA12/RB11 85 VCAP36 VSS 86 N/C

37 VDD 87 U5CTS/OC6/PMD11/RF038 TCK/RA1 88 PMD10/RF139 RP31/RF13 89 PMD9/RG140 RPI32/CTED7/PMA18/RF12 90 PMD8/RG041 AN12/U6RX/CTED2/PMA11/RB12 91 AN23/OCM1E/RA642 AN13/CTED1/PMA10/RB13 92 AN22/OCM1F/PMA17/RA743 AN14/RP14/CTED5/CTPLS/PMA1/PMALH/RB14 93 PMD0/RE044 AN15/RP29/CTED6/PMA0/PMALL/RB15 94 PMD1/RE145 VSS 95 CTED11/PMA16/RG1446 VDD 96 OCM2E/RG1247 RPI43/RD14 97 OCM2F/CTED10/RG1348 RP5/RD15 98 PMD2/RE249 RP10/PMA9/RF4 99 CTED9/PMD3/RE350 RP17/PMA8/RF5 100 HLVDIN/CTED8/PMD4/RE4






PIC24FJXXXGA610 121-Pin BGA

RE4 RE3 RG13 RE0 RG0 RF1 RD12 RD2 RD1

RG15 RE2 RE1 RA7 RF0 VCAP RD5 RD3 VSS RC14

RE6 VDD RG12 RG14 RA6 RD7 RD4 RC13 RD11

RC1 RE7 RE5 RD6 RD13 RD0 RD10

RC4 RC3 RG6 RC2 RG1 RA15 RD8 RD9 RA14

MCLR RG8 RG9 RG7 VSS VDD RC12 VSS RC15

RE8 RE9 RA0 VDD VSS VSS RA5 RA3 RA4

RB5 RB4 VDD RF7 RF6 RG2 RA2

RB3 RB2 RB7 AVDD RB11 RA1 RB12 RF8 RG3

RB1 RB0 RA10 RB8 RF12 RB14 VDD RD15 RF3 RF2

RB6 RA9 AVSS RB9 RB10 RF13 RB13 RB15 RD14 RF4 RF5

1 2 3 4 5 6 7 8 9 10 11

A

B

C

D

E

F

G

H

J

K

L

N/C N/C

N/C

N/C

N/CN/CN/C

N/C N/C

N/C

N/C

N/C N/C

N/C N/C

N/C N/C N/C

N/C N/C

N/C

N/C



TABLE 6: COMPLETE PIN FUNCTION DESCRIPTIONS (PIC24FJXXXGA610 BGA)

Pin Full Pin Name Pin Full Pin Name

A1 HLVDIN/CTED8/PMD4/RE4 E1 AN16/RPI41/OCM3C/PMCS2/RC4A2 CTED9/PMD3/RE3 E2 RPI40/OCM2D/RC3A3 OCM2F/CTED10/RG13 E3 AN17/C1IND/RP21/ICM1/OCM1A/PMA5/RG6A4 PMD0/RE0 E4 RPI39/OCM2C/RC2A5 PMD8/RG0 E5 N/CA6 PMD10/RF1 E6 PMD9/RG1A7 N/C E7 N/CA8 N/C E8 RPI35/PMBE1/RA15A9 RPI42/OCM3E/PMD12/RD12 E9 CLC4OUT/RP2/U6RTS/U6BCLK/ICM5/RD8A10 RP23/PMACK1/RD2 E10 RP4/PMACK2/RD9A11 RP24/U5TX/ICM4/RD1 E11 RPI36/PMA22/RA14B1 N/C F1 MCLRB2 OCM1C/CTED3/RG15 F2 AN19/C2IND/RP19/ICM2/OCM2A/PMA3/RG8B3 PMD2/RE2 F3 AN20/C1INC/C2INC/C3INC/RP27/OCM2B/PMA2/PMALU/

RG9B4 PMD1/RE1 F4 AN18/C1INC/RP26/OCM1B/PMA4/RG7B5 AN22/OCM1F/PMA17/RA7 F5 VSS

B6 U5CTS/OC6/PMD11/RF0 F6 N/CB7 VCAP F7 N/C

B8 RP20/PMRD/PMWR/RD5 F8 VDDB9 RP22/ICM7/PMBE0/RD3 F9 OSCI/CLKI/RC12B10 VSS F10 VSSB11 SOSCO/C3INC/RPI37/PWRLCLK/RC14 F11 OSCO/CLKO/RC15C1 SCL3/IC5/PMD6/RE6 G1 RPI33/PMCS1/RE8C2 VDD G2 AN21/RPI34/PMA19/RE9C3 OCM2E/RG12 G3 TMS/OCM3D/RA0C4 CTED11/PMA16/RG14 G4 N/CC5 AN23/OCM1E/RA6 G5 VDDC6 N/C G6 VSS

C7 C3INA/U5RTS/U5BCLK/OC5/PMD15/RD7 G7 VSSC8 RP25/PMWR/PMENB/RD4 G8 N/CC9 N/C G9 TDO/RA5C10 SOSCI/C3IND/RC13 G10 SDA2/PMA20/RA3C11 RP12/PMA14/PMCS1/RD11 G11 TDI/PMA21/RA4D1 RPI38/OCM1D/RC1 H1 PGEC3/AN5/C1INA/RP18/ICM3/OCM3A/RB5D2 SDA3/IC6/PMD7/RE7 H2 PGED3/AN4/C1INB/RP28/OCM3B/RB4D3 IC4/CTED4/PMD5/RE5 H3 N/CD4 N/C H4 N/CD5 N/C H5 N/CD6 N/C H6 VDDD7 C3INB/U5RX/OC4/PMD14/RD6 H7 N/CD8 OCM3F/PMD13/RD13 H8 RF7

D9 CLC3OUT/RP11/U6CTS/ICM6/RD0 H9 INT0/RF6D10 N/C H10 SCL1/RG2D11 RP3/PMA15/PMCS2/RD10 H11 PMPCS1/SCL2/RA2




J1 AN3/C2INA/RB3 K7 AN14/RP14/CTED5/CTPLS/PMA1/PMALH/RB14J2 AN2/CTCMP/C2INB/RP13/CTED13/RB2 K8 VDDJ3 PGED2/AN7/RP7/U6TX/RB7 K9 RP5/RD15J4 AVDD K10 RP16/RF3J5 AN11/REFI/PMA12/RB11 K11 RP30/RF2J6 TCK/RA1 L1 PGEC2/AN6/RP6/RB6J7 AN12/U6RX/CTED2/PMA11/RB12 L2 CVREF-/VREF-/PMA7/RA9J8 N/C L3 AVSS

J9 N/C L4 AN9/TMPR/RP9/T1CK/RB9J10 RP15/RF8 L5 CVREF/AN10/PMA13/RB10J11 SDA1/RG3 L6 RP31/RF13K1 PGEC1/ALTCVREF-/ALTVREF-/AN1/RP1/CTED12/RB1 L7 AN13/CTED1/PMA10/RB13K2 PGED1/ALTCVREF+/ALTVREF+/AN0/RP0/RB0 L8 AN15/RP29/CTED6/PMA0/PMALL/RB15K3 CVREF+/VREF+/PMA6/RA10 L9 RPI43/RD14K4 AN8/RP8/PWRGT/RB8 L10 RP10/PMA9/RF4K5 N/C L11 RP17/PMA8/RF5K6 RPI32/CTED7/PMA18/RF12

TABLE 6: COMPLETE PIN FUNCTION DESCRIPTIONS (PIC24FJXXXGA610 BGA) (CONTINUED)Pin Full Pin Name Pin Full Pin Name






PIC24FJXXXGB610 121-Pin BGA

RE4 RE3 RG13 RE0 RG0 RF1 RD12 RD2 RD1

RG15 RE2 RE1 RA7 RF0 VCAP RD5 RD3 VSS RC14

RE6 VDD RG12 RG14 RA6 RD7 RD4 RC13 RD11

RC1 RE7 RE5 RD6 RD13 RD0 RD10

RC4 RC3 RG6 RC2 RG1 RA15 RD8 RD9 RA14

MCLR RG8 RG9 RG7 VSS VDD RC12 VSS RC15

RE8 RE9 RA0 VDD VSS VSS RA5 RA3 RA4

RB5 RB4 VDD VBUS/RF7 VUSB3V3 D+/RG2 RA2

RB3 RB2 RB7 AVDD RB11 RA1 RB12 RF8 D-/RG3

RB1 RB0 RA10 RB8 RF12 RB14 VDD RD15 RF3 RF2

RB6 RA9 AVSS RB9 RB10 RF13 RB13 RB15 RD14 RF4 RF5

1 2 3 4 5 6 7 8 9 10 11

A

B

C

D

E

F

G

H

J

K

L

N/C N/C

N/C

N/C

N/CN/CN/C

N/C N/C

N/C

N/C

N/C N/C

N/C N/C

N/C N/C N/C

N/C N/C

N/C

N/C



TABLE 7: COMPLETE PIN FUNCTION DESCRIPTIONS (PIC24FJXXXGB610 BGA)

Pin Full Pin Name Pin Full Pin Name

A1 HLVDIN/CTED8/PMD4/RE4 E1 AN16/RPI41/OCM3C/PMCS2/RC4A2 CTED9/PMD3/RE3 E2 RPI40/OCM2D/RC3A3 OCM2F/CTED10/RG13 E3 AN17/C1IND/RP21/ICM1/OCM1A/PMA5/RG6A4 PMD0/RE0 E4 RPI39/OCM2C/RC2A5 PMD8/RG0 E5 N/C

A6 PMD10/RF1 E6 PMD9/RG1

A7 N/C E7 N/C

A8 N/C E8 RPI35/SDA1/PMBE1/RA15

A9 RPI42/OCM3E/PMD12/RD12 E9 CLC4OUT/RP2/U6RTS/U6BCLK/ICM5/RD8A10 RP23/PMACK1/RD2 E10 RP4/PMACK2/RD9A11 RP24/U5TX/ICM4/RD1 E11 RPI36/SCL1/PMA22/RA14

B1 N/C F1 MCLR

B2 OCM1C/CTED3/RG15 F2 AN19/C2IND/RP19/ICM2/OCM2A/PMA3/RG8B3 PMD2/RE2 F3 AN20/C1INC/C2INC/C3INC/RP27/OCM2B/PMA2/PMALU/

RG9

B4 PMD1/RE1 F4 AN18/C1INC/RP26/OCM1B/PMA4/RG7B5 AN22/OCM1F/PMA17/RA7 F5 VSS

B6 U5CTS/OC6/PMD11/RF0 F6 N/C

B7 VCAP F7 N/C

B8 RP20/PMRD/PMWR/RD5 F8 VDDB9 RP22/ICM7/PMBE0/RD3 F9 OSCI/CLKI/RC12

B10 VSS F10 VSS

B11 SOSCO/C3INC/RPI37/PWRLCLK/RC14 F11 OSCO/CLKO/RC15C1 SCL3/IC5/PMD6/RE6 G1 RPI33/PMCS1/RE8C2 VDD G2 AN21/RPI34/PMA19/RE9C3 OCM2E/RG12 G3 TMS/OCM3D/RA0

C4 CTED11/PMA16/RG14 G4 N/C

C5 AN23/OCM1E/RA6 G5 VDD

C6 N/C G6 VSS

C7 C3INA/U5RTS/U5BCLK/OC5/PMD15/RD7 G7 VSS

C8 RP25/PMWR/PMENB/RD4 G8 N/CC9 N/C G9 TDO/RA5

C10 SOSCI/C3IND/RC13 G10 SDA2/PMA20/RA3

C11 RP12/PMA14/PMCS1/RD11 G11 TDI/PMA21/RA4D1 RPI38/OCM1D/RC1 H1 PGEC3/AN5/C1INA/RP18/ICM3/OCM3A/RB5

D2 SDA3/IC6/PMD7/RE7 H2 PGED3/AN4/C1INB/RP28/USBOEN/OCM3B/RB4D3 IC4/CTED4/PMD5/RE5 H3 N/C

D4 N/C H4 N/C

D5 N/C H5 N/C

D6 N/C H6 VDD

D7 C3INB/U5RX/OC4/PMD14/RD6 H7 N/C

D8 OCM3F/PMD13/RD13 H8 VBUS/RF7

D9 CLC3OUT/RP11/U6CTS/ICM6/INT0/RD0 H9 VUSB3V3D10 N/C H10 D+/RG2

D11 RP3/PMA15/PMCS2/RD10 H11 PMPCS1/SCL2/RA2Legend: RPn and RPIn represent remappable pins for Peripheral Pin Select (PPS) functions.



J1 AN3/C2INA/RB3 K7 AN14/RP14/CTED5/CTPLS/PMA1/PMALH/RB14J2 AN2/CTCMP/C2INB/RP13/CTED13/RB2 K8 VDDJ3 PGED2/AN7/RP7/U6TX/RB7 K9 RP5/RD15J4 AVDD K10 RP16/USBID/RF3J5 AN11/REFI/PMA12/RB11 K11 RP30/RF2J6 TCK/RA1 L1 PGEC2/AN6/RP6/RB6J7 AN12/U6RX/CTED2/PMA11/RB12 L2 CVREF-/VREF-/PMA7/RA9

J8 N/C L3 AVSS

J9 N/C L4 AN9/TMPR/RP9/T1CK/RB9J10 RP15/RF8 L5 CVREF/AN10/PMA13/RB10J11 D-/RG3 L6 RP31/RF13K1 PGEC1/ALTCVREF-/ALTVREF-/AN1/RP1/CTED12/RB1 L7 AN13/CTED1/PMA10/RB13K2 PGED1/ALTCVREF+/ALTVREF+/AN0/RP0/RB0 L8 AN15/RP29/CTED6/PMA0/PMALL/RB15K3 CVREF+/VREF+/PMA6/RA10 L9 RPI43/RD14K4 AN8/RP8/PWRGT/RB8 L10 RP10/PMA9/RF4K5 N/C L11 RP17/PMA8/RF5K6 RPI32/CTED7/PMA18/RF12

TABLE 7: COMPLETE PIN FUNCTION DESCRIPTIONS (PIC24FJXXXGB610 BGA) (CONTINUED)Pin Full Pin Name Pin Full Pin Name




Table of Contents1.0 Device Overview ........................................................................................................................................................................ 212.0 Guidelines for Getting Started with 16-Bit Microcontrollers ........................................................................................................ 413.0 CPU ........................................................................................................................................................................................... 474.0 Memory Organization ................................................................................................................................................................. 535.0 Direct Memory Access Controller (DMA) ................................................................................................................................... 816.0 Flash Program Memory.............................................................................................................................................................. 897.0 Resets ........................................................................................................................................................................................ 978.0 Interrupt Controller ................................................................................................................................................................... 1059.0 Oscillator Configuration ............................................................................................................................................................ 11710.0 Power-Saving Features............................................................................................................................................................ 13711.0 I/O Ports ................................................................................................................................................................................... 14912.0 Timer1 ...................................................................................................................................................................................... 18513.0 Timer2/3 and Timer4/5 ............................................................................................................................................................ 18714.0 Input Capture with Dedicated Timers ....................................................................................................................................... 19315.0 Output Compare with Dedicated Timers .................................................................................................................................. 19916.0 Capture/Compare/PWM/Timer Modules (MCCP and SCCP) .................................................................................................. 20917.0 Serial Peripheral Interface (SPI)............................................................................................................................................... 22718.0 Inter-Integrated Circuit (I2C) ..................................................................................................................................................... 24719.0 Universal Asynchronous Receiver Transmitter (UART) ........................................................................................................... 25520.0 Universal Serial Bus with On-The-Go Support (USB OTG) ..................................................................................................... 26521.0 Enhanced Parallel Master Port (EPMP) ................................................................................................................................... 29922.0 Real-Time Clock and Calendar with Timestamp ...................................................................................................................... 31123.0 32-Bit Programmable Cyclic Redundancy Check (CRC) Generator ........................................................................................ 33124.0 Configurable Logic Cell (CLC).................................................................................................................................................. 33725.0 12-Bit A/D Converter with Threshold Detect ............................................................................................................................ 34726.0 Triple Comparator Module........................................................................................................................................................ 36327.0 Comparator Voltage Reference................................................................................................................................................ 36928.0 Charge Time Measurement Unit (CTMU) ................................................................................................................................ 37129.0 High/Low-Voltage Detect (HLVD)............................................................................................................................................. 38130.0 Special Features ..................................................................................................................................................................... 38331.0 Development Support............................................................................................................................................................... 40132.0 Instruction Set Summary .......................................................................................................................................................... 40333.0 Electrical Characteristics .......................................................................................................................................................... 41134.0 Packaging Information.............................................................................................................................................................. 443Appendix A: Revision History............................................................................................................................................................. 457Index ................................................................................................................................................................................................. 459The Microchip Website....................................................................................................................................................................... 465Customer Change Notification Service .............................................................................................................................................. 465Customer Support .............................................................................................................................................................................. 465Product Identification System............................................................................................................................................................. 467



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Referenced SourcesThis device data sheet is based on the followingindividual chapters of the “dsPIC33/PIC24 FamilyReference Manual”. These documents should beconsidered as the general reference for the operationof a particular module or device feature.

• “CPU with Extended Data Space (EDS)” (www.microchip.com/DS39732)• “Data Memory with Extended Data Space (EDS)” (www.microchip.com/DS39733)• “Direct Memory Access Controller (DMA)” (www.microchip.com/DS30009742)• “PIC24F Flash Program Memory” (www.microchip.com/DS30009715)• “Reset” (www.microchip.com/DS39712)• “Interrupts” (www.microchip.com/DS70000600)• “Oscillator” (www.microchip.com/DS39700)• “Power-Saving Features” (www.microchip.com/DS39698)• “I/O Ports with Interrupt-on-Change (IOC)” (www.microchip.com/DS70005186)• “Timers” (www.microchip.com/DS39704)• ”Input Capture with Dedicated Timer” (www.microchip.com/DS70000352)• “Output Compare with Dedicated Timer” (www.microchip.com/DS70005159)• “Capture/Compare/PWM/Timer (MCCP and SCCP)” (www.microchip.com/DS30003035A)• “Serial Peripheral Interface (SPI) with Audio Codec Support” (www.microchip.com/DS70005136)• “Inter-Integrated Circuit (I2C)” (www.microchip.com/DS70000195)• “UART” (www.microchip.com/DS39708)• “USB On-The-Go (OTG)” (www.microchip.com/DS39721)• “Enhanced Parallel Master Port (EPMP)” (www.microchip.com/DS39730)• “RTCC with Timestamp” (www.microchip.com/DS70005193)• “RTCC with External Power Control” (www.microchip.com/DS39745)• “32-Bit Programmable Cyclic Redundancy Check (CRC)” (www.microchip.com/DS30009729)• “12-Bit A/D Converter with Threshold Detect” (www.microchip.com/DS39739)• “Scalable Comparator Module” (www.microchip.com/DS39734)• “Dual Comparator Module” (www.microchip.com/DS39710)• “Charge Time Measurement Unit (CTMU) and CTMU Operation with Threshold Detect”

(www.microchip.com/DS30009743)• “High-Level Integration with Programmable High/Low-Voltage Detect (HLVD)” (www.microchip.com/DS39725)• “Watchdog Timer (WDT)” (www.microchip.com/DS39697)• “CodeGuard™ Intermediate Security” (www.microchip.com/DS70005182)• “High-Level Device Integration” (www.microchip.com/DS39719)• “Programming and Diagnostics” (www.microchip.com/DS39716)• “Dual Partition Flash Program Memory” (www.microchip.com/DS70005156)• “Configurable Logic Cell (CLC)” (www.microchip.com/DS70005298)

Note 1: To access the documents listed below,browse to the documentation section ofthe PIC24FJ1024GA610/GB610 productpage of the Microchip website(www.microchip.com) or select a familyreference manual section from thefollowing list.In addition to parameters, features andother documentation, the resulting pageprovides links to the related familyreference manual sections.


http://www.microchip.com/wwwproducts/Devices.aspx?dDocName=en555464#1http://www.microchip.comhttp://www.microchip.comhttp://www.microchip.com


1.0 DEVICE OVERVIEWThis document contains device-specific information forthe following devices:

The PIC24FJ1024GA610/GB610 family introduces manynew analog features to the extreme low-powerMicrochip devices. This is a 16-bit microcontroller familywith a broad peripheral feature set and enhancedcomputational performance. This family also offers anew migration option for those high-performance appli-cations which may be outgrowing their 8-bit platforms,but do not require the numerical processing power of aDigital Signal Processor (DSP).

Table 1-3 lists the functions of the various pins shownin the pinout diagrams.

1.1 Core Features

1.1.1 16-BIT ARCHITECTURECentral to all PIC24F devices is the 16-bit modifiedHarvard architecture, first introduced with Microchip’sdsPIC® Digital Signal Controllers (DSCs). The PIC24FCPU core offers a wide range of enhancements, suchas:• 16-bit data and 24-bit address paths with the

ability to move information between data and memory spaces

• Linear addressing of up to 12 Mbytes (program space) and 32 Kbytes (data)

• A 16-element Working register array with built-in software stack support

• A 17 x 17 hardware multiplier with support for integer math

• Hardware support for 32 by 16-bit division• An instruction set that supports multiple

addressing modes and is optimized for high-level languages, such as ‘C’

• Operational performance up to 16 MIPS

1.1.2 POWER-SAVING TECHNOLOGYThe PIC24FJ1024GA610/GB610 family of devicesincludes Retention Sleep, a low-power mode withessential circuits being powered from a separatelow-voltage regulator.

This new low-power mode also supports the continuousoperation of the low-power, on-chip Real-Time Clock/Calendar (RTCC), making it possible for an applicationto keep time while the device is otherwise asleep.Aside from this new feature, PIC24FJ1024GA610/GB610family devices also include all of the legacy power-savingfeatures of previous PIC24F microcontrollers, such as:• On-the-Fly Clock Switching, allowing the selection

of a lower power clock during run time• Doze Mode Operation, for maintaining peripheral

clock speed while slowing the CPU clock• Instruction-Based Power-Saving Modes, for quick

invocation of the Idle and the Sleep modes

1.1.3 OSCILLATOR OPTIONS AND FEATURES

All of the devices in the PIC24FJ1024GA610/GB610family offer six different oscillator options, allowingusers a range of choices in developing applicationhardware. These include:• Two Crystal modes• Two External Clock (EC) modes• A Phase-Locked Loop (PLL) frequency multiplier,

which allows clock speeds of up to 32 MHz• A Digitally Controlled Oscillator (DCO) with

multiple frequencies and fast wake-up time• A Fast Internal Oscillator (FRC), a nominal 8 MHz

output, with multiple frequency divider options• A separate Low-Power Internal RC Oscillator

(LPRC), 31 kHz nominal, for low-power, timing-insensitive applications.

The internal oscillator block also provides a stablereference source for the Fail-Safe Clock Monitor(FSCM). This option constantly monitors the main clocksource against a reference signal provided by the inter-nal oscillator and enables the controller to switch to theinternal oscillator, allowing for continued low-speedoperation or a safe application shutdown.

1.1.4 EASY MIGRATIONRegardless of the memory size, all devices share thesame rich set of peripherals, allowing for a smoothmigration path as applications grow and evolve. Theconsistent pinout scheme used throughout the entirefamily also aids in migrating from one device to the nextlarger device, or even in jumping from 64-pin to 100-pindevices.The PIC24F family is pin-compatible with devices in thedsPIC33 family, and shares some compatibility with thepinout schema for PIC18 and dsPIC30. This extendsthe ability of applications to grow from the relativelysimple, to the powerful and complex, yet still selectinga Microchip device.

• PIC24FJ1024GB610 • PIC24FJ1024GA610• PIC24FJ512GB610 • PIC24FJ512GA610• PIC24FJ256GB610 • PIC24FJ256GA610• PIC24FJ128GB610 • PIC24FJ128GA610• PIC24FJ1024GB606 • PIC24FJ1024GA606• PIC24FJ512GB606 • PIC24FJ512GA606• PIC24FJ256GB606 • PIC24FJ256GA606• PIC24FJ128GB606 • PIC24FJ128GA606



1.2 DMA ControllerPIC24FJ1024GA610/GB610 family devices have a DirectMemory Access (DMA) Controller. This module acts inconcert with the CPU, allowing data to move betweendata memory and peripherals without the intervention ofthe CPU, increasing data throughput and decreasing exe-cution time overhead. Eight independently programmablechannels make it possible to service multiple peripheralsat virtually the same time, with each channel peripheralperforming a different operation. Many types of datatransfer operations are supported.

1.3 Other Special Features• Peripheral Pin Select: The Peripheral Pin Select

(PPS) feature allows most digital peripherals to be mapped over a fixed set of digital I/O pins. Users may independently map the input and/or output of any one of the many digital peripherals to any one of the I/O pins.

• Configurable Logic Cell: The Configurable Logic Cell (CLC) module allows the user to specify combinations of signals as inputs to a logic function and to use the logic output to control other peripherals or I/O pins.

• Timing Modules: The PIC24FJ1024GA610/GB610 family provides five independent, general purpose, 16-bit timers (four of which can be combined into two 32-bit timers). The devices also include three multiple output and four single output advanced Capture/Compare/PWM/Timer peripherals, and six independent legacy Input Capture and six independent legacy Output Compare modules.

• Communications: The PIC24FJ1024GA610/GB610 family incorporates a range of serial communication peripherals to handle a range of application require-ments. There are three independent I2C modules that support both Master and Slave modes of operation. Devices also have, through the PPS feature, six independent UARTs with built-in IrDA® encoders/decoders and three SPI modules.

• Analog Features: All members of the PIC24FJ1024GA610/GB610 family include the new 12-bit A/D Converter (A/D) module and a triple comparator module. The A/D module incor-porates a range of new features that allow the converter to assess and make decisions on incoming data, reducing CPU overhead for routine A/D conversions. The comparator module includes three analog comparators that are configurable for a wide range of operations.

• CTMU Interface: In addition to their other analog features, members of the PIC24FJ1024GA610/GB610 family include the CTMU interface module. This provides a convenient method for precision time measurement and pulse generation, and can serve as an interface for capacitive sensors.

• Enhanced Parallel Master/Parallel Slave Port: This module allows rapid and transparent access to the microcontroller data bus, and enables the CPU to directly address external data memory. The parallel port can function in Master or Slave mode, accommodating data widths of 4, 8 or 16 bits and address widths of up to 23 bits in Master modes.

• Real-Time Clock and Calendar (RTCC): This module implements a full-featured clock and calendar with alarm functions in hardware, freeing up timer resources and program memory space for use of the core application.

1.4 Details on Individual Family Members

Devices in the PIC24FJ1024GA610/GB610 family areavailable in 64-pin, 100-pin and 121-pin packages. Thegeneral block diagram for all devices is shown inFigure 1-1.The devices are differentiated from each other insix ways:1. Flash program memory (128 Kbytes for

PIC24FJ128GX6XX devices, 256 Kbytes forPIC24FJ256GX6XX devices, 512 Kbytes forPIC24FJ512GX6XX devices and 1024 Kbytesfor PIC24FJ1024GX6XX devices).

2. Available I/O pins and ports (53 pins on six portsfor 64-pin devices and 85 pins on seven ports for100-pin and 121-pin devices).

3. Available interrupt-on-change (IOC) notificationinputs (53 on 64-pin devices and 85 on 100-pinand 121-pin devices).

4. Available remappable pins (29 pins on 64-pindevices, 44 pins on 100-pin and 121-pindevices).

5. Available USB peripheral (available onPIC24FJXXXGB6XX devices; not available onPIC24FJXXXGA6XX devices).

6. Analog input channels (16 channels for 64-pindevices and 24 channels for 100-pin and 121-pindevices).

All other features for devices in this family are identical.These are summarized in Table 1-1, Table 1-2 andTable 1-3.A list of the pin features available on thePIC24FJ1024GA610/GB610 family devices, sortedby function, is shown in Table 1-3. Note that this tableshows the pin location of individual peripheral featuresand not how they are multiplexed on the same pin. Thisinformation is provided in the pinout diagrams in thebeginning of this data sheet. Multiplexed features aresorted by the priority given to a feature, with the highestpriority peripheral being listed first.



TABLE 1-1: DEVICE FEATURES FOR THE PIC24FJ1024GA606/GB606: 64-PIN DEVICESFeatures PIC24FJ128GX606 PIC24FJ256GX606 PIC24FJ512GX606 PIC24FJ1024GX606

Operating Frequency DC – 32 MHzProgram Memory (bytes) 128K 256K 512K 1024KProgram Memory (instructions) 44,032 88,064 176,128 352,256Data Memory (bytes) 32KInterrupt Sources (soft vectors/NMI traps)

103 (97/6)

I/O Ports Ports B, C, D, E, F, GTotal I/O Pins 53Remappable Pins 29 (28 I/O, 1 input only)Timers:

5(1) Total Number (16-bit) 32-Bit (from paired 16-bit timers) 2Input Capture Channels 6(1)

Output Compare/PWM Channels 6(1)

Input Change Notification Interrupt 53Serial Communications:

6(1) UART SPI (3-wire/4-wire) 3(1)

I2C 3Configurable Logic Cell (CLC) 4(1)

Parallel Communications (EPMP/PSP)

Yes

Capture/Compare/PWM/Timer Modules

3 Multiple Outputs and 4 Single Outputs

JTAG Boundary Scan Yes12/10-Bit Analog-to-Digital Converter (A/D) Module (input channels)

16

Analog Comparators 3CTMU Interface YesUniversal Serial Bus Controller Yes (PIC24FJ1024GB606 devices only)Resets (and Delays) Core POR, VDD POR, BOR, RESET Instruction,

MCLR, WDT, Illegal Opcode, REPEAT Instruction, Hardware Traps, Configuration Word Mismatch

(OST, PLL Lock)Instruction Set 76 Base Instructions, Multiple Addressing Mode VariationsPackages 64-Pin TQFP and QFNNote 1: Some peripherals are accessible through remappable pins.



TABLE 1-2: DEVICE FEATURES FOR THE PIC24FJ1024GX610: 100-PIN AND 121-PIN DEVICESFeatures PIC24FJ128GX610 PIC24FJ256GX610 PIC24FJ512GX610 PIC24FJ1024GX610

Operating Frequency DC – 32 MHz Program Memory (bytes) 128K 256K 512K 1024KProgram Memory (instructions) 44,032 88,064 176,128 352,256Data Memory (bytes) 32KInterrupt Sources (soft vectors/NMI traps)

103 (97/6)

I/O Ports Ports A, B, C, D, E, F, GTotal I/O Pins 85Remappable Pins 44 (32 I/O, 12 input only)Timers:

5(1) Total Number (16-bit) 32-Bit (from paired 16-bit timers) 2Capture/Compare/PWM/Timer Modules

3 Multiple Outputs and 4 Single Outputs

Input Capture Channels 6(1)

Output Compare/PWM Channels 6(1)

Input Change Notification Interrupt 85Serial Communications:

6(1) UART SPI (3-wire/4-wire) 3(1)

I2C 3Configurable Logic Cell (CLC 4Parallel Communications (EPMP/PSP)

Yes

JTAG Boundary Scan Yes12/10-Bit Analog-to-Digital Converter (A/D) Module (input channels)

24

Analog Comparators 3CTMU Interface YesUniversal Serial Bus Controller Yes (PIC14FJ1024GB610 devices only)Resets (and delays) Core POR, VDD POR, BOR, RESET Instruction,

MCLR, WDT, Illegal Opcode, REPEAT Instruction, Hardware Traps, Configuration Word Mismatch

(OST, PLL Lock)Instruction Set 76 Base Instructions, Multiple Addressing Mode VariationsPackages 100-Pin TQFP and 121-Pin BGANote 1: Some peripherals are accessible through remappable pins.



FIGURE 1-1: PIC24FJ1024GA610/GB610 FAMILY GENERAL BLOCK DIAGRAM

InstructionDecode and

Control

16

PCH

16

Program Counter

16-Bit ALU

23

24

Data Bus

Inst Register

16

DivideSupport

Inst Latch

16

EA MUX

Read AGUWrite AGU

16

16

8

InterruptController

EDS and

StackControlLogic

RepeatControlLogic

Data Latch

Data RAM

AddressLatch

Address Latch

Extended Data

Data Latch

16

Address Bus

Literal

23

Control Signals

16

16

16 x 16W Reg Array

Multiplier17x17OSCI/CLKI

OSCO/CLKO

VDD, VSS

TimingGeneration

MCLR

Power-upTimer

OscillatorStart-up Timer

Power-onReset

WatchdogTimer

HLVD &

Precision

ReferenceBand Gap

FRC/LPRCOscillators

RegulatorsVoltage

VCAP

PORTA(1)

PORTC(1)

(12 I/O)

(8 I/O)

PORTB

(16 I/O)

Note 1: Not all I/O pins or features are implemented on all device pinout configurations. See Table 1-3 for specific implementations by pin count.2: BOR functionality is provided when the on-board voltage regulator is enabled.3: Some peripheral I/Os are only accessible through remappable pins.

PORTD(1)

(16 I/O)

Comparators(3)Timer2/3(3)Timer1 RTCC

IC

A/D12-Bit

OC/PWM SPI I2C

Timer4/5(3)

EPMP/PSP

1-6(3)IOCs(1) UART

REFO

PORTE(1)

PORTG(1)

(10 I/O)

(12 I/O)

PORTF(1)

(11 I/O)

1-3(3) 1-3 1-6(3)1-6(3)CTMU USBDriver

Space

Program Memory/

CLC1-4(1)

DMAController

Data

DMAData Bus

16

Table DataAccess Control

MCCP1/2/3

SCCP4/5/6/7

PCL

BOR(2)



TABLE 1-3: PIC24FJ1024GA610/GB610 FAMILY PINOUT DESCRIPTIONS

PinFunction

Pin Number/Grid Locator

I/O InputBuffer DescriptionGA606 64-Pin

QFN/TQFP/QFP

GB606 64-Pin QFN/TQFP/QFP

GA610 100-Pin TQFP/QFP

GB610 100-Pin TQFP/QFP

GA612 121-Pin

BGA

GB612 121-Pin

BGA

AN0 16 16 25 25 K2 K2 I ANA A/D Analog InputsAN1 15 15 24 24 K1 K1 I ANAAN2 14 14 23 23 J2 J2 I ANAAN3 13 13 22 22 J1 J1 I ANAAN4 12 12 21 21 H2 H2 I ANAAN5 11 11 20 20 H1 H1 I ANAAN6 17 17 26 26 L1 L1 I ANAAN7 18 18 27 27 J3 J3 I ANAAN8 21 21 32 32 K4 K4 I ANAAN9 22 22 33 33 L4 L4 I ANAAN10 23 23 34 34 L5 L5 I ANAAN11 24 24 35 35 J5 J5 I ANAAN12 27 27 41 41 J7 J7 I ANAAN13 28 28 42 42 L7 L7 I ANAAN14 29 29 43 43 K7 K7 I ANAAN15 30 30 44 44 L8 L8 I ANAAN16 — — 9 9 E1 E1 I ANAAN17 — — 10 10 E3 E3 I ANAAN18 — — 11 11 F4 F4 I ANAAN19 — — 12 12 F2 F2 I ANAAN20 — — 14 14 F3 F3 I ANAAN21 — — 19 19 G2 G2 I ANAAN22 — — 92 92 B5 B5 I ANAAN23 — — 91 91 C5 C5 I ANAAVDD 19 19 30 30 J4 J4 P — Positive Supply for Analog

modulesAVSS 20 20 31 31 L3 L3 P — Ground Reference for Analog

modulesC1INA 11 11 20 20 H1 H1 I ANA Comparator 1 Input AC1INB 12 12 21 21 H2 H2 I ANA Comparator 1 Input BC1INC 5,8 5,8 11,14 11,14 F4,F3 F4,F3 I ANA Comparator 1 Input CC1IND 4 4 10 10 E3 E3 I ANA Comparator 1 Input DC2INA 13 13 22 22 J1 J1 I ANA Comparator 2 Input AC2INB 14 14 23 23 J2 J2 I ANA Comparator 2 Input BC2INC 8 8 14 14 F3 F3 I ANA Comparator 2 Input CC2IND 6 6 12 12 F2 F2 I ANA Comparator 2 Input DC3INA 55 55 84 84 C7 C7 I ANA Comparator 3 Input ALegend: TTL = TTL input buffer ST = Schmitt Trigger input buffer

ANA = Analog level input/output I2C = I2C/SMBus input bufferDIG = Digital input/output XCVR = Dedicated Transceiver



C3INB 54 54 83 83 D7 D7 I ANA Comparator 3 Input BC3INC 8,48 8,48 14,74 14,74 F3,B11 F3,B11 I ANA Comparator 3 Input CC3IND 47 47 73 73 C10 C10 I ANA Comparator 3 Input DCLC3OUT 46 46 72 72 D9 D9 O DIG CLC3 OutputCLC4OUT 42 42 68 68 E9 E9 O DIG CLC4 OutputCLKI 39 39 63 63 F9 F9 — — Main Clock Input ConnectionCLKO 40 40 64 64 F11 F11 O DIG System Clock OutputCTCMP 14 14 23 23 J2 J2 O ANA CTMU Comparator 2 Input

(Pulse mode)CTED1 28 28 42 42 L7 L7 I ST CTMU External Edge InputsCTED2 27 27 41 41 J7 J7 I STCTED3 — — 1 1 B2 B2 I STCTED4 1 1 3 3 D3 D3 I STCTED5 29 29 43 43 K7 K7 I STCTED6 30 30 44 44 L8 L8 I STCTED7 — — 40 40 K6 K6 I STCTED8 64 64 100 100 A1 A1 I STCTED9 63 63 99 99 A2 A2 I STCTED10 — — 97 97 A3 A3 I STCTED11 — — 95 95 C4 C4 I STCTED12 15 15 24 24 K1 K1 I STCTED13 14 14 23 23 J2 J2 I STCTPLS 29 29 43 43 K7 K7 O DIG CTMU Pulse OutputCVREF 23 23 34 34 L5 L5 O ANA Comparator Voltage Reference

OutputCVREF+ 16 16 25,29 25,29 K2,K3 K2,K3 I ANA Comparator Voltage Reference

(high) InputCVREF- 15 15 24,28 24,28 K1,L2 K1,L2 I ANA Comparator Voltage Reference

(low) InputD+ — 37 — 57 — H10 I/O XCVR USB SignalingD- — 36 — 56 — J11 I/O XCVR

TABLE 1-3: PIC24FJ1024GA610/GB610 FAMILY PINOUT DESCRIPTIONS (CONTINUED)

PinFunction



QFN/TQFP/QFP




GA612 121-Pin

BGA

GB612 121-Pin

BGA

Legend: TTL = TTL input buffer ST = Schmitt Trigger input bufferANA = Analog level input/output I2C = I2C/SMBus input bufferDIG = Digital input/output XCVR = Dedicated Transceiver



IC4 1 1 3 3 D3 D3 I ST Input CaptureIC5 2 2 4 4 C1 C1 I STIC6 3 3 5 5 D2 D2 I STICM1 4 4 10 10 12 12 I ST MCCP1 Input CaptureICM2 6 6 12 12 14 14 I ST MCCP2 Input CaptureICM3 11 11 20 20 23 23 I ST MCCP3 Input CaptureICM4 49 49 76 76 91 91 I ST SCCP4 Input CaptureICM5 42 42 68 68 80 80 I ST SCCP5 Input CaptureICM6 46 46 72 72 86 86 I ST SCCP6 Input CaptureICM7 51 51 78 78 93 93 I ST SCCP7 Input CaptureINT0 35 46 55 72 H9 D9 I ST External Interrupt Input 0IOCA0 — — 17 17 G3 G3 I ST PORTA Interrupt-on-ChangeIOCA1 — — 38 38 J6 J6 I STIOCA2 — — 58 58 H11 H11 I STIOCA3 — — 59 59 G10 G10 I STIOCA4 — — 60 60 G11 G11 I STIOCA5 — — 61 61 G9 G9 I STIOCA6 — — 91 91 C5 C5 I STIOCA7 — — 92 92 B5 B5 I STIOCA9 — — 28 28 L2 L2 I STIOCA10 — — 29 29 K3 K3 I STIOCA14 — — 66 66 E11 E11 I STIOCA15 — — 67 67 E8 E8 I ST


PinFunction



QFN/TQFP/QFP




GA612 121-Pin

BGA

GB612 121-Pin

BGA




IOCB0 16 16 25 25 K2 K2 I ST PORTB Interrupt-on-ChangeIOCB1 15 15 24 24 K1 K1 I STIOCB2 14 14 23 23 J2 J2 I STIOCB3 13 13 22 22 J1 J1 I STIOCB4 12 12 21 21 H2 H2 I STIOCB5 11 11 20 20 H1 H1 I STIOCB6 17 17 26 26 L1 L1 I STIOCB7 18 18 27 27 J3 J3 I STIOCB8 21 21 32 32 K4 K4 I STIOCB9 22 22 33 33 L4 L4 I STIOCB10 23 23 34 34 L5 L5 I STIOCB11 24 24 35 35 J5 J5 I STIOCB12 27 27 41 41 J7 J7 I STIOCB13 28 28 42 42 L7 L7 I STIOCB14 29 29 43 43 K7 K7 I STIOCB15 30 30 44 44 L8 L8 I STIOCC1 — — 6 6 D1 D1 I ST PORTC Interrupt-on-ChangeIOCC2 — — 7 7 E4 E4 I STIOCC3 — — 8 8 E2 E2 I STIOCC4 — — 9 9 E1 E1 I STIOCC12 39 39 63 63 F9 F9 I STIOCC13 47 47 73 73 C10 C10 I STIOCC14 48 48 74 74 B11 B11 I STIOCC15 40 40 64 64 F11 F11 I ST


PinFunction



QFN/TQFP/QFP




GA612 121-Pin

BGA

GB612 121-Pin

BGA




IOCD0 46 46 72 72 D9 D9 I ST PORTD Interrupt-on-ChangeIOCD1 49 49 76 76 A11 A11 I STIOCD2 50 50 77 77 A10 A10 I STIOCD3 51 51 78 78 B9 B9 I STIOCD4 52 52 81 81 C8 C8 I STIOCD5 53 53 82 82 B8 B8 I STIOCD6 54 54 83 83 D7 D7 I STIOCD7 55 55 84 84 C7 C7 I STIOCD8 42 42 68 68 E9 E9 I STIOCD9 43 43 69 69 E10 E10 I STIOCD10 44 44 70 70 D11 D11 I STIOCD11 45 45 71 71 C11 C11 I STIOCD12 — — 79 79 A9 A9 I STIOCD13 — — 80 80 D8 D8 I STIOCD14 — — 47 47 L9 L9 I STIOCD15 — — 48 48 K9 K9 I STIOCE0 60 60 93 93 A4 A4 I ST PORTE Interrupt-on-ChangeIOCE1 61 61 94 94 B4 B4 I STIOCE2 62 62 98 98 B3 B3 I STIOCE3 63 63 99 99 A2 A2 I STIOCE4 64 64 100 100 A1 A1 I STIOCE5 1 1 3 3 D3 D3 I STIOCE6 2 2 4 4 C1 C1 I STIOCE7 3 3 5 5 D2 D2 I STIOCE8 — — 18 18 G1 G1 I STIOCE9 — — 19 19 G2 G2 I ST


PinFunction



QFN/TQFP/QFP




GA612 121-Pin

BGA

GB612 121-Pin

BGA




IOCF0 58 58 87 87 B6 B6 I ST PORTF Interrupt-on-ChangeIOCF1 59 59 88 88 A6 A6 I STIOCF2 34 — 52 52 K11 K11 I STIOCF3 33 33 51 51 K10 K10 I STIOCF4 31 31 49 49 L10 L10 I STIOCF5 32 32 50 50 L11 L11 I STIOCF6 35 — 55 — H9 — I STIOCF7 — 34 54 54 H8 H8 I STIOCF8 — — 53 53 J10 J10 I STIOCF12 — — 40 40 K6 K6 I STIOCF13 — — 39 39 L6 L6 I STIOCG0 — — 90 90 A5 A5 I ST PORTG Interrupt-on-ChangeIOCG1 — — 89 89 E6 E6 I STIOCG2 37 37 57 57 H10 H10 I STIOCG3 36 36 56 56 J11 J11 I STIOCG6 4 4 10 10 E3 E3 I STIOCG7 5 5 11 11 F4 F4 I STIOCG8 6 6 12 12 F2 F2 I STIOCG9 8 8 14 14 F3 F3 I STIOCG12 — — 96 96 C3 C3 I STIOCG13 — — 97 97 A3 A3 I STIOCG14 — — 95 95 C4 C4 I STIOCG15 — — 1 1 B2 B2 I STHLVDIN 64 64 100 100 A1 A1 I ANA High/Low-Voltage Detect InputMCLR 7 7 13 13 F1 F1 I ST Master Clear (device Reset)

Input. This line is brought low to cause a Reset.

OC4 54 54 83 83 D7 D7 O DIG Output Compare OutputsOC5 55 55 84 84 C7 C7 O DIGOC6 58 58 87 87 B6 B6 O DIGOCM1A 4 4 10 10 E3 E3 O DIG MCCP1 OutputsOCM1B 5 5 11 11 F4 F4 O DIGOCM1C — — 1 1 B2 B2 O DIGOCM1D — — 6 6 D1 D1 O DIGOCM1E — — 91 91 C5 C5 O DIGOCM1F — — 92 92 B5 B5 O DIG


PinFunction



QFN/TQFP/QFP




GA612 121-Pin

BGA

GB612 121-Pin

BGA




OCM2A 6 6 12 12 F2 F2 O DIG MCCP2 OutputsOCM2B 8 8 14 14 F3 F3 O DIGOCM2C — — 7 7 E4 E4 O DIGOCM2D — — 8 8 E2 E2 O DIGOCM2E — — 96 96 C3 C3 O DIGOCM2F — — 97 97 A3 A3 O DIGOCM3A 11 11 20 20 H1 H1 O DIG MCCP3 OutputsOCM3B 12 12 21 21 H2 H2 O DIGOCM3C — — 9 9 E1 E1 O DIGOCM3D — — 17 17 G3 G3 O DIGOCM3E — — 79 79 A9 A9 O DIGOCM3F — — 80 80 D8 D8 O DIGOSCI 39 39 63 63 F9 F9 I ANA/

STMain Oscillator Input Connection

OSCO 40 40 64 64 F11 F11 O ANA Main Oscillator Output Connection

PGEC1 15 15 24 24 K1 K1 I ST ICSP™ Programming ClockPGEC2 17 17 26 26 L1 L1 I STPGEC3 11 11 20 20 H1 H1 I STPGED1 16 16 25 25 K2 K2 I/O DIG/ST ICSP Programming DataPGED2 18 18 27 27 J3 J3 I/O DIG/STPGED3 12 12 21 21 H2 H2 I/O DIG/STPMA0/PMALL

30 30 44 44 L8 L8 I/O DIG/ST/TTL

Parallel Master Port Address[0]/Address Latch Low

PMA1/PMALH

29 29 43 43 K7 K7 I/O DIG/ST/TTL

Parallel Master Port Address[1]/Address Latch High

PMA14/PMCS1

45 45 71 71 C11 C11 I/O DIG/ST/TTL

Parallel Master Port Address[14]/Slave Chip Select/Chip Select 1 Strobe

PMA15/PMCS2

44 44 70 70 D11 D11 I/O DIG/ST/TTL

Parallel Master Port Address[15]/Chip Select 2 Strobe

PMA6 16 16 29 29 K3 K3 O DIG Parallel Master Port AddressPMA7 22 22 28 28 L2 L2 O DIG


PinFunction



QFN/TQFP/QFP




GA612 121-Pin

BGA

GB612 121-Pin

BGA




PMA8 32 32 50 50 L11 L11 I/O DIG/ST/TTL

Parallel Master Port Address (Demultiplexed Master mode) or Address/Data (Multiplexed Master modes)



PMA11 27 27 41 41 J7 J7 I/O DIG/ST/TTL

PMA12 24 24 35 35 J5 J5 I/O DIG/ST/TTL


PMA16 — — 95 95 C4 C4 O DIGPMA17 — — 92 92 B5 B5 O DIGPMA18 — — 40 40 K6 K6 O DIGPMA19 — — 19 19 G2 G2 O DIGPMA2/PMALU

8 8 14 14 F3 F3 O DIG Parallel Master Port Address[2]/Address Latch Upper

PMA3 6 6 12 12 F2 F2 O DIG Parallel Master Port AddressPMA4 5 5 11 11 F4 F4 O DIGPMA5 4 4 10 10 E3 E3 O DIGPMA20 — — 59 59 G10 G10 O DIG Parallel Master Port Address

(Demultiplexed Master mode) or Address/Data (Multiplexed Master modes)

PMA21 — — 60 60 G11 G11 O DIGPMA22 — — 66 66 E11 E11 O DIG

PMACK1 50 50 77 77 A10 A10 I ST/TTL Parallel Master Port Acknowledge Input 1

PMACK2 43 43 69 69 E10 E10 I ST/TTL Parallel Master Port Acknowledge Input 2

PMBE0 51 51 78 78 B9 B9 O DIG Parallel Master Port Byte Enable 0 Strobe

PMBE1 — — 67 67 E8 E8 O DIG Parallel Master Port Byte Enable 1 Strobe

PMCS1 — — 18 18 G1 G1 O DIG Parallel Master Port Chip Select 1 Strobe

PMCS2 — — 9 9 E1 E1 O DIG Parallel Master Port Chip Select 2 Strobe

PMPCS1 — — 58 58 H11 H11 O DIG Parallel Master Port Chip Select 1


PinFunction



QFN/TQFP/QFP




GA612 121-Pin

BGA

GB612 121-Pin

BGA




PMD0 60 60 93 93 A4 A4 I/O DIG/ST/TTL

Parallel Master Port Data (Demultiplexed Master mode) or Address/Data (Multiplexed Master modes)

PMD1 61 61 94 94 B4 B4 I/O DIG/ST/TTL

PMD2 62 62 98 98 B3 B3 I/O DIG/ST/TTL



PMD5 1 1 3 3 D3 D3 I/O DIG/ST/TTL

PMD6 2 2 4 4 C1 C1 I/O DIG/ST/TTL

PMD7 3 3 5 5 D2 D2 I/O DIG/ST/TTL

PMD8 — — 90 90 A5 A5 I/O DIG/ST/TTL

PMD9 — — 89 89 E6 E6 I/O DIG/ST/TTL


PMD11 — — 87 87 B6 B6 I/O DIG/ST/TTL


PMD13 — — 80 80 D8 D8 I/O DIG/ST/TTL

PMD14 — — 83 83 D7 D7 I/O DIG/ST/TTL

PMD15 — — 84 84 C7 C7 I/O DIG/ST/TTL

PMRD/PMWR

53 53 82 82 B8 B8 I/O DIG/ST/TTL

Parallel Master Port Read Strobe/Write Strobe

PMWR/PMENB

52 52 81 81 C8 C8 I/O DIG/ST/TTL

Parallel Master Port Write Strobe/Enable Strobe

PWRGT 21 21 32 32 K4 K4 O DIG Real-Time Clock Power Control Output

PWRLCLK 48 48 74 74 B11 B11 I ST Real-Time Clock 50/60 Hz Clock Input


PinFunction



QFN/TQFP/QFP




GA612 121-Pin

BGA

GB612 121-Pin

BGA




RA0 — — 17 17 G3 G3 I/O DIG/ST PORTA Digital I/OsRA1 — — 38 38 J6 J6 I/O DIG/STRA2 — — 58 58 H11 H11 I/O DIG/STRA3 — — 59 59 G10 G10 I/O DIG/STRA4 — — 60 60 G11 G11 I/O DIG/STRA5 — — 61 61 G9 G9 I/O DIG/STRA6 — — 91 91 C5 C5 I/O DIG/STRA7 — — 92 92 B5 B5 I/O DIG/STRA9 — — 28 28 L2 L2 I/O DIG/STRA10 — — 29 29 K3 K3 I/O DIG/STRA14 — — 66 66 E11 E11 I/O DIG/STRA15 — — 67 67 E8 E8 I/O DIG/STRB0 16 16 25 25 K2 K2 I/O DIG/ST PORTB Digital I/OsRB1 15 15 24 24 K1 K1 I/O DIG/STRB2 14 14 23 23 J2 J2 I/O DIG/STRB3 13 13 22 22 J1 J1 I/O DIG/STRB4 12 12 21 21 H2 H2 I/O DIG/STRB5 11 11 20 20 H1 H1 I/O DIG/STRB6 17 17 26 26 L1 L1 I/O DIG/STRB7 18 18 27 27 J3 J3 I/O DIG/STRB8 21 21 32 32 K4 K4 I/O DIG/STRB9 22 22 33 33 L4 L4 I/O DIG/STRB10 23 23 34 34 L5 L5 I/O DIG/STRB11 24 24 35 35 J5 J5 I/O DIG/STRB12 27 27 41 41 J7 J7 I/O DIG/STRB13 28 28 42 42 L7 L7 I/O DIG/STRB14 29 29 43 43 K7 K7 I/O DIG/STRB15 30 30 44 44 L8 L8 I/O DIG/STRC1 — — 6 6 D1 D1 I/O DIG/ST PORTC Digital I/OsRC2 — — 7 7 E4 E4 I/O DIG/STRC3 — — 8 8 E2 E2 I/O DIG/STRC4 — — 9 9 E1 E1 I/O DIG/STRC12 39 39 63 63 F9 F9 I/O DIG/STRC13 47 47 73 73 C10 C10 I/O DIG/STRC14 48 48 74 74 B11 B11 I/O DIG/STRC15 40 40 64 64 F11 F11 I/O DIG/ST


PinFunction



QFN/TQFP/QFP




GA612 121-Pin

BGA

GB612 121-Pin

BGA




RD0 46 46 72 72 D9 D9 I/O DIG/ST PORTD Digital I/OsRD1 49 49 76 76 A11 A11 I/O DIG/STRD2 50 50 77 77 A10 A10 I/O DIG/STRD3 51 51 78 78 B9 B9 I/O DIG/STRD4 52 52 81 81 C8 C8 I/O DIG/STRD5 53 53 82 82 B8 B8 I/O DIG/STRD6 54 54 83 83 D7 D7 I/O DIG/STRD7 55 55 84 84 C7 C7 I/O DIG/STRD8 42 42 68 68 E9 E9 I/O DIG/STRD9 43 43 69 69 E10 E10 I/O DIG/STRD10 44 44 70 70 D11 D11 I/O DIG/STRD11 45 45 71 71 C11 C11 I/O DIG/STRD12 — — 79 79 A9 A9 I/O DIG/STRD13 — — 80 80 D8 D8 I/O DIG/STRD14 — — 47 47 L9 L9 I/O DIG/STRD15 — — 48 48 K9 K9 I/O DIG/STRE0 60 60 93 93 A4 A4 I/O DIG/ST PORTE Digital I/OsRE1 61 61 94 94 B4 B4 I/O DIG/STRE2 62 62 98 98 B3 B3 I/O DIG/STRE3 63 63 99 99 A2 A2 I/O DIG/STRE4 64 64 100 100 A1 A1 I/O DIG/STRE5 1 1 3 3 D3 D3 I/O DIG/STRE6 2 2 4 4 C1 C1 I/O DIG/STRE7 3 3 5 5 D2 D2 I/O DIG/STRE8 — — 18 18 G1 G1 I/O DIG/STRE9 — — 19 19 G2 G2 I/O DIG/STREFI 24 24 35 35 J5 J5 I ST Reference Clock Input


PinFunction



QFN/TQFP/QFP




GA612 121-Pin

BGA

GB612 121-Pin

BGA




RF0 58 58 87 87 B6 B6 I/O DIG/ST PORTF Digital I/OsRF1 59 59 88 88 A6 A6 I/O DIG/STRF2 34 — 52 52 K11 K11 I/O DIG/STRF3 33 33 51 51 K10 K10 I/O DIG/STRF4 31 31 49 49 L10 L10 I/O DIG/STRF5 32 32 50 50 L11 L11 I/O DIG/STRF6 35 — 55 — H9 — I/O DIG/STRF7 — 34 54 54 H8 H8 I/O DIG/STRF8 — — 53 53 J10 J10 I/O DIG/STRF12 — — 40 40 K6 K6 I/O DIG/STRF13 — — 39 39 L6 L6 I/O DIG/STRG0 — — 90 90 A5 A5 I/O DIG/ST PORTG Digital I/OsRG1 — — 89 89 E6 E6 I/O DIG/STRG2 37 37 57 57 H10 H10 I/O DIG/STRG3 36 36 56 56 J11 J11 I/O DIG/STRG6 4 4 10 10 E3 E3 I/O DIG/STRG7 5 5 11 11 F4 F4 I/O DIG/STRG8 6 6 12 12 F2 F2 I/O DIG/STRG9 8 8 14 14 F3 F3 I/O DIG/STRG12 — — 96 96 C3 C3 I/O DIG/STRG13 — — 97 97 A3 A3 I/O DIG/STRG14 — — 95 95 C4 C4 I/O DIG/STRG15 — — 1 1 B2 B2 I/O DIG/ST


PinFunction



QFN/TQFP/QFP




GA612 121-Pin

BGA

GB612 121-Pin

BGA




RP0 16 16 25 25 K2 K2 I/O DIG/ST Remappable Peripherals (input or output)RP1 15 15 24 24 K1 K1 I/O DIG/ST

RP2 42 42 68 68 E9 E9 I/O DIG/STRP3 44 44 70 70 D11 D11 I/O DIG/STRP4 43 43 69 69 E10 E10 I/O DIG/STRP5 — — 48 48 K9 K9 I/O DIG/STRP6 17 17 26 26 L1 L1 I/O DIG/STRP7 18 18 27 27 J3 J3 I/O DIG/STRP8 21 21 32 32 K4 K4 I/O DIG/STRP9 22 22 33 33 L4 L4 I/O DIG/STRP10 31 31 49 49 L10 L10 I/O DIG/STRP11 46 46 72 72 D9 D9 I/O DIG/STRP12 45 45 71 71 C11 C11 I/O DIG/STRP13 14 14 23 23 J2 J2 I/O DIG/STRP14 29 29 43 43 K7 K7 I/O DIG/STRP15 — — 53 53 J10 J10 I/O DIG/STRP16 33 33 51 51 K10 K10 I/O DIG/STRP17 32 32 50 50 L11 L11 I/O DIG/STRP18 11 11 20 20 H1 H1 I/O DIG/STRP19 6 6 12 12 F2 F2 I/O DIG/STRP20 53 53 82 82 B8 B8 I/O DIG/STRP21 4 4 10 10 E3 E3 I/O DIG/STRP22 51 51 78 78 B9 B9 I/O DIG/STRP23 50 50 77 77 A10 A10 I/O DIG/STRP24 49 49 76 76 A11 A11 I/O DIG/STRP25 52 52 81 81 C8 C8 I/O DIG/STRP26 5 5 11 11 F4 F4 I/O DIG/STRP27 8 8 14 14 F3 F3 I/O DIG/STRP28 12 12 21 21 H2 H2 I/O DIG/STRP29 30 30 44 44 L8 L8 I/O DIG/STRP30 34 — 52 52 K11 K11 I/O DIG/STRP31 — — 39 39 L6 L6 I/O DIG/ST


PinFunction



QFN/TQFP/QFP




GA612 121-Pin

BGA

GB612 121-Pin

BGA




RPI32 — — 40 40 K6 K6 I DIG/ST Remappable Peripherals (input only)RPI33 — — 18 18 G1 G1 I DIG/ST

RPI34 — — 19 19 G2 G2 I DIG/STRPI35 — — 67 67 E8 E8 I DIG/STRPI36 — — 66 66 E11 E11 I DIG/STRPI37 48 48 74 74 B11 B11 I DIG/STRPI38 — — 6 6 D1 D1 I DIG/STRPI39 — — 7 7 E4 E4 I DIG/STRPI40 — — 8 8 E2 E2 I DIG/STRPI41 — — 9 9 E1 E1 I DIG/STRPI42 — — 79 79 A9 A9 I DIG/STRPI43 — — 47 47 L9 L9 I DIG/STSCL1 37 44 57 66 H10 E11 I/O I2C I2C1 Synchronous Serial Clock

Input/OutputSCL2 32 32 58 58 H11 H11 I/O I2C I2C2 Synchronous Serial Clock

Input/OutputSCL3 2 2 4 4 C1 C1 I/O I2C I2C3 Synchronous Serial Clock

Input/OutputSDA1 36 43 56 67 J11 E8 I/O I2C I2C1 Data Input/OutputSDA2 31 31 59 59 G10 G10 I/O I2C I2C2 Data Input/OutputSDA3 3 3 5 5 D2 D2 I/O I2C I2C3 Data Input/OutputSOSCI 47 47 73 73 C10 C10 I ANA/

STSecondary Oscillator/Timer1 Clock Input

SOSCO 48 48 74 74 B11 B11 O ANA Secondary Oscillator/Timer1 Clock Output

T1CK 22 22 33 33 L4 L4 I ST Timer1 ClockTCK 27 27 38 38 J6 J6 I ST JTAG Test Clock/Programming

Clock InputTDI 28 28 60 60 G11 G11 I ST JTAG Test Data/Programming

Data InputTDO 24 24 61 61 G9 G9 O DIG JTAG Test Data Output

TMPR 22 22 33 33 L4 L4 I ST Tamper Detect InputTMS 23 23 17 17 G3 G3 I ST JTAG Test Mode Select InputU5CTS 58 58 87 87 B6 B6 I ST UART5 CTS Output

U5RTS/U5BCLK

55 55 84 84 C7 C7 O DIG UART5 RTS Input

U5RX 54 54 83 83 D7 D7 I ST UART5 Receive InputU5TX 49 49 76 76 A11 A11 O DIG UART5 Transmit Output

U6CTS 46 46 72 72 D9 D9 I ST UART6 CTS OutputU6RTS/U6BCLK

42 42 68 68 E9 E9 O DIG UART6 RTS Input


PinFunction



QFN/TQFP/QFP




GA612 121-Pin

BGA

GB612 121-Pin

BGA




U6RX 27 27 41 41 J7 J7 I ST UART6 Receive InputU6TX 18 18 27 27 J3 J3 O DIG UART6 Transmit OutputUSBID — 33 — 51 — K10 I ST USB OTG ID InputUSBOEN — 12 — 21 — H2 O DIG USB Output Enable (active-low)VBUS — 34 — 54 — H8 I — VBUS Supply DetectVCAP 56 56 85 85 B7 B7 P — External Filter Capacitor

Connection (regulator enabled)VDD 10,26,38 10,26,38 2,16,37,

46,622,16,37,

46,62C2,F8,G5,H6,

K8

C2,F8,G5,H6,

K8

P — Positive Supply for Peripheral Digital Logic and I/O Pins

VREF+ 16 16 25,29 25,29 K2,K3 K2,K3 I ANA Comparator and A/D Reference Voltage (high) Input

VREF- 15 15 24,28 24,28 K1,L2 K1,L2 I ANA Comparator and A/D Reference Voltage (low) Input

VSS 9,25,41 9,25,41 15,36,45,65,75

15,36,45,65,75

B10,F5,F10,G6,

G7

B10,F5,F10,G6,

G7

P — Ground Reference for Peripheral Digital Logic and I/O Pins

VUSB3V3 — 35 — 55 — H9 P — 3.3V VUSB


PinFunction



QFN/TQFP/QFP




GA612 121-Pin

BGA

GB612 121-Pin

BGA




2.0 GUIDELINES FOR GETTING STARTED WITH 16-BIT MICROCONTROLLERS

2.1 Basic Connection RequirementsGetting started with the PIC24FJ1024GA610/GB610family of 16-bit microcontrollers requires attention to aminimal set of device pin connections beforeproceeding with development. The following pins must always be connected:• All VDD and VSS pins

(see Section 2.2 “Power Supply Pins”)• The USB transceiver supply, VUSB3V3, regardless

of whether or not the USB module is used (see Section 2.2 “Power Supply Pins”)

• All AVDD and AVSS pins, regardless of whether or not the analog device features are used (see Section 2.2 “Power Supply Pins”)

• MCLR pin (see Section 2.3 “Master Clear (MCLR) Pin”)

• VCAP pin (PIC24F J devices only)(see Section 2.4 “Voltage Regulator Pin (VCAP)”)

These pins must also be connected if they are beingused in the end application:• PGECx/PGEDx pins used for In-Circuit Serial

Programming™ (ICSP™) and debugging purposes (see Section 2.5 “ICSP Pins”)

• OSCI and OSCO pins when an external oscillator source is used (see Section 2.6 “External Oscillator Pins”)

Additionally, the following pins may be required:• VREF+/VREF- pins used when external voltage

reference for analog modules is implemented

The minimum mandatory connections are shown inFigure 2-1.

FIGURE 2-1: RECOMMENDED MINIMUM CONNECTIONS

Note: The AVDD and AVSS pins must always beconnected, regardless of whether any ofthe analog modules are being used.

PIC24FJXXXX

VDD

VSS

VDD

VSS

VSS

VDD

AVD

D

AVSS

VDD

VSS

C1

R1

VDD

MCLR VCAPR2

C7

C2(2)

C3(2)

C4(2)C5(2)

C6(2)

Key (all values are recommendations):C1 through C6: 0.1 F, 50V ceramicC7: 10 F, 16V or greater, ceramicR1: 10 kΩR2: 100Ω to 470ΩNote 1: See Section 2.4 “Voltage Regulator Pin

(VCAP)” for an explanation of voltage regulator pin connections.

2: The example shown is for a PIC24F device with five VDD/VSS and AVDD/AVSS pairs. Other devices may have more or less pairs; adjust the number of decoupling capacitors appropriately.

(1)



2.2 Power Supply Pins

2.2.1 DECOUPLING CAPACITORSThe use of decoupling capacitors on every pair ofpower supply pins, such as VDD, VSS, AVDD andAVSS, is required. Consider the following criteria when using decouplingcapacitors:• Value and type of capacitor: A 0.1 µF (100 nF),

16V-50V capacitor is recommended. The capacitor should be a low-ESR device with a self-resonance frequency in the range of 200 MHz and higher. Ceramic capacitors are recommended.

• Placement on the printed circuit board: The decoupling capacitors should be placed as close to the pins as possible. It is recommended to place the capacitors on the same side of the board as the device. If space is constricted, the capacitor can be placed on another layer on the PCB using a via; however, ensure that the trace length from the pin to the capacitor is no greater than 0.25 inch (6 mm).

• Handling high-frequency noise: If the board is experiencing high-frequency noise (upward of tens of MHz), add a second ceramic-type capaci-tor in parallel to the above described decoupling capacitor. The value of the second capacitor can be in the range of 0.01 µF to 0.001 µF. Place this second capacitor next to each primary decoupling capacitor. In high-speed circuit designs, consider implementing a decade pair of capacitances as close to the power and ground pins as possible (e.g., 0.1 µF in parallel with 0.001 µF).

• Maximizing performance: On the board layout from the power supply circuit, run the power and return traces to the decoupling capacitors first, and then to the device pins. This ensures that the decoupling capacitors are first in the power chain. Equally important is to keep the trace length between the capacitor and the power pins to a minimum, thereby reducing PCB trace inductance.

2.2.2 TANK CAPACITORSOn boards with power traces running longer than sixinches in length, it is suggested to use a tank capacitorfor integrated circuits including microcontrollers tosupply a local power source. The value of the tankcapacitor should be determined based on the traceresistance that connects the power supply source tothe device, and the maximum current drawn by thedevice in the application. In other words, select the tankcapacitor so that it meets the acceptable voltage sag atthe device. Typical values range from 4.7 µF to 47 µF.

2.3 Master Clear (MCLR) PinThe MCLR pin provides two specific device functions:device Reset, and device programming and debug-ging. If programming and debugging are not requiredin the end application, a direct connection to VDDmay be all that is required. The addition of othercomponents, to help increase the application’sresistance to spurious Resets from voltage sags, maybe beneficial. A typical configuration is shown inFigure 2-1. Other circuit designs may be implementeddepending on the application’s requirements.During programming and debugging, the resistanceand capacitance that can be added to the pin mustbe considered. Device programmers and debuggersdrive the MCLR pin. Consequently, specific voltagelevels (VIH and VIL) and fast signal transitions mustnot be adversely affected. Therefore, specific valuesof R1 and C1 will need to be adjusted based on theapplication and PCB requirements. For example, it isrecommended that the capacitor, C1, be isolatedfrom the MCLR pin during programming and debug-ging operations by using a jumper (Figure 2-2). Thejumper is replaced for normal run-time operations.Any components associated with the MCLR pinshould be placed within 0.25 inch (6 mm) of the pin.

FIGURE 2-2: EXAMPLE OF MCLR PIN CONNECTIONS

Note 1: R1 10 k is recommended. A suggestedstarting value is 10 k. Ensure that the MCLRpin VIH and VIL specifications are met.

2: R2 470 will limit any current flowing intoMCLR from the external cap

16-bit microcontrollers with large, dual partition flash ... · • 32-bit by 16-bit hardware...

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