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Academy House – Brussels - 27 October 2005Academy House – Brussels - 27 October 2005

LOOKING FOR ALTERNATIVE INDUSTRIALLOOKING FOR ALTERNATIVE INDUSTRIALSPACE STRATEGIESSPACE STRATEGIES

Michel Courtois

ESA/ESTEC

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Academy House – Brussels - 27 October 2005Academy House – Brussels - 27 October 2005

ESA Technology Strategy: Top-Level ObjectivesESA Technology Strategy: Top-Level Objectives

Prepare and enable future European space programmes and ensure coherence of technology developments schedule (ad-hoc maturity level) for maximum use by projects

Foster innovation in architectures of space systems, identification of disruptive technologies, developments of new concepts

Support competitiveness of industry in the European institutional markets and in the global commercial markets

Ensure European Technology non-dependence/ ensure the availability of European sources for critical technologies,

Leverage on technological progresses and innovations, outside the space sector to use and adapt them to design new space systems (spin-in)

Start security for citizens techno program.

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Academy House – Brussels - 27 October 2005Academy House – Brussels - 27 October 2005

Flight Demonstration: ExampleFlight Demonstration: Example

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Academy House – Brussels - 27 October 2005Academy House – Brussels - 27 October 2005

ESA Technology End-to-End processESA Technology End-to-End process

Technology Monitoring/Evaluation

Technology Monitoring/Evaluation

ESA Strategy and ProgrammesESA Strategy and Programmes

ESA Technology StrategyESA Technology Strategy

Industry ConsultationIndustry Consultation

ESA Technology Long Term PlanESA Technology Long Term Plan

European and Worldwide

Technology Assessment

European and Worldwide

Technology Assessment

European Harmonisation/ESTMP

European Harmonisation/ESTMP

Technology ImplementationTechnology Implementation

European Space Policy and Programme

European Space Policy and Programme

Industrial productsIndustrial products

User Programme Needs

User Programme Needs

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Academy House – Brussels - 27 October 2005Academy House – Brussels - 27 October 2005

ESA Technology Programmes and Technology ESA Technology Programmes and Technology MaturityMaturity

CTP

Elips

Step

FLPP

EOEP

Galileo

Aurora/Exploration

Artes

Satellites

Launchers

andSpaceStation

Programs

Product Maturity

TRP

GSTP+ Strategic Technologies

Remarks:1) The necessary investments increase significantly with the level of maturity to be achieved2) Full qualification is impacted by the system environment and is most of the time mission specific3) Technology development should be regularly confronted to market demand AND ADD PROG: TTP;EMIR/MFC; PRODEX; DUP

A real product policy is put in place to ensure adequacy of needed products to the maturity level required by the programmes.

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Academy House – Brussels - 27 October 2005Academy House – Brussels - 27 October 2005

ESA Technology Programme versus Technology Readiness LevelsESA Technology Programme versus Technology Readiness Levels

Potential Extension on Exceptional Cases

Technology Programmes versus Technology Readiness Levels

Technology concept

formulated

Experimental critical function and /or proof of

concept

Component and/ or broadband validation in laboratory

Component and/ or broadband validation in

relevant environment

System / subsystem model

or prototype demonstration in

a relevant environment

System prototype

demonstration in a space

environment

Actual system completed and

“Flight Qualified ”through test and demonstration

(Ground or Space)

Actual system “Flight Proven ”

through successful

mission operations

TRL

TRP

GSTP

CTP

EOEP

Galileo

FLPP

Aurora

2 3 4 5 6 7 8 9

Mandatory

Optional

Generic/ Multi-domains

Main Service domains

Science

Generic/ Multi-domains

Earth Observation

Telecommunications

Navigation

Space transportation

Human spaceflight/ Exploration

ELIPS

versus Technology Readiness Levels

Technology concept

formulated

Experimental critical function and /or proof of

concept

Component and/ or broadband validation in laboratory

Component and/ or broadband validation in

relevant environment

System / subsystem model

or prototype demonstration in

a relevant environment

System prototype

demonstration in a space

environment

Actual system completed and

“Flight Qualified ”through test and demonstration

(Ground or Space)

Actual system “Flight Proven ”

through successful

mission operations

TRL

TRP

GSTP

CTP

EOEP

ARTES

STEP

FLPP

Aurora

2 3 4 5 6 7 8 9

Mandatory

Optional

Generic/ Multi-domains

Main Service domains

Science

Generic/ Multi-domains

Earth Observation

Telecommunications

Navigation

Space transportation

Human spaceflight/ Exploration

ELIPS

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Academy House – Brussels - 27 October 2005Academy House – Brussels - 27 October 2005

Technology and Application ProgrammesTechnology and Application Programmes

Phase 0 (Pre-Phase A)Phase 0 (Pre-Phase A)

Phase APhase A

Phase B/C/DPhase B/C/D

Technology requirements

Iteration on Technology

needs

Identify complementary

activities proposed

Procurement Plan

Assessment of design and technology maturity + feedback (internal ESA)

Assessment of programme procurement plan +

identification of “deviations”

ITTITT

ITTITT

ITTITT

Early phases of the application programmes will be accompanied to maximise utilisation of European technologies.

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Academy House – Brussels - 27 October 2005Academy House – Brussels - 27 October 2005

ESA Technology Programmes :TRP & GSTPESA Technology Programmes :TRP & GSTP

Basic Technology Research Programme (TRP) Part of ESA Mandatory Programmes Covering all technology disciplines & applications Based on three year Workplan, with yearly updates About 38 M€ in commitments per Year

General Support Technology Programme (GSTP) Optional Programme - Each member state decides:

=> The amount of its participation

=> The technological activities to support Covering general purpose technology developments Three year cycle with regular updates Regular AOs are part of GSTP >30 Meuro in commitments per Year, Industrial co-funding possible

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Academy House – Brussels - 27 October 2005Academy House – Brussels - 27 October 2005

Support to Programmes& Generic Technologies

Support to Industry’sCompetitiveness(Short Term)

Innovative/ProspectiveTechnology

TECHNOLOGY R&DPredevelopment Prequalification

Research & feasibility demonstration

CATEGORY

A

CATEGORY B

CATEGORY C

ESA Technology Programmes: TRP & GSTPESA Technology Programmes: TRP & GSTP

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Academy House – Brussels - 27 October 2005Academy House – Brussels - 27 October 2005

ARTES Programme ElementsARTES Programme Elements

ElementElement

ARTES 1ARTES 1ARTES 1ARTES 1

ARTES 3ARTES 3ARTES 3ARTES 3

ARTES 4ARTES 4ARTES 4ARTES 4

ARTES 5ARTES 5ARTES 5ARTES 5

ARTES 8ARTES 8ARTES 8ARTES 8

ObjectiveObjective

StrategyMission/system studies, generalconfiguration and define the necessarytechnology developments

StrategyMission/system studies, generalconfiguration and define the necessarytechnology developments

Multimedia, SATCOM system elements,Pioneering Novel Systems and Adv. MSS

Promote MM applicat., develop & validatecomprehensive MMS and Advanced MSS

Multimedia, SATCOM system elements,Pioneering Novel Systems and Adv. MSS

Promote MM applicat., develop & validatecomprehensive MMS and Advanced MSS

ESA/Industry PartnershipResearch, develop & demonstrate stateof the art technologies and services withclear applications potential

ESA/Industry PartnershipResearch, develop & demonstrate stateof the art technologies and services withclear applications potential

TechnologyUse of telecom. satellites, advance andimprove satellite systems and relatedspace and ground segment

TechnologyUse of telecom. satellites, advance andimprove satellite systems and relatedspace and ground segment

Large Telecommunications PlatformDevelop a multipurpose Platform for largetelecom. payloads. Implement a LPmission. Reinforce European sat Industry

Large Telecommunications PlatformDevelop a multipurpose Platform for largetelecom. payloads. Implement a LPmission. Reinforce European sat Industry

TimelyPerspective

TimelyPerspective

FinanceLevel

FinanceLevel

ParticipationModus

ParticipationModus

Long-termLong-term

Short-termNear to Market

Short-termNear to Market

Short-termNear to Market

Short-termNear to Market

Long-termLong-term

Mid-term(1st GenerationMarket Entry2007-2008)

Mid-term(1st GenerationMarket Entry2007-2008)

100%100%

Up to 50%Up to 50%

Up to 50%Up to 50%

100%100%

50%, 75%& 100%

50%, 75%& 100%

ITTITT

ITTITT

ContinuousOpen Call forProposals orSpecific ITT

ContinuousOpen Call forProposals orSpecific ITT

ITTITT

ITTITT

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Academy House – Brussels - 27 October 2005Academy House – Brussels - 27 October 2005

Evolutions des technologiesEvolutions des technologies

Overview of ESA MicroprocessorsOverview of ESA Microprocessors

• CSIC (Mil1750 Inst. set)• Two chips• 84 and 68 pins• 2 MIPS at 16 MHz• CMOS/SOS 1.25 μ

MA317501990

• CSIC (Mil1750 Inst. set)• Two chips• 84 and 68 pins• 2 MIPS at 16 MHz• CMOS/SOS 1.25 μ

• CSIC (Mil1750 Inst. set)• Two chips• 84 and 68 pins• 2 MIPS at 16 MHz• CMOS/SOS 1.25 μ

MA317501990

MA31750MA317501990

• RISC, SPARC V7, 32 bit• Three chips• 256, 160, and 256 pins• 10 MIPS at 14 MHz• CMOS RT 0.8 μ

ERC32 3-chip set1995

• RISC, SPARC V7, 32 bit• Three chips• 256, 160, and 256 pins• 10 MIPS at 14 MHz• CMOS RT 0.8 μ

• RISC, SPARC V7, 32 bit• Three chips• 256, 160, and 256 pins• 10 MIPS at 14 MHz• CMOS RT 0.8 μ

ERC32 3-chip set1995

ERC32 3-chip setERC32 3-chip set1995

• RISC, SPARC V7, 32 bit• Single chip• 256 pins• 20 MIPS at 25 MHz• SCMOS RT Plus 0.5μ

• RISC, SPARC V7, 32 bit• Single chip• 256 pins• 20 MIPS at 25 MHz• SCMOS RT Plus 0.5μ

ERC32 Single Chip2000

ERC32 Single ChipERC32 Single Chip2000

• RISC SPARC V8, 32 bit• Single Chip• 349 pins • 100 MIPS• CMOS 0.18μ

LEON2-FT2005

• RISC SPARC V8, 32 bit• Single Chip• 349 pins • 100 MIPS• CMOS 0.18μ

• RISC SPARC V8, 32 bit• Single Chip• 349 pins • 100 MIPS• CMOS 0.18μ

LEON2-FT2005

Quad LEON3

2010

Quad LEON3

2010 • RISC SPARC V8, 32 bit• Single Chip, 4 CPUs• 200 Mips per CPU• CMOS 0.13μ, 0.090 μ

• RISC SPARC V8, 32 bit• Single Chip, 4 CPUs• 200 Mips per CPU• CMOS 0.13μ, 0.090 μ

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Academy House – Brussels - 27 October 2005Academy House – Brussels - 27 October 2005

Network speed, Space / GroundNetwork speed, Space / Ground

ERC 32 computer: 17Mips SpaceWire (200Mbps) Commercial PC: 1000Mips

Network Speed

1

10

100

1000

10000

1995 2000 2005 2010

Year

Sp

eed

in M

Bit

s/se

c

Ground

Space

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Academy House – Brussels - 27 October 2005Academy House – Brussels - 27 October 2005

EVOLUTION OF TECHNOLOGIESEVOLUTION OF TECHNOLOGIES

Evolution of AOCS sensors Star Trackers

APS-based Star Tracker (centre)

for the Bepi-Colombo mission,

shown between a precursor Cassini

Stellar Reference Unit (right) and

a CCD-based Autonomous Star Tracker (left)

MEMS gyroscopes

Rate sensor based on Coriolis effect,

being adapted from terrestrial model

for space applications

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Academy House – Brussels - 27 October 2005Academy House – Brussels - 27 October 2005

EVOLUTION OF TECHNOLOGIESEVOLUTION OF TECHNOLOGIES

Digital Integrated Circuit evolutions: ASICs and FPGAs

year 1995 2000 2005 2010 2015

technology size (µm)

0.8 0.5 0.35 0.18 0.13 0.06

design complexity (number of elemental

logic functions)

100K 500K 5.5M 10M 50M

maximum chip size (mm2)

8x8 10x10 13X13 15X15 20x20

max number of pins

200 350 625 1300 2000

max working F (MHz)

10 100 250 500 1GHz

typical ASIC examples

ERC32 chipset

SpaceWire Router

LEON2FT, AGGA3,

SOCsNGP Telecom

year 1995 2000 2005 2010 2015

# of FPGAs in S/C

0 10 to 50 50 to 150several

hundredsthousends

S/C examplesSOHO, XMM

ROSETTA, SMART-1

Cryosat, Herschel

Galileo, GMES

Telecom

• Improve radiation hardening of re- programmable FPGA

• On-board data processing for data compression and reduction

• Compression factors up to several 1000 dependent on the sensor are possible

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Academy House – Brussels - 27 October 2005Academy House – Brussels - 27 October 2005

Enabling Control Technologies:Earth Observation

Agility Drag free

Science missions High accuracy pointing Formation flying

Exploration Safe precision Entry Descent Landing systems Autonomous Rendez-Vous Systems Fault Tolerant Control Systems Micro GN&C Systems Increased autonomy

Launchers Fault Tolerant Control Systems Telecoms

SPECTRASPECTRAGOCEGOCE

GAIAGAIA LISA PFLISA PF LISALISA DARWINDARWIN

Autonomous rendezvous

Safe precision landing

Fault tolerant control system

RLVRLV

EVOLUTION OF TECHNOLOGIESEVOLUTION OF TECHNOLOGIES

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Academy House – Brussels - 27 October 2005Academy House – Brussels - 27 October 2005

CONCLUSIONCONCLUSION

Technology improvements forces to modify the system architecture approach, especially for operational missions.

Technology improvements of equipments in mass, power requirements; on board computer performance increase, integration of complex functions in asics and programmable FPGA, optics and simulation performances increase make possible changes in spacecraft architecture: small and more autonomous s/c can provide top level solutions.