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A Behavioral and Temperature Measurements-Based Modeling of an Operational Amplifier

Using VHDL-AMS

Sahbi Baccar12, Timothée Lévi1, Dominique Dallet1, Vladimir Shitikov2, François Barbara2

1 IMS Laboratory- Université Bordeaux 1, France2 Schlumberger Riboud Product Center (SRPC), Clamart, France

17th IEEE International Conference on Electronics, Systems and SystemsAthens-13th December 2010

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Outlines

Outline

Motivation and Context

Op-amp Description and Characterization

Development of HT Op-amp Models

Conclusion and Prospects

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HTE (high temperature electronics), a recent growing market with specific circuit requirements

Validity of SPICE industrial components models in HT?

Outlines

Motivation and Context

Reviewing transistor factors in HT

??

Market Temperature (°C)

Down-hole Instruments 150-300

Turbine Engine 200-300

Internal Combustion Engine

>150

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Outlines

Motivation and Context

SPICE: among first simulator for ICs

Working conditions effect modeling in

SPICE macro-model?

VHDL-AMS language: modern tool for

AMS and multi-domain modeling and

simulating

huge time of computation: 23.5 hours for simulating a feedback of a

PLL loop!!

Emergence of: - new simulators

- new modeling approaches

HTE Behavioral Modeling

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Outlines

Outline

Motivation and Context

Op-amp Description and Characterization

Development of HT Op-amp Models

Conclusion and Prospects

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High Temperature Front End

Op-amp Description and Characterization

Amplifier Anaog Filter

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Outlines

Op-amp Description and Characterization

Input Stage Gain Stage Output Stage

Vos , Ios, PSRR,

CMRR, Rin,Cin, Zcm… Aol, GBPW, fol,

SR-, SR+..Voutlimp, Voutlimn,

Rout…

Op-amp

Stage 1 Stage 2 Stage 3

performance parameters

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Outlines

Outline

Motivation and Context

Op-amp Description and Characterization

Development of HT Op-amp Models

Conclusion and Prospects

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Outlines

Development of HT op-amp ModelsParameter Measurement(T1,

T2,..)

Fitting by Mathematical Functions

Simulation

HT Behavioral Model Development

Error Evaluation

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Outlines

Development of HT op-amp Models

Input Stage Model

2Zcm

Ios(T)

2Zcm

CinRin

Ib(T)/2

Vos(T)Vcm+(T)

CMRR(T) PSRR+(T)

Vs(T)

inp+

inp-

inpo1

inpo2PSRR-(T)

Vs(T)Vcm-(T)

CMRR(T)

Ib(T)/2

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Outlines

Development of HT op-amp Models

Middle Stage Model

inp+

inp-

inp_po1

inp_po2

1

KLTF

s

First Order LPF

K=Aol(T)fol(T).Aol(T)=GBW(T)

wol(T)=2 .fol(T)

Slew rate, Transconductance

SR+(T), SR-(T),

Vine VgIg=Vine.gm

Ig

Vop

Iomax(T),gm

11 . op

g OL opOL

dVV A V

dt

sub-stage 1 sub-stage 2

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Outlines

Development of HT op-amp Models

Output Stage Model

Voutlimp(T)

Voutlimn(T)

Rout

inp_out

inn_out

output

Iout

Vout

Impedance StageVoltage limiter sub-stage

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Outlines

Simulation Results and Discussions

Voltage Offset and Saturation Voltage

T=25°C

T=150°C

Rl=1K

Vin

Rs=1K

Op Amp Developed Model

Test-bench circuit

Voutlimp (T1=25°C)Voutlimp (T2=150°C)

Voutlimn (T1=25°C)

Voutlimn (T2=150°C)

Slo

pe1

=A

ol(

T1=

25°C

)

Slo

pe2=

Aol

(T2=

150°

C)Vos (T1=25°C) Vos (T2=150°C)

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Outlines

Simulation Results and Discussions

Voltage Offset and Saturation Voltage

T=25°C

T=150°CInput Voltage

Rl=1K

Vin=1V

Rs=1K

Op Amp Developed Model

Rf=10K

Test-bench circuit

15V

T=25°C

T=150°C

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Outlines

Simulation Results and Discussions Frequency Response and Open-Loop Gain

Rl=1K

Vin

Rs=1K

Op Amp Developed Model

Test-bench circuit

1

2

100 ( , 25 )

100 ( , 150 )

dB Aol dB T C

dB Aol dB T C

Temperature Increases

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Outlines

Parameter Extraction and Model Validation

Title: Comparison of measured and simulated voltage offset for different temperatures

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Outlines

Outlines

Motivation and Context

Op-amp Description and Characterization

Development of HT Op-amp Models

Conclusion and Prospects

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Outlines

Conclusion and Prospects

A novel behavioral op-amp model in HT

Simulation of major op-amp performance parameters

Modeling methodology based on measurement of

performance parameters

Confirmation of VHDL-AMS abilities as a useful and

modern modeling language

A first step to model the whole analog-front end of a data

acquisition system: Op-amp, Filter and ADC

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Outlines

References[1] E. Bruls, M. Verstraelen, T. Zwemstra, and P. Meijer, “Analogue fault simulation in standard VHDL,” IEE Proc. Circuits, Devices and Systems, vol. 143, 1996, pp. 380.

[2] F. Pecheux, C. Lallement and A. Vachoux, “VHDL-AMS and Verilog- AMS as alternative hardware description languages for efficient modeling of multidiscipline systems,” Computer-Aided Design of Integrated Circuits and Systems, IEEE Trans. on, vol. 24, n. 2005, pp. 204-225.

[3] R. Kirschman, High-Temperature Electronics, Wiley-IEEE Press, 1998.

[4] R. Johnson, J. Evans, P. Jacobsen, J. Thompson and M. Christopher, “The changing automotive environment: high-temperature electronics,” Electronics Packaging Manufacturing, IEEE Trans. on, vol. 27, 2004, pp. 164-176.

[5] S. Baccar, S.M. Qaisar, D. Dallet, T. Levi, V. Shitikov and F. Barbara, “Analog to digital converters for high temperature applications: The modeling approach issue,” Instrumentation and Measurement Technology Conf. (I2MTC) IEEE, pp. 550-554, Austin, 3-6 May 2010

[6] G.B. Clayton et S. Winder, Operational Amplifiers, Fifth Edition, Newnes, 2003.

[7] P.J. Ashenden, G.D. Peterson and D.A. Teegarden, The System Designer's Guide to VHDL-AMS: Analog, Mixed-Signal, and Mixed- Technology Modeling, Morgan Kaufmann, 2002.

[8] H. Qin, F. Wang, “ Modeling of Operational Amplifier based on VHDLAMS”, in Proc. IEEE International Conference on Electronics Circuits and Systems 2006, pp. 894-897, Nice, 10-13 December 2010

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