• ti type 502 flip flop: 1st

8/14/2019 TI Type 502 Flip Flop: 1st

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CENT-113 Digital Electronics1

Flip Flops

TI Type 502 Flip Flop: 1st production IC in 1960.


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Interest

1919: W. H. Eccles and F. W. Jordan publish the firstflip-flop circuit design.

M74HC74AM Fairchild CMOS flip-flop for frequency

manipulation is used in a Smart Card Reader.


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Logic Circuit Classifications

Combination Logic CircuitsBuilding block is the logic gate.

Use AND, OR, NOT gates.

Sequential Logic CircuitsBuilding block is the flip flop (FF).

Used in timing and memory devices.

Flip Flops are wired to form counters, shift registers,and various memory devices.


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R-S Flip Flop

Logic Symbol Wiring DiagramSet

Reset Complementary

NormalS

R

Q

Q

FF

Truth Table Waveform DiagramMode of

Operation

Input

S

Input

R

Output

Q

Output

Q

Effect

Prohibited 0 0 1 1 ProhibitedDo not use

Set 0 1 1 0 For settingQ to 1

Reset 1 0 0 1Resetting

Q to 0

Hold 1 1 Q Q DependsPreviousState

Input Output

Input

Output

Set Reset SetHold

S

R

Q

Q

Hold

1

0

1

0

1

0

1

0

Also called:R-S Latch

Set-Reset FF


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Clocked R-S Flip Flop

Logic Symbol Wiring Diagram

Truth Table Waveform DiagramMode of

Operation

Input

CLK

Input

S

Input

R

Output

Q

Output

Q

Effect

Hold 0 0 1 1 NoChange

Reset 0 1 0 1Reset or

cleared to0

Set 1 0 1 0 Set to 1

Prohibited1 1 1 1 Do notuse

Input

Output

S

R

Q

Q

1

0

1

0

1

0

1

0

Set

Reset Complementary

NormalInput Output

ClockS

R

Q

Q

FF

CLK

CLK

Output FF operates

Synchronouslyin step with clock.


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Questions

Q. What type of waveform is used in flip flops? A. Square Waves.

Q. What does the RS stand for in the RS Flip

Flop? A. Reset Set.


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D Flip Flop

Logic Symbol Wiring DiagramData

Clock Complementary

NormalD

CLK

Q

Q

FF

Truth Table Similar Wiring

Input Output

Also called:

Delay FFData FF

D-type Latches

Delayed 1

Clock Pulse

Input

CLK

Input

D

Output

Qn+1Output

Q

0 0 11 1 0

D

CLK

Q

Q

FF

S

R

Q

Q

FF

CLK

=


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7474 D Flip Flop

Logic Symbol

Truth Table

Data

Clock Complementary

NormalD

CLK

Q

Q

FFInput Output

Mode of

Operation

INPUTS OUTPUTS

Asynchronous Synchronous

PS CLR CLK D Q Q

Asynchronous Set 0 1 X X 1 0

Asynchronous Reset 1 0 X X 0 1

Prohibited 0 0 X X 1 1

Set 1 1 L to H 1 1 0

Reset 1 1 L to H 0 0 1

Note: The asynchronous inputs

(PS & CLR) Override thesynchronous inputs (D & CLK) .

PS

Preset

Clear

CLR


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D (Delay) Flip Flop Uses

Sequential logic devices used in temporarymemory devices.

Wired together to form shift registers and storage

registers. Delays data from reaching output Q one clock

pulse.

CMOS examples: 74HC74, 74FCT374, 40174 Over 50 different ICs in FACT CMOS family.


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J-K Flip Flop

Logic Symbol

Truth Table

Mode of

OperationINPUTS OUTPUTS Effect

Input

CLK

Input

J

Input

K

Output

Q

Output

Q

Hold 0 0 NoChange

No

Change

No

Change

Reset 0 1 0 1 Reset orcleared to 0

Set 1 0 1 0 Set to 1

Toggle 1 1 Toggle Toggle Changed toOpposite State

Data

Complementary

Normal

Input Output

ClockJ

K

Q

Q

FF

CLK

Data


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7476 J-K Flip Flop

Logic Symbol

Truth Table

Mode of

Operation

INPUTS OUTPUTS

Asynchronous Synchronous

PS CLR CLK J K Q Q

Asynchronous Set 0 1 X X X 1 0

Asynchronous Reset 1 0 X X X 0 1

Prohibited 0 0 X X X 1 1

Hold 1 1 0 0 No Change No Change

Reset 1 1 0 1 0 1

Set 1 1 1 0 1 0

Toggle 1 1 1 1 Opposite State

Note: 7476 uses the entire pulse to

transfer data from J & K data inputsto Q & Q outputs.

Data

Complementary

NormalInput Output

Clock J

K

Q

Q

FFCLK

Data

Preset

Clear

CLR


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Questions

Q. What circuit can be used to give a clocksignal?

A. Astable multivibrater.


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IC LatchesInput

Keyboard

7 8 9

1

4 5 6

2 3

0

Encoder 4-Bit Latch Decoder

Output

Display

Decimal DecimalBinary

A device that serves as a temporary buffer memory

is called a latch. An example of a 4-bit latch is the

7475.A latch is transparent when the enable input is high,

the normal outputs follow the data in the D inputs.One example of flip flops is to latch or hold data.


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IC Latch Uses

The latch is the fundamental memory deviceused in digital electronics.

Almost all digital equipment contains simple

memory devices called latches. CMOS examples: 4042, 4099, 74HC75

4043 is an example of a BCD-7 Segment

latch/decoder/driver chip.


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CMOS D Flip-Flop Schematic


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D Flip Flop using Nor gatesWhat logic gates are more efficient?


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CMOS D Flip-Flop

CMOS technology allows a very differentapproach to flip-flop design and construction.

Instead of using logic gates to connect the clock

signal to the master and slave sections of the flip-

flop, a CMOS flip-flop uses transmission gates

to control the data connections.


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Triggering Flip Flops

The added inverter bubble at the clock inputshows that triggering occurs on the negative

going edge of the clock pulse.

The J-K master/slave flip flop uses the entirepulse (positive edge and the negative edge) to

trigger the flip flop.

Waveform 165.


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Schmidt Trigger

Schmidt Trigger Inverter commonly used tosquare up input signal. This reshaping of the

waveform is called signal conditioning.


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IEEE vs. Logical Symbols

See internet links.


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Conclusions

Q. What are some circuit uses for flip flops? A. Counters, shift registers, and various memory

devices.

• ti type 502 flip flop: 1st

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