- 1 - impact of synchronizing method on the operation of full...

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CLEEN OY Eteläranta 10, P.O. BOX 10, FI-00131 HELSINKI, FINLAND www.cleen.fi

Impact of synchronizing method on the operation of full power converter wind turbine Anssi Mäkinen, SGEM deliverable 5.1.25

1. Introduction

The amount of electricity generated using wind turbines has increased dramatically in recent years. According to World Wind Energy Association (WWEA), the worldwide wind turbine capacity at the end of year 2011 was 239 GW covering 3 % of the world’s electricity demand. [1] In the past, due to the low penetration of grid connected wind turbines the operation of wind turbines did not have great impact on the operation of the utility grid. Nowadays, the penetration level of the wind turbines has increased in many areas so much that the operation of wind turbines should be designed so that the stable operation of the power system is not endangered in any circumstances due to the connection of the wind turbines. Thus, the power system operators have created grid codes which determine how the wind turbines should operate under different grid conditions. In order to fulfil the grid codes, the wind turbines should be able to control its active and reactive power output as well as to stay in operation during grid disturbances such as voltage dips or swells.

The technical challenges above are strongly related to the control system design of the frequency converter of the full power converter wind turbine. The frequency converter consists of a generator side converter (GSC) which controls the speed and active power of the generator and a network side converter (NSC) which controls the DC-link voltage of the converter and the reactive power output. The control system of the NSC is can be realized in a reference frame that rotates synchronously with the grid voltage vector. When the angle of the grid voltage vector is known the NSC can produce current vector that rotates with the same angular speed with the grid voltage. Moreover, the current vector can be divided into active and reactive current components which can be controlled independently from each other to the desired values. Thus, the active and the reactive power output of the wind turbine can be controlled as required by the grid codes.

In ideal case, the grid voltage vector rotates with constant angular speed and magnitude. However, after the presence of harmonics or voltage asymmetries the speed and the magnitude of the vector are not constant anymore. If the control system of the NSC is synchronized to the grid voltage vector which contains harmonics or negative sequence component the output currents contain also harmonics or asymmetry. This is undesirable in wind turbine applications since typically wind turbine should generate currents which contain only the fundamental component in order to minimize losses in grid. In addition, the fast changes in the

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angular speed of the grid voltage vector may cause instability of the control system. Thus, the control system of the NSC cannot be synchronized directly to the grid voltage vector.

In this report, the synchronization of the NSC to the grid voltage is studied. The comparison of different synchronizing methods is done and their performance during different network voltage disturbances is evaluated. The objective is to find out how the NSC should be synchronized so that the wind turbine can fulfil the grid codes.

2. Synchronizing methods

Basics of phase locked loop

A phase locked loop (PLL) synchronizes signal from an oscillator with a reference signal. Thus, the oscillator and the reference signal have same frequency. The basic loop of the PLL contains phase detector, loop filter and oscillator as shown in Fig. 1. The phase detector (PD) produces an output signal that is proportional to the phase difference between the reference signal in and the oscillator signal o. The PLL can be designed to track the reference angle quickly or slowly depending on the parameters used in the loop filter (LF). The output of the LF can be voltage vcontrol or current which is used to control the operation of oscillator. However, the synchronized oscillator is typically voltage controlled oscillator (VCO). [2]

Fig. 1. Basic phase locked loop.

Synchronization based on zero crossings detection

One straightforward method to synchronize the NSC is based on the detection of grid voltage zero crossings. [3] One example of the method is shown in Fig. 2. [4][5] The measured a-phase of the grid voltage is low pass filtered in order to extract the positive sequence component from the voltage. The time difference between the zero crossing times of the positive sequence voltage ua1 and the estimated phase angle of the positive sequence voltage component ua,1 is controlled to zero using PI-controller. The output of the controller is the angle increment ua,1. The angle increment ua,1 is added to the previous sample time value of the angle ua,1 at every calculation period while the new value for the angle increment ua,1 is attained only after zero crossings. Filter delay compensation is a value which takes the phase shift caused by the low pass filter into account and is added to the angle ua,1. The synchronizing angle sync is achieved after subtraction of /2 which takes into account the angle difference between grid voltage and the space vector of the grid voltage.

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Fig. 2. Synchronizing method based on zero crossings of the a-phase of the grid voltage.

The major drawback of this synchronizing method is that its operation is based on the measurement of a-phase of the grid voltage only. Thus, it does not detect occurrences in other two phases. In addition, the method obtains the information about the action of phase voltage only after zero crossings. Hence, it cannot follow the changes in grid voltage angle in between the zero crossings. This can make the phase tracking too slow and the requirements provided by the grid codes may not be fulfilled. In addition, multiple zero crossings may be detected when the grid voltage is distorted. [6] The significance of these drawbacks increases as the weakness of the grid, i.e. grid impedance, increase. It should be noted that wind turbines are very often connected to the remote areas or coasts where the wind conditions are good but the grid is weak. [7]

Synchronous reference frame – phase locked loop (SRF-PLL)

The block diagram of the three-phase synchronous reference frame – phase locked loop (SRF-PLL) system is illustrated in Fig. 3. The measured three-phase balanced grid voltages ua, ub, uc are transformed into two axis

and zero sequence space vector components u , u , u0 using Clarke transformation [6]

34cos

32cos

cos

21

21

21

23

230

21

211

32

21

21

21

23

230

21

211

32

c

b

a

c

b

a

0

0U

UU

uuu

uuu

Tuuu

(1)

where is the angular position of the grid voltage vector, U is the peak value of the phase voltage and [T 0] is Clarke transformation matrix.

Some basic trigonometric Equations are needed in the following:

yxyxyx sinsincoscoscos (2a)

yxyxyx sincoscossinsin (2b)

- 4 -


Neglecting the zero sequence component, the space vector components can be expressed as follows using (1) and (2):

34cos

32cos

23

34cos

32cos

21cos

32U

uu

34sinsin

34coscos

32sinsin

32coscos

23

34sinsin

34coscos

32sinsin

32coscos

21cos

32U

sincos

sin23

23

23

cos23

32

23sin

21cos

23sin

21cos

23

23sin

21cos

23sin

21cos

21cos

32

UU

U

(3)

After dq-transformation, the (3) can be expressed in rotating reference frame using (2a) and (2b): [6]

PLL

PLL

PLLPLL

PLLPLL

PLLPLL

PLLPLL

q

d

sincos

sincoscossinsinsincoscos

cossinsincos

UUuu

uu

(4)

where the angle PLL is the angular position of the rotating reference frame and it is generated by the SRF-PLL. The PI-controller controls the q-component of the grid voltage to zero and its output is the angular frequency PLL of the PLL system. The feed forward term ff is used to set the frequency near the final value in order to decrease start-up transients. The angular position PLL of the rotating reference frame is attained after integration of PLL. [3]

Fig. 3. Block diagram of the synchronization system using three-phase SRF-PLL.

- 5 -


The voltage component of interest in (4) is the uq since the purpose of the control system is to regulate the voltage component to zero. The control system block diagram in Fig. 3. is redrawn in more detail in Fig. 4, where kLF and Ti represents the loop filter gain and integration time respectively. [8]

Fig. 4. The control system block diagram of the SRF-PLL.

Due to the sinusoidal function in (4) the system under consideration is nonlinear. However, when the phase difference PLL is small the sinusoidal term behaves almost linearly. Thus, approximation sin( PLL) -

PLL is done in order to linearize the small signal model of the SRF-PLL. The linearized small signal model of the SRF-PLL is shown in Fig. 5.

Fig. 5. Linearized small signal model of the SRF-PLL.

From the Fig. 5, it is possible to determine open-loop, closed loop and closed loop error transfer functions. The transfer functions are utilized when the control parameters of the loop filter is determined. The open loop transfer function is defined as: [6]

2i

PLLPLL

iPLL

iLFol

11111

sT

ksk

ssT

k

ssTUksVCOsLFsPDsH (5)

where kPLL is the product of phase detector gain and loop filter gain. Thus, kPLL=-U*kLF.. Closed-loop transfer function Hcl(s) and closed-loop error transfer function Hcl (s) are: [6]

- 6 -


i

PLLPLL

2

i

PLLPLL

2i

PLLPLL

2i

PLLPLL

ol

olPLLcl

1

1T

ksks

Tksk

sT

ksks

Tksk

sHsHsH (6)

i

PLLPLL

2

2

i

PLLPLL

2

i

PLLPLL

clcl 11

Tksks

s

Tksks

Tksk

sHsssH . (7)

The second order transfer functions can also be expressed in normalized form with help of damping factor and undamped natural frequency n [6]

2nn

2

2nn

cl 22

ssssH (8)

2nn

2

2

cl 2 ssssH . (9)

Combining (6) and (8), the undamped natural frequency n and damping factor can be expressed as a function of PLL gain kPLL and integration time Ti and vice versa: [6]

nPLLi

PLLn 2k

Tk (10)

ni

iPLL 22

TTk

(11)

Analysis of closed loop transfer function

The second order transfer function (8) can also be expressed in from: [9]

sHssHss

s

ssss

s

ssssH 2

z22

nn2

z

2n

2nn

2

2n

2nn

2

zz

2n

2nn

2

2nn

cl 22222 (12)

where z represents the root angular frequency of the nominator which is called zero frequency

zn

n

2n2

nn 2202 ss . (13)

It can be seen from (12) that the Hcl(s) can be divided into two parts. Left-hand side part corresponds to the basic 2nd order transfer function H2(s) and the right-hand side part contains the impact of zero to the system.

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The effect of parameters n and on the poles, which are the roots of the denominator, of the left-hand side part of (12) is depicted in Fig. 6. The undamped natural frequency n corresponds to the actual frequency in situation where the damping factor is zero. The distance between origo and transfer function poles, marked using cross in Fig. 6, is n. As the increases, the angle rises and the absolute value of the real part of the pole increases. It should be noted that if the is negative the system is unstable. This report concentrates only on stable closed loop systems from now on. The real part of the pole can be calculated in (14) with help of Fig. 6. [10]

Fig. 6. Effect of parameters n and on the poles of the transfer function H2(s).

nn

1 sinsin (14)

Time constant of the response is defined as an inverse value of the . This means that increase in absolute value of the decreases the settling time to the steady state value of the response. However, there exist different definitions for settling time so the settling time is not always directly proportional to the time constant. If the increase in value is made by increasing damping the damped natural frequency d decreases. This increases the rise time of the response. On the other hand, the oscillations in step response decrease as the damping factor increase. The effect of value to the step response of the system H2(s) is illustrated in Fig. 7. The undamped natural frequency is set to 1.

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Fig. 7. The effect of damping factor on the step response of the transfer function H2(s) when the n=1.

If is set to zero the system is critically stable and oscillating with frequency n. As the increases the system settle to its steady state value with decreasing overshoot. However, it can be seen that the rise time decreases. When the =1, the system is critically damped which means that the system will reach its steady-state value with minimized time without any overshoot. In Fig. 7, the settling times are also expressed. The settling time is defined in this case as the time measured from the start time to the time in which the system will stay within 2 % of the steady state value. Based on this definition, the minimum settling time is reached with the damping factor of 0.75 when these five damping factors are compared.

In Fig. 8 the effect of undamped natural frequency to the step response is analysed with a constant damping factor of 0.707. This damping factor produces phase angle of 45 degrees in Fig. 6, which seems to be optimum trade-off between rise time and overshoot.

Fig. 8. Effect of n to the step response.

0 2 4 6 8 10 12 14 16 18 200

0.2

0.4

0.6

0.8

1

1.2

1.4

1.6

1.8

2

Step Response, wn = 1

Time (seconds)

Am

plitu

de

00.250.50.751

0 0.05 0.1 0.15 0.2 0.25 0.30

0.2

0.4

0.6

0.8

1

1.2

1.4

Step Response, damping factor = 0.707

Time (seconds)

Am

plitu

de

5 Hz15 Hz25 Hz50 Hz

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It can be seen from the Fig. 8 that the response is faster when n is larger. The n has no influence to the overshoot of the response. The overshoot is determined by the damping factor solely.

Next, the purpose is to find out the effect of zero to the step response. The step response of s/ z*H2(s) with different is shown in Fig. 9 when the n is equal to one. Similar step response of Hcl(s) is shown in Fig. 10.

Fig. 9. Step response of s/ z*H2(s) with different damping factors when the n=1.

As the increases the peak value and the steepness of the step response increases. The increase in decreases the value of z as indicated by (13). This means that the zero moves toward origin and the impact of z to the s/ z*H2(s) becomes more important. As a result, the step response of the PLL transfer function becomes more rapid than ordinary 2nd order transfer function H2(s) with increased overshoot.

Fig. 10. Step response of Hcl(s) with different damping factors when the n=1.

0 2 4 6 8 10 12 14 16 18 20-0.2

-0.1

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

Step Response, wn=1

Time (seconds)

Am

plitu

de

00.250.50.751

0 2 4 6 8 10 12 14 16 18 200

0.2

0.4

0.6

0.8

1

1.2

1.4

1.6

1.8

2

Step Response, wn = 1

Time (seconds)

Ampl

itude

00.250.50.751210

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Based on the step response it seems reasonable to increase the value of . However, as the zero moves toward the origin the zero weakens the integration part of the loop. Thus, it takes much longer time for system to eliminate steady-state error which is not desired property for PLL. This can be clearly seen from the Fig. 11 where the step response of the error transfer function Hcl (s) calculated in (9) is depicted.

Fig. 11. Closed loop error transfer function Hcl (s) step response with different damping factors when the n=1.

Equation (13) indicates that the zero moves further off the origin as the n increases. Thus, the effect of zero to the system operation decreases. The step responses of the s/ z*H2(s) and the Hcl(s) with different n are shown in Figs. 12 and 13, respectively.

Fig. 12. The step response of the s/ z*H2(s) with different n values when =0.707.

0 2 4 6 8 10 12 14 16 18 20-0.1

0

0.1

0.2

0.3

0.4

0.5

0.6

Step Response, Error transfer function (9), wn = 1

Time (seconds)

Am

plitu

de

0.50.751210

0 0.05 0.1 0.15 0.2 0.25 0.3-0.1

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

Step Response, s/wz*H2(2), damping factor = 0.707

Time (seconds)

Am

plitu

de

5 Hz15 Hz25 Hz50 Hz

- 11 -


Fig. 13. Step response of the Hcl(s) with different n values when =0.707.

The overshoot in Hcl(s) is larger compared to overshoot in H2(s) shown in Fig. 8 due to the appearance of zero and the impact is greater when the value n is smaller. However, the overshoot is independent of the value of the n. The overshoot depends only on the damping factor as stated above when Fig. 8 was analysed.

SRF-PLL under unbalanced grid conditions In this study so far, the operation of SRF-PLL has been considered under balanced or symmetrical grid voltage conditions. However, the synchronization should also work properly under unbalanced or unsymmetrical grid voltage conditions as well. The grid voltage may become unsymmetrical, for example, as a result of connection or disconnection of large single-phase loads or due to unsymmetrical fault such as line-to-ground or line-to-line fault. The analysis of unsymmetrical operation is typically done using symmetrical components where the three-phase voltages (symmetrical or asymmetrical) are transformed into three symmetrical voltage components which are called positive, negative and zero sequence components. [11]

Three-phase voltage vector under grid unbalance Excluding the effect of voltage harmonics the three phase grid voltage vector uabc can be expressed as a sum of its positive, negative and zero sequence components uabc

+, uabc- and uabc

0, respectively.

0

0

0

0

1

1

1

1

1

1

1

1

c

b

a0

abc

coscoscos

32cos

32cos

cos

32cos

32cos

cos

ttt

U

t

t

t

U

t

t

t

Uuuu

uuuu abcabcabc (15)

In this study the zero sequence component of the voltage vector is ignored and it is assumed that initial angles +1, -1 and 0 are zero.

Based on similar calculation done in (3) the space vector under unbalanced conditions can be expressed:

0 0.05 0.1 0.15 0.2 0.25 0.30

0.2

0.4

0.6

0.8

1

1.2

1.4

Step Response, Hcl(s), damping factor = 0.707

Time (seconds)

Am

plitu

de

5 Hz15 Hz25 Hz50 Hz

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1111

c

b

a

abc sincos

sincos

23

230

21

211

uutt

Utt

Uuuu

uTu (16)

The unbalanced grid voltage vector can be expressed in the dq-reference frame rotating synchronously with the grid voltage positive sequence component ( = t):

tt

UUtUtUtUtU

uu

Tuu

u2sin2cos

01

cossincoscos

cossinsincos 11

11

11

dqq

ddq (17)

The magnitude of the u in balanced condition is:

1212122 sincos UtUtUuuu b . (18)

The magnitude of the u in unbalanced condition is:

tUUUU

ttUUUUttUUUU

tUUtUtUtUUtUtU

tUtUtUtUuuu b

2cos2

cos1cos1212sincos2

sin2sinsincos2coscos

sinsincoscos

112121

11212122112121

211221221211221221

21121122

(19)

It can be seen from (19) that the amplitude of the voltage vector is not constant during unbalanced grid conditions. The oscillations in the magnitude of grid voltage have the frequency of two times the grid frequency.

During balanced grid conditions the angle of the grid is:

tttUtU

uu

tantancossintantan 1

1

111 (20)

The grid voltage components in reference frame that rotates with positive sequence component of the grid voltage in (17) can be utilized when the grid angle during unbalanced grid conditions are of interest:

tUUtUt

uu

tuu

2cos2sintantantan 11

11

d

q11 (21)

Again, the oscillations twice the grid frequency appears on the grid voltage angle. The oscillation part of (21) should be filtered in order to synchronize the NSC to the positive sequence component of the grid voltage. Typically this is done by choosing appropriate parameters of the loop filter of the PLL. However, the extraction of the positive sequence angle by cancelling the oscillation part of the angle in (21) is not the most efficient way. Next, the positive sequence voltage component and angle is extracted from the unbalanced

- 13 -


grid voltage using SRF-PLL with decoupling network in order to cancel the impact of negative sequence component.

Decoupled double synchronous reference frame - phase locked loop (DDSRF-PLL)

This section presents synchronization method that uses two reference frames rotating with positive and negative synchronous angular speeds. Under analysis, it is assumed that positive reference frame is rotating synchronously with grid voltage positive sequence component. In addition, the starting values of the angles

+1 and -1 are set to zero in order to decrease the complex of the analysed equations. Also, it is assumed that the voltage vector contains only fundamental component. The positive and negative sequence components can be extracted from the unbalanced grid voltage vector as shown in Fig. 14. [6]

Fig. 14. Grid voltage vector u and its components in different reference frames.

The unbalanced grid voltage vector in positive sequence reference frame udq+ can be calculated using Fig. 14

in a special case where the angles + and - are zero.

tt

UUuu

u2sin2cos

01

q

ddq (22)

- 14 -


where dq+ and dq- correspond to the positive and negative sequence dq-components respectively. The unbalanced grid voltage vector can also be expressed in negative sequence reference frame udq

- described by the axis d- and q-.

01

2sin2cos

q

ddq U

tt

Uuu

u (23)

From (22) and (23) it can be concluded that positive and negative sequence reference frame consists of both DC and AC component which has angular frequency of 2 . The AC component in positive sequence reference frame is due to the appearance of negative sequence component and the AC component in negative sequence reference frame is due to the positive sequence component of the grid voltage. The amplitude of the AC component in positive sequence reference frame depends on the DC component of the negative sequence voltage and vice versa.

The synchronization method in wind turbine applications should distinguish the positive sequence component from the grid voltage and synchronize the control system of the NSC to the positive sequence voltage. When the traditional SRF-PLL synchronization method is used the purpose is to filter the AC component generated by the negative sequence component from the (22) by selecting appropriate loop filter parameters. However, instead of filtering the grid voltage vector it may be vice to feed forward the AC component to with opposite sign in order to cancel the effect of the AC component. This is the idea of DDSRF-PLL.

The Equations (22) and (23) hold true in a special case where the angles + and - are zero. More generalized way to express the unbalanced grid voltage vector is needed in order to generate feed forward AC component which is used to cancel the effect of double grid frequency oscillations. Grid voltage vector in stationary reference frame is: [6]

ttU

ttUeeueeu

uu

u tjjtjj

sincos

sincos . (24)

This can be transformed into positive and negative sequence dq-reference frames with help of (2a) and (2b): [6]

tt

Ut

tUU

ttttUttUttttUttU

ttUttUttUttUttUttUttUttU

ttU

ttU

tttt

uu

Tuu

u

2cos2sin

sin2sin

2coscos

sincos

sincossincossin2coscossinsincossin2sincossincoscoscossincoscos

sincossincoscossincossinsinsinsinsincoscoscoscos

sincos

sincos

cossinsincos

2222

2222

dqq

ddq

(25)

- 15 -


tt

Utt

UU

ttU

ttU

tttt

uu

Tuu

u

2cos2sin

sin2sin2cos

cossincos

sincos

sincos

cossinsincos

dqq

ddq

(26)

The left side terms in Equations (25) and (26) are DC-values and right side terms are AC-values. The DC values are solved in order to distinguish the positive and negative sequence components from the unbalanced grid voltage

tt

Ut

tU

uu

UU

U2cos2sin

sin2sin

2coscos

sincos

q

d

q

d

(27)

tt

Utt

Uuu

UU

U2cos2sin

sin2sin2cos

cossincos

q

d

q

d (28)

The Figure 15 shows decoupling network where AC components are cancelled from positive and negative sequence reference frames. The decoupling network is based on (27) and (28). The block LPF represents a simple first order low-pass filter with cut-off frequency of f

f

f

ssLPF . (29)

- 16 -


Fig. 15. Decoupling network which is used to cancel the AC components from positive and negative synchronous reference frames.

The decoupling network shown in Fig. 15 provides positive and negative sequence components from the input voltage vector. Thus, it is possible to synchronize the control system of the NSC to the positive sequence component of the grid voltage which is desired in wind turbine applications. Perfect synchronization to the positive sequence component of the grid voltage is achieved when the positive sequence quadrature axis voltage component Uq

+ is zero. In that case, the initial phase angle + is zero and the positive sequence voltage component is aligned to d+-axis which rotates with angular speed of . The angle of positive sequence voltage component is gained using SRF-PLL discussed in previous chapter. The block diagram of the DDSRF-PLL is shown in Fig. 16. [6]

- 17 -


Fig. 16. Block diagram of the DDSRF-PLL system.

The initial phase angles + and - determine the inclination angle inc which depends on the type of grid fault (single-phase, double-phase, three-phase), faulted phase (phase a, phase b, phase c) and the propagation of the grid asymmetrical voltages via transformers located between the fault point and the grid voltage measurement point. [12] When the DDSRF-PLL is used the angle + is zero and the angle - is twice the inclination angle

21

inc . (30)

The decoupling network calculates the Ud- and Uq

- which depends on the angle - as indicated by (28). The knowledge of the negative sequence grid voltage components, Ud

- and Uq-, provides the possibility for NSC

to inject negative sequence current to the grid in order to compensate the unbalanced voltages although the main purpose for the wind turbine is to inject fundamental frequency positive sequence currents.

As can be seen from Fig. 5 the gain of the system depends on the loop filter parameters as well as input voltage magnitude. If the input voltage drops, also the PLL gain falls down. In the case of SRF-PLL it would be possible to normalize the error signal to the grid voltage magnitude. However, that would cause constantly varying gain during asymmetrical faults or voltage distortion since the magnitude of the grid voltage vector changes continuously. In the case of DDSRF-PLL, the regulated value Uq

- is actively normalized to the amplitude of the positive sequence component of the grid voltage vector. This arrangement is beneficial compared to SRF-PLL since the positive sequence component of the grid voltage vector is symmetrical. Thus, the magnitude of the voltage component is not affected by the voltage distortion or unbalance. [6][8]

- 18 -


DSOGI-FLL

Dual second order generalized integrator – frequency locked loop (DSOGI-FLL) synchronization method utilizes the theory of instantaneous symmetrical components in order to extract the positive and negative sequence components from the grid voltage. The purpose of the DSOGI is to produce inquadrature axis components from the grid voltage vector components which are needed in positive and negative sequence calculation. The DSOGI is a bandpass filter which resonance frequency is actively tuned to the grid frequency. The tuning process is performed by the FLL.

Symmetrical components of the grid voltage If phasor of b-phase voltage Ub lags phasor of a-phase voltage Ua by 120 degrees and phasor of c-phase voltage Uc lags Ua by 240 degrees the phase sequence is called positive or abc sequence. Thus, the phase a positive sequence phasor Ua

+ has following properties: [11]

aca2

baa ,, UUUUUU (31)

where =ej2 /3=ej120° is called as the Fortescue operator. It denotes phase lead by 120 degrees and superscript + denotes positive sequence phasor.

If Uc lags Ua by 120 degrees and Ub lags Ua by 240 degrees the phase sequence is called negative or acb sequence. The phase a negative sequence phasor Ua

- has following properties:

a2

cabaa ,, UUUUUU (32)

where superscript – denotes negative sequence phasor.

The phase sequence which consists of three voltages that have same magnitude and phase is called zero sequence and the phase a phasor Ua

0 has following properties:

0a

0c

0a

00a

0a ,, UUUUUU b

where superscript 0 denotes zero sequence phasor.

According to Fortescue’s theorem the three grid voltage phasors can be calculated as a sum of these positive, negative and zero sequence phasors [11]

0cccc

0bbbb

0aaaa

UUUU

UUUU

UUUU

. (33)

The (33) can also be expressed using sequence phasors of phase a using (31) and (32)

- 19 -


0aa

2ac

0aaa

2b

0aaaa

UUUU

UUUU

UUUU

(34)

The (34) can be presented also in the matrix form

0a

a

a

2

2

c

b

a

11111

UUU

UUU

(35)

The symmetrical phasors can be solved from the grid voltage components:

c

b

a

0

c

b

a2

2

c

b

a1

2

2

0a

a

a

11111

31

11111

UUU

TUUU

UUU

UUU

(36)

where [T+-0] is called Fortescue transformation matrix. If the Fortesque transformation matrix is used in time domain the transformation matrix is called Lyon transformation matrix. [6]

c

b

a

0

c

b

a2

2

0a

a

a

11111

31

uuu

Tuuu

uuu

(37)

As can be seen from the (37) the instantaneous positive and negative sequence components of the grid voltage phase a can be separated from the instantaneous values of the phase voltages. Also the positive and negative sequence components of the other grid voltage phases can be expressed using similar philosophy as in (31) and (32). Thus, the positive and negative sequence components can be calculated from the instantaneous grid voltage phase values as follows

c

b

a

c

b

a

2

2

2

c

b

a

11

1

31

uuu

Tuuu

uuu

(38)

c

b

a

c

b

a

2

2

2

c

b

a

11

1

31

uuu

Tuuu

uuu

. (39)

The Equation (38) is transformed in to stationary reference frame using Clarke transformation expressed in (1).

- 20 -


2

2

2

1

c

b

a

c

b

a

23-

21-

23

21-

01

11

1

31

23

230

21

211

32

uu

uu

TTTuuu

TTuuu

Tuu

(40)

The Fortesque phase shift operator can also be expressed as follows:

(41)

The (40) can be solved with help of (41):

11

21

11

21

uu

Tuu

qq

uu

jj

uu (42)

where the operator q is 90° phase shift operator i.e.

2eq . (43)

The negative sequence stationary reference components from the -grid voltage components can be calculated if the [T+] is replaced by [T-] in (40).

1

11

21

uu

Tuu

qq

uu

TTTuu (44)

The positive and negative sequence components can be identified from the grid voltage vector using matrixes [T +] and [T -] according to (42) and (44). However, in order to extract the positive and negative sequence components from the grid voltage vector the 90° phase shift operator q is needed. The implementation of q is done using DSOGI.

DSOGIDSOGI consists of two SOGIs which are second order adaptive band pass filters. One SOGI generates in line and 90° phase shifted components from input voltage component u in resonance frequency ’ and the other generates the same components from u . The structure of SOGI is shown in Fig. 17

23

21,

23

21 3

j423

j2

jeje

- 21 -


Fig. 17. Structure of SOGI.

where the u is the input voltage, u’ is the output voltage in phase with the input voltage, qu’ is the output voltage component in quadrature-phase with the input voltage, kSOGI is the gain of the system, SOGI is the error measure and ’ is the resonance frequency of the band pass filter. The transfer functions of the SOGI can be defined based on Fig. 17:

2SOGI

2SOGI

''''skssks

uusD (45)

2SOGI

2

2SOGI

''''sks

ksu

qusQ (46)

2SOGI

2

22SOGI

'''sks

ssu

sE (47)

The Bode plots of the transfer functions of D(s) and Q(s) with different values of gain kSOGI are shown in Figs. 18 and 19 respectively. The resonance frequency ’ was set to 2 *50Hz. The bandwidth of the transfer functions are determined by the gain value kSOGI. The higher the gain value the higher the bandwidth. Thus, the speed of the response increases as the gain increases. However, as the gain value kSOGI decreases the selectivity of the filter increases. This implicates good harmonic rejection. It can be seen also from the Figs. 18 and 19 that the phase of the Q(s) is 90 degrees shifted compared to D(s) as expected. It can be noticed from Equations (45)-(47) that the poles of the second order transfer functions are placed to have damping factor =0.707 (1/sqrt(2)) when the gain is set to kSOGI = 1.41 (sqrt(2)).

- 22 -


Fig. 18. Bode plot of D(s) transfer function with different gains.

Fig. 19. Bode plot of Q(s) transfer function with different gains.

The purpose of the SOGI is to produce in line and 90° phase shifted components from input voltage component in resonance frequency ’. These components are utilized as building blocks of the matrix [T +] in (42) as follows:

2SOGI

2SOGI

''

'''

21

21

11

21

uu

ss

sksk

uu

sDsQsQsD

uu

qq

uu

Tuu . (48)

Similarly, the negative sequence components can be calculated using D(s) and Q(s) in (44):

2SOGI

2SOGI

''

'''

21

21

11

21

uu

ss

sksk

uu

sDsQsQsD

uu

qq

uu

Tuu . (49)

-50

-40

-30

-20

-10

0

Mag

nitu

de (d

B)

100 101 102 103 104-90

-45

0

45

90

Phas

e (d

eg)

Bode Diagram

Frequency (Hz)

k=0.5k=1k=1.41k=2

-100

-50

0

50

Mag

nitu

de (

dB)

100 101 102 103 104-180

-90

0

Pha

se (d

eg)

Bode Diagram

Frequency (Hz)

k=0.5k=1k=1.41k=2

- 23 -


As can be seen from Equations (48) and (49) positive and negative sequence components from the grid voltage vector can be calculated with help of DSOGI. However, the above Equations assume that the grid frequency corresponds to the resonance frequency ’. In reality, the frequency in the network varies depending on the power balance between generated and consumed power in the network. In order to utilize the DSOGI in the synchronization of the NSC to the positive sequence component of the grid voltage, the resonance frequency of the filter should be adapted to the grid frequency. For that purpose the FLL is used.

FLLThe operation principle of FLL can be understood by investigating transfer functions Q(s) and E(s) in (46) and (47) respectively. The bode plots of the transfer functions Q(s) and E(s) are shown in Fig. 20 when ’ is

*50Hz.

Fig. 20. Bode plot of transfer functions Q(s) and E(s) when ’ is 2 *50Hz.

Important feature in Q(s) and E(s) is that the phases of both transfer functions are in-phase to each other when the grid frequency is under the ’. When the grid frequency is higher than the ’ the phases of Q(s) and E(s) are opposite. In other words, there is a 180 degrees phase error between the transfer functions under consideration which means that the transfer function values have different sign. The product of SOGI and qv’ is used as an error signal for FLL FLL. Thus, when the grid frequency is under the ’ the FLL has positive value and when the grid frequency is over the ’ the FLL has negative value. The error measure FLL is fed to the integral controller with a negative gain – . If the error measure is positive, the controller decreases the resonance frequency and negative error measure makes the resonance frequency to increase. The error measure FLL is naturally zero when the filter resonance frequency corresponds to the grid frequency. In three phase applications, the error measure FLL is the average of error measures of and axis

SOGISOGIFLLFLLFLL ''21

21 ququ . (50)

The structure of FLL is expressed in Fig. 21. The feed forward angular frequency ff is used to accelerate the synchronization during start-up.

-300

-200

-100

0

Mag

nitu

de (

dB)

100 101 102 103-180

-90

0

90

Pha

se (d

eg)

Bode Diagram

Frequency (Hz)

Q(s)E(s)

- 24 -


Fig. 21. The structure of FLL.

FLL gain tuning and normalizationThis section analyses the tuning of FLL gain in order to find appropriate values for the gain for comparison study. The state-space model from the SOGI-FLL can be derived from the Fig. 22 which contains the whole SOGI-FLL structure i.e. the combination of Figs. 17 and 21.

Fig. 22. Structure of SOGI-FLL.

uk

xxkBuAx

dtdxdtdx

0'

01'' SOGI

2

12

SOGI

2

1

(51)

2

1

'001

''

xx

Cxquu

(52)

12 '' xuxdt

d (53)

When the FLL and DSOGI are in steady state condition the following hold true, u=x1, = ’ and d /dt=0. In addition, it is assumed that input signal is sinusoidal u=Usin t+ ). The resulting steady state vectors are:

2

12

2

1

01'0

xx

dtxd

dtxd

(54)

- 25 -


tt

Uquu

cossin

''

(55)

where steady state variables are illustrated by using over bar. When the goal is to express steady state error signal for FLL, FLL, it is obligatory to consider the situation where ’. In this case, the output signal u’ is decreased from the input signal u, which can also be noticed from the Fig. 18. The amplitude |D(j )| and the phase angle D(j ) from (45) can be calculated:

2222SOGI

SOGI

''

'

k

kjD (56)

''arctan

SOGI

22

D k (57)

The outputs of the SOGI can now be expressed with help of Fig. 22 in the situation where ’:

tjD

tjD

cos'sin

'''

''

t

tjDUu

u

quu

(58)

The FLL steady state error signal in the situation where ’ can be expressed with help of Fig. 22

22

1SOGI

221

SOGI2SOGI2FLL '/1'

'/1'' xdtxd

kxxdtxd

kxx (59)

where

22

tjDtjD2

2

2

2

22

21 coscos1'

'1 xtjDUtjDU

dtd

dtqud

dtxd

dtxd

(60)

Thus, the FLL steady state error expresses the error of estimated and real frequency:

22

SOGI

22

22

1SOGI

2FLL ''/1k

xxdtxdk

x . (61)

The nonlinear expression in (61) should be linearized in order to make the tuning process of FLL gain easier. When the dynamics in the vicinity of steady state conditions is under consideration it is assumed that

. Thus, the (61) can be rewritten:

''2'''SOGI

22

SOGI

2222

SOGI

22

FLL kx

kx

kx . (62)

Thus, the state variable of FLL can be expressed as follows:

- 26 -


''2'

SOGI

22

FLL kx

dtd . (63)

The square of the state variable x22 can be calculated using (58) and considering sinusoidal input Usin( t+ ).

D2

222

D2

22222 2cos1

2cos

'' t

jDUt

jDUqux (64)

The (64) contains DC component and a component with a frequency of twice the input frequency. The (64) is further simplified by neglecting the AC component and concentrating only on the average value. In addition, from (56) and (57) it can be noticed that the term |D( )| approaches to one and the term D(j ) approaches to zero as the FLL synchronizes to the input frequency ( ). Thus, the (63) can be expressed:

''

''2'

SOGI

2

SOGI

22

FLLk

Uk

xdt

d . (65)

It can be seen that in addition to FLL gain the dynamic response of the FLL is affected by the square of the grid voltage U2, the SOGI gain kSOGI and the resonance frequency of the SOGI ’. However, the (65) contains the information how the value should be normalized in order to achieve a linearized system which is not affected by grid voltage or SOGI gain. The is normalized as follows:

2SOGI 'U

k (66)

where is the gain of normalized and linearized frequency locked-loop. The FLL system from (65) has turned into simple first order linearized system shown in Fig. 23.

Fig. 23. The linearized FLL system.

The transfer function of the linearized system can now be expressed from Fig. 23:

s' . (67)

The (67) is used in the tuning process of FLL because it is relatively easy to determine the system bandwidth and settling time of the system.

DSOGI-FLLThe concept of DSOGI-FLL synchronization system contains positive and negative sequence calculation using (42) and (44), two SOGIs to generate the 90 degrees shifted versions from the grid voltage and FLL to lock the resonance frequency of the SOGI to the grid frequency. The angle of the positive sequence fundamental frequency component used to synchronize the control system is calculated from the positive sequence -components as follows:

- 27 -


1sync u

tanu

. (68)

The total block diagram of the DSOGI-FLL is expressed in Fig. 24.

Fig. 24. Block diagram of the DSOGI-FLL.

Comparison of DDSRF-PLL and DSOGI-FLLThe calculation of the positive sequence voltage vector from the grid voltage vector using DSOGI-FLL is based on (48).

2SOGI

2SOGI

''

'''

21

uu

ss

sksk

uu

Tuu (69)

It is also possible to calculate the relation between the positive sequence voltage output and the grid voltage in dq-coordinates using DDSRF-PLL with help of Fig. 15. After that, the calculated transfer function should be turned into -coordinates in order to compare the transfer functions between DSOGI-FLL and DDSRF-PLL. However, the calculation of the transfer function is very much space consuming and far beyond from the scope of this work. Fortunately, in the reference [6] the transfer function has been calculated and it is used in this work in order to illustrate the relationship between DSOGI and DDSRF. The transfer function of DDSRF in -coordinates can be expressed as follows:

2f

2f

''

'2 uu

ss

ssuu (70)

- 28 -


where the ’ is the frequency detected by the PLL. It can be seen from the expressions (69) and (70) that the transfer functions of DSOGI and DDSRF are perfectly same when following selection for SOGI gain is chosen:

'2 f

SOGIk . (71)

Thus, the both systems should have same dynamic response. The results shown in (69) and (70) are very interesting from the comparison viewpoint of these two systems because the operation of DSOGI depends on the frequency locking performance of FLL and the operation of DDSRF depends on the phase locking performance of PLL. Hence, different responses to the grid faults of the two systems are possible in spite of gain selection according to (71).

Wind turbine system model

The wind turbine system model including the control system of the NSC is shown in Fig. 25. The target of this study is to analyse the synchronization of the wind turbine system. It is not necessary to model the mechanical parts of the wind turbine in detail because the mechanical time constants are much greater than time constants related to synchronization. Thus, the wind turbine mechanical parts, generator and the generator side converter (GSC) are modelled as a current source iWT in the DC-link of the frequency converter where the generated electrical power pgen is controllable. This assumption is valid because the GSC is able to control output power of the generator. The value for iWT is calculated from:

nomdc,

genWT u

pi (72)

where udc,nom is the nominal value of the DC-link voltage. The braking chopper is modelled in the DC-link of the frequency converter. The switch activating the chopper is closed when the DC-link voltage increases above 1250V and the surplus energy is dissipated in the resistance Rdc. Thus the converter protects itself from overvoltage which would destroy the DC-link capacitor Cdc.

- 29 -


Fig. 25. Wind turbine system model and control system of the NSC.

The vector control of NSC is done in the reference frame synchronized to the connection point voltage usync. The phase angle of the fundamental frequency component of the voltage is the output of the block Sync. The internal angular frequency is limited to 2* *50±10Hz in all synchronization systems in this study. The aim of the dc-link voltage controller is to keep constant dc-link voltage, thereby ensuring that the generated active power pgen in (72) is fed into the network. The output of the dc-link voltage controller is the d-component of the converter current iL1,d. Reactive power controller gives the reference of q-axis component of the grid side current iL1,q

* as an output. The reference value for the instantaneous reactive power of the connection point q* can be chosen freely in Reactive power mode but typically the reference value is zero. Another possibility is to use droop mode. In the Droop mode the reference for iL1q

* depends on the network voltage magnitude |usync| via droop control. If the voltage is lower than nominal value, the reactive power is injected to the network. On the other hand, if the voltage is higher than nominal voltage, the reactive power is absorbed by the converter. The calculation of instantaneous reactive power q is performed in the Calculation block. The reference currents iL1d

* and iL1q* are compared to the measured value and the error fed

to the current controllers. The outputs of the current controllers are the voltage components over LCL-filter inductors uLd and uLq. Removing the cross-coupling terms and with the help of the measured connection

- 30 -


point voltage components usyncd and usyncq, the NSC voltage reference components uNSCd* and uNSCq

* can be presented.

The switching action of the NSC is not taken into account in this study and the NSC is assumed to produce the reference voltage uNSC ideally. However, the design of the LCL-filter was based on the switching frequency fsw of 3.6 kHz. The resonance frequency of the filter fres is 1072 Hz when the transformer inductance L TF3 is taken into account. [13] The used parameter values for the LCL-filter are shown in Table 1. The parameters of the NSC are depicted in Table 2 and the controller parameters are expressed in Table 3. The d- and q-axis current controllers use same parameters. It should be noted that limit values are vector limit values i.e. peak value of the phase quantity.

Table 1. LCL filter parameters.

Ll1=300 H Ll2=83 H R1=2.4m R2=1m Cf=0.2m RCf=0.25

Table 2. NSC parameters.

udc*=1100V Cdc=22mF Rdc=2

Table 3. PI control parameters.

Current controller DC-link controller Reactive power controller

Gain ki = 0.6 kudc = 4 kq = -0.3 Integration time Ti_i = 3ms Ti_udc = 25ms Ti_q = 50ms Sampling time Ts_i = 100 s Ts_udc = 100 s Ts_q = 100 s Upper limit |uLmax| = 100V |iL1dmax| = 900 A |iL1qmax| = 700 A Lower limit |uLmin| = -100V |iL1dmin| = -900 A |iL1qmin| = -700 A

Network model

The network model used in the study is shown in Fig. 26. The 110 kV transmission network consists of two parallel feeders. The feeder 1 represents weak feeder and the feeder impedance is much greater compared to feeder 2. The impedances in feeder 2 are chosen similarly when circuit breakers Cbf11 and Cbf12 are opened.

In the simulations two fault points (Fault 1 and Fault 2) are used. It assumed that the network protection is based on distance protection with following operation procedure. When the fault occurs in point Fault 1 the circuit breaker Cbf12 opens after 200 ms from the beginning of the fault. Thus, the wind turbine current starts to flow through strong feeder 2. After 300ms from the fault beginning the Cbf11 opens and the fault is cleared from the wind turbine viewpoint. When the fault point is Fault 2 same process is applied but circuit breakers Cbf21 and Cbf22 operates. [14]

- 31 -


Fig. 26. The network model with used parameters.

Simulation results The comparison of synchronizing methods of grid side converter is carried out in this section. The purpose is to find out the factors that should be taken into account when the parameters of the synchronizing methods are selected. In first case, the three-phase symmetrical voltage dip occurs in feeder 1. As a consequence, the path for fault current is through feeder 2 which is significantly stronger than feeder 2. Next, the effect of grid impedance is taken into account making simulations for symmetrical fault occurring in the feeder 2 making the fault current path through weak feeder 1. After that, same simulations with unsymmetrical fault are repeated.

- 32 -


Three-phase fault in feeder 1

Synchronization using calculated connection point voltage angleIn the first simulations the NSC control system uses angle that are directly calculated from the measured connection point voltages. The connection point voltages and converter currents are shown in Figs. 27 a and b. The three phase fault occurs in the fault point 1 of the Fig. 26 at 0.3 s. At the time 0.5 the circuit breaker CBf12 opens and at 0.6s the circuit breaker CBf11 opens due to the action of distance protection. The control principle of NSC is chosen such that the reactive power is prioritized during the grid fault and active current reference of GSC is set to zero. Thus, the reference of NSC current q-component is increased to be 418 A during the fault. The reference of current d-component depends on the action of dc-link voltage controller. The reference and measured converter current d- and q- axis components are shown in Figs. 28 a and b. The converter DC-link voltage is shown in Fig. 29a and the NSC control system angle is shown in Fig 29b.

a) b)

Fig. 27. a) Connection point voltage, b) converter currents.

a) b)

Fig. 28. a) d-axis reference and measured converter current, b) q-axis reference and measured converter current.

a) b)

Fig. 29. a) DC-link voltage reference and measured value, b) synchronization angle.

0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7-800

-600

-400

-200

0

200

400

600

800

Time [s]

Vol

tage

[V]

Connection point voltages

0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7-800

-600

-400

-200

0

200

400

600

800

Time [s]

Cur

rent

[A]

Converter currents

0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7-1000

-500

0

500

Time [s]

Cur

rent

[A]

d-axis reference and measured converter current

ReferenceMeasured

0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7-1000

-500

0

500

Time [s]

Cur

rent

[A]

q-axis reference and measured converter current

ReferenceMeasured

0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7900

950

1000

1050

1100

1150

1200

1250

1300

Time [s]

DC

-link

vol

tage

[V]

DC-link voltage

DC-link voltage referenceDC-link voltage measured

0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7-4

-3

-2

-1

0

1

2

3

4

Time [s]

Angl

e [ra

d]

Synchronization angle

- 33 -


It can be noticed from the Figs. 28a and 28b that significant transients occur in the measured converter current components at 0.3s and 0.5s. The transients are caused by the voltage angle jumps which are not filtered in any way when this synchronization method is used.

The performance of different synchronization methods are compared using method where different error measures are summed from the time span of 0.3s-0.7s. These error measures are deviation of measured converter current d-and q-components from the references, DC-link voltage controller error measure, error between estimated frequency of the synchronous loop and real frequency, deviation of the connection point voltage q component from zero and deviation between synchronization angle with respect to the real angle of the voltage. In addition, the fundamental frequency negative sequence component, 2nd, 3rd, 5th and 7th harmonic components from the converter current are summed in order to measure quality of the generated current. The sum of errors is shown in Table 4. These sums of errors are used to indicate the performance of the used synchronization method.

Table 4. Sum of error signals when NSC is synchronized to the connection point voltage.

Error measure

iconv,d iconv,q Udc usync,q sync iconv,distor

Error sum 3.6 6.03 8.13 0 0 30.52

SRF-PLLIn the next simulations, the SRF-PLL is used as a synchronizing method of the NSC control system. As expressed in (8) the performance of the SRF-PLL depends on the selection of damping factor and undamped natural frequency n. The sum of errors with different and n are shown in Figs. 30a-g. Four different values of n are located on x-axis i.e. 2* *5Hz, 2* *10Hz, 2* *15Hz, 2* *30Hz.

a) b) c)

d) e) f)

- 34 -


g)

Fig. 30. Sum of errors of SRF-PLL: a) iconv,d, b) iconv,q, c) UDC, d) usync,q, e) sync, f) , g) iconv,distor.

As shown in Fig. 30a, the sum of error of converter current d-axis component increases slightly as the n and, thus, the bandwidth of the SRF-PLL loop increases. The impact of damping factor seems to be small in this case. The impact of the damping factor and the bandwidth of the loop to the sum of error of the converter current q-axis component are small as depicted in Fig. 30b. Compared to case where the synchronization is carried out using calculated grid angle the sums of errors of current controllers have decreased significantly due to the filtering of the voltage phase angle jumps by the loop filter. The usync,q is zero only when the PLL angle is identical to the connection point voltage angle. As the bandwidth increases the PLL will track the correct angle of the connection point voltage earlier. Thus, the deviation of connection point voltage q-component from the zero and deviation of PLL angle from the grid angle decrease clearly as the bandwidth increases as illustrated in Figs. 30d and 30e. In addition, the increment of damping factor value increases the speed of the response due to the effect of zero in (8). The damping factor has clearly more significant impact when the n is small which is in line with the discussion in the section “Analysis of closed loop transfer function”.

The active and reactive instantaneous powers are expressed in stationary and synchronous reference frames as follows:

qqdd23

23 iuiuiuiup (73)

qddq23

23 iuiuiuiuq (74)

where subscripts and relate to the stationary reference frame as well as d and q relate to the synchronous reference frame. As stated above, the uq is zero when the PLL has tracked the grid angle. However, during the time when the PLL has not yet tracked the grid angle the uq is not zero and the current iq can impact on the active power as shown in (73). The DC-link voltage controller controls the current d-axis component in order to maintain the power balance between input and output power. When the uq is not zero, the active power is not directly controlled by the current d-axis component and the q-axis current increase the changes in power which has impact on the DC-link voltage. The sum of error of DC-link voltage controller decrease as the bandwidth (i.e. speed) of PLL loop increases because the PLL tracks the grid angle earlier. This can be seen from the Fig. 30c.

The error in estimated angular frequency increases as the speed of the SRF-PLL loop increases as depicted in Fig. 30f due to the increased gain of the loop filter. High loop filter gain generates rapid response with small settling time but with significant oscillations in the estimated frequency. The sum of harmonics under consideration decrease as the speed of the response increases as can be seen from the Fig. 30g due to the small tracking time of PLL. After perfect synchronization to the symmetrical voltages (even during a fault)

- 35 -


the current contains only positive sequence fundamental frequency component. The sums of errors are generally smaller than in calculated angle case due to the absence of phase angle jumps.

DDSRF-PLLSimilar simulation case as above is carried out using DDSRF-PLL. The tuning of PLL loop depends on the parameters and n as in SRF-PLL case. The operation of decoupling network shown in Fig. 15 depends on the tunable parameter f. The sum of errors with different , n and f are shown in Figs. 31a-g. Again, values of n are on x-axis and blue, red as well as green lines correspond to damping factors of 0.5, 0.707 and 1 respectively when f is set to 0,707 times fundamental angular frequency. The purple line has f of 0,25 times fundamental angular frequency and the damping factor of 0.707. The decrease in cut-off frequency f (29) decreases the bandwidth of the low-pass filter used in decoupling network which means more filtering of input.

a) b) c)

d) e) f)

g)

Fig. 31. Sum of errors of DDSRF-PLL: a) iconv,d, b) iconv,q, c) UDC, d) usync,q, e) sync, f) , g) iconv,distor.

The sum of error of current d-axis controller increases as the bandwidth of the PLL loop increases like in SRF-PLL case as shown in Fig. 31a. The difference between DDSRF-PLL and SRF-PLL seems to be of no importance. The error sum of q-axis controller is also very similar to the SRF-PLL case as shown in Fig. 31b. The error sum of DC-link voltage controller is clearly smaller when using DDSRF-PLL than SRF-PLL as the bandwidth of the PLL loop is low which can be seen from Fig. 31c. The reason is faster tracking of

- 36 -


grid angle which can be noticed from Figs. 31d and 31e. The estimated frequency DDSRF-PLL shown in Fig. 31f is similar with SRF-PLL with the exception that DDSRF-PLL has more rapid and oscillating response when the PLL has high bandwidth. The measure of current linearity shown in Fig. 31g indicates that DDSRF-PLL has more linear current response than SRF-PLL when the PLL bandwidth is low. However, when the undamped natural frequency is 30 Hz the SRF-PLL show more linear response than the DDSRF-PLL. The reduction of value f increases filtering and thus the current harmonics decrease. However, the cost of the filtering is longer tracking time of the grid angle which can be noticed for example from the Figs. 31d, 31e and 31f.

DSOGI-FLLNext, the impact of parameters kSOGI and on the performance of DSOGI-FLL is evaluated. The error sums are shown in Fig. 32a-g. The x-axis consists of values which are chosen such that the bandwidth of the FLL loop is same the bandwidth of the PLL loop. For example, the bandwidth of the closed SRF-PLL loop is 64.5rad when tunable settings are n=5Hz and =0.707. This is also the bandwidth of the FLL loop when the gain is set to 64.5rad. Hence, the bandwidths of PLL and FLL loops are comparable. However, the input of the PLL is angle and the input of the FLL is frequency.

a) b) c)

d) e) f)

g)

Fig. 32. Sum of errors of DSOGI-FLL: a) iconv,d, b) iconv,q, c) UDC, d) usync,q, e) sync, f) , g) iconv,distor.

- 37 -


The error sum of d- and q-axis converter current components are not influenced significantly by the bandwidth of the FLL loop as seen from the Fig. 32a and 32b. However, the value of SOGI gain kSOGI has significant importance. The selectivity of the response increase but the bandwidth and speed of the response decrease as the kSOGI decreases as indicated by the Fig. 18. Thus, the influence of the network voltage phase angle jumps on the DSOGI-FLL output angle decreases as the kSOGI decreases, see Figs. 33a and 33b. Hence, the error sums of current controllers are small when the kSOGI is small. This can be understood from the Fig. 34 where the reference and measured converter current q-axis component is expressed during first transient. The error sums of DC-link voltage, connection point voltage q-component and estimated angle are not influenced by the bandwidth of the FLL loop as shown in Figs. 32c, 32d and 32e. The estimated angular frequency shown in Fig. 32f is significantly lower when the DSOGI-FLL is used compared to SRF-PLL and DDSRF-PLL. The frequency is the input measure of the FLL loop and as the gain (bandwidth) of the loop increases the error sum increase due to the greater overshoot although the response become faster. The nonlinearity of the converter current depends on the kSOGI. The sum of current nonlinearity shown in Fig. 32g decreases if the settling time of the FLL loop decreases when the SOGI bandpass filter is tuned to have a selective response. However, if the bandpass filter bandwidth increases, the increase in bandwidth of the FLL loop increases the nonlinearity of the converter current.

a) b)

Fig. 33. Effect of phase angle jump on the DSOGI-FLL angle: a) kSOGI = 0.5; b) kSOGI = sqrt(2).

a) b)

Fig. 34. Reference and measured converter current q-axis component: a) kSOGI = 0.5; b) kSOGI = sqrt(2).

0.29 0.3 0.31 0.32 0.33 0.34 0.35-4

-3

-2

-1

0

1

2

3

4SOGI gain k = 0.5

Grid angleFLL angle

0.29 0.3 0.31 0.32 0.33 0.34 0.35-4

-3

-2

-1

0

1

2

3

4SOGI gain k = sqrt(2)

Grid angleDSOGI-FLL angle

0.29 0.3 0.31 0.32 0.33 0.34 0.35-50

0

50

100

150

200

250

300

350

400

450SOGI gain k = 0.5

ReferenceMeasured

0.29 0.3 0.31 0.32 0.33 0.34 0.35-50

0

50

100

150

200

250

300

350

400

450SOGI gain k = sqrt(2)

ReferenceMeasured

- 38 -


Three-phase fault in feeder 2

Synchronization using calculated connection point voltage angle

Next, three-phase fault on the fault point 2 is simulated. Now the path for fault current is through feeder 1 which is significantly weaker than the feeder 2. The connection point voltage is shown in Fig. 35a and the resulting converter currents in Fig. 35b. The converter current d- and q-axis components are shown in Fig. 36a and 36b, respectively. The current transients are greater in when the impedance of fault current path increases. The reason is the increased influence of voltage phase angle jumps after fault due to the increased grid impedance. The DC-link voltage is shown in Fig 37a. Compared to fault in feeder 1 the response of DC-link voltage is somewhat slower but the difference between the responses is of no importance. The grid angle is depicted in Fig. 37b. Compared to previous case, the phase angle jumps are clearly increased. The error sums of the difference performance indicators are shown in Table 5.

a) b)

Fig. 35. a) Connection point voltages, b) Converter currents.

a) b)


a) b)


0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7-800

-600

-400

-200

0

200

400

600

800

Time [s]

Volta

ge [V

]

Connection point voltage

0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7-800

-600

-400

-200

0

200

400

600

800

Time [s]

Cur

rent

[A]

Converter currents

0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7-1000

-500

0

500

Time [s]

Cur

rent

[A]

d-axis reference and measured converter current

ReferenceMeasured

0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7-1000

-500

0

500

Time [s]

Cur

rent

[A]

q-axis reference and measured current

ReferenceMeasured

0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7900

950

1000

1050

1100

1150

1200

1250

1300

Time [s]

Vol

tage

[V]

Reference and measured DC-link voltage

0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7-4

-3

-2

-1

0

1

2

3

4

Time [s]

Angl

e [ra

d]

Grid angle

- 39 -



Error measure


Sum of error

4.92 8.25 8.87 0 0 33.48

SRF-PLLThe error sums when SRF-PLL is used are shown in Figs. 38a-g. The increased grid impedance seems to have no significant importance on converter d-axis sum of error as shown in Fig. 38a. The q-axis component error sum seems to decrease as the grid impedance increase. The error sums of DC-link voltage, connection point voltage q-axis component, estimated angle and angular frequency as well as linearity of converter current increases as the grid impedance increase as shown in Figs. 38c-g, respectively. However, the differences between the results generally decrease as the bandwidth (speed) of the synchronizing loop increases. It should also be noted that according to the performance indicators used in this study, the system behaviour improves as the damping factor increases due to the faster response especially when the bandwidth of the loop is small.

a) b) c)

d) e) f)

g)


- 40 -


DDSRF-PLLThe error sums when DDSRF-PLL is used are shown in Fig. 39a-g. As in the case of SRF-PLL, the increased grid impedance does not have a significant influence on the d-axis converter current component but the error sum of q-axis current component decrease clearly, as illustrated by Figs. 39a and 39b. The increased grid impedance tends to increase the other error sums slightly as depicted in Figs. c-g. The smaller filter cut-off frequency f generally decrease the speed of the response as can be noticed from the Fig. 39f. However, the current waveform improves as can be seen from the Fig. 39g. Compared to SRF-PLL case the performance indicators of DDSRF-PLL are much better especially when the bandwidth of the system is small.

a) b) c)

d) e) f)

g)


- 41 -


DSOGI-FLLThe error sums of DSOGI- FLL increase slightly as a result of increased grid impedance as can be seen from Figs. 40a-g. As discussed related to Figs. 32 the difference between different values of kSOGI has remarkable impact on the DSOGI-FLL response. The bandwidth of the FLL loop seems not to be so important.

a) b) c)

d) e) f)

g)


Unsymmetrical fault in feeder 1

Synchronization using calculated connection point voltage angleThe connection point voltage and converter currents are shown in Fig. 41a and 41b, respectively, when phases a and b are subjected to a short-circuit in a fault point of feeder 1. The current fed by the wind turbine is highly distorted when the NSC control system is synchronized directly to the grid voltage angle. The measured current d- and q-components depicted in Fig. 42a and 42b contain oscillations due to the nonlinear behaviour of the synchronizing angle. The DC-link voltage and the grid angle used in synchronization are shown in Figs. 43a and 43b respectively. As discussed above, the main task of the wind turbine is to feed positive sequence current at fundamental frequency to the grid. Hence, the current injection of Fig. 41b is not desirable and the synchronization of NSC control system should not be done using directly calculated connection point voltage. Error sums are listed in Table 6.

- 42 -


a) b)


a) b)


a) b)



Error measure


Sum of error

11.57 7.31 7.59 0 0 74.81

0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7-800

-600

-400

-200

0

200

400

600

800

Time [s]

Volta

ge [V

]


0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7-800

-600

-400

-200

0

200

400

600

800

Time [s]

Cur

rent

[A]

Converter currents

2.5 3 3.5 4 4.5 5 5.5 6 6.5 7-1000

-500

0

500

Time [s]

Cur

rent

[A]

Reference and measured converter current q-component

ReferenceMeasured

0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7-1000

-500

0

500

Time [s]

Cur

rent

[A]

Reference and measured converter current q-component

ReferenceMeasurement

0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7900

950

1000

1050

1100

1150

1200

1250

1300

Time [s]

Volta

ge [V

]

DC-link voltage reference and measurement


0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7-4

-3

-2

-1

0

1

2

3

4

Time [s]

Angl

e [ra

d]

Grid angle

- 43 -


SRF-PLLThe error sums of SRF-PLL during unsymmetrical fault are illustrated in Figs. 44a-g. Significant increase in converter current d-component error sum and in estimated angular frequency can be observed as the bandwidth of the SRF-PLL increase. In addition, the error sums increase as the damping factor increase because the SRF-PLL is more prone to react on the negative sequence component on grid voltage. As a result, the nonlinearity of the current increases as the bandwidth and the damping factor increases. Thus, in order to keep the amount of harmonics small the bandwidth of the SRF-PLL should be kept low.

a) b) c)

d) e) f)

g)


- 44 -


DDSRF-PLLCompared to SRF-PLL the error sums of DDSRF-PLL are significantly lower as shown in Figs. 45a-g. In addition, the bandwidth of the synchronizing loop is of less importance. This indicates that there is not so remarkable need to reduce the bandwidth which enables lower settling time for synchronization loop. However, it should be noted that the lowest value of nonlinearity shown in Fig. 45g is achieved when the undamped natural frequency has the value 10Hz. The increase in n value from 10Hz increases the nonlinearity so it is not possible to increase the bandwidth arbitrarily. In addition, it should be noted that the voltage harmonics may cause problems if the bandwidth of the synchronizing loop is very high.

a) b) c)

d) e) f)

g)


- 45 -


DSOGI-FLLThe most significant difference between the DSOGI-FLL and the DDSRF-PLL is that the DSOGI-FLL uses frequency instead of angle as an input. The error sums are shown in Figs. 46a-g. Thus, the error sums on estimated angular frequency shown in Fig. 46f are smaller. The impact of the bandwidth of the FLL loop is small in every performance indicators used in the study. The SOGI gain seems to have more importance. However, it should be noted that the lowest value of current distortion is achieved when the cut-off frequency FLL loop filter is 129rad. If the bandwidth is increased further the nonlinearities of the converter current will increase.

a) b) c)

d) e) f)

g)


Two-phase fault in feeder 2

Synchronization using calculated connection point voltage angleNext, the impact of increased grid impedance is evaluated on the behaviour of the wind turbine during unsymmetrical grid fault. The connection point voltages are shown in Fig. 47a and highly distorted converter currents are shown in Fig. 47b. The increased grid impedance rises the twice grid frequency oscillations on current components as shown in Figs. 48a and 48b. This is a result of negative sequence component in the connection point voltage angle shown in Fig. 49b. The increased grid impedance rises the DC-link voltage error sum as shown in Fig. 49a and Table. 7.

- 46 -


a) b)


a) b)


a) b)



Error measure


Sum of error

16.3 8.99 7.8 0 0 99.4

0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7-800

-600

-400

-200

0

200

400

600

800

Time [s]

Volta

ge [V

]


0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7-800

-600

-400

-200

0

200

400

600

800

Time [s]

Cur

rent

[A]

Converter currents

0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7-1000

-500

0

500

Time [s]

Cur

rent

[A]

Reference and measured converter current d-component

ReferenceMeasured

0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7-1000

-500

0

500

Time [s]

Cur

rent

[A]

Reference and measured converter current d-component

0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7900

950

1000

1050

1100

1150

1200

1250

1300

Time [s]

Volta

ge [V

]

DC-link voltage


0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7-4

-3

-2

-1

0

1

2

3

4

Time [s]

Angl

e [ra

d]

Grid angle

- 47 -


SRF-PLLThe error sums of SRF-PLL during unsymmetrical fault are illustrated in Figs. 50a-g. As mentioned above the bandwidth of the SRF-PLL loop needs to be small in order to have decent harmonics rejection and to feed sinusoidal current to the grid during voltage unbalance. The bandwidth reduction seems to be more essential if the wind turbine is connected to the weak grid which can be seen when Figs. 44g and 50g are compared. As an example of the unacceptable case, the zoomed converter currents and the output angle of SRF-PLL are shown in Figs.51a and 51b, respectively, when the tuning parameters are: n = 2* *30Hz; =0.707. It can be noticed that the currents waveform are not sinusoidal which is the result of nonlinear

growth of angle.

a) b) c)

d) e) f)

g)


- 48 -


a) b)

Fig. 51. SRF-PLL n = 30Hz, = 0.707; a) converter currents, b) output angle.

DDSRF-PLLThe increased grid impedance during unsymmetrical fault increases every error sums except the converter current q-component when the DDSRF-PLL is used as shown in Figs. 52. Again, the error sums are not significantly affected by the bandwidth of the PLL loop. Compared to SRF-PLL case with same tuning parameters the converter currents are more sinusoidal and output angle of PLL is linear when the DDSRF-PLL is used as can be seen from Figs. 53a and 53b.

a) b) c)

d) e) f)

g)


0.29 0.3 0.31 0.32 0.33 0.34 0.35 0.36-600

-400

-200

0

200

400

600

Time [s]

Cur

rent

[A]

Converter currents

0.29 0.3 0.31 0.32 0.33 0.34 0.35 0.36-4

-3

-2

-1

0

1

2

3

4

Time [s]

Ang

le [r

ad]

SRF-PLL angle: Wn = 30 ; Damp = 0.707

- 49 -


a) b)

Fig. 53. DDSRF-PLL n = 30Hz, = 0.707; a) converter currents, b) output angle.

DSOGI-FLLThe simulation results shown in Figs. 54a-g indicate that the difference between the operation of DDSRF-PLL and DSOGI-FLL is of no significant importance even if the wind turbine is connected to the weak grid. The bandwidth of the FLL-loop does not have an essential impact on the error sums and thus no need for extra bandwidth reduction like in SRF-PLL case exists. In Fig. 55, comparable parameters with respect to parameters used in Figs. 51 and 53 are used in DSOGI-FLL in order to show the behaviour of converter currents and output angle of the synchronization system. The transient responses of DDSRF-PLL and DSOGI-FLL are reasonable similar.

a) b) c)

d) e) f)

g)


0.29 0.3 0.31 0.32 0.33 0.34 0.35 0.36-600

-400

-200

0

200

400

600

Time [s]

Cur

rent

[A]

Converter currents: DDSRF-PLL, Wn = 30 Hz, Damp = 0.707

0.29 0.3 0.31 0.32 0.33 0.34 0.35 0.36-4

-3

-2

-1

0

1

2

3

4

Time [s]

Cur

rent

[A]

DDSRF-PLL angle: Wn = 30 Hz, Damp = 0.707

- 50 -


a) b)

Fig. 55. DSOGI-FLL = 387, kSOGI = sqrt(2); a) converter currents, b) output angle.

Importance of internal frequency limitation The importance of internal frequency limitation is studied making three-phase short-circuit occurring at fault point 2. Thus, the fault current path is through weak feeder. The estimated angle error sums of SRF-PLL, DDSRF-PLL and DSOGI-FLL in cases where the internal angular frequency is limited to 2* *50±10Hz and where the internal frequency is not limited are illustrated in Fig. 56a-c. In Figs. 57 and 58, the error sums of estimated angular frequency and the nonlinearity of the current are shown.

a) b) c)

Fig. 56. Angle error sum: a) SRF-PLL, b) DDSRF-PLL, c) DSOGI-FLL.

a) b) c)

Fig. 57. Angular frequency error sum: a) SRF-PLL, b) DDSRF-PLL, c) DSOGI-FLL.

0.29 0.3 0.31 0.32 0.33 0.34 0.35 0.36-600

-400

-200

0

200

400

600

Time [s]

Cur

rent

s [A

]

DSOGI-FLL

0.29 0.3 0.31 0.32 0.33 0.34 0.35 0.36-4

-3

-2

-1

0

1

2

3

4

Time [s]

Ang

le [r

ad]

DSOGI-FLL angle

- 51 -


a) b) c)

Fig. 58. Error sum of converter current nonlinearity: a) SRF-PLL, b) DDSRF-PLL, c) DSOGI-FLL.

It can be noticed from the Figs. 56-58 that the error sum values are very high when DDSRF-PLL is used with high bandwidth. In addition, if the bandwidth would be increased further the difference between unlimited and limited values would increase independent of the synchronizing system. The behaviour of unlimited angular frequency of synchronization systems under consideration is illustrated in Fig. 59 in order to explain the results of Figs. 56-58. The converter currents from the same time period are illustrated in Fig. 60. Following parameters are used in Figs. 59 and 60; SRF-PLL: n=2* *30Hz, =0.707, DDSRF-PLL:

n=2* *30Hz, =0.707, f= grid/sqrt(2), DSOGI-FLL: kSOGI = sqrt(2), =387.

When SRF-PLL is used significant frequency transients appear as a result of short-circuit as shown in Fig. 59a. However, when the DDSRF-PLL is used the transients are even much greater. The difference between SRF-PLL and DDSRF-PLL is that SRF-PLL tends to regulate the q-component of the grid voltage to zero while the DDSRF-PLL aims to regulate positive sequence component to zero. In principle, symmetrical voltage dip doesn’t generate negative sequence component but the output of the negative sequence component calculated by the decoupling network is not zero during the transients. The appearance of negative sequence components modifies the value of calculated positive sequence voltage q-component which is controlled by the controller with high gain. If there is no angular frequency limitation the integration part of the PI controller reaches high negative value. As a result, the angular frequency, shown in Fig. 59b, drops near zero which is not tolerable. The behaviour of DSOGI-FLL depicted in Fig. 59c is very much different due to the fact that the input of the synchronizing loop is frequency which is much more stable parameter than angle. Thus, the limitation of angular frequency is not so critical than when SRF-PLL or DDSRF-PLL is used. The converter currents of SRF-PLL and DSOGI-FLL shown in Figs. 60a and 60c, respectively, have decent waveform which is not surprise based on analysis of error sums of Fig. 58. However, as the DDSRF-PLL has zero angular frequency after the short-circuit occurrence the converter currents contain DC-component as illustrated in Fig. 60b. The DC-component is not permitted because it overstress grid components especially wind turbine transformer.

a) b) c)

Fig. 59. Angular frequency: a) SRF-PLL, b) DDSRF-PLL, c) DSOGI-FLL.

0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7-200

-100

0

100

200

300

400

500

600

700

Time [s]

Ang

ular

freq

uenc

y [ra

d/s]

Angular frequency

0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7-200

-100

0

100

200

300

400

500

600

700

Time [s]

Ang

ular

freq

uenc

y [ra

d/s]

Angular frequency

0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7-200

-100

0

100

200

300

400

500

600

700

Time [s]

Ang

ular

freq

uenc

y [ra

d/s]

Angular frequency

- 52 -


a) b) c)

Fig. 60. Converter currents: a) SRF-PLL, b) DDSRF-PLL, c) DSOGI-FLL.

According to simulation results shown in Fig. 39 there should be no problems when the frequency limitation of 50±10Hz is used. The angular frequency and converter currents are represented in Fig. 61a and 61b, respectively. The limitation makes sure that no DC-component appears. Thus, the current waveforms are sinusoidal and the overall response of the converter to the fault is good. The optimum limitation interval is beyond the scope of this work. However, it should be noted that the settling time of the angular frequency to the grid frequency increases if too strict limits are set. In addition, the initial locking of PLL to the grid angle during start-up takes longer time.

The angular frequency and converter currents when the there is no frequency limitation nor gain normalization are shown in Figs. 62 and 62b, respectively. Transients on angular frequency are much smaller than in Fig. 59b due to the loss of gain during the voltage dip. Thus, the frequency do not reach zero and there is no such a DC-component in the current as in Fig. 60b. However, the settling time of frequency to the grid value increases due to the lack of gain as a result of the voltage dip. The loss of gain phenomenon occurs since the gain of the PLL is dependent on loop filter gain and voltage magnitude as shown in Fig. 5.

a) b)

Fig. 61. DDSRF-PLL with frequency limitation 251-377rad/s: a) angular frequency, b) converter currents.

0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7-800

-600

-400

-200

0

200

400

600

800

Time [s]

Cur

rent

[A]

Converter currents

0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7-800

-600

-400

-200

0

200

400

600

800

Time [s]

Cur

rent

[A]

Converter currents

0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7-800

-600

-400

-200

0

200

400

600

800

Time [s]

curr

ent [

A]

Conver ter current

0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7-200

-100

0

100

200

300

400

500

600

700

Time [s]

Ang

ular

freq

uenc

y [ra

d/s]

Angular frequency

0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7-800

-600

-400

-200

0

200

400

600

800

Time [s]

Cur

rent

[A]

Converter currents

- 53 -


a) b)

Fig. 62. DDSRF-PLL without frequency limitation and gain normalization: a) angular frequency, b) converter currents.

Selection of parameters Simulation results show that the tracking of the angle of positive sequence voltage component from the grid voltage becomes easier as the grid impedance decreases. Thus, the parameters for different synchronizing methods are selected based on the simulations where the fault current is fed into weak network. The error sums as a result of symmetrical voltage dip gives indication on how fast is the response of the used synchronizing method. The unsymmetrical voltage dip analysis gives measure on the disturbance rejection of the synchronizing method.

SRF-PLL:

The speed of the response increases as the bandwidth or the damping factor increases. This can be noticed by looking Figs. 38d, 38e and 38g. However, as the bandwidth and damping factor increase the converter current distortion increases significantly during unsymmetrical voltage dip as can be seen from Fig. 50g. According to simulation results of Figs. 38 and 50 the reasonable trade-off between speed and the disturbance rejection can be achieved using following parameters: =0.707, n=2* *10Hz. The closed loop bode diagram of SRF-PLL with given parameters are shown in Fig. 63. The bandwidth of the closed loop system is 20.5 Hz with phase margin of 127 degrees and infinite gain margin.

Fig. 63. Bode diagram of SRF-PLL with parameters =0.707, n=2* *10Hz.

DDSRF-PLL:

The simulation results shown in Figs. 39 and 52 reveal that the impact of value n is not as significant as in the case of SRF-PLL due to the decoupling network for negative sequence component. Thus, the PLL controller parameters can be tuned to have faster response. It should be noted that even using tuning parameters n=2* *30Hz and =0.707 the sum of calculated current nonlinearity during unsymmetrical

0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7-200

-100

0

100

200

300

400

500

600

700

Time [s]

Ang

ular

freq

uenc

y [ra

d/s]

Angular frequency

0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7-800

-600

-400

-200

0

200

400

600

800

Time [s]

Cur

rent

[A]

Converter currents

Bode Diagram, SRF-PLL, damp = 0.707, Wn = 10Hz

Frequency (Hz)100 101 102 103

-90

-60

-30

0

Pha

se (d

eg)

-35

-30

-25

-20

-15

-10

-5

0

5

Mag

nitu

de (d

B)

- 54 -


voltage dip is much smaller than when the SRF-PLL is used with above selected parameters. According to simulation results the reasonable parameter selection for DDSRF-PLL is: =1, n=2* *15Hz,

f= fund*0.707. If more rapid response is desired the value of n can be increased without remarkable increase in converter current distortion. However, it should be noted that the impact of voltage harmonics is not considered in this case. The presence of voltage harmonics may give reason to reduce the bandwidth. It should also be noted that the value f is important considering the harmonics rejection.

DSOGI-FLL:

The error sum lines of Figs. 40 and 54 are relatively flat which indicates that the FLL gain has not very remarkable importance on the synchronization process. The bandpass filter gain kSOGI seems to have more importance. The smaller the kSOGI is the slower the operation but more frequency selective response. Thus, when small value of kSOGI is used the larger the FLL gain can be. Based on the simulation results, one reasonable value selection for DSOGI-FLL is: kSOGI=1.414, =193. Again, the voltage harmonics are not taken into account in this study. The presence of the harmonics might increase interest towards choosing smaller value for kSOGI.

Conclusion In this study, the operation of three different synchronizing systems during symmetrical and asymmetrical voltage dips is compared. In addition, the impact of grid impedance on the synchronization process is evaluated. The synchronization methods used in the study are SRF-PLL, DDSRF-PLL and DSOGI-FLL.

The selection of tuning parameters for synchronization method is trade-off between speed of the response and the linearity of converter current. The best solutions for each synchronizing method according to simulations are listed in Table 8. However, it should be noted that the best tuning parameters for synchronization system depends significantly on the application, on the grid impedance and on the grid voltage harmonics level. The impact of grid harmonics is not taken into account in this study.

Table 8 shows that error sums of DDSRF-PLL or DSOGI-FLL compared to SRF-PLL are significantly lower. However, the difference between DDSRF-PLL and DSOGI-FLL is very small due to the similar transfer functions shown in (69) and (70). The main difference between DDSRF-PLL and DSOGI-FLL is the error sum of angular frequency. The DSOGI-FLL has much smaller error sums due to the fact that DSOGI-FLL performance is dependent on the angular frequency detected by the FLL loop while the performance of DDSRF-PLL depends on the angle detected by the PLL loop.

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Table 8. Error sums of synchronizing methods using best parameters based on the simulations.

Error measure iconv,d iconv,q Udc usync,q sync iconv,distor

Error sum:

SRF-PLL

Symmetrical

Fault point 2

0.59 2.83

11.25 7.95 1.99 0.0497 33.53

Asymmetrical

Fault point 2

2.74 3.3 8.49 23.18 3.72 0.0899 36.31

Error sum:

DDSRF-PLL

Symmetrical

Fault point 2

0.67 2.86 8.79 3.67 1.93 0.0197 29.93

Asymmetrical

Fault point 2

1.92 3.35 7.94 22.72 1.23 0.0886 31.53

Error sum:

DSOGI-FLL

Symmetrical

Fault point 2

0.77 2.95 8.75 3.41 1.25 0.0194 30.32

Asymmetrical

Fault point 2

1.98 3.36 7.96 22.67 0.76 0.0887 31.69

References [1] WWEA (World Wind Energy Association) Website. June 2012. Available: http://www.wwindea.org/home/index.php. [2] Egan, W. F. (2008) Phase-lock basics, 2nd edition. John Wiley & Sons, Inc. p. 441. [3] Chung, S. K. “A phase tracking system for three phase utility interface inverters”. IEEE Transactions on Power Electronics, Vol. 15, No. 3, May

2000, pp. 431-438. [4] Jussila, M. (2007) Comparison of space-vector-modulated direct and indirect matrix converters in low power applications. Doctoral

dissertation. Tampere University of Technology, Tampere, Finland, 118 p. [5] Routimo, M. (2008) Developing a voltage source shunt active power filter for improving power quality. Doctoral dissertation. Tampere

University of Technology, Tampere, Finland, 108 p. [6] Teodorescu, R., Liserre, M., Rodriguez, P. (2011) Grid converters for photovoltaic and wind power systems. John Wiley & Sons, Ltd, p. 398. [7] Ackermann, T. (2005) Wind power in power systems. John Wiley & Sons, Ltd, England. 691 p. [8] Kaura, V., Blasko, V. “Operation of a phase locked loop system under distorted utility conditions”. IEEE Transactions on Industry Applications,

Vol. 33, No. 1, January/February 1997, pp. 58-63. [9] Dorf, R. C., Bishop, R. H. (1995) Modern control systems, 7th edition. Addison-Wesley Publishing Company. 807 p. [10] Franklin, G. F., Powell, J. D., Workman, M. (1998) Digital control of dynamic systems, 3rd edition. Addison Wesley Longman, Inc, 742 p. [11] Kothari, D. P., Nagrath, I. J. (2003) Modern power system analysis, 3rd edition, Tata McGraw-Hill Publishing Company Limited, New Delhi,

694 p. [12] Ignatova, V., Granjon, P., Bacha, S. “Space vector method for voltage dips and swells analysis”. IEEE Transactions on Power Delivery, Vol. 24,

No. 4. October 2009, pp. 2054-2061. [13] Liserre, M., Blaabjerg, F., Hansen, S. “Desing and control of an LCL-filter-based three-phase active rectifier”. IEEE Transactions on Industry

Applications, Vol. 41, No. 5, September/October 2005, pp. 1281-1291. [14] Anderson, P. M. (1999) Power system protection. IEEE Press in association with McGraw-Hill. 1307 p.

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