webstor.srmist.edu.in...1. department vision statement stmt - 1 department of ece is dedicated to...

ACADEMIC CURRICULA

POSTGRADUATE DEGREE PROGRAMMES

Master ofTechnology in Embedded System Technology

TwoYears(Ful l -T ime)

Learning Outcome Based Educat ion

Choice Based Flexible Credi t System

Academic Year

2020 - 2021

SRM INSTITUTE OF SCIENCE AND TECHNOLOGY

(Deemed to be Univers i ty u /s 3 o f UGC Act , 1956)

Kat tanku la thur , Chenga lpa t tu D is t r i c t 603203, Tami l Nadu, Ind ia

SRM Institute of Science and Technology - Academic Curricula – M.Tech(Embedded Systems Technology) – 2020 Regulations

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SRM INSTITUTE OF SCIENCE AND TECHNOLOGY Kattankulathur, Chengalpattu District 603203, Tamil Nadu, India

M.Tech in Embedded Systems Technology (2020 Regulations)

1. Department Vision Statement

Stmt - 1 Department of ECE is dedicated to create and disseminate knowledge in the area of Electronics and Communication Engineering through internationally accredited educational process.

Stmt - 2 The Department will offer a unique learning experience to the students.

Stmt - 3 The Department is determined to prepare them as highly ethical and competent professionals, who in turn will work for the betterment of mankind through technology innovation and management.

2. Department Mission Statement

Stmt - 1 Build an educational process that is well suited to local needs as well as satisfies the international accreditation requirements.

Stmt - 2 Attract the right people and retain them by building an environment that foster work freedom and empowerment.

Stmt - 3 With the right talent pool, create knowledge and disseminate get involved in collaborative research with reputed universities and produce competent graduands.

Stmt - 4

Stmt - 5

3. Program Education Objectives (PEO)

PEO - 1 To provide the Graduates of Embedded System Technology a productive synergy between hardware and software design

PEO - 2 To possess technical and professional knowledge to design and develop Embedded and Real Time Systems

PEO - 3 To apply the skills acquired for success in Higher Studies/ Research,Technical careers in Industry, academia, Entrepreneurialand consultancy.

PEO - 4 To promote the development of Intellectual property through research in the specific area by means of high impact factor journal publication and patents.

PEO - 5 To prepare the graduate for Lifelong learning in order to adapt themselves for professional activities and to take the advantage of opportunities in their profession.

4. Consistency of PEO’s with Mission of the Department

Mission Stmt. - 1 Mission Stmt. - 2 Mission Stmt. - 3 Mission Stmt. - 4 Mission Stmt. - 5

PEO - 1 - L - - -

PEO - 2 H - - - -

PEO - 3 M - H - -

PEO - 4 - - H - -

PEO - 5 - H - - -

H – High Correlation, M – Medium Correlation, L – Low Correlation

5. Consistency of PEO’s with Program Learning Outcomes (PLO)

Program Learning Outcomes (PLO)

1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15.

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PEO - 1 H M H M H H H M L L H H M L H

PEO - 2 H M H H H H M M H M M M H M H

PEO - 3 M H M H H H M L M H H H H M H


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PEO - 4 M M H H H H H M H M M M H M M

PEO - 5 H M M M M H M M L H H H M M H


6. Programme Structure(70 Total Credits)

1. Professional Core Courses (C) (4 Courses)

Course Course Hours/ Week

Code Title L T P C

20ECC501J Embedded Operating Systems 3 0 2 4

20ECC502J Applied Digital Image processing 3 0 2 4

20ECC503J SoC Architecture and Programming 3 0 2 4

20ECC504J Real Time Operating System 3 0 2 4

Total Learning Credits 16

2. Professional Elective Courses (E) (5 Courses)


Code Title L T P C

20ECE501J Embedded Control Systems 3 0 2 4

20ECE502J Artificial Intelligence with Machine Vision

20ECE503J MEMS devices and applications 3 0 2 4

20ECE504J Communication Protocols for Embedded Systems

20ECE505T IoT System Design 3 1 0 4

20ECE506T IoT Sensor Nodes with AI

20ECE507T Embedded System Design and Standards 3 1 0 4

20ECE508T Automotive Embedded Systems

20ECE601J Dynamic Reconfigurable System Design 3 3 3

0 1 1

2 0 0

4 20ECE602T Security for Embedded Systems

20ECE603T Multiprocessor Real Time Systems


3. Skill Enhancement Courses(S)

(2 Courses)


Code Title L T P C

20GNS501J Research Publishing and Presenting Skills 1 0 2 2

20ECS500T Research Methodology for Electronics and Communication Engineers

3 0 0 3


4. Open Elective Courses (O) (Any 1 Course)


Code Title L T P C

20MBO601T Business Analytics 3 0 0 3

20MEO601T Industrial Safety 3 0 0 3

20MAO601T Operations Research 3 0 0 3

20MBO602T Cost Management 3 0 0 3

20NTO601T Composite Materials 3 0 0 3

20CEO601T Waste to Energy 3 0 0 3

20GNP620T Massive Open Online Courses (MOOC) 3 0 0 3


5. Project Work, Internship In Industry / Higher Technical Institutions(P)


Code Title L T P C

20ECP601L Internship (4-6 weeks during 2ndsem vacation) Or Minor Project

- - - 4

20ECP602L 0 0 8

20ECP603L Project Work Phase I 0 0 12 6

20ECP604L Project Work Phase II 0 0 32 16


6. Audit Courses (A)

(Any 2 Courses)


Code Title L T P C

20CEA501J Disaster Management 1 0 1 0

20LEA501J Constitution of India 1 0 1 0

20LEA502J Value Education 1 0 1 0

20GNA501J Physical and Mental Health using Yoga 1 0 1 0

7. Mandatory Courses (M)

(3 Courses)


Code Title L T P C

20PDM501T Career Advancement for Engineers – I 1 0 1 0

20PDM502T Career Advancement for Engineers – II 1 0 1 0

20PDM601T Career Advancement for Engineers –III 1 0 1 0


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7. Implementation Plan

Semester - I

Code Course Title

Hours/ Week C

L T P

20ECC501J Embedded Operating Systems 3 0 2 4

20ECC502J Applied Digital Image processing 3 0 2 4

20ECE501J Embedded Control Systems 3 0 2 4

20ECE502J Artificial Intelligence withMachine Vision

20ECE507T Embedded System Design and Standards 3 1 0 4

20ECE506T IoT Sensor Nodes with AI

20GNS501J Research Publishing and Presenting Skills 1 0 2 2

20PDM501T Career Advancement for Engineers – I 1 0 1 0

Audit Course – I 1 0 1 0


Semester - II

Code Course Title Hours/ Week C

L T P

20ECC503J SoC Architecture and Programming 3 0 2 4

20ECC504J Real Time Operating System 3 0 2 4

20ECE504J Communication Protocols for Embedded Systems 3 0 2 4

20ECE503J MEMS Devices and Applications

20ECE505T IoT System Design 3 1 0 4

20ECE508T Automotive Embedded Systems

20ECS500T Research Methodology for Electronics and Communication Engineers

3 0 0 3

20PDM502T Career Advancement for Engineers – II 1 0 1 0

Audit Course - II 1 0 1 0


Semester – III

Code Course Title Hours/ Week

C L T P

20ECE601J Dynamic Reconfigurable System Design 3 3 3

0 1 1

2 0 0

4 20ECE602T Security for Embedded Systems

20ECE603T Multiprocessor Real Time Systems

Open Elective 3 0 0 3

20GNP620T MOOC - - -

20ECP601L Internship (4-6 weeks during 2ndSem vacation) - - - 4

20ECP602L Minor Project 0 0 8

20ECP603L Project Work Phase I 0 0 12 6

20PDM601T Career Advancement for Engineers – III 1 0 1 0


Semester - IV

Code Course Title Hours/ Week C

L T P

20ECP604L Project Work Phase II 0 0 32 16


8. Program Articulation Matrix

Course Code

Course Name

Programme Learning Outcomes

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20ECC501J Embedded Operating Systems H M M 20ECC502J Applied Digital Image processing H M - - M - - - - - - - - - M

20ECC503J SoC Architecture and Programming - H - - - - - - - - - - - - -

20ECC504J Real Time Operating System H - - - H - - - - H - - H - H

20ECE501J Embedded Control Systems H - - H - H H H H - - - H - -

20ECE502J Artificial Intelligence with Machine Vision - - H - - - - - - - - - - - -

20ECE503J MEMS Devices and Applications H - M M M M - - - - - - H - M

20ECE504J Communication Protocols for Embedded Systems H - M L - - - - - - - - - - -

20ECE505T IoT System Design H H H - H - - - - - - - H - -

20ECE506T IoT Sensor Nodes with AI - - H H - - - - - - - - - - -

20ECE507T Embedded System Design and Standards H M - - H - - - - - - - H - -

20ECE508T Automotive Embedded Systems H - - H - - - - - - - - - - -

20ECE601J Dynamic Reconfigurable System Design M - M - H H - - - M - - H - -

20ECE602T Security for Embedded Systems - M - - - - - - - - - - - - -

20ECE603T Multiprocessor Real Time Systems H - - H - H H H H - - - H - -

20GNS501J Research Publishing and Presenting Skills L H H M M - L H M - H - L - M

20ECS500T Research Methodology for Electronics and Communication Engineers H H - H - - - - - - - - - - -

20ECP601L Internship (4-6 weeks) H H H M H H M L H L M - H H -

20ECP602L Minor Project H H H M H H M L H L M - H - -

20ECP603L Project Work Phase I H H H M H H M L H L M L H L H

20ECP604L Project Work Phase II H H H M H H M L H L M L H L H

Program Average H H H M H H M L H L M L H L M


SRM Institute of Science and Technology - Academic Curricula – M.Tech(Embedded Systems Technology) – 2020 Regulations 6

Course Code

20ECC501J Course Name

EMBEDDED OPERATING SYSTEMS Course

Category C Professional Core

L T P C

3 0 2 4

Pre-requisite Courses

Nil Co-requisite

Courses Nil

Progressive Courses

Nil

Course Offering Department Electronics and Communication Engineering Data Book / Codes/Standards Nil

Course Learning Rationale (CLR): The purpose of learning this course is to: Learning Program Learning Outcomes (PLO)

CLR-1 : Learn ARM core and its language. 1 2 3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

CLR-2 : Acquire knowledge of I/O ports, peripherals and their configuration.

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CLR-3 : To implement complex requirements with simple coding using the concepts of threads.

CLR-4 : To study and design processor based embedded systems along with OS implementation. (Specifically RTOS)

CLR-5 : To Study Example Cases and its applications

CLR-6 : Gain Knowledge in Embedded OS and its functions

Course Learning Outcomes (CLO): At the end of this course, learners will be able to:

CLO-1 : Read and understand many microprocessor instruction sets and their use. 2 80 70 H - - M - - - - - - - - - - -

CLO-2 : To implement and write code in assembly and C for embedded applications. 2 80 70 H - M M - - - - - - - - - - -

CLO-3 : Understand the concepts and requirements of RTOS, in general basic OS principles. 2 80 70 H - M M - - - - - - - - - - -

CLO-4 : The implementation and use of RTOS for embedded programs 3 80 60 H - M H - - - - - - - - - - -

CLO-5 : Gain knowledge in related sample use cases. 2 80 70 H - M M - - - - - - - - - - -

CLO-6 : Gain Knowledge in Embedded coding with RTOS and its implementation 2 80 70 H - M M - - - - - - - - - - -

Duration (hour)

Microprocessor and Microcontroller I/O Programming Thread Management Time Management Case Studies

15 15 15 15 15

S-1 SLO-1 Cortex-M processor architecture Parallel I/O programming Introduction to RTOS Spin-lock semaphore

Real time systems: Data acquisition system

SLO-2 Cortex-M processor architecture Sample programs Introduction to RTOS Cooperative scheduler Approach

S-2 SLO-1 Cortex-M processor architecture Interrupt processing basics Concurrent programming Blocked state Performance metrics

SLO-2 Cortex-M processor architecture System tick; periodic interrupts Thread fundamentals Implementation Examples

S-3 SLO-1 ARM Cortex assembly language - part1 Conditional execution Shared resources and Critical sections Thread rendezvous Multilevel feedback queue

SLO-2 Programming exercises Conditional execution Consumer producer problem Example priority scheduler

S 4-5

SLO-1 Practice: ARM Cortex assembly language with simulator

Practice: Interrupts and timers in C and assembly

Practice: Simple thread programming in RTOS

Practice: Two semaphore implementation

Practice: Priority based scheduling; threads and communications SLO-2

S-6 SLO-1 ARM Cortex assembly language - part2 UART programming Switching threads FIFO & Little's theorem DMA / high speed interface

SLO-2 Programming exercises UART programming Profiling the OS FIFO & Little's theorem DMA / high speed interface

S-7 SLO-1

ARM Cortex microcontroller interface standards

Digital signal time measurement Semaphores and implementation Three semaphore implementation Solid state disk

SLO-2 IDE software tools Use of timers and compare, capture registers.

Operations on semaphores Three semaphore implementation Flash device driver


S-8 SLO-1 Embedded debugging tools in Keil IDE SSI interface Resource sharing Kahn process networks SD card interface

SLO-2 Embedded debugging example with simulation

SSI interface Conditional variable Kahn process networks SD card interface

S 9-10

SLO-1 Practice: C & assembly programming

using Keil IDE and kit -

Practice: Debugging hardware with target board

Practice: Multi-threaded application in RTOS

Practice: Multi-threaded application with communication.

Practice: Semaphore implementation experiment in RTOS SLO-2

S-11 SLO-1 Memory management -1 Memory management -1 SSI programming with interrupt Thread communications Thread sleeping

SLO-2 Memory management -2 Memory management -2 Programming example Thread communications Thread sleeping

S-12 SLO-1 Embedded debugging tools in Keil IDE Embedded debugging tools in Keil IDE Analog I/O; A/D converter interfacing Process management Deadlocks, monitors

SLO-2 Embedded debugging example with simulation

Embedded debugging example with simulation

Programming example Process management Deadlocks, monitors

S-13 SLO-1 Review class Review class OS considerations of I/O devices Dynamic linking and loading Fixed scheduling

SLO-2 Review class Review class OS considerations of I/O devices Dynamic linking and loading Fixed scheduling

S 14-15

SLO-1 Lab 3: Practice: C & assembly programming using Keil IDE and kit – II

Practice: A/D interfacing Practice: Program profiling Practice: Priority based scheduling; threads and communications

Practice: Any application program using RTOS SLO-2

Learning Resources

1. Jonathan Valvano, "Real time operating systems for ARM Cortex-M Microcontrollers, Embedded

systems - Volume 3", Jonathan Valvano, 2017.

2. Andrew Sloss et all, "ARM system developers guide", Elsevier, 2004.

3. Jim Cooling, “Real-Time Operating Systems Book 1: The Foundations”, Lindtree Associates,

2018.

4. Quing Li, "Real time techniques for embedded systems", CMP Books, 2003.

5. K.C. Wang, "Embedded and Real time operating systems", Springer, 2017.

6. Online Reference: www.arm.com, for ARM cortex M references

7. Practice Sessions on Keil ARM Platform (http://www2.keil.com/video)

Learning Assessment

Bloom’s

Level of Thinking

Continuous Learning Assessment (CLA) (60% weightage) Final Examination(40% weightage)

CLA-1(20%) CLA-2(25%) CLA-3# (15%)

Theory Practice Theory Practice Theory Practice Theory Practice

Level 1 Remember

15 15 15 15 15 15 15 15 Understand

Level 2 Apply

20 20 20 20 20 20 20 20 Analyze

Level 3 Evaluate

15 15 15 15 15 15 15 15 Create

Total 100 % 100 % 100 % 100 %

# CLA – 3 can be from any combination of these: Assignments, Seminars, Tech Talks, Mini-Projects, Case-Studies, Self-Study, MOOCs, Certifications, Conf. Paper etc.,

Course Designers Experts from Industry Experts from Higher Technical Institutions Internal Experts

1. Mr. Anuj Kumar, Bombardier Transportation, Ahmedabad, [email protected] 1. Dr. Meenakshi, Professor of ECE, CEG, Anna University, [email protected] 1. Prof. V. Natarajan, SRMIST.

2. Mr. Hariharasudhan - Johnson Controls, Pune, [email protected] 2. Dr. Venkatesan, Sr. Scientist, NIOT, Chennai, [email protected] 2. NivashS, Assistant Professor, SRMIST

http://www.arm.com/

http://www2.keil.com/video

mailto:[email protected]





Course Code


APPLIED DIGITAL IMAGE PROCESSING Course


L T P C

3 0 2 4


Nil Co-requisite

Courses Nil

Progressive Courses

Nil


Course Learning Rationale (CLR):

The purpose of learning this course is to: Learning Program Learning Outcomes (PLO)

CLR-1 : Review the fundamentals of Digital Image processing 1 2 3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

CLR-2 : Provide a in depth knowledge in image enhancement

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CLR-3 : Describe various segmentation techniques and image features

CLR-4 : Discuss the importance of supervised and unsupervised classification techniques

CLR-5 : Introduce basic concepts in video and real-time image processing

CLR-6 : Cover the sub-fields of image processing and help to incorporate image processing algorithms in embedded systems

Course Learning Outcomes (CLO):

At the end of this course, learners will be able to:

CLO-1 : Strengthen the fundamentals and to know the standards used in Digital Image Processing 2 90 90 H M - - - - - - - - - - - - M

CLO-2 : Understand the use of Histogram and various filters in image enhancement. 2,3 80 80 H H M M - - - - - - - - - - M

CLO-3 : Know segmentation techniques and understand the concept of feature extraction 2 85 80 H M H H - - - - - - - - - - M

CLO-4 : Classify images with supervised or unsupervised learning techniques 1,2 85 80 H H H H H - - - - - - - - - M

CLO-5 : Understand the mechanism behind MPEG compression and methods to reduce computational load of video algorithm

1 85 85 H M - - H - - - - - - - - - M

CLO-6 : Understand the sub-fields of image processing and able to implement image processing algorithms in embedded systems

1,2,3

80 80 H M - - M - - - - - - - - - M

Duration (hour)

Image Fundamentals Image Enhancement Image Segmentation & Feature

Extraction Image Classification

Digital Video & Real-Time Image Processing

15 15 15 15 15

S-1 SLO 1 & 2

Image representation Spatial Domain: Gray level Transformations

Edge detection Unsupervised learning Digital Video

Spatial Resolution and Frame Rate

S-2 SLO-1 Image transformation (Scaling)

Histogram , Histogram Modeling Edge linking Clustering Motion estimation

SLO-2 Image transformation (rotation, translation)

MPEG Compression standards

S-3 SLO-1 Colour Models (RGB, HSV)

Histogram equalization Hough Transform PCA

MPEG 4 AVC SLO-2 Colour Models (CMY) Eigen faces

S 4-5

SLO 1 & 2

Lab 1: Image transformation (scaling, translation, rotation)

Lab 4: Gray level transformation Lab 7: Frequency domain filtering operation

Lab 10: K means clustering Lab 13: Repeat Experiments

S-7 SLO-1 Types of images (Thermal images)

Spatial filtering smoothing Watershed Transformation K-means clustering Parallelism in image and video processing operations SLO-2 Types of images ( Satellite images)


S-8 SLO-1 Discrete Cosine Transform (Kernel)

Spatial filtering sharpening Thresholding Supervised learning algorithm simplification strategies

SLO-2 Discrete Cosine Transform (Properties) reduction in number of operation

S-9 SLO-1 Wavelet Transform (principles)

Filtering in frequency domain ( Ideal LPF)

Region based segmentation KNN learning amount of data

SLO-2 Wavelet Transform (Kernel, application) Filtering in frequency domain (Ideal HPF)

simplified algorithm

S 9-10

SLO 1 & 2

Lab 2: Colour space conversion Lab 5: Histogram manipulation Lab 8: Edge detection filters Lab 11: SVM classifier Lab-14: Model Examination

S-11 SLO-1

SLO- 2 Image standards (JPEG)

Filtering in frequency domain ( LPF) Boundary descriptors Bayes classifier essential hardware architecture features

Filtering in frequency domain (HPF) Moments

S-12 SLO-1

Image standards (JPEG2000) Median Filters Texture descriptors Support Vector Machine (SVM)

DSP

SLO-2 FPGA

S-13 SLO-1

Image Standards (JBIG) Homomorphic Filtering Autocorrelation detecting features using SVM and HoG

features hybrid systems

SLO-2 Co-occurrence features gpu

S 14-15

SLO- 1 & 2

Lab 3: Image transform (DCT) Lab 6: Filtering operation- spatial Lab 9: Boundary description of images Lab 12: Face detection using Haar feature

Lab 15: End-Semester Practical Examination

Learning Resources

1. Sandipan Dey, Hands-On Image Processing with Python: Expert techniques for advanced image analysis and effective interpretation of image data, Packt Publishing Ltd, 2018

2. Tekalp, A..” Digital Video Processing”, Second Edition, PHI, 2015. 3. Kehtarnavaz, Nasser and Mark Gamadia. “Real-Time Image and Video Processing: From

Research to Reality.”, Morgan and Claypool publishers, 2006.

4. Gonzalez, Rafael C., Richard E. Woods, and Barry R. Masters. "Digital image processing third edition." Pearson International, 2008.

5. Jayaraman, S., S. Esakkirajan, and T. Veerakumar. "Digital image processing”, TMH publication." 2009.

Learning Assessment

Bloom’s

Level of Thinking

Continuous Learning Assessment (CLA) (60% weightage) Final Examination (40% weightage)

CLA-1 (20%)

CLA-2 (25%)

CLA-3# (15%)


Level 1 Remember

15 15 15 15 15 15 15 15 Understand

Level 2 Apply

20 20 20 20 20 20 20 20 Analyze

Level 3 Evaluate

15 15 15 15 15 15 15 15 Create

Total 100 % 100 % 100 % 100 %


Course Designers

Experts from Industry Experts from Higher Technical Institutions Internal Experts

1. Mr. Anuj Kumar, Bombardier Transportation, Ahmedabad, [email protected] 1. Dr. Meenakshi, Professor of ECE, CEG, Anna University, [email protected] 1. Dr. Diwakar R. Marur, SRMIST

2. Mr. Hariharasudhan - Johnson Controls, Pune, [email protected] 2. Dr. Venkatesan, Sr. Scientist, NIOT, Chennai, [email protected]






Course Code


SoC ARCHITECTURE AND PROGRAMMING Course


L T P C

3 0 2 4


Nil Co-requisite

Courses Nil

Progressive Courses

Nil



The purpose of learning this course is to:

Learning


CLR-1 : To study basic concepts of SoC and Zync processing platform 1 2 3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

CLR-2 : To study SoC based hardware design

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CLR-3 : To study the method of making a custom design and create IP

CLR-4 : To study and use HLS extensively

CLR-5 : Using Linux OS on Zync platform

CLR-6 : To design systems based on Zync SoC



CLO-1 : Able to understand SoC basics and architecture 1 80 70 H - - - - - - - - - - - - - -

CLO-2 : Able to design hardware and synthesize on SoC 2 80 70 H - - - - - - - - - - - - - -

CLO-3 : Able to create custom IP 2 80 70 H - - - - - - - - - - - - - -

CLO-4 : Design embedded system part using HLS 3 70 60 - H - - - - - - - - - - - - -

CLO-5 : Integrate LInux on Zync platform 3 70 60 - H - - - - - - - - - - - - -

CLO-6 : Proficiency and skill in using SoC for system design 3 70 65 - H - - - - - - - - - - - - -

Duration (hour)

Introduction to Zync Zync SoC Hardware & Design IP Block design & HLS HLS Interface Linux OS on Zync

15 15 15 15 15

S-1 SLO-1

The Zync device Processor in SoC Hardware / Software partitioning Interface specifications OS for Zncb : studies SLO-2

S-2 SLO-1 Designing with Zync Caches and Instructions

System generator, HDL coder Manual Interface specification Linux for Zync :Zync OS SLO-2 Design flow Busses

S-3 SLO-1

Vivado and design boards Bus masters, arbitration

Vivado HLS flow Pipelines Free RTOS SLO-2 Peripheral access

S 4-5

SLO-1 Lab 1: Introductory lab on vivado design tool (IDE)

Lab 4: GPIO interfacing to LED, using AXI

Lab 7: Hardware interrupt counter with display in LED

Lab 10: HLS experiment 1 Lab 13: Case study experiment 2 SLO-2

S-6 SLO-1 Device comparisons SoC overview

Simulation and documentation Loops and arrays Linux overview SLO-2 Zync and FPGA Interfacing and signals

S-7 SLO-1 Zync and Standard processor

implementation metrics and considerations

Introduction to HLS Designing with Vivado HLS; general

approach, examples/case studies for

labs

Version control

SLO-2 Zync with discrete FPGA Interconnects HLS languages Git Repository


S-8 SLO-1

Application opportunities Memory architecture DDR memory controller

Scheduling and binding Designing with Vivado HLS; general approach, examples/case studies for labs

Debugging Linux SLO-2

S 9-10

SLO-1 Lab 2: Introductory lab on Vivado

Lab 5: GPIO interfacing to LED with software and blinking rate change

Lab 8: AXI timer experiment Lab 11: HLS experiment 2 Lab-14: Case study experiment 3 SLO-2

S-11 SLO-1

The Zed board and applications Static memory interface

Vivado HLS dettails IP creation Linux kernel introduction

SLO-2 On Chip memory Kernel source

S-12 SLO-1

Sample designs on Zync Interrupts Perspectives

AXI interfacing Kernel configuration

SLO-2 Interrupt sources Data types Kernel Boot command line

S-13 SLO-1

Sample designs on Zync PPI, SPI, SGI Interface specification and synthesis AXI interfacing Kernel build command line SLO-2

S 14-15

SLO-1 Lab 3: Sample design simulation

Lab 6: Hardware Interrupt with push button

Lab 9: IP block simulation Lab 12: Case study experiment -1 Lab 15: Linux ported experiment SLO-2

Learning Resources

1. Louise H. Crockett, Ross A. Elliot, Martin A. Enderwitz, Robert W. Stewart, “The Zync Book”, University of Strathclyde, Glasgow, Scotland, UK & Xilinx, Under Open source license, 1st edition, 2014. 2. “Vivado design suite user guide”, Xilinx, 2017. 3. Greg Kroah-Hartman, “Linux kernel programming in a nutshell”, O’Reilly, 2007.

Learning Assessment

Bloom’s

Level of Thinking

Continuous Learning Assessment (CLA) (60% weightage)

Final Examination(40% weightage) CLA-1(20%) CLA-2(25%) CLA-3# (15%)


Level 1 Remember

15 15 15 15 15 15 15 15 Understand

Level 2 Apply

20 20 20 20 20 20 20 20 Analyze

Level 3 Evaluate

15 15 15 15 15 15 15 15 Create

Total 100 % 100 % 100 % 100 %


Course Designers


1. Mr. Anuj Kumar, Bombardier Transportation, Ahmedabad, [email protected] 1. Dr. Meenakshi, Professor of ECE, CEG, Anna University, [email protected] 1. Prof.V. Natarajan

2. Mr. Hariharasudhan - Johnson Controls, Pune, [email protected] 2. Dr. Venkatesan, Sr. Scientist, NIOT, Chennai, [email protected] 2.






Course Code


REAL TIME OPERATING SYSTEM Course


L T P C

3 0 2 4


Nil Co-requisite

Courses Nil

Progressive Courses

Nil




Learning


CLR-1 : Learn the basics of Operating system 1 2 3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

CLR-2 : Understand the process management

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CLR-3 : Understand the Process synchronization and memory management

CLR-4 : Understand scheduling and scheduling algorithms

CLR-5 : Real Time operating system examples and case studies

CLR-6 : Emphasize the core knowledge on RTOS principles



CLO-1 : Understand the fundamentals of Operating system 2 80 70 M - - - - - - - - - - - - - -

CLO-2 : Know and understand the process concepts and kernel structure 3 80 70 - - - - H - - - - - - - - - -

CLO-3 : Know and understand the process synchronization and memory management 3 80 70 - - H H H - - - - - - - - - -

CLO-4 : Understand design a scheduling algorithm 3 80 70 - - - - H - - - - - - - - - -

CLO-5 : Understand to Use and Design RTOS 3 80 70 - - - H H - - - - - - - H - -

CLO-6 : Realize the impact of imparting RTOS in targeted environment 1,2,3 80 70 H - - - H - - - - H - - H - H

Duration (hour)

Introduction to Real Time Operating System

Process Management Process Synchronization and

Memory Management Real Time Scheduling and

Scheduling Algorithms RTOS and case studies

15 15 15 15 15

S-1 SLO-1 Overview of Operating System Process Management

Synchronization tools- The Critical Section Problem

Uniprocessor scheduling - Types of Scheduling

Introduction to POSIX

SLO-2 Fundamentals and Keywords , Structures

Process Scheduling Hardware Support for Synchronization Pre-emptive and non-preemptive scheduling

POSIX standards

S-2 SLO-1 OS user view , system view Message queues Mutex locks Dispatcher Design of POSIX

SLO-2 Interrupts Mail boxes Semaphores Scheduling algorithms - FCFS, Round Robin Scheduling

Design of POSIX

S-3 SLO-1 Storage structures Pipes Semaphore usage and implementation Priority based scheduling RTOS – TinyOS - Introduction

SLO-2 I/O structures Inter-Process Communication IPC Monitors- Implementation using semaphores

Thread Scheduling Example application

S 4-5

SLO-1 Lab 1 : Introduction to Linux OS

Lab 4:Blinking of LED and Keypad in Linux using Python

Lab 7: Pseudo code for Semaphore in Linux using C

Lab 10: Pseudo code for FCFS in Linux using C

Lab 13: Repeat Experiments

SLO-2

S-6 SLO-1 Single ,Multi and clustered systems

IPC in Shared memory Message passing systems

Resuming processes within a monitor Multiprocessor scheduling Names and Program Structure

SLO-2 Dual mode and multimode operation Threads and concurrency Deadlocks- characterization, Methods for handling

Real Time CPU scheduling, Rate-monotonic Scheduling

Basic Programming0 Component signatures

S-7 SLO-1 Resource Management- Timers and I/O Multithreading models Deadlock prevention Earliest-Deadline-First Scheduling, Interfaces


SLO-2 Virtualization and Distributed Systems Implicit Threading Deadlock avoidance POSIX Real-Time Scheduling Component implementation

S-8 SLO-1 Lists Threading Issues Deadlock detection Fault Tolerant Scheduling

Split phase interfaces

SLO-2 Stacks Kernel Structure –Critical sections, Tasks

Recovery from Deadlock

Aperiodic scheduling Configurations

S 9-10

SLO-1 Lab 2: Introduction to C Programming -Standard Libraries

Lab 5: Lab4: Pseudo code for Pipe in Linux using C

Lab 8: Lab 7:Dining Table Philosophy problem

Lab 11: Pseudo code for Round Robin Scheduling in Linux using C

Lab 14: Model Practical Examination

SLO-2

S-11 SLO-1 Hash functions Task states, Task scheduling, Memory management

Schedulability problem: classification-Schedulability test

Wiring

SLO-2 Computing Environments Task Control Blocks Main memory allocation Worst Case Execution Time (WCET) Applications

S-12 SLO-1

Building and Booting an Operating System

Task Management Contiguous memory allocation Spring algorithm

Case Study – RTOS for Control Systems

SLO-2 Operating system debugging Time Management Paging, Structure of the page table, Spring algorithm Case Study – RTOS for Control Systems

S-13 SLO-1 Queues Device drivers Virtual memory Sporadic Scheduling

Case Study- RTOS for Voice over IP

SLO-2 Trees Device drivers Allocating Kernel memory Sporadic Scheduling Case Study- RTOS for Voice over IP

S- 14,15

SLO-1 Lab 3 : Study of Raspberry pi, Introduction to python

Lab 6: POSIX thread Lab 9: Parent And Child process using Fork

Lab:12: Pseudo code for Priority Based scheduling in Linux using C

Lab 15: End Semester Practical Examination SLO-2

Learning Resources

1. AbrahamSilberschatz, PeterBaerGalvin ,Greg Gagne, Operating System Concepts, Tenth edition, Wiley, 2018

2. Jean J.Labrosse, The microC /OS-II The Real Time Kernel Optics, CMP Books, 2nd edition, 2011 3. C.M.Krishna and G.Shin, Real Time Systems, McGrraw-Hill International Edition, 1997

4. Jim Cooling, “Real-Time Operating Systems Book 1: The Foundations”, Lindtree Associates, 2018. 5. Donald A.Lewine, POSIX Programmer’s Guide.1991. 6. Philip Levis, David Gay, TinyOSProgramming Cambridge University Press 2009

Learning Assessment

Bloom’s

Level of Thinking




Level 1 Remember

15 15 15 15 15 15 15 15 Understand

Level 2 Apply

20 20 20 20 20 20 20 20 Analyze

Level 3 Evaluate

15 15 15 15 15 15 15 15 Create

Total 100 % 100 % 100 % 100 %


Course Designers


1. Mr. Anuj Kumar, Bombardier Transportation, Ahmedabad, [email protected] 1. Dr. Meenakshi, Professor of ECE, CEG, Anna University, [email protected] 1. Dr. K.Vadivukkarasi, SRMIST

2. Mr. Hariharasudhan - Johnson Controls, Pune, [email protected] 2. Dr. Venkatesan, Sr. Scientist, NIOT, Chennai, [email protected] 2. Dr. A.RuhanBevi, SRMIST






Course Code

20ECE501J Course Name

EMBEDDED CONTROL SYSTEMS Course

Category E Elective Course

L T P C

3 0 2 4


Nil Co-requisite

Courses Nil

Progressive Courses

Nil




Learning


CLR-1 : Learn embedded systems basic concepts 1 2 3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

CLR-2 : Understand control system design for embedded applications

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CLR-3 : Design optimal embedded models and learn the uncertainties

CLR-4 : Understand the basic controllers design and implementation

CLR-5 : Develop deep understanding on Robust control and embedded safety procedures

CLR-6 : Gain overall understand of the embedded control systems for industrial applications



CLO-1 : Understand the architecture and communication networks of embedded systems 2 80 70 H - H - - - - - - - - M H - -

CLO-2 : Design linear and nonlinear control system models for embedded applications 2 85 75 H M H H - - - - - - - - - - -

CLO-3 : Validate time domain and frequency domain systems and reduce uncertainties in system design 2 75 70 H - H M - - - - - - - - - H -

CLO-4 : Design various control elements by understanding pole-zero placement and able to design PID controllers 2 85 80 H H - - - - - - - H - H - - H

CLO-5 : Understand and design robust real time control systems with embedded safety precautions 2 85 75 H - H - - - H H - - - - - - -

CLO-6 : Design and implement real time embedded control systems and address the problems related to the controls system design

2 80 70 H - - H - H H H H - - - H - -

Duration (hour)

Embedded Systems – Basic Concepts

Embedded Control System Design System Identification and Model-

Order Reduction Classical Controller Design

Fundamentals of Robust Control and Embedded Safety

15 15 15 15 15

S-1 SLO-1 Introduction to Embedded Systems

Requirements for Control System Design

Model Building and Model Structures Controller Design Based on Pole-Zero Cancellation, The Influence of Controller Zero

Norms for Signals and Systems

SLO-2 Architecture Safety Requirements Model Structures Controller Design for Deadbeat Response

Internal Stability

S-2 SLO-1 Embedded system model

Identification of the System to Be Controlled

Input Signal Design for System Identification Experiments

Controller Design Using the Root Locus Technique

Unstructured Plant Uncertainties

SLO-2 The Electric Power Level Control Device Specification Requirements Imposed on the Input Signal

Phase-Lead Controller Design Using the Root Locus

Robust Stability for Different Uncertainty Models

S-3 SLO-1 The Signal Processing Level Control Device Design Input Signal Design

Phase-Lag Controller Design Using the Root Locus

Performance and Robustness Bounds

SLO-2 Communication Networks in Embedded Systems

Installation and Maintenance Model Validation in Time Domain PID Controller Design Design for Robust Performance

S 4-5

SLO-1 Lab 1: Practice Lab Lab 4: Practice Lab Lab 7: Practice Lab Lab 10: Practice Lab Lab 13: Practice Lab

SLO-2

S-6 SLO-1 Communication Networks in Embedded Systems

Mathematical Models for Control Model Validation in Frequency Domain Ziegler-Nichols Tuning Formula Performance Weighting Function Design for Tracking Control


SLO-2 Introduction to Control Area Networks (CAN)

Models from Science Model-Order Reduction Methods Chien-Hrones-Reswick Tuning Formula Performance Weighting Function Design for Disturbance Rejection

S-7 SLO-1 CAN Communication Network Models from Experimental Data Nominal Plant and Plant Uncertainties.

The Coefficient Diagram Method, Validation of the Control System,

Robust Controller Synthesis Problem

SLO-2 CAN Message Frames Linearization of Nonlinear Models Nominal Plant and Plant Uncertainties. Representative Sample and Sample Size, Monte Carlo Simulation

Controller Design Using Youla Parametrization

S-8 SLO-1 Error Detection and Signaling Linearization of Nonlinear Models Multiplicative Uncertainty Model

Controller Design for Systems with Time Delays

Controller Design Using Robust Control Toolbox

SLO-2 CAN Controller Modes Control System’s Characteristics Additive Uncertainty Model Systems with Time Delays – Smith Predictor

Controller Design with Constraint on the Control Signal

S 9-10

SLO-1 Lab 2: Practice Lab Lab 5: Practice Lab Lab 8: Practice Lab Lab 11: Practice Lab Lab-14: Practice Lab

SLO-2

S-11

SLO-1 CAN Implementations Disturbance Attenuation, Additive Uncertainty Model The Coefficient Diagram Method (CDM) for Systems with Time Delays

Robust Gain-Scheduled Control

SLO-2 Multi-tasking Embedded Control Systems

Tracking Practical Examples – System Identification

Handling Jitter in Networked Control System

Control Algorithm Implementation in Real-Time

S-12 SLO-1 Introduction to RTOS Sensitivity to Parameter Variations Brushless d.c. Drive’s Identification

Controller Design for Disturbance Rejection

Embedded Safety Loop Development

SLO-2 RTOS Control System’s Limitation Brushless d.c. Drive’s Identification Disturbance Observers Risk Assessment and Safety Levels

S-13 SLO-1

Planning Embedded System Development

Stability and Relative Stability Identification of a Fuel Cell Two-Degree-of-Freedom Control Systems (2DOF)

Classification of Faults

SLO-2 Planning Embedded System Development

Performance Specifications for Linear Systems

Identification of a Fuel Cell Control System Design Verification and Validation

Calculation of Probability of Failure on Demand

S 14-15

SLO-1 Lab 3: Practice Lab Lab 6: Practice Lab Lab 9: Practice Lab Lab 12: Practice Lab Lab 15: Practice Lab

SLO-2

Learning Resources

1. A.Forrai, “Embedded control system design- A model based approach,” Springer-Verlag, 2013

2. Marian Andrzej Adamski,AndreiKaratkevich,MarekWegrzyn, “Embedded Control systems,” Springer Science, 2006

Learning Assessment

Bloom’s

Level of Thinking




Level 1 Remember

15 15 15 15 15 15 15 15 Understand

Level 2 Apply

20 20 20 20 20 20 20 20 Analyze

Level 3 Evaluate

15 15 15 15 15 15 15 15 Create

Total 100 % 100 % 100 % 100 %



Course Designers


1. Mr. Anuj Kumar, Bombardier Transportation, Ahmedabad, [email protected] 1. Dr. Meenakshi, Professor of ECE, CEG, Anna University, [email protected] 1. Dr. Bandaru Ramakrishna, SRMIST

2. Mr. Hariharasudhan - Johnson Controls, Pune, [email protected] 2. Dr. Venkatesan, Sr. Scientist, NIOT, Chennai, [email protected] 2. Dr. Chittaranjan Naik, SRMIST






Course Code


ARTIFICIAL INTELLIGENCE WITH MACHINE VISION Course


L T P C

3 0 2 4

Pre-requisite Courses NIL Co-requisite Courses NIL Progressive

Courses NIL




CLR-1 : Understand the need for Probability and Statistics 1 2 3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

CLR-2 : Introduce the Machine Learning aspects and it’s Architectures

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CLR-3 : Introduce the Deep Learning aspects and it’s Architectures

CLR-4 : Conceptualize the need for Computer Vision

CLR-5 : Apply machine learning to Varied fields using Python

CLR-6 : Understand and apply deep learning to Varied fields



CLO-1 : Appreciate the uses of Probability in Machine Learning 2 80 70 H H - - - - - - - - - - - - -

CLO-2 : Understand the Machine Learning Architectures 1 80 70 L - H - - - - - - - - - - - -

CLO-3 : Understand the Deep Learning Architectures 1 80 70 L - H - H M - - - - - - - - -

CLO-4 : Apply Computer vision for varied Imaging applications 2 80 70 - - - H - - - - - - - - - - -

CLO-5 : Appreciate the applications of Machine learning algorithms for day to day life activities 2 80 70 - H - - H M - - - - - - - - -

CLO-6 : Gain Knowledge on available software for Machine Learning and use it for real time applications 2 80 70 - - H H - - - - - - - - - - -

Duration (hour)

Probability and Statistics with Introduction to Python

Introduction to Machine Learning and it’s Architectures

Introduction to Deep Learning and it’s Architectures

Computer Vision Applications of Artificial

Intelligence

15 15 15 15 15

S-1 SLO-1 Introduction to Probability and Statistics Need for Classification Algorithms History of Deep Leaning

Applying Geometric Transformation to Images

AI applied to Signal Processing

SLO-2 Need for Probability and Statistics Classification Algorithms Deep learning primitives Problems using Geometric transformation Case Study

S-2 SLO-1 First Order Linear Model Need for Clustering Algorithms Fully Connected Deep Networks

Detecting Edges and Applying Image Filters

AI applied to Internet of Things

SLO-2 Least Square Regression Line Model

Clustering Algorithms Algorithm for fully connected deep networks

Cartoonizing an Image Case Study

S-3 SLO-1

Introduction to Scientific Libraries in Python-Numpy

Types of Learning Hyper parameter Optimization Detecting and Tracking Different Body Parts

AI applied to Healthcare

SLO-2 Introduction to Scientific Libraries in Scipy

Supervised Learning Back propagationNetwork Extracting Features from an Image Case Study

S 4-5

SLO-1 Lab: Basic Mathematical and Scientific Operations using Numpy&Scipy

Lab: Implementation of Regression Algorithms using Scikit Learn

Lab: Implementation of Back propagation Algorithm

Lab: Implementing Transfer Learning with the help of an existing architecture

Lab: Implementing some basic preprocessing techniques on an image SLO-2

S-6 SLO-1 Estimated Coefficients Unsupervised Learning Algorithm for BPN Creating a Panoramic Image AI applied toFinance

SLO-2 Problems related to linear model Algorithm for unsupervised learning Advantages of BPN Seam Carving Case Study

S-7 SLO-1 Normality of Epsilon Regularization Tools Convolutional Neural Networks Detecting Shape AI applied toMarketing


SLO-2 Least Absolute Shrinkage Problems related to learning Architecture for CNN Object Tracking Case Study

S-8 SLO-1 Importing dataset using Pandas Dimensionality Reduction Advantages of CNN Object Recognition AI applied toMilitary

SLO-2 Altering dataset using Pandas Need for reduction in dimension CNN Variants Algorithm for Object Recognition Case Study

S 9-10

SLO-1 Lab: Analysis of a Dataset ( CSV ) using Pandas with plots Lab:

Lab: Implementation of Clustering Algorithms using Scikit Learn

Lab: Implementing a Convolutional Neural Network Algorithm

Lab: Basic to Advanced filters implementation on an image using OpenCV

Lab:Time series forecasting on a signal SLO-2

S-11 SLO-1 Selection Operator Support Vector Machine Recurrent Neural Networks Stereo Vision AI applied toAutomotive

SLO-2 Plotting Libraries Algorithm for SVM Application of RNN Application related to stereo vision Case Study

S-12 SLO-1 Introduction to Scikit-Learn Decision Tree Transfer Learning Algorithm 3-D Reconstruction Infrastructure Applications

SLO-2 Basic analysis using Scikit- Learn Application of Decision tree Application of TL Need for 3-D Reconstruction Case Study

S-13 SLO-1 Introduction to Keras Naive - Bayes Classifier Deep learning Architectures Augmented Reality Military Applications

SLO-2 Introduction to Tensor Flow Application of Naïve Bayes Classifier Algorithm for Deep learning Architectures

Application of Augmented Reality Case Study

S 14-15

SLO-1 Lab: Basic Mathematical Operations using Keras and Tensorflow

Lab:Implementation of Classification algorithm using Scikit Learn

Lab: Implementation of RNN Algorithms Lab:Implementing a basic Object detection Algorithm

Lab:Implementing a basic disease classifier SLO-2

Learning Resources

1. Trevor Hastie, Robert Tibshirani, Jerome Friedman, “The Elements of Statistical Learning: Data Mining, Inference, and Prediction”, Second Edition, Springer, February 2009.

2. Aaron Courville, Ian Goodfellow, and YoshuaBengio, “Deep Learning”, MIT Press, Cambridge, First Edition,2017

3. AurélienGéron, “Hands-On Machine Learning with Scikit-Learn, Keras, and TensorFlow: Concepts, Tools, and Techniques to Build Intelligent Systems”, Second Edition,O’reilly Media, Inc.,2019

4. Wes McKinney, “Python for Data Analysis: Data Wrangling with Pandas, NumPy, and IPython”, Second Edition, O’reillyMedia , Inc., First Edition, 2018

5. David Forsyth and Jean Ponce, “Computer Vision: A Modern Approach”, Pearson Education Limited, First Edition, 2015

6. Stuart Russell and Peter Norvig, “Artificial Intelligence: A Modern Approach”, 3rd Edition, PHI 2009.

http://www-stat.stanford.edu/~hastie/

http://www-stat.stanford.edu/~tibs/

http://www-stat.stanford.edu/~jhf

https://www.amazon.com/Aur%C3%A9lien-G%C3%A9ron/e/B004MOO740/ref=dp_byline_cont_book_1

https://www.amazon.com/Wes-McKinney/e/B00E5SITSI/ref=dp_byline_cont_book_1


Learning Assessment

Bloom’s

Level of Thinking


CLA-1 (20%)

CLA-2 (25%)

CLA-3# (15%)


Level 1 Remember

15 15 15 15 15 15 15 15 Understand

Level 2 Apply

20 20 20 20 20 20 20 20 Analyze

Level 3 Evaluate

15 15 15 15 15 15 15 15 Create

Total 100 % 100 % 100 % 100 %


Course Designers


1. Mr. Anuj Kumar, Bombardier Transportation, Ahmedabad, [email protected] 1. Dr. Meenakshi, Professor of ECE, CEG, Anna University, [email protected] 1. Dr. S.Dhanalakshmi, SRMIST







Course Code


MEMS DEVICES AND APPLICATIONS Course

Category E Professional Elective

L T P C

3 0 2 4


Nil Co-requisite

Courses Nil

Progressive Courses

Nil




Learning


CLR-1 : Understand the need and the importance of MEMS technology and their application 1 2 3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

CLR-2 : Get familiar with MEMS device fabrication techniques and manufacturing process

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CLR-3 : Study the principle and application of piezoresistive and capacitive sensor and actuators

CLR-4 : Learn the principle and application of piezoelectric, magnetic and thermal sensor and actuators

CLR-5 : Understand the RF MEMS devices principle and application and explore MEMS sensor and actuator specification and features through case study and manufactures data sheets

CLR-6 : .Use the EDA tools to explore the performance of MEMS device design in simulation environment



CLO-1 : Identify suitable MEMS devices for their application 1 80 70 H - - - - - - - - - - - - - M

CLO-2 : Select appropriate MEMS device fabrication techniques and manufacturing process 1 85 75 H - - - M - - - - - - - - - -

CLO-3 : Design piezoresistive and capacitive sensor and actuators 2 75 70 H - M M H - - - - - - - - - -

CLO-4 : Select appropriate MEMS piezoelectric, magnetic and thermal sensor and actuators 2 85 80 H - M M M - - - - - - - - - -

CLO-5 : Design RF MEMS devices for custom design and applicationsand Identify suitable sensor or actuator for the embedded system design and product development.

2 85 75 H - - M M - - - - - - - - - -

CLO-6 : Evaluate the designed MEMS device characteristics and performance. 2 80 70 H - M M M M - - - - - - H - M

Duration (hour)

INTRODUCTION TO MICROSYSTEMS FABRICATION AND

MANUFACTURING PROCESS MEMS DEVICES AND ITS

APPLICATIONS -I MEMS DEVICES AND ITS

APPLICATIONS -II MEMS DEVICES AND ITS

APPLICATIONS -III

15 15 15 15 15

S-1 SLO-1 Overview of microelectronics

manufacture and Microsystems technology.

Fabrication: Substrates Principle and application: Piezoresistive principle

Principle and application: Piezo electric sensor

Principle and application: RF MEMS devices – Series Switches, SLO-2 single crystal, silicon wafer formation

S-2 SLO-1

MEMS -Scaling laws Photolithography Piezoresistive pressure sensor Piezo electric actuator RF MEMS devices –Shunt Switches SLO-2

S-3 SLO-1

The multi-disciplinary nature of MEMS Etching (Dry and Wet) Capacitive sensor principle Magnetic actuator principle and case study

MEMS Oscillators SLO-2

S 4-5

SLO-1 Lab 1: MEMS simulation tool Exploring Lab 4: Capacitive pressure sensor Lab 7: Simple bridge RF switch Lab 10: Magnetic actuator

Lab 13: Comb drive actuator SLO-2

S-6 SLO-1 MEMS Materials – Silicon and silicon

compound

CVD, Physical vapor deposition- Capacitive accelerometer Thermal sensor MEMS Filters

SLO-2 Deposition epitaxy Capacitive sensor and actuator problem Thermal sensor – Problem solving MEMS varactors tuners

S-7 SLO-1 MEMS Materials - polymer Manufacturing: Surface micromachining Electrostatic projection display Thermal actuator Optical MEMS principle


SLO-2 Thermal actuator – Problem solving Optical MEMS actuators

S-8 SLO-1

Applications of MEMS – Various Cases

Bulk Micromachining

Case study of smart sensor: LPS22HD ultra-compact piezoresistive absolute pressure sensor, BMI160 Inertial Measurement unit

Case study of smart sensor: Piezoelectric Sounders/Piezoelectric Buzzers/Piezoelectric Ringers,

Case study of smart sensor: ADGM1304 wideband MEMS Switch with Integrated Driver, MEMS audio sensor SLO-2 LIGA process, SLIGA

S 9-10

SLO-1 Lab 2: MEMS simulation tool Exploring Lab 5: Capacitive pressure sensor Lab 8: Thermal sensor/actuator Lab 11: Piezo resistive pressure sensor Lab 14: MEMS Filters

SLO-2

S-11 SLO-1

Working principle of Microsystems - micro actuation techniques

Micro system packaging materials - die level DLP4500NIR digital micro mirror

PMM-3738-VM1000-R PUI Audio MEMS Microphones,

DSC63XX MEMS Oscillator SLO-2 micro sensors types device level, system level

S-12 SLO-1 Micro actuators types – micro pump

Packaging techniques – 2d and 3D Capacitive pressure sensor/Touch sensor

Thermal Bend Actuated Inkjet with Pre-Heat Mode

Infra-red sensor SLO-2 micro motors

S-13 SLO-1 Micro valves – micro grippers Die preparation Capacitive accelerometer MEMS Thermal Sensors

Principle and application: RF MEMS devices – Series Switches,

SLO-2 micro accelerometers Surface bonding DLP4500NIR digital micro mirror PMM-3738-VM1000-R PUI Audio MEMS Microphones,

DSC63XX MEMS Oscillator

S 14-15

SLO-1 Lab 3: Simple cantilever beam Wire bonding, sealing. Lab 9: Piezo electric actuator Lab 12: Microfluidic channel Lab 15: Optical actuator

SLO-2

Learning Resources

1. Chang Liu, “Foundations of MEMS”, Second Edition, Pearson , 2012 2. Stephen D. Senturia, Microsystem Design. 2nd edition, Springer, 2004. 3. Tai-Ran Hsu, MEMS and MICROSYSTEMS DESIGN AND MANUFACTURE, McGraw

Hill Education; 1 edition, 2017. 4. Gaberiel M. Rebiz, “RF MEMS Theory,Design and Technology”,John Wiley & Sons,

2010. 5. Charles P. Poole and Frank J. Owens, “Introduction to Nanotechnology”, John Wiley &

Sons, 2009. 6. Julian W.Gardner and Vijay K Varadhan, “Microsensors, MEMS and Smart Devices”,

John Wiley & sons, 2013 7. Mohamed Gad – el – Hak, “MEMS Handbook”, CRC Press, 2002. 8. Rai - Choudhury P. “MEMS and MOEMS Technology and Applications”, PHI Learning

Private Limited, 2009. 9. Sabrie Solomon, “Sensors Handbook,” McGraw Hill, 1998. 10. Marc F Madou, “Fundamentals of Micro Fabrication”, CRC Press, 2nd Edition, 2002. 11. Francis E.H. Tay and Choong .W.O, “Micro fluidics and Bio mems application”, IEEE

Press New York, 1997. 12. Trimmer William S., Ed., “Micromechanics and MEMS”, IEEE Press New York, 1997. 13. Maluf, Nadim, “An introduction to Micro electro mechanical Systems Engineering”, AR

Tech house, Boston 2000.

14. Julian W.Gardner, Vijay K.Varadan, Osama O. AwadelKarim, “Micro sensors MEMS and Smart

Devices”, John Wiley& sons Ltd., 2001.

15. https://www.st.com/en/mems-and-sensors

16. http://www.ti.com/product/DLP2000?qgpn=dlp2000

17. www.ti.com/analogmirrors

18. www.freescale.com/sensors.

19. https://www.st.com/en/mems-and-sensors/pressure-sensor

20. http://www.murata.com/info/rohs.html

21. https://patents.google.com/patent/US6916087

22. https://www.components.omron.com/

23. https://www.analog.com/en/products/adgm1304.html

24. www.oscilent.com/spec_pages/mems_oscillator/MEMS_Oscillator_1130.pdf

25. www.microchip.com/ MEMS oscillator

26. https://www.mouser.com/Search/Refine?Keyword=PMM-3738-VM1000-R

27. https://www.comsol.co.in/mems-module

28. http://www.intellisense.com/product.aspx

29. https://www.coventor.com/products/coventormp/

https://www.st.com/en/mems-and-sensors

http://www.ti.com/product/DLP2000?qgpn=dlp2000

http://www.ti.com/analogmirrors

http://www.freescale.com/sensors

https://www.st.com/en/mems-and-sensors/pressure-sensor

http://www.murata.com/info/rohs.html

https://patents.google.com/patent/US6916087

https://www.components.omron.com/

https://www.analog.com/en/products/adgm1304.html

http://www.oscilent.com/spec_pages/mems_oscillator/MEMS_Oscillator_1130.pdf

http://www.microchip.com/

https://www.mouser.com/Search/Refine?Keyword=PMM-3738-VM1000-R

https://www.comsol.co.in/mems-module

http://www.intellisense.com/product.aspx


Learning Assessment

Bloom’s

Level of Thinking


CLA-1(20%) CLA-2(25%) CLA-3# (15%)


Level 1 Remember

15 15 15 15 15 15 15 15 Understand

Level 2 Apply

20 20 20 20 20 20 20 20 Analyze

Level 3 Evaluate

15 15 15 15 15 15 15 15 Create

Total 100 % 100 % 100 % 100 %


Course Designers


1. Mr. Anuj Kumar, Bombardier Transportation, Ahmedabad, [email protected] 1. Dr. Meenakshi, Professor of ECE, CEG, Anna University, [email protected] 1. Dr. P. Eswaran, SRMIST







Course Code


COMMUNICATION PROTOCOLS FOR EMBEDDED SYSTEMS Course


L T P C

3 0 2 4


Nil Co-requisite

Courses Nil

Progressive Courses

Nil




Learning


CLR-1 : CAN is widely used wired quasi real time network; it is essential to know about the standard, electrical requirements and signaling

1 2 3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

CLR-2 : CANopen is an industry standard application protocol used with CAN as underlying layer. It is used in many industrial controllers

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CLR-3 : LIN bus, MODBUS, ProfiBus are widely used automotive networks; they also appear along with CAN.

CLR-4 : Flexray protocol is a latest sophisticated protocol standard for use in automotive control networks.

CLR-5 : Automotive Ethernet is an emerging networking in automotive applications. As an upcoming field it is essential to know about it and acquire basic skills.

CLR-6 : Acquire knowledge of various communication media and protocols used in embedded systems



CLO-1 : Know and understand the CAN electrical, mechanical standards and signaling methods. 2 80 70 H - L - - - - - - - - - - - -

CLO-2 : Know and understand the CANopen protocol and will be able to analyze a typical application. 2 80 70 H - M - - - - - - - - - - -

CLO-3 : Know and understand the LINbus, MODBUS, and Profibus protocols and the software interfacing 2 80 70 H - M - - - - - - - - - - - -

CLO-4 : Know and understand the Flexray protocol, its application using software interfaces in “C”, study corresponding support hardware chips

2 80 70 H - M L - - - - - - - - - - -

CLO-5 : Know and understand the Automotive Ethernet, its specific EMI, EMC requirements as applied to automotive environment, study corresponding support hardware chips.

2 80 70 H - M L - - - - - - - - - - -

CLO-6 : Proficiency in using and designing embedded system communication software for protocols 2 80 70 H - M L - - - - - - - - - - -

Duration (hour)

CAN Fundamentals CAN bus and CAN open Module 2 Profibus, Linbus, and Modbus Flex Ray Protocol Automotive Ethernet

15 15 15 15 15

S-1 SLO-1 Introduction to CAN CANopen overview Profibus, network topologies Introduction to Flexray Intro to Automotive networking

SLO-2 Electrical properties CANopen overview Profibus, network topologies Bus architectures Intro to Automotive networking

S-2 SLO-1 CAN signaling and data rates

Communication requirements for embedded networking

Network configuration Protocol operation control context Electrical requirements

SLO-2 CAN signaling and data rates Communication requirements for embedded networking

Network configuration Operational overview Electrical requirements

S-3 SLO-1 CAN data frame format The object dictionary concept Active components Protocol operation control process Network layer protocols. TCP/IP, UDP

SLO-2 CAN data frame format The object dictionary concept Active components Protocol operation control process Network layer protocols. TCP/IP, UDP

S 4-5

SLO-1 Practices: implemented for DS406 compliant encoders. Encoder input entries

Practice session:Using communication application

Practice session: Network config and components

Practice session in any protocol Practice session: TCP, IP, UDP SLO-2

S-6 SLO-1 Collision and arbitration Communication entries Passive components: connectors, Behavior during normal operation Ports and sockets


cables, etc.

SLO-2 Design examples SDO and PDO Testing of profi bus Coding and decoding Ports and sockets

S-7 SLO-1 Error handling SDO and PDO LIN bus basics Coding and decoding Ports and sockets

SLO-2 Error state diagram PDO linking LIN bus basics Flex ray Payload Ports and sockets

S-8 SLO-1

CAN controller block diagram and working

Identifying objects COB-ID LIN bus protocol; master slave configuration

Wakeup and startup Audio, video bridging

SLO-2 CAN controller block diagram and working

EDS and DCF LIN bus protocol; master slave configuration

Wakeup and startup Audio, video bridging

S 9-10

SLO-1 Practice session: CAN driver configurations

Practice session: SDO, PDO, EDS Practice session in Bus Protocol Practice session: Alarm based program Practice session: Ports SLO-2

S-11 SLO-1 Software for CAN controller interfacing PDO communication Basics of MODBUS Clock synchronization

Audio/Video transport protocol - IEEE1722

SLO-2 Software for CAN controller interfacing PDO communication Basics of MODBUS Clock synchronization Audio/Video transport protocol

S-12 SLO-1 CAN development tools SDO communication MODBUS protocol Controller host interface Measurement, calibration, diagnostics

SLO-2 CAN development tools SDO communication MODBUS protocol Controller host interface Measurement, calibration, diagnostics

S-13 SLO-1

Demonstration of a typical CAN connection

Network management and safety critical features

MODBUS application System parameters Case studies

SLO-2 Demonstration of a typical CAN connection

Network management and safety critical features

MODBUS application System parameters Case studies

S 14-15

SLO-1 Practice session: Transmit a message using CAN

Practice session: Network Management and safety

Practice session in MODBUS Practice session: Parameters and Controller host

Practice session: Transport protocols SLO-2

Learning Resources

1. Olaf Pfeiffer, Andrew Ayre and Christian Keydel, “Embedded networking with CAN and

CANopen”, Copperhill Technologies Corporation, 2008.

2. Reference: www.can-cia.org”

3. SGS-Thompson, “Lin Application note AN1278”, SGS - Thompson Ltd. 2002.

4. Modbus-IDA, “MODBUS application protocol specification”, Modbus-IDA, 2006

5. Siemens, “Profibus network manual”, Simens manual, 2009.

6. Xiu Ji, “Profibus in practice: System Architecture and Design”, CRC press, 2015.

7. Flex Ray Consortium, “FlexRay Communication system: Protocol specifications”, FlexRay

Consortium, 2010.

http://www.can-cia.org/


Learning Assessment

Bloom’s

Level of Thinking




Level 1 Remember

15 15 15 15 15 15 15 15 Understand

Level 2 Apply

20 20 20 20 20 20 20 20 Analyze

Level 3 Evaluate

15 15 15 15 15 15 15 15 Create

Total 100 % 100 % 100 % 100 %


Course Designers


1. Mr. Anuj Kumar, Bombardier Transportation, Ahmedabad, [email protected] 1. Dr. Meenakshi, Professor of ECE, CEG, Anna University, [email protected] 1. Mr. Nivash Shanmugam, SRMIST

2. Mr. Hariharasudhan - Johnson Controls, Pune, [email protected] 2. Dr. Venkatesan, Sr. Scientist, NIOT, Chennai, [email protected] 2. Prof. V.Natarajan, SRMIST






Course Code

20ECE505T Course Name

IoT SYSTEM DESIGN Course

Category E Professional Elective Course

L T P C

3 1 0 4


20ECC501J Embedded Operating Systems

Co-requisite Courses

Nil Progressive

Courses Nil




Learning


CLR-1 : understand the concepts of Internet of Things and can able to build IoT applications 1 2 3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

CLR-2 : understand the concepts of Internet of Things architecture

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CLR-3 : Gain knowledge in IoT system design and networking Using ARM

CLR-4 : Understanding the importance of IoT system communication technologies

CLR-5 : Understand the various IoT system design methodologies

CLR-6 : Gain hands-on-experience to put theoretical concepts learned in the course to practice



CLO-1 : Acquire the knowledge of IoT device architecture and M2M concepts 2 80 70 H H - - H - - - - - - - H - -

CLO-2 : Elucidate and design the various IoT model 2 80 70 H H - - H - - - - - - - - - -

CLO-3 : Emphasize the operation of Microcontroller and ARM Processor 1 80 70 H - - - H H - - - H - - - - -

CLO-4 : Classify and comprehend the working principle of IoT enabling technologies and communication protocols 2 80 70 H - - - H H - - - H - H - - -

CLO-5 : Work on various IoT case studies for prototype development 2 80 70 H - H - H H - - - - - - H - -

CLO-6 : Analyze and study IoT design system using ARM based and ARM Mbed processor 1,2,3 80 70 H H H - H - - - - - - - H - -

Duration (hour)

IoT Device Architecture Overview IoT State-Of-The-Art & Reference

Architecture IoT System Design And Networking

Using ARM IoT System Key Enabling

Technologies IoT Specifications and Case Studies

12 12 12 12 12

S-1 SLO-1 IoT device architecture fundamentals IoT state-of-the-art architecture IoT system design and networking IoT system technologies Design Methodology

SLO-2 M2M to IoT introduction IoTreference architecture Microcontrollers and Microprocessors Transmission frequency for IoT Wireless Sensors

Purpose and Requirements specification

S-2 SLO-1 M2M to IoT introduction

European Telecommunications Standards InstituteM2M/oneM2M

ARM Processor Architecture IoT Wireless sensor Network Platfrom Process Specification

SLO-2 Applications of IoT ETSI M2M high-level architecture The Arm Mbed Systems introduction Sensors and actuators Domain model

S-3 SLO-1 Building an IoT System Architecture ETSI M2M interfaces NXP LPC1768 Communications: RFID and NFC Information model-Service Specification

SLO-2 Main design principles and needed capabilities

International Telecommunication Union Telecommunication sector view

NXP LPC11U24 RFID and Near-field communication (NFC)

Level Specification

S-4 SLO-1 An IoT architecture outline Reference model and architecture BBC Micro:bit Bluetooth Low Energy(BLE) Functional view Specification

SLO-2 Standards Consideration IoT reference model

The ARM Mbed Ethernet Internet of Things (IoT) Starter Kit

Light-Fidelity (Li-Fi) Operational View

S-5 SLO-1 M2M and IoT Technology Fundamentals IoT domain model

ArmMbedDevelopment IPv6 over Low -Power Wireless Personal Area Networks (6LoWPAN )

Device Component integration


SLO-2 Classification of IoTDevices and gateways

Functional Model Hardware and Software Development Tool Chain

ZigBee Network Python Data Types & Data structures

S-6 SLO-1 Local and wide area networking Communication model

Editor, Compile, Download, Run the Program Inputs and Outputs

Z-Wave for home automation application

Modules

SLO-2 Data management Safety, privacy, trust, security model Networking and Communications LoRa Technology Packages

S-7 SLO-1 Business processes in IoT Safety, privacy, trust, security model Ethernet Web Socket File Handling

SLO-2 Everything as a Service (XaaS) Functional view Ethernet Web Client MQTT Protocol Classes

S-8

SLO-1 Everything as a Service (XaaS) Functional view Ethernet Web Server CoAP Protocol Python Packages of Internet for IoT

SLO-2 M2M and IoT Analytics Information view TCP Socket and UDP Socket XMPP Protocol Case Study 1: IoT for Smart Grid Applications – Smart Metering

S-9 SLO-1 M2M and IoT Analytics Protocols Concepts TCP Socket and UDP Socket NODE RED Smart House and Smart Energy

SLO-2 Knowledge Management IoT-Oriented Protocols WebSocket Applications of IoT protocols Case Study 2: Building Automation

S-10 SLO-1 Knowledge Management IoT-Oriented Protocols Wi-Fi IoT Project Concepts

Central parts and technology overview of BAS

SLO-2 Technical Design Constraints Databases Temperature Monitoring over the Internet

Cloud Example with IBM Watson Bluemix

Case Study 3: Smart Cities

S-11 SLO-1 Data Representation and Visualization IoT Security Smart Lighting

Add IBM Watson IoT Service to Application

Roles, Actors and engagement

SLO-2 Interaction and remote control IoT Devices – Design space, cost and power consumption

Voice‐Controlled Door Access Adding Credentials onto Mbed Device Transport and logistics

S-12 SLO-1 Asset management Platform and prototype design Analog and digital input/outputs

Link IBM IoT Watson Application to Mbed Device

Case Study 4: IoT for Weather Monitoring System

SLO-2 Asset management Application and challenges in architecture design

Analog and digital input/outputs Sending Commands from IBM IoT Watson Application to Mbed Board

Weather Monitoring System

Learning Resources

1. Jan Holler et al. “From Machine-to-Machine to the Internet of Things Introduction to a New Age of Intelligence”, Academic Press Publications, Elsevier, 2014.

2. DimitriosSerpanos, Marilyn Wolf “Internet-of-Things (IoT) Systems Architectures, Algorithms, Methodologies”, Springer International Publishing AG, 2018.

3. Perry Xiao, “Designing Embedded Systems and the Internet of Things (IoT) with the ARMMbed”, John Wiley & Sons Ltd, 2018.

4. ArshdeepBahga, Vijay Madisetti, “Internet of Things: A hands-on approach”, Published by ArshdeepBahga, and Vijay Madisetti, 2014.

5. Buyya, Rajkumar, and Amir VahidDastjerdi, “Internet of Things: Principles and paradigms”, Morgan Kaufmann Elsevier, 2016.


Learning Assessment

Bloom’s

Level of Thinking


CLA-1(20%) CLA-2(25%) CLA-3# (15%)


Level 1 Remember

30 - 30 - 30 - 30 - Understand

Level 2 Apply

40 - 40 - 40 - 40 - Analyze

Level 3 Evaluate

30 - 30 - 30 - 30 - Create

Total 100 % 100 % 100 % 100 %


Course Designers


1. Mr. Anuj Kumar, Bombardier Transportation, Ahmedabad, [email protected] 1. Dr. Meenakshi, Professor of ECE, CEG, Anna University, [email protected] 1. Dr.K.Kalimuthu, SRMIST

2. Mr. Hariharasudhan - Johnson Controls, Pune, [email protected] 2. Dr. Venkatesan, Sr. Scientist, NIOT, Chennai, [email protected] 2. Dr.P.Eswaran, SRMIST






Course Code


IoT SENSOR NODES WITH AI Course


L T P C

3 1 0 4

Pre-requisite Courses 20ECE502J : Artificial Intelligence with machine vision

Co-requisite Courses NIL Progressive

Courses NIL




CLR-1 : Introduce the Artificial Intelligence and it’s Algorithms 1 2 3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

CLR-2 : Introduce the Machine Learning and Deep learning aspects and it’s Architectures

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CLR-3 : Introduce the IOT aspects and it’s Architectures

CLR-4 : Conceptualize the need for IOT

CLR-5 : Acquire knowledge on sensor nodes and Data acquisition in IOT systems

CLR-6 : Understand and apply IOT to Varied fields



CLO-1 : Appreciate the uses of Artificial Intelligence 2 80 70 H H - - - - - - - - - - - - -

CLO-2 : Understand the Machine Learning & Deep Learning Architectures 1 80 70 L - H - - - - - - - - - - - -

CLO-3 : Understand the IOT Architectures 1 80 70 L - H - H M - - - - - - - - -

CLO-4 : Implement IOT using hardware platform 2 80 70 - - - H - - - - - - - - - - -

CLO-5 : Appreciate the applications of IOT for day to day life activities 3 80 70 - H - - H M - - - - - - - - -

CLO-6 : Gain Knowledge on available software and hardware employed to build an IOT system 2 80 70 - - H H - - - - - - - - - - -

Duration (hour) Introduction to Artificial Intelligence

(12 Hrs) Machine Learning and Deep Learning

Algorithms (12 Hrs) Introduction to Internet of things

(12 Hrs) IoT Hardware and Software

(12 Hrs) Sensor Nodes, Data acquisition,

and Processing (12 Hrs)

S-1

SLO-1 Introduction to Artificial Intelligence History of Machine Learning Learning Introduction to IOT Implementation tools for IoT Need for Sensors and Sensor nodes

SLO-2 Need for Artificial Intelligence History of Deep Learning Need for IOT Hardware for IoT Introduction to Sensor nodes

S-2

SLO-1 Human Brain and Artificial Intelligence McCulloch Pitts Neuron Sensing Arduino - Basics Sensors used in IoT

SLO-2 Difference between machine learning and artificial intelligence

Thresholding Logic Actuation Programming using Arduino Position / Pressure Sensors

S-3 SLO-1 History of Artificial Intelligence Perceptrons Communication Protocols Raspberry Pi - Basics Proximity and Motion Sensors

SLO-2 Advantages of Artificial Intelligence Perceptron Learning Algorithm Need for Communication Protocols Programming using Raspberry Pi Velocity / Displacement Sensors

S-4 SLO-1 Turing Test Multilayer Perceptrons (MLPs) Sensor Networks ESP8266 - Basics

Temperature and Humidity Sensors

SLO-2 Physical Symbol Systems Representation Power of MLPs Machine-to-Machine Communications Programming using ESP8266 Chemical / Gas sensors

S-5

SLO-1 Scope of Symbolic AI Sigmoid Neurons Interoperability in IoT Introduction of Beagle Board

IoT based Intelligent Traffic Management System

https://www.pantechsolutions.net/iot-projects/iot-based-intelligent-traffic-management-system

https://www.pantechsolutions.net/iot-projects/iot-based-intelligent-traffic-management-system


SLO-2 Scope of Agents Gradient Descent Introduction to Arduino Programming Beagleboard - Single Board Computer IoT based Humidity Monitoring

S-6 SLO-1 State Space Search Feedforward Neural Networks Integration of Sensors with Arduino Basic Programming IoT based Temperature Monitoring

SLO-2 Depth First Search Feed Forward Neural Networks Integration of Actuators with Arduino Study of BeagleBoard-xM Development Board

IoT based Smart Parking System Using RFID

S-7 SLO-1 Heuristic Search Backpropagation Algorithm Applications of IOT- Case Studies

Programming using Beagleboard

Industrial Applications

SLO-2 Best First Search Implementation of BPN Industrial Applications Sofware for IoT IOT for Machine vision

S-8 SLO-1 Hill Climbing Principal Component Analysis Infrastructure Applications MqTT Protocol Data acquisition Procedure

SLO-2 Beam Search PCA- interpretations Case Study Usage of MqTT Protocol Data acquisition through connected IoT sensor nodes

S-9 SLO-1 Expert Systems Singular Value Decomposition Military Applications REST APIs Arduino as sensor nodes

SLO-2 Rule Based Expert Systems SVD- Interpretations Case Study Usage of REST APIs Application using Arduino as sensor nodes

S-10 SLO-1 Inference Engine Convolutional Neural Networks Weather Reporting system Cloud Services for IoT Raspberry Pi as sensor nodes

SLO-2 Rete Algorithm Architecture of LeNet, IoT Weather Reporting system using Raspberry pi

Need for Cloud server Application using Raspberry Pi as sensor nodes

S- 11 SLO-1 Plan Space Planning AlexNet, ZF-Net Architectures Irrigation System Arduino Programming

Data processing On Cloud platforms

SLO-2 Algorithm for Plan Space Planning Architecture of VGGNet, Smart Irrigation System Using IoT Case Study Case Study

S- 12

SLO-1 Graph plan GoogLeNet Architecture Water Quality Management System (WQMS)

Raspberry Pi Programming Data processing On edge hardware

SLO-2 Algorithm Graph plan Architecture of ResNet IoT based (WQMS) system using Arduino

Case Study Case Study

Learning Resources

1. Dr. Guillaume Girardin , Antoine Bonnabel, Dr. Eric Mounier, 'Technologies & Sensors for the Internet of Things Businesses & Market Trends 2014 - 2024',Yole Développement Copyrights, First Edition, 2014.

2. AurélienGéron, “Hands-On Machine Learning with Scikit-Learn, Keras, and TensorFlow: Concepts, Tools, and Techniques to Build Intelligent Systems”, Second Edition, O’reillyMedia, Inc., First Edition, 2019.

3. David Forsyth and Jean Ponce, “Computer Vision: A Modern Approach”, Pearson Education Limited, Second Edition, 2015

4. Peter Waher, “Learning Internet of Things”, Packt Pub, UK, First Edition, 2015. 5. Adrian McEwen and Hakim Cassimally, “Designing the Internet of Things”, John Wiley & Sons,

2014 6. https://nptel.ac.in/content/syllabus_pdf/106105166.pdf


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https://www.pantechsolutions.net/iot-projects/iot-based-smart-parking-system-using-rfid

https://www.pantechsolutions.net/iot-projects/iot-based-smart-parking-system-using-rfid

https://www.pantechsolutions.net/iot-projects/iot-weather-reporting-system-using-raspberry-pi



https://www.pantechsolutions.net/smart-irrigation-system-using-iot-and-cloud

https://www.pantechsolutions.net/iot-based-water-quality-management-system-using-arduino

https://www.pantechsolutions.net/iot-based-water-quality-management-system-using-arduino

https://www.amazon.com/Aur%C3%A9lien-G%C3%A9ron/e/B004MOO740/ref=dp_byline_cont_book_1

https://nptel.ac.in/content/syllabus_pdf/106105166.pdf


Learning Assessment

Bloom’s

Level of Thinking


CLA-1 (20%)

CLA-2 (25%)

CLA-3# (15%)


Level 1 Remember

30 - 30 - 30 - 30 - Understand

Level 2 Apply

40 - 40 - 40 - 40 - Analyze

Level 3 Evaluate

30 - 30 - 30 - 30 - Create

Total 100 % 100 % 100 % 100 %

Course Designers


1. Mr. Anuj Kumar, Bombardier Transportation, Ahmedabad, [email protected] 1. Dr. Meenakshi, Professor of ECE, CEG, Anna University, [email protected] 1. Dr. S. Dhanalakshmi, SRMIST







Course Code


EMBEDDED SYSTEM DESIGN AND STANDARDS Course


L T P C

3 1 0 4


Nil Co-requisite

Courses Nil

Progressive Courses

20ECE505T IoT system design


Course Learning Rationale (CLR): The purpose of learning this course is to:

Learning


CLR-1 : Learn about comprehensive overview of embedded hardware 1 2 3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

CLR-2 : Impart knowledge about computer architecture principles and on-chip bus interfaces

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CLR-3 : To comprehend on-board bus interfacing and protocol standards in embedded system design

CLR-4 : To impart knowledge on RTOS features and process management concepts

CLR-5 : Acquire the knowledge of device driver programming

CLR-6 : To emphasize hands-on knowledge on using Open MP tools


CLO-1 : Experiment ARM processor and Cortex-M3 MCU internal components 2 80 70 H - - - L - - - - - - - H - -

CLO-2 : Understand multiprocessor cache mapping techniques, cache coherence and memory consistency models 2 80 70 H - - - M - - - - - - - - - -

CLO-3 : Realize on-board bus interfacing and wired bus standards 2 80 70 H M - - H - - - - - - - H - -

CLO-4 : Comprehend the RTOS process management models 2 80 70 H - - - - - - - - - - - L - -

CLO-5 : Interpret the embedded device driver programming 2 80 70 H - - - H - - - - - - - M - -

CLO-6 : Proficiency in Embedded hardware interfacing and protocols standards. 2 80 70 H M - - H - - - - - - - H - -

Duration (hour)

Embedded Hardware Overview (12) Computer Architecture and Bus

Interfacing (12) Bus Interfacing and Protocol

Standards (12) Process Management (12) Device Driver Programming (12)

S-1 SLO-1 ARM Architecture and Programming

Memories: Cache memory architecture and organization

Interfacing: Time-multiplexed data transfer, Two protocol control methods

RTOS: Tasks and task states, Task Scheduling in RTOS

Introduction to Linux Kernel and Porting

SLO-2 ARM Processor Modes, ARM CPU Register

Memory hierarchy and cache Strobe/handshake compromise Priority Inversion, Priority Ceiling, Priority Inheritance

The Boot Process, Role of device Driver

S-2 SLO-1 Instruction Pipeline, Instr. Scheduling Memory Management Unit

Interfacing with a general-purpose processor

Shared-Data Problem Classes of Device and Modules

SLO-2 Interrupts and Exceptions Processing Address Translation Mechanism Interfacing with a general-purpose processor

Interrupt Latency, Multitasking Classes of Device and Modules

S-3 SLO-1 ARM Instruction set Cache mapping techniques

Interrupts: Interrupt-driven I/O using fixed

Multitasking Module Basics

SLO-2 Thumb Instruction set Direct mapping Cache Technique vectored interrupts processing Context Switching Steps to write the module

S-4 SLO-1 Cortex-M3 Architecture Fully-associative Cache Technique

Direct memory access: Peripheral to memory transfer with DMA.

Semaphores Implementing System Calls

SLO-2 Introduction to LPC1343 Set-associative mapping Technique Memory access without DMA Semaphores System Call functions

S-5 SLO-1 ARM Assembly language Programming

Understanding Load Operations in assembly level programming

Introduction to Embedded C Prog. Serial Port Task priority

SLO-2 ARM Assembly language Programming I/O Port Handling Serial Port Programming in assembly language

Tasking dependencies

S-6 SLO-1 Data Transfer Operations Understanding Store Operations in Parallel I/O Programming Serial Port Programming in High level Task Scheduling


SLO-2 Arithmetic Operations assembly level programming

Running LEDs using Program language

Task context, stack and control blocks

S-7 SLO-1 GPIO Programming Cache replacement policy

Arbitration: Arbitration using priority arbiter

Applications of Semaphores Kernel Debugging

SLO-2 Serial Port and Interrupt Programming Cache write techniques Daisy-chain configuration Semaphore synchronization mechanisms

OS Debugging functions

S-8 SLO-1 Timers Programming Cache trashing mechanism Standards: UART Applications of Semaphores Block Device Driver

SLO-2 Device Interfacing: Memory Interfacing Advanced Microcontroller Bus Architecture Standard: AHB and APB

Serial Peripheral Interface Process Communication Network Device Driver

S-9 SLO-1 Device Interfacing Peripheral Bus Interfacing SPI Operations and Interfacing Process handling in OS Network Device Driver

SLO-2 Memory Mapped IO AHB and APB signals and operations Universal Serial Bus Uniprocessor Embedded System Kernel USB Driver

S-10 SLO-1 Controller based I/O Design of bus infrastructure components Universal Serial Bus interfacing

Multi-processor Embedded System basics

USB Driver OS handling

SLO-2 ARM Assembler, Linker Scripts, Loading Designing Simple APB Peripherals Inter-Integrated Circuits operation Introduction to OpenMP Multitasking in OS

S-11 SLO-1 Branch Operations Physical and logical cache Inter-Integrated Circuits interfacing Introduction to OpenMP Multitasking OpenMP

SLO-2 Branch and Conditional Execution Operations

Stack handling in microprocessors IEEE 802.11 Wi-Fi Standard Tasking: The task and task stack access Linux Kernel module level programming

S-12 SLO-1 Function handling and arguments Stack Operations IEEE 802.15 Bluetooth Protocol task-wait Constructs Device drivers: Case Study

SLO-2 Reg. allocation, Instr. Scheduling Software Interrupt Handling Bluetooth Protocol Architecture Exceptions and Interrupts Device drivers: Case Study

Learning Resources

1. Vahid, Frank and Givargis, Tony, “Embedded system design: a unified hardware/software introduction”, Vol. 52, 2002, Wiley New York.

2. Xiao, Perry, “Designing Embedded Systems and the Internet of Things (IoT) with the ARM mbed”, 2018, Wiley Online Library.

3. Wang, “Embedded and Real-Time Operating Systems”, Pages 401-475, Springer, 2017. 4. Mahout, Vincent, “Assembly language programming: ARM Cortex-M3,2013, John Wiley & Sons. 5. Thomas Rauber, GudulaRunger, “Parallel Programming For Multicore and Cluster Systems”, Springer

Publications, 2010.

Learning Assessment

Bloom’s

Level of Thinking


CLA-1(20%) CLA-2(25%) CLA-3# (15%)


Level 1 Remember

30 - 30 - 30 - 30 - Understand

Level 2 Apply

40 - 40 - 40 - 40 - Analyze

Level 3 Evaluate

30 - 30 - 30 - 30 - Create

Total 100 % 100 % 100 % 100 %


Course Designers


1. Mr. Anuj Kumar, Bombardier Transportation, Ahmedabad, [email protected] 1. Dr. Meenakshi, Professor of ECE, CEG, Anna University, [email protected] 1. Mr.K.Ramesh, SRMIST

2. Mr. Hariharasudhan - Johnson Controls, Pune, [email protected] 2. Dr. Venkatesan, Sr. Scientist, NIOT, Chennai, [email protected] 2. Dr.K.Kalimuthu, SRMIST






Course Code


AUTOMOTIVE EMBEDDED SYSTEMS Course


L T P C

3 1 0 4


Nil Co-requisite

Courses Nil

Progressive Courses

Nil




Learning


CLR-1 : Learn automotive embedded systems basic concepts 1 2 3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

CLR-2 : Understand embedded systems design for Automotive applications

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CLR-3 : Design optimal embedded communication models

CLR-4 : Understand the basics dependable automotive networks

CLR-5 : Develop software for automotive embedded systems

CLR-6 : Gain the knowledge forverification and testing of automotive embedded systems



CLO-1 : Know and understand the basics of automotive embedded systems 2 80 70 H - - - - - - - - - - - - - -

CLO-2 : Able to design different system embedded systems design for automotive applications 2 85 75 H - - M M - - - - - - - - - -

CLO-3 : Design optimal embedded communication models 2 75 70 H - - - - - - - - - - - - - -

CLO-4 : Know and understand the dependable automotive networks 2 85 80 - H L - - - - - - - - - - - -

CLO-5 : Design and develop different software for automotive embedded systems 2 85 75 - H L - - - - - - - - - - - -

CLO-6 : Know different verification and testing techniques for automotive embedded systems 2 80 70 H - - H - - - - - - - - - - -

Duration (hour)

Automotive Architectures Embedded Communications Dependable AutomotiveCAN

Networks Embedded Software and Development Processes

Verification and Testing

12 12 12 12 12

S-1

SLO-1 Introduction and General Context Characteristics and Constraints Main Requirements of Automotive Networking

Basic Concepts, Characteristics and Needs of AE

Dynamic Testing

SLO-2 Power Train Domain, Chassis Domain, Body Domain, Multimedia

From Point-to-Point to Multiplexed Communications, Car Domains and Evolution

Networking Technologies, CAN Features and Limitations

Software Product Lines Current Practice

S-2 SLO-1

Telematic, HMI, Active/Passive Safety, Diagnostic

Different Networks for Different Requirements

Management of Transient Channel Faults in CAN

Feature Modeling as a Form of Variability Modeling

Structuring the Testing Process,

SLO-2 In-Vehicle Networks and Protocols, Operating Systems

Event-Triggered versus Time-Triggered

Impairments to Data Consistency And Solutions to Data CAN

Phase-Lead Controller Design Using Root Locus

Model versus Code-Based Testing

S-3 SLO-1

Middleware Architecture Description Languages for Automotive Applications

In-Car Embedded Networks CANcentrate and ReCANcentrate Basics

Feature Modeling for Automotive Domain

Test activities

SLO-2 Certification Issue of Safety-Critical In-Vehicle

Installation and Maintenance CANELy Coordination of Small- to Medium-Sized Product Lines

Test activities

S-4

SLO-1 Main Objectives of AUTOSAR, Working Methods

Low-Cost Automotive Networks FTT System Architecture Difficulties Related to Artifact-Local Variability

Functional Test Design

SLO-2 AUTOSAR Concept, Layered Software Architecture

Rationale for a Middleware Dual-Phase, Elementary Cycle, SRDB, Main Temporal Parameters within the EC

Representing Variability in ECU Functional Test Design

S-5 SLO-1 BSW and RTE Open Issues for Automotive Fault-Tolerance Features Reuse of Software Structural Test Design


Communication Systems

SLO-2 Description of the Methodology, AUTOSAR Models

Optimized Networking Architectures System Engineering

Accessing the Communication Services

Requirements for the Reuse of Software

Structural Test Design

S-6 SLO-1 Templates and Exchange Format

Event-Driven versus Time-Driven Communication

Control System Transactions Development of Modularized Automotive Software Components

Exemplary Test Execution Techniques for Automotive Control Software

SLO-2 Congestion Problem, Energy and Emissions

Objectives of FlexRay History of FlexRay

Control System Transactions Systems with Time Delays – Smith Predictor

Exemplary Test Execution Techniques for Automotive Control Software

S-7 SLO-1

Wireless Network Technologies, Intelligent Control Applications

Frame Format, Communication Cycle, Static Segment, Dynamic Segment

FlexCAN Architecture Function Repository Exemplary Test Evaluation Techniques for Automotive Control Software

SLO-2 Latest Driving Assistance Protocol Architecture, Protocol Wakeup and Startup

FlexCAN Architecture Function Repository Exemplary Test Evaluation Techniques for Automotive Control Software

S-8

SLO-1 Fail-Safe Automotive Transportation Systems

Protocol Architecture, FlexCAN Applications Development of an In-Vehicle Embedded System

Exemplary Test Evaluation Techniques for Automotive Control Software


Protocol Wakeup and Startup FlexCAN Applications Development of an In-Vehicle Embedded System

Exemplary Test Evaluation Techniques for Automotive Control Software

S-9 SLO-1 Intelligent Auto-diagnostic Protocol Architecture, TTCAN,Fault-Tolerant Time-Triggered,

Development Organization and Information Exchange

Test planning

SLO-2 Intelligent Auto-diagnostic Protocol Wakeup and Startup Communication Using CAN Development Organization and Information Exchange

Test planning

S-10 SLO-1

Fail-Safe Automotive Transportation Systems

Clock Synchronization TCAN Quality, Safety, and Reuse of Product Line Architectures,

Testing in a model-based development process


Fault-Tolerance Mechanisms TCAN Analysis Synthesis and Prototyping Testing in a model-based development process

S-11 SLO-1 Intelligent Auto-diagnostic FlexRay Implementation ServerCAN General Aspects on an Automotive ADL Test planning

SLO-2 Intelligent Auto-diagnostic Impact on Development

ServerCAN General Aspects on an Automotive ADL Test planning

S-12 SLO-1

Automated Road Vehicles and Road Network

Verification of FlexRay Fault-Tolerant Clock SysML, Architecture and Analysis Description Language

Selection of test object

SLO-2 Automated Road Management andDeployment Paths

Verification of FlexRay Synchronization Over CAN SysML, Architecture and Analysis Description Language

Selection of test object

Learning Resources

1. Nicolas Navet, Francoise Simonot-Lion, 'Automotive embedded systems handbook', CRC press.

Learning Assessment

Bloom’s

Level of Thinking


CLA-1(20%) CLA-2(25%) CLA-3# (15%)


Level 1 Remember

30 - 30 - 30 - 30 - Understand

Level 2 Apply

40 - 40 - 40 - 40 - Analyze

Level 3 Evaluate

30 - 30 - 30 - 30 - Create

Total 100 % 100 % 100 % 100 %



Course Designers


1. Mr. Anuj Kumar, Bombardier Transportation, Ahmedabad, [email protected] 1. Dr. Meenakshi, Professor of ECE, CEG, Anna University, [email protected] 1. Dr. ChittaranjanNayak, SRMIST

2. Mr. Hariharasudhan - Johnson Controls, Pune, [email protected] 2. Dr. Venkatesan, Sr. Scientist, NIOT, Chennai, [email protected] 2. Dr. Bandaru Ramakrishna, SRMIST






Course Code


DYNAMIC RECONFIGURABLE SYSTEM DESIGN Course


L T P C

3 0 2 4


Nil Co-requisite

Courses Nil

Progressive Courses

Nil




Learning


CLR-1 : Learn the basics of reconfigurable architectures 1 2 3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

CLR-2 : Understand the design flow of FPGA

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CLR-3 : Model a high level synthesis and temporal partitioning

CLR-4 : Understand the placement for reconfigurable logic

CLR-5 : Design a partial reconfigurable logic in FPGA

CLR-6 : Acquire knowledge on reconfigurable architectures and FPGA implementation



CLO-1 : Understand the fundamentals of a reconfigurable architecture using FPGA 2 80 70 M - - - - - - - - - - - M - -

CLO-2 : To design application processing unit with Zync family of FPGAs 2 80 70 - - - - - H - - - M - - H - -

CLO-3 : To optimize the FPGA resources with temporal portioning for RC logic 2 80 70 M - H- - H - - - - - - - H - -

CLO-4 : To handle various placement methods to occupy RC logic 2 80 70 M - M - H M - - - - - - M - -

CLO-5 : Design a dynamic RC unit with partial reconfiguration bit streams 2 80 70 - - M - H H - - - - - - H - -

CLO-6 : Proficiency in FPGA architectures and implementation procedures 2 80 70 M - M - H H - - - M - - H - -

Duration (hour)

Basics of Reconfigurable Computing Design Flow High level synthesis Placement Partial reconfiguration

15 15 15 15 15

S-1 SLO-1 Overview of reconfigurable computing FPGA families Data flow graph Introduction to temporal placement Introduction – to partial reconfiguration

SLO-2 RC model Zync board Sequence graph Basic rules of placement Terminology

S-2 SLO-1 FPGA basic architecture Application processing unit- FSM datapath Offline temporal placement Design Considerations

SLO-2 Specialized blocks Central processing unit Transformation of a sequence to FSM First fit approach Criteria for Design

S-3 SLO-1 Fine grained FPGA Programmable logic description Datapath model -Example Best fit approach PR flow

SLO-2 Programming architecture Features FSMD - Example Placement of clusters Metrics for PR

S 4-5

SLO-1 Lab 1: Introduction to digital design using FPGAs & Introduction to simulation and synthesis - Vivado software and Xilinx introduction and Tutorials

Lab 4: Simple sequential circuit design and Clocking logic - Flip flop design and Conversion of flip flops

Lab 7: Introduction to logic synthesis and Synthesis steps – Tutorials - Netlist of combinational and sequential circuits

Lab 10: Understanding JTAG and BIST for FPGA - Design a static portion for FPGA and Analyzing static portions

Lab 13: Partial Reconfiguration Tool Flow and Partial Reconfiguration Project Flow – Floor-planning the PR

SLO-2

S-6 SLO-1 Coarse grained Configurable logic blocks-

Fundamentals of HLS on reconfigurable designs

Packaging approach for placement Partial Reconfiguration IP

SLO-2 Programming architecture Slices and LUT HLS graph model Packaging classes Static and partial interfaces


S-7 SLO-1 Parallel processing for RC BRAM Temporal partitioning Packaging class orientation Partition Boundaries

SLO-2 Instruction level parallelism DSP blocks Schedule and ordering relation Strip packing algorithm Defining reconfigurable boundaries

S-8 SLO-1 Task level parallelism RT /Logic Synthesis -Controller Ordered partitions Online temporal placement Floor planning rules for PR

SLO-2 Comparison Data path synthesis Configuration graph Placement rules Global clocking for PR

S 9-10

SLO-1 Lab 2: Simple combinational circuit

design and Subtractor –Design - Adder

–Design and 2 bit multiplier

Lab 5: Basic synchronous counter – Design and Counter with clock and reset

Lab 8: Deriving critical path and Estimating path delay- Analyzing RTL and technology schematic of combinational and sequential circuits

Lab 11: Slicing of FPGA area and Optimization algorithms- Routing of static portions and Optimization algorithms

Lab-14:PR Controller in a PR Design and PR Timing Analysis and Constraints and PR in Embedded Systems SLO-2

S-11 SLO-1 Reconfigurable logic coprocessor FPGA Physical Design Tools Temporal partitioning algorithms Managing free space Design considerations

SLO-2 Integration into traditional systems Technology mapping Unconstraint schedule Overlapping region Auto adjustment principles

S-12 SLO-1 Programming for FPGA Placement & routing ASAP -Schedule Non over lapping region Guidelines for Xilinx devices

SLO-2 VHDL basics Register transfer ALAP- Schedule Differences I/O rules

S-13 SLO-1 Programming attributes of VHDL Configuration bit stream- List schedule Managing occupied space Configuring the device

SLO-2 Programming attributes of VHDL Bit stream structure Force directed list schedule Pseudocode Bit stream downloading

S 14-15

SLO-1 Lab 3: Conversion of codes and Excess-3 code generator, Magnitude comparator, 2 bit and 3 bit version

Lab 6: Asynchronous counter and 4 bit and 8 bit versions, Test bench Generation

Lab 9: Floor plan of circuits and Placement of circuits, Routing, Configuring bit stream

Lab 12: Organizing combinational circuits in static region and Generation of bit streams and Configuring bit streams

Lab 15: Debugging PR Designs and Recommendations

SLO-2

Learning Resources

1. Paul S. Graham and Maya Gokhale “Reconfigurable Computing Accelerating Computation with Field-Programmable Gate Arrays”, Springer, 2005.

2. Vivado Design suite user guide – Partial reconfiguration.https://www.xilinx.com/support/documentation/sw_manuals/xilinx2018_1/ug909-vivado-partial-reconfiguration.pdf

3. Christophe Bobda, “Introduction to Reconfigurable Computing: Architectures, Algorithms and Applications,” Springer, 2007.

4. S. Hauck and A. DeHon, “Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation,” Ed., Elsevier, 2008.

5. Pao-Ann Hsiung, Marco D. Santambrogio, and Chun-Hsian Huang,“Reconfigurable System Design and Verification”, CRC Press, 2009.

Learning Assessment

Bloom’s

Level of Thinking


CLA-1(20%) CLA-2(25%) CLA-3# (15%)


Level 1 Remember

15 15 15 15 15 15 15 15 Understand

Level 2 Apply

20 20 20 20 20 20 20 20 Analyze

Level 3 Evaluate

15 15 15 15 15 15 15 15 Create

Total 100 % 100 % 100 % 100 %


https://www.xilinx.com/support/documentation/sw_manuals/xilinx2018_1/ug909-vivado-partial-reconfiguration.pdf

https://www.xilinx.com/support/documentation/sw_manuals/xilinx2018_1/ug909-vivado-partial-reconfiguration.pdf


Course Designers


1. Mr. Anuj Kumar, Bombardier Transportation, Ahmedabad, [email protected] 1. Dr. Meenakshi, Professor of ECE, CEG, Anna University, [email protected] 1. Dr.A.RuhanBevi, SRMIST







Course Code


SECURITY FOR EMBEDDED SYSTEMS Course


L T P C

3 1 0 4


Nil Co-requisite

Courses Nil

Progressive Courses

Nil




Learning


CLR-1 : To study and understand encryption techniques 1 2 3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

CLR-2 : To study and understand crypto protocols

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CLR-3 : To study and understand authentication, attacks

CLR-4 : To study building blocks of security and management engine

CLR-5 : To study Intel’s EPID technology

CLR-6 : To study various security techniques for embedded systems



CLO-1 : Acquire knowledge of encryption methods 1 80 70 H - - - - - - - - - - - - - -

CLO-2 : Understand and implement crypto protocols 2 80 70 H - - - - - - - - - - - - - -

CLO-3 : Understand authentication methods, attacks and implement counter measures 2 80 60 H - - - - - - - - - - - - - -

CLO-4 : Use security management engines 2 80 60 - H L - - - - - - - - - - - -

CLO-5 : Understand and use Intel’s TPM and EPID technology 2 80 70 - M - - - - - - - - - - - - -

CLO-6 : Understand security issues related to embedded systems and use Itnel’s TPM 2 80 70 - M - - - - - - - - - - - - -

Duration (hour)

12 12 12 12 12

S-1 SLO-1

Cryptography and side channel Terminology and definitions Authentication function Cyber security in the mobile age Privacy and EPID SLO-2

S-2 SLO-1 Types of attacks on embedded devices

Terminology and definitions The structure of authentication function Cyber security in the mobile age EPID verification SLO-2 RFID, Wireless cards, PDAs

S-3 SLO-1 Mobiles, ATMs, High level elliptic curve computations

SHA-2 Management engine Implementation of EPID

SLO-2 Automobiles, FPGA’s Double and add point multiplication Application of EPID

S-4 SLO-1

The Key, Randomness Left to right multiplication

Integrity trees Inband - out of band Boot Attack SLO-2 Montgomery ladder

S-5 SLO-1

Physically Unclonable functions Performance Improvements Theory of the side channel Boot process Jail Breaking SLO-2

S-6 SLO-1 Key lifetime, storage

The theory of cipher Side channel attacks in practice Virtual security code - ARM Trust zone TPM

SLO-2 Authentication and key types. Field programmable fuses

S-7 SLO-1

Trusted Platform Module Block cipher EM probe RNG and Key generation Boot methods SLO-2

S-8 SLO-1

NOC security DES, AES, TEA Sample analysis

Protecting memory Intel’s Platform Trust technology SLO-2 Differential analysis

S-9 SLO-1 Using keys Stream Cipher Correlation analysis Threat Analysis and mitigation DRM schemes


SLO-2 Shared keys

S-10 SLO-1 KDC

RC4, GRAIN etc Counter measures

Asset protection End to end content protection SLO-2 Needham–Schroeder S-Box masking

S-11 SLO-1

Public key approaches Authentication methods Counter measures for public key cryptography

Thread management Closed door model SLO-2

S-12 SLO-1

Mathematics of Crypto keys Embedded Implications Reliable testable systems Inter task call management OTP provisioning SLO-2

Learning Resources

1. Catherine H. Gebotys, “Security in embedded systems”, Springer, 2010. 2. XiaouRouan, “Platform embedded technology Revealed : Safeguarding the future of computing with Intel security and management engine”, Apress Open, 2014.

Learning Assessment

Bloom’s

Level of Thinking




Level 1 Remember

30 - 30 - 30 - 30 - Understand

Level 2 Apply

40 - 40 - 40 - 40 - Analyze

Level 3 Evaluate

30 - 30 - 30 - 30 - Create

Total 100 % 100 % 100 % 100 %


Course Designers


1. Mr. Anuj Kumar, Bombardier Transportation, Ahmedabad, [email protected] 1. Dr. Meenakshi, Professor of ECE, CEG, Anna University, [email protected] 1. Prof. V. Natarajan







Course Code

20ECC603T Course Name

MULTIPROCESSOR REAL TIME SYSTEMS Course


L T P C

3 1 0 4


Co-requisite

Courses

Progressive Courses




Learning


CLR-1 : Learn Real Time Systems Basic Concepts 1 2 3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

CLR-2 : Understand Real Time System Design For Embedded Applications

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CLR-3 : Design Optimal Real Time Models And Learn The Uncertainties

CLR-4 : Understand The Basic Real Time System Design And Implementation

CLR-5 : Develop Deep Understanding On Robust Control And Real Time Safety Procedures

CLR-6 : Gain Overall Understand Of The Real Time Systems For Industrial Applications



CLO-1 : Understand the architecture and communication networks of Real Time systems 2 80 70 H - H - - - - - - - - M H - -

CLO-2 : Design Multi Processor models for Real Time applications 2 85 75 H M H H - - - - - - - - - - -

CLO-3 : Implement different practical real time systems with minimal supervision 2 75 70 H - H M - - - - - - - - - H -

CLO-4 : Develop Deep Understanding on selection of hardware and software’s for designing systems 2 85 80 H H - - - - - - - H - H - - H

CLO-5 : Come up with cost effective, reliable, robust and feasible designs for real world problems 2 85 75 H - H - - - H H - - - - - - -

CLO-6 : Design and implement real time systems and address the problems and limitations 2 80 70 H - - H - H H H H - - - H - -

Duration (hour)

Real Time Systems – Basic Concepts Multiprocessors Real Time Operating Systems Real Time Unified Modeling

Language (UML) Future Visions on Real Time Systems

12 12 12 12 12

S-1 SLO-1 Definitions For Real-Time Systems, Introduction To Micro Processors Operating System Pseudo Kernels Real Time Uml Profile Real Time Hardwares

SLO-2 Types Of Real Time Systems Microprocessor Characteristics Miscellaneous Pseudo Kernels Meta Modeling And Resource Modeling Heterogenous Soft Multi Cores

S-2 SLO-1

Requirements Engineering As A Process,

Microchip PIC18F8720 Interrupt Only Systems, Priority Systems Uml Core Resource Model Architectural Issues With Individual Soft Cores

SLO-2 Standard Requirement Classes, Microchip PIC18F8720 Characteristics

Theoretical Foundation Of Scheduling UML Stereotype For Protected Resources

Field bus Networks and Simpler Distributed Nodes

S-3 SLO-1

Specification Of Real-Time Software Intel 8086 Scheduling Framework Resource Usage And Client Graph One Coordinating system Task and Multiple Isolated Application Tasks SLO-2

S-4 SLO-1

Formal Methods In System Specifications

Intel 8086 Characteristics Round Robin Scheduling Time Modeling And Timing Mechanism UML++ Programming Language

SLO-2 Limitations Of Formal Methods, Intel Pentium Cyclic Code Scheduling Time Modeling Stereotypes Automatic Verification of Software

S-5 SLO-1

Finite State Machines, Intel Pentium Characteristics Fixed Priority Scheduling Concurrency Modeling In UML Conservative Requirements Engineering SLO-2

S-6 SLO-1 State charts Arm Processor Introduction Dynamic Priority Scheduling Uml Model Analysis

Distance Collaboration in Software Projects,

SLO-2 Petri Machines ARM Characteristics Systems Service For Application Programs

Elicitation Of Timing Constraints Drag-and-Drop Systems,

S-7 SLO-1 Semiformal Methods In System Introduction To Interrupts Linear Buffer UML Profile Schedulability Drag-and-Drop Systems,


SLO-2 Specifications

S-8 SLO-1

Object-Oriented Analysis External Interrupts Ring Buffer Scheduling Jobs, Stereotype AndSubprofile

Local Networks of Collaborating Real-Time Systems, SLO-2

S-9 SLO-1 Structuring And Composing

Requirements, Design Pattern Of Interrupt Service Routine (ISR)-1

Deadlock And Starvation Problem, Priority Inversion Problem

Worst Case Task Execution And Response Time

Biometric Identification Device with Remote Access, SLO-2

S-10 SLO-1

Requirements Validation Design Pattern Of Interrupt Service Routine (ISR) - 2

Timer And Clock Servers Round Robin Architecture Performance Optimization Techniques, SLO-2

S-11 SLO-1 Semiformal Methods In System

Specification Interrupt Response Time Memory Management Issues Round Robin Interrupts Scaled Numbers for Faster Execution,

SLO-2

S-12 SLO-1

Case Study: In Software Requirements Specification

Case Study: Arm Processor Interrupt Study

Swapping Overlaying And Paging Queue Based Architecture Look-Up Tables for Functions,

SLO-2 Case Study: In Software Requirements Specification

Case Study: Arm Processor Interrupt Study

CASE STUDY: Selecting A Commercial Real Time Operating System

FIFO And Priority Queue Real-Time Device Drivers

Learning Resources

1. Phillip A. Laplante , “REAL-TIME SYSTEMS DESIGN AND ANALYSIS” John Wiley & Sons, 4th Edition, 2015.

2. Xiaocong Fan, “REAL-TIME EMBEDDED SYSTEMS,” Elsevier 2015.

3. Edward D Lamie, “REAL TIME EMBEDDED MULTI THREADING” , 2nd Edition, Newnes Elsevier Publication, 2005.

Learning Assessment

Bloom’s

Level of Thinking




Level 1 Remember

30 - 30 - 30 - 30 - Understand

Level 2 Apply

40 - 40 - 40 - 40 - Analyze

Level 3 Evaluate

30 - 30 - 30 - 30 - Create

Total 100 % 100 % 100 % 100 %


Course Designers


1. Mr. Anuj Kumar, Bombardier Transportation, Ahmedabad, [email protected] 1. Dr. Meenakshi, Professor of ECE, CEG, Anna University, [email protected] 1. Dr. Vivek Maik, SRMIST







Course Code

20GNS501J Course Name

RESEARCH PUBLISHING AND PRESENTING SKILLS Course

Category S Skill Enhancement

L T P C

1 0 2 2


Nil Co-requisite

Courses Nil

Progressive Courses

Nil

Course Offering Department English and Foreign Languages Data Book / Codes/Standards Nil

Course Learning Rationale (CLR): The purpose of learning this course is to:

Learning


CLR-1 : Practice different oral presentation material preparations 1 2 3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

CLR-2 : Practice presenting techniques suitable for different audiences

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CLR-3 : Prepare and typeset scientific documents for disseminating research findings

CLR-4 : Analyze different disseminating techniques available

CLR-5 : Utilize different intellectual property sharing mechanisms

CLR-6 : Evaluate amongst different options available to present, publish research findings


CLO-1 : Identify different oral presentation elements, materials and technologies 3 85 80 L H H M M - L H M - H - L - M

CLO-2 : Practice high impact presentation skills 3 85 80 L H H M M - L H M - H - L - M

CLO-3 : Identify ways to present technical / scientific content structure and elements 3 85 80 L H H M M - L H M - H - L - M

CLO-4 : Practice the different disseminating techniques used in scientific research findings 3 85 80 L H H M M - L H M - H - L - M

CLO-5 : Identify intellectual property and its components, ways to protect, share intellectual information 3 85 80 L H H M M - L H M - H - L - M

CLO-6 : Analyze the different oral and written publishing techniques to disseminate research findings 3 85 80 L H H M M - L H M - H - L - M

Duration (hour)

Oral Content Preparation Presenting Methods Written Content Preparation Publishing Methods Intellectual Property & Plagiarism

9 9 9 9 9

S-1 SLO-1

Oral Presentation Structure: Manuscript, Impromptu, Memory, Extempore

Describe Audience; knowledge, Experience, Needs, Goals

Writing Preface, Prelude, Prologue, foreword, Introduction, Abstract,

Typesetting: LaTex, Word, XML etc., Public License, Creative Commons, Share-alike, Reciprocal License,

SLO-2 context, need, agenda ,task, and object of the presentation document

Plan, Prepare, Practice, Present Creating a Positive First Impression,

Writing Dedication, Acknowledgement, Forward, Background

Indexing: ISI, SCI, SCIE, SCOPUS, SCIMAGO, ESCI, WoS,

Copyleft, Patentleft, Open patent, Public Domain

S 2-3

SLO-1 Practice-1: Create Structure of a Presentation

Practice-4: Building rapport with Audience

Practice-7: Writing Preface, Prelude, Prologue, foreword, Introduction, Abstract

Practice-12: LaTex Editor, Word Editor Practice-13: GNU-GPL, Public License Creative Commons License, Unlicense SLO-2

S-4

SLO-1 Gather data, evidence to present, visual-auditory balance, engagement techniques

Increasing Credibility, Presenting Complex Material, Communicating with Impact

Literature Review: Narrative, Systematic, Argumentative, Integrative, Theoretical

Disseminating Research Findings: Public Domain, Open Information, Wikipedia

Intellectual Property Rights, Copyrights, Patents, Trademarks, and Trade secrets

SLO-2 Introduction, body, closure, question-answer

Motivating Others, Responding to Pressure Situations, Inspiring People

Writing Problem Statement, Limitations, Method Adapted, Tools & Technology used

Media, Press Release, Flyers, Brochure, Research Summary, Posters, Websites

Industrial design rights, Plant variety rights, trade dress, geographical indications

S 5-6

SLO-1 Practice-2: Create a structured oral presentation module

Practice-5: Communicating with Greater Impact, Rehersals and Retrials

Practice-8: Writing Literature Review Practice-11: Study of Various Open Publishing Methods

Practice-14: IPR Law, Private Domain SLO-2

S-7 SLO-1 Tools: Presentation Slides, Whiteboard Animators, Immersive Technologies

Delivery Styles: Visual, Freeform, Lessig Instructor, Coach, Storytelling, Connector

Main Body: Analysis, Design, Development Steps, Implementation Steps, Evaluations

Patents, Journals, Conferences, Reports, RFCs etc.,

Infringements: Copylefts, Copyrights, Patentlefts, Patentrights,


SLO-2 Handouts, Visual Aids, Demonstrative Aids, Thought Provoking Questions

Persuasive, Interactive, Decision Making, Educational, Takahasi Arousing

Referencing: Documentary, Parenthetical, Numbered, Vancouver, IEEE, Harvard etc.,

Journal Index, Impact Factor, Quality Standards

Plagiarism: Paraphrasing, Verbatim, Mosaic, Global, Self, Accidental etc.,

S 8-9

SLO-1 Practice-3: Demonstrating a multi technology oral presentation

Practice-6: Presenting same content using different delivery styles

Practice-9: Writing Main Body Practice-12:Study of h-index, i10-index,

g-index, r-index, - index

Practice-15: Plagiarism checking and correcting techniques SLO-2

Learning Resources

1. Dale Carnegie, “Develop Self-Confidence, Improve Public Speaking”, Amazing Reads, 2018 2. Dale Carnegie, “The Art of Public Speaking”, Amazing Reads, 2018 3. Joseph Mugah, “Essentials of Scientific Writing: How to Write Effective Titles and Abstracts for Research Papers and Proposals”, Authorhouse, 2016

4. Rajesh Singh, Sanjeev Kumar Sinha, Samir Kumar, “Unfolding Intellectual Property Rights : A Practical Patent Guide for Researchers, Academicians and start-ups”, Notion Press, 2019 5. Robert P. Merges, Peter S. Menell, Mark A. Lemley, “ Intellectual Property in New Technological Age”, 2016

Learning Assessment

Bloom’s

Level of Thinking

Continuous Learning Assessment (60% weightage) Final Examination (40% weightage)

CLA – 1 (20%) CLA – 2 (25%) CLA – 3 (15%)


Level 1 Remember

20% 20% 15% 15% 15% 15% 15% 15% Understand

Level 2 Apply

20% 20% 20% 20% 20% 20% 20% 20% Analyze

Level 3 Evaluate

10% 10% 15% 15% 15% 15% 15% 15% Create

Total 100 % 100 % 100 % 100 %


Course Designers


1. Dr.Sainarayanan Gopalakrishnan, HCL Technologies, [email protected] 1. Dr. Venkat Adhikari, Technology Licensing Manager, IISC, [email protected] 1. Dr. Rajeev Sukumaran SRMIST

2. Dr. Sricharan Srinivasan, Wipro Technologies, [email protected] 2. Mr. AteetPalmurkar, Senior Manager IP Licensing, IITM, [email protected] 2. Dr. V. Nithyananthan SRMIST






Course Code

20ECS500T Course Name

RESEARCH METHODOLOGY FOR ELECTRONICS AND COMMUNICATION ENGINEERS

Course Category

S Skill Enhancement L T P C

2 0 2 3


NIL Co-requisite

Courses NIL

Progressive Courses

NIL

Course Offering Department Electronics and Communication Engineering Data Book / Codes/Standards NIL



CLR-1 : Learn to plan and prepare for research 1 2 3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

CLR-2 : Know about various Research Resources

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CLR-3 : Know ways of academic writing and presentation

CLR-4 : Learn ideas on data collection, analysis and inference

CLR-5 : Perform case studies pertaining to various domain of study

CLR-6 : Study the concepts of research and its methodology



CLO-1 : Cover an overview of Research Preparation and Planning 2 80 70 H H - H - - - - - - - - - - -

CLO-2 : Analyse the different Research Resources 2 80 70 - - - H - - - - - - - - - - -

CLO-3 : Update knowledge onAcademic Writing & Presentation 2 80 70 - - - H - - - - - - - - - - -

CLO-4 : Gain complete knowledge on Data Collection, Analysis and Inference 2 80 70 - - - H - - - - - - - - - - -

CLO-5 : Perform Case Studies and Applications in various domain of study 2 80 70 - - - H - - - - - - - - - - -

CLO-6 : Gain thorough knowledge about research and its methodology 2 80 70 - - - H - - - - - - - - - - -

Duration (hour)

Research Preparation and Planning Research Resources Academic Writing & Presentation Data Collection, Analysis and

Inference Case Studies and Applications

12 12 12 12 12

S-1 SLO-1 .

Objectives of research

Sources of information.

Proposal submission for funding agencies, Elements of Style

Basic Statistical Distributions and their applications: Binomial Distribution.

Case study :Research Basics in IOT/Physical Design Automation/Cryptography and coding. SLO-2 Organization of proposals Poisson, Normal Distribution

S-2 SLO-1

Understandingresearch and its goals Literature search Organization of proposals Exponential Distribution Case study: Survey in IOT/Physical

Design Automation/Cryptography and coding SLO-2 Basic knowledge of funding agencies Weibull and Geometric Distributions

S-3 SLO-1

Critical thinking World Wide Web, Online data bases – search tools

Research report writing

Sample size determination & sampling techniques: Random sampling

Case study: Presentation in IOT/Physical Design Automation/Cryptography and coding SLO-2 Stratified sampling

S-4 SLO-1 Techniques for generatingresearch topics.

Citation indices Communication skills Systematic sampling Case study :Research Basics in System Architecture/RF VLSI/Optical Wireless Communication


SLO-2 Techniques for generatingresearch topics

Citation indices Tailoring the presentation to the target audience

Cluster sampling Case study :Research Basics in System Architecture/RF VLSI/Optical Wireless Communication

S-5

SLO-1 Techniques for generatingresearch topics

Principles underlying impact factor Oral presentations Large Sample Tests and Small Sample Tests

Case study: Survey in System Architecture/RF VLSI/Optical Wireless Communication

SLO-2 Topic selection and justification Principles underlying impact factor Oral presentations Student–t-test and its application in research studies

Case study: Survey in System Architecture/RF VLSI/Optical Wireless Communication

S-6 SLO-1 Topic selection and justification Literature review Poster preparations

F-test and its application in research studies

Case study:Presentation in System Architecture/RF VLSI/Optical Wireless Communication SLO-2

Techniques involved in designing a questionnaire

Literature review Poster preparations χ2 test and its application in research studies

S-7

SLO-1 Techniques involved in designing a questionnaire

Case studies, review articles and Meta analysis

Submission of research articles for Publication to Reputed journals,

Correlation and Regression Analysis-Time series analysis

Case study :Research Basics in RTOS/Hardware Securuty/Signal Processing

SLO-2 Techniques involved in designing a questionnaire

Case studies, review articles and Meta analysis

Submission of research articles for Publication to Reputed journals,

Forecasting methods

S-8 SLO-1 Methods of scientificenquiry record of research review Thesis writing, Factor analysis,

Case study: Survey in RTOS/Hardware Securuty/Signal Processing

SLO-2 Methods of scientificenquiry Role of the librarian. Thesis writing Cluster Analysis and Discriminant Analysis (Basic ideas only).

Case study: Survey in RTOS/Hardware Securuty/Signal Processing

S-9 SLO-1 Formulation of hypotheses Ethical Issues in Research, Research report writing.

Principles of Experimentation, Basic Experimental Designs:

Case study:Presentation in RTOS/Hardware Securuty/Signal Processing SLO-2 Formulation of hypotheses Moral Issues in Research Research report writing Completely Randomized Design

S-10 SLO-1 Testing of the hypotheses Plagiarism

Elements of excellent presentation:

Randomized Block Design Case study: Research Basics in Robotics/Low power design techniques /Wireless Communication SLO-2 Testing of the hypotheses Tools to avoid plagiarism

Elements of excellent presentation

Latin Square Design

S-11 SLO-1 Development of a researchproposal Intellectual Property Rights Preparation, Visual and Delivery Factorial Designs: 22 Case study: Survey in Robotics/Low

power design techniques /Wireless Communication SLO-2 Development of a researchproposal Intellectual Property Rights Oral Communication skills Factorial Designs: 23

S-12 SLO-1 Theoretical and ExperimentalProcesses Copy right laws Oral Communication skills Factorial Designs: 24 Case study:Presentation in

Robotics/Low power design techniques /Wireless Communication SLO-2 Theoretical and ExperimentalProcesses Patent rights Oral defence Accuracy, Precision and error analysis

Learning Resources

1. Ganesan R, Research Methodology for Engineers, MJP Publishers, Chennai. 2011 2. Walpole R.A., Myers R.H., Myers S.L. and Ye, King: Probability & Statistics for Engineers

and Scientists, Pearson Prentice Hall, Pearson Education, Inc. 2007. 3. Anderson B.H., Dursaton, and Poole M.: Thesis and assignment writing, Wiley Eastern

1997. 4. BijornGustavii: How to write and illustrate scientific papers? Cambridge University Press. 5. Bordens K.S. and Abbott, B.b.: Research Design and Methods, Mc Graw Hill, 2008.

6. Graves N, Varma V: Working for a doctorate Toutledge 1997. 7. Graziano, A., M., and Raulin, M.,L.: Research Methods – A Process of Inquiry, Sixth Edition,

Pearson, 2007. 8. Leedy., P., D.: Practical Research – Planning and Design, Eighth Edition, Pearson., 2005.

9. Kothari C.K., Research Methodology‐ Methods and Techniques (New International, New Delhi), 2004.

10. Stamatios V. Kartalopoulos, DWDM Networks devices and technology, IEEE Press,Wiley, 2003


Learning Assessment

Bloom’s

Level of Thinking

Continuous Learning Assessment (CLA) (60% weightage) Final Examination (40% weightage) CLA-1

(20%) CLA-2 (25%)

CLA-3# (15%)


Level 1 Remember

30 - 30 - 30 - 30 - Understand

Level 2 Apply

40 - 40 - 40 - 40 - Analyze

Level 3 Evaluate

30 - 30 - 30 - 30 - Create

Total 100 % 100 % 100 % 100 %


Course Designers


1. Mr. Anuj Kumar, Bombardier Transportation, Ahmedabad, [email protected] 1. Dr. Meenakshi, Professor of ECE, CEG, Anna University, [email protected] 1. Dr. J. Subhashini, SRMIST








Nil Co-requisite

Courses Nil

Progressive Courses

Nil

Course Offering Department Career Development Centre Data Book / Codes/Standards Nil



CLR-1 : Become an expert in communication and problem solving skills 1 2 3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

CLR-2 : Recapitulate fundamental mathematical concepts and skills

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CLR-3 : Strengthen writing skills professionally and understand commercial mathematical applications

CLR-4 : Identification of relationships between words based on their function, usage and characteristics

CLR-5 : Sharpen logical and critical reasoning through skillful conceptualization

CLR-6 : Acquire the right knowledge, skill and aptitude to face any competitive examination



CLO-1 : Acquire communication and problem solving skills 2 80 75 - H - H - - - - H H - H - - -

CLO-2 : Build a strong base in the fundamental mathematical concepts 2 75 70 - H - H - - - - H H - H - - -

CLO-3 : Acquire writing skill to communicate with clarity 2 80 75 - H - H - - - - H H - H - - -

CLO-4 : Use apt vocabulary to embellish language 3 75 70 - H - H - - - - H H - H - - -

CLO-5 : Gain appropriate skills to succeed in preliminary selection process for recruitment 3 85 80 - H - H - - - - H H - H - - -

CLO-6 : Enhance aptitude skills though systematic application of knowledge 2 85 80 - H - H - - - - H H - H - - -

Duration (hour)

6 6 6 6 6

S-1 SLO-1 Types of numbers, Divisibility tests Fractions and Decimals, Surds Percentage - Introduction Sentence Correction Number and Alphabet Series

SLO-2 Solving Problems Solving Problems Solving Problems Practice Direction Test

S-2 SLO-1 LCM and GCD Square roots, Cube roots, Remainder Percentage Problems Reading Comprehension Blood Relations

SLO-2 Solving Problems Solving Problems Solving Problems Practice Arrangements Linear, Circular

S-3 SLO-1

Unit digit, Number of zeroes, Factorial notation

Identities Profit and Loss Reading Comprehension Ranking

SLO-2 Solving Problems Solving Problems Solving Problems Practice Practice

S-4 SLO-1 Verbal Reasoning-Vocabulary Spotting Errors Discount Reading Comprehension Critical Reasoning-Strengthening

SLO-2 Practice Practice Solving Problems Practice Practice

S-5 SLO-1 Verbal Reasoning-Vocabulary Spotting Errors Sentence Correction Linear Equations Critical Reasoning-Weakening

SLO-2 Practice Practice Practice Solving Problems Practice

S-6 SLO-1 Verbal Reasoning-Vocabulary Spotting Errors Sentence Correction Logical Reasoning-Intro Critical Reasoning-Assumption

SLO-2 Practice Practice Practice Coding and Decoding Practice

Course Code

20PDM501T Course Name

Career Advancement Course for Engineers-I Course

Category M Mandatory

L T P C

1 0 1 0


Learning Resources

1. Khattar D. “Quantitative Aptitude”, Pearson’s Publications, Third Edition (2015). 2. Praveen R.V. “Quantitative Aptitude and Reasoning”, EEE Publications, Third Edition (2016) 3. Guha A. “Quantitative Aptitude”, TATA McGraw Hill Publications, Sixth Edition (2017). 4. P.A. Anand, “Quantitative Aptitude for Competitive Examination”, WILEY Publications (2019) 5. Arihant. “IBPS PO - CWE Success Master”, Arihant Publications(I) Pvt.Ltd – Meerut, First Edition

(2018)

6. Nishit Sinha. “Verbal Ability for CAT”, Pearson India, First Edition (2018). 7. Archana Ram, “Placementor”, Oxford University Press, (2018) 8. Bharadwaj A.P. “ General English for Competitive Examination”, Pearson Education, First Edition

(2013) 9. Thorpe S. “English for Competitive Examination”, Pearson Education, Sixth Edition (2012).

Note: CLA-2 (Surprise Test, Assignment-1, Assignment-2)

Course Designers


1. Mr. Ajay Zener, Career Launcher, [email protected] 1. Dr. P. Madhusoodhanan, SRMIST 2. Dr. M. Snehalatha,, SRMIST

3. Mr. J.Jayapragash, SRMIST

4. Dr. A. Clement, SRMIST

Learning Assessment

Bloom’s

Level of Thinking


CLA-1 (30%)

CLA-2 (30%)

Fully Internal

Theory Practice Theory Practice Theory Practice

Level 1 Remember

40 % - 30 % - 30 % - Understand

Level 2 Apply

40 % - 40 % - 40 % - Analyze

Level 3 Evaluate

20 % - 30 % - 30 % - Create

Total 100 % 100 % 100 %



Course Code


Career Advancement Course For Engineers - II Course


L T P C

1 0 1 0


Nil Co-requisite

Courses Nil

Progressive Courses

Nil




CLR-1 : Recapitulate fundamental mathematical concepts and building the resume 1 2 3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

CLR-2 : Become an expert in communication and problem solving skills

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Exp

ecte

d P

rofic

ienc

y (%

)

Exp

ecte

d A

ttain

men

t (%

)

Eng

inee

ring

Kno

wle

dge

Pro

blem

Ana

lysi

s

Des

ign

& D

evel

opm

ent

Ana

lysi

s, D

esig

n,

Res

earc

h

Mod

ern

Too

l Usa

ge

Soc

iety

& C

ultu

re

Env

ironm

ent &

Sus

tain

abili

ty

Eth

ics

Indi

vidu

al &

Tea

m W

ork

Com

mun

icat

ion

Pro

ject

Mgt

. & F

inan

ce

Life

Lon

g Le

arni

ng

PS

O -

1

PS

O -

2

PS

O –

3

CLR-3 : Sharpen interpretational skills through skillful conceptualization,

CLR-4 : Sharpen analytical reasoning skills and professional skills

CLR-5 : Utilize professionalism with idealistic, practical and moral values that govern the behavior

CLR-6 : Acquire the right knowledge, skill and aptitude to face any competitive examination



CLO-1 : Build a strong base in the fundamental mathematical concepts and resume 2 80 75 - H - M - - - - H H - H - - -

CLO-2 : Acquire communication and problem solving skills. 2 75 70 - H - M - - - - H H - H - - -

CLO-3 : Gain appropriate skills to succeed in preliminary selection process for recruitment 2 80 75 - H - M - - - - H H - H - - -

CLO-4 : Acquire interpretational skills and professional skills 3 75 70 - H - M - - - - H H - H - - -

CLO-5 : Develop professionalism with idealistic, practical and moral values 3 85 80 - H - M - - - - H H - H - - -

CLO-6 : Enhance lexical skills through systematic application of concepts and careful analysis of style, syntax, semantics and logic

2 85 80 - H

- M -

- - - H H

- H

- - -

Duration (hour)

6 6 6 6 6

S-1 SLO-1 Ratio and Proportion-Intro Sets-Rules Group Discussion-3 Data Sufficiency-Intro Personal Interview

SLO-2 Solving Problems Solving Problems Practice Solving Problems Practice

S-2 SLO-1 Ratio and Proportion Sets-Identities, Venn Diagram Group Discussion-4 Data Sufficiency Personal Interview

SLO-2 Solving Problems Solving Problems Practice Solving Problems Practice

S-3 SLO-1 Mixture and Solutions-Intro Functions-Intro Group Discussion-5 Analytical Reasoning-Intro Mock Interview

SLO-2 Solving Problems Solving Problems Practice Solving Problems Mock Interview

S-4 SLO-1 Mixture and Solutions Group Discussion- Do’s and Don’ts Data Interpretation-Intro Analytical Reasoning Mock Interview

SLO-2 Solving Problems Practice Solving Problems Solving Problems Mock Interview

S-5 SLO-1 Profile Building Group Discussion-1 Data Interpretation-Tables, Pie Chart Personal Interview-Do’s and Don’ts Mock Interview


SLO-2 Profile Building Practice Solving Problems Practice Mock Interview

S-6 SLO-1 Resume Building Group Discussion-2 Data Interpretation-Lines, Bar Graphs Personal Interview Quantitative Reasoning Revision

SLO-2 Resume Building Practice Solving Problems Practice Solving Problems

Learning Resources

1. Khattar D. “Quantitative Aptitude”, Pearson’s Publications, Third Edition (2015). 2. Guha A. “Quantitative Aptitude”, TATA McGraw Hill Publications, Sixth Edition (2017). 3. Butterfield J. “Soft Skills for Everyone”, Cengage Learning India Private Ltd, First Edition, (2011).

4. Bono E.D. “Six Thinking Hats is a book” , Little Brown and Company, First Edition (1981) 5. P.A. Anand, “Quantitative Aptitude for Competitive Examination”, WILEY Publications (2019) 6. Archana Ram, “Placementor”, Oxford University Press, (2018)


Course Designers



3. Mr.P.Priyanand, SRMIST

4. Mrs.KaviathaSrisarann, SRMIST

Learning Assessment

Bloom’s

Level of Thinking


CLA-1 (30%)

CLA-2 (30%)

Fully Internal


Level 1 Remember

40 % - 30 % - 30 % - Understand

Level 2 Apply

40 % - 40 % - 40 % - Analyze

Level 3 Evaluate

20 % - 30 % - 30 % - Create

Total 100 % 100 % 100 %



Course Code


Career Advancement Course For Engineers - III Course


L T P C

1 0 1 0


Nil Co-requisite

Courses Nil

Progressive Courses

Nil




CLR-1 : acquire knowledge on planning, preparing and designing a learning program 1 2 3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

CLR-2 : prepare effective learning resources for active practice sessions

Leve

l of T

hink

ing

(Blo

om)

Exp

ecte

d P

rofic

ienc

y (%

)

Exp

ecte

d A

ttain

men

t (%

)

Eng

inee

ring

Kno

wle

dge

Pro

blem

Ana

lysi

s

Des

ign

& D

evel

opm

ent

Ana

lysi

s, D

esig

n,

Res

earc

h

Mod

ern

Too

l Usa

ge

Soc

iety

& C

ultu

re

Env

ironm

ent &

Sus

tain

abili

ty

Eth

ics

Indi

vidu

al &

Tea

m W

ork

Com

mun

icat

ion

Pro

ject

Mgt

. & F

inan

ce

Life

Lon

g Le

arni

ng

PS

O -

1

PS

O -

2

PS

O –

3

CLR-3 : facilitate active learning with new methodologies and approaches

CLR-4 : create balanced assessment tools

CLR-5 : hone teaching skills for further enrichment

CLR-6 : define standards, goals and objectives



CLO-1 : Build a strong foundation in designing a lesson plan 2 80 75 - H H H M - - - H H - H - - -

CLO-2 : Acquire knowledge of learning resources for effective delivery 2 75 70 - H H H M - - - H H - H - - -

CLO-3 : Sharpen teaching skills with the latest methodologies and techniques 2 80 75 - H H H M - - - H H - H - - -

CLO-4 : Develop practical assessment tools to ensure validity and flexibility 3 75 70 - H H H M - - - H H - H - - -

CLO-5 : Enhance effective presentation and teaching methods 3 85 80 - H H H M - - - H H - H - - -

CLO-6 : Reinforce Bloom’s Taxonomy of educational goals and objectives 2 85 80 - H H H M - - - H H - H - - -

Duration (hour)

6 6 6 6 6

S-1 SLO-1 Lower and Higherorderlearning Definition and purpose of assessment Peer Teaching practice Live Teaching Sessions Live Teaching Sessions

SLO-2 Outcomes from lower order learning Practice Discussion and feedback Live Teaching Sessions Live Teaching Sessions

S-2 SLO-1

Planning and preparing a learning programme and session

Distinction between formative and summative assessment

Peer Teaching practice Live Teaching Sessions Live Teaching Sessions

SLO-2 Practice Examples and discussions Discussion and feedback Live Teaching Sessions Live Teaching Sessions

S-3 SLO-1

Teacher and Student-Centered class room

Instructional materials Cooperative learning procedure Live Teaching Sessions Live Teaching Sessions

SLO-2 Discussion Examples and discussion Different models of cooperative learning Live Teaching Sessions Live Teaching Sessions

S-4 SLO-1 Roles of teachers and students Instructional design Limitations of cooperative learning Live Teaching Sessions Live Teaching Sessions

SLO-2 Discussion Practice Discussion Live Teaching Sessions Live Teaching Sessions

S-5 SLO-1 Discussion Strategies Presentation of lesson plans Structure of a lecture Live Teaching Sessions Live Teaching Sessions

SLO-2 Practice Discussion Practice Live Teaching Sessions Live Teaching Sessions


S-6 SLO-1 Bloom’s Taxonomy of educational goal Group Work in learning Live Teaching Sessions Live Teaching Sessions Live Teaching Sessions

SLO-2 Practice Discussion Live Teaching Sessions Live Teaching Sessions Live Teaching Sessions

Learning Resources

1. Barker I. “Cambridge International Diploma for Teachers and Trainers”, Cambridge University Press, 2006.

2. Whitehead Jack, Creating a Living Educational Theory from Questions of the kind: How do I improve my Practice? Cambridge Journal of Education, 2006.

3. Vicki Phillips and Lynn Olson, “Ensuring Effective Instruction: How do I improve teaching using multiple measures?”Bill & Melinda Gates Foundation, 2013.

4. Dr G M Chaudhary, “Teaching Methodology: Effective Teaching Strategies”, Independently Published, 2019.


Course Designers



3. Mr. J.Jayapragash, SRMIST

4. Dr. A. Clement, SRMIST

Learning Assessment

Bloom’s

Level of Thinking


CLA-1 (30%)

CLA-2 (30%)

Fully Internal


Level 1 Remember

40 % - 30 % - 30 % - Understand

Level 2 Apply

40 % - 40 % - 40 % - Analyze

Level 3 Evaluate

20 % - 30 % - 30 % - Create

Total 100 % 100 % 100 %



Course Code

20ECP601L Course Name

INTERNSHIP Course

Category P

Project Work, Internship In Industry / Higher Technical Institutions

L T P C

0 0 8 4


Nil Co-requisite

Courses Nil

Progressive Courses




Learning


CLR-1 : Provide an exposure to an industrial environment or research laboratory / institution 1 2 3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

CLR-2 : Acquire practical knowledge of theoretical concepts

Leve

l of T

hink

ing

(Blo

om)

Exp

ecte

d P

rofic

ienc

y

(%)

Exp

ecte

d A

ttain

men

t

(%)

Dis

cipl

inar

y K

now

ledg

e

Crit

ical

Thi

nkin

g

Pro

blem

Sol

ving

Ana

lytic

al R

easo

ning

Res

earc

h S

kills

Tea

m W

ork

Sci

entif

ic R

easo

ning

Ref

lect

ive

Thi

nkin

g

Sel

f-D

irect

ed L

earn

ing

Mul

ticul

tura

l

Com

pete

nce

Eth

ical

Rea

soni

ng

Com

mun

ity

Eng

agem

ent

ICT

Ski

lls

Lead

ersh

ip S

kills

Life

Lon

g Le

arni

ng

CLR-3 : Understand the organization structure, functions and protocols



CLO-1 : Appreciate the functioning of an organization 1 70 65 H H H H M H H H M H M M M L M

CLO-2 : Apply the theoretical concepts to solve engineering problems 2 80 75 H H H H H H H H H M H M H H H

CLO-3 : Take up different roles in a career with confidence 3 65 60 H M L L M M M M L L L L L M M

Assessment for Semester Internship

Final Evaluation (100% weightage)

Report along with completion certificate from company Viva-Voce

Semester Internship

50 % 50 %

1. It is mandatory for every student to undergo this course.

2. Every student is expected to spend a minimum of 4 to 6 weeks in an Industry/ Company/ Organization, during the summer vacation between II and III semester

3. The type of industry must be NOT below the Medium Scale category in his / her domain of the degree programme.

4. The student must submit the “Training Completion Certificate” issued by the industry / company / Organization as well as a technical report not exceeding 15 pages, within the stipulated time to be eligible for making a presentation before the committee constituted by the department.

5. The committee will then assess the student based on the report submitted and the presentation made.

6. Marks will be awarded out of maximum 100.

7. Appropriate grades will be assigned as per the regulations.

8. Only if a student gets a minimum of pass grade, appropriate credit will be transferred towards the degree requirements, as per the regulations.

9. It is solely the responsibility of the individual student to fulfill the above conditions to earn the credits.

10. The attendance for this course, for the purpose of awarding attendance grade, will be considered 100%, if the credits are transferred, after satisfying the above (1) to (8) norms; else if the credits are not transferred or transferable, the attendance will be considered as ZERO.

11. The committee must recommend redoing the course, if it collectively concludes, based on the assessment made from the report and presentations submitted by the student, that either the level of training received or the skill and / or knowledge gained is NOT satisfactory.



Nil Co-requisite

Courses Nil

Progressive Courses

Nil

Course Offering Department Department of Electronics and Communication Data Book / Codes/Standards Nil



Learning


CLR-1 : Conceptualize a novel idea / technique 1 2 3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

CLR-2 : Think in terms of social or commercial applications

Leve

l of T

hink

ing

(Blo

om)

Exp

ecte

d P

rofic

ienc

y (%

)

Exp

ecte

d A

ttain

men

t (%

)

Dis

cipl

inar

y K

now

ledg

e

Crit

ical

Thi

nkin

g

Pro

blem

Sol

ving

Ana

lytic

al R

easo

ning

Res

earc

h S

kills

Tea

m W

ork

Sci

entif

ic R

easo

ning

Ref

lect

ive

Thi

nkin

g

Sel

f-D

irect

ed L

earn

ing

Mul

ticul

tura

l Com

pete

nce

Eth

ical

Rea

soni

ng

Com

mun

ity E

ngag

emen

t

ICT

Ski

lls

Lead

ersh

ip S

kills

Life

Lon

g Le

arni

ng CLR-3 : Understand the management techniques of implementing a project

CLR-4 : Prepare a technical report and present in a professional manner



CLO-1 : Identify and solve simple engineering / biological problems 1 70 65 H H H H M H H H M H M M M L M

CLO-2 : Assess the feasibility of project commercialization 2 80 75 H H H H H H H H H M H M H H H

CLO-3 : Manage the implementation of a project 3 65 60 H M L L M M M M L L L L L M M

CLO-4 : Document a project report 3 75 70 H H H H L M H M H M M M H M H

1. An in-house project to be taken up by the individual student and complete the minor project before the end of III semester

2. The project can be a development of an experimental kit/ method, an innovative concept or idea or methodology or algorithm / technique, a 3D model, simulation, prototype product, blueprint for a larger project or any other similar developmental work that the respective department approved by the department, are permitted.

3. The student must be attached to a faculty supervisor / mentor 4. A comprehensive report is to be submitted. 5. A presentation is to be made on the work done by the student to committee of reviewers

Course Code


MINOR PROJECT Course

Category P


L T P C

0 0 8 4

Learning Assessment weightage

Continuous Learning Assessment (70% weightage)


Review I Review II Report Viva-Voce

Minor Project 20 % 50 % 15 % 15 %


Course Code


PROJECT WORK PHASE - I Course

Category P


L T P C

0 0 12 6


Nil Co-requisite

Courses Nil

Progressive Courses




CLR-1 : Prepare the student to gain major design and or research experience as applicable to the profession 1 2 3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

CLR-2 : Apply knowledge and skills acquired through earlier course work in the chosen project

Leve

l of T

hink

ing

(Blo

om)

Exp

ecte

d P

rofic

ienc

y (%

)

Exp

ecte

d A

ttain

men

t (%

)

Dis

cipl

inar

y K

now

ledg

e

Crit

ical

Thi

nkin

g

Pro

blem

Sol

ving

Ana

lytic

al R

easo

ning

Res

earc

h S

kills

Tea

m W

ork

Sci

entif

ic R

easo

ning

Ref

lect

ive

Thi

nkin

g

Sel

f-D

irect

ed L

earn

ing

Mul

ticul

tura

l Com

pete

nce

Eth

ical

Rea

soni

ng

Com

mun

ity E

ngag

emen

t

ICT

Ski

lls

Lead

ersh

ip S

kills

Life

Lon

g Le

arni

ng

CLR-3 : Make conversant with the codes, standards, application software and equipment

CLR-4 : Carry out the projects within multiple design constraints

CLR-5 : Incorporate multidisciplinary components

CLR-6 : Acquire the skills of comprehensive report writing



CLO-1 : Design a system / process or gain research insight into a defined problem as would be encountered in engineering practice taking into consideration its impact on global, economic, environmental and social context.

3 85 75 H H H M H H M L H L M L H L H

CLO-2 :

CLO-3 :

The Major project is a major component of our engineering curriculum: it is the culmination of the program of study enabling the learners to showcase the knowledge and the skills they have acquired, design a product/service of significance, and solve an open-ended problem in engineering.

The Major Project is to be taken up during the final semester of the program

The project work (Phase – I) is the preparatory phase for the major project and is to be taken up during the pre-final semester of the program.

Each student is expected to identify an engineering problem in his / her specialization of study.

Each student must study in-depth the issues / causes & effects underlying the problem and define the objective of the subsequent work.

The project shall be driven by realistic constraints like that related to economic, environmental, social, political, ethical, health & safety, manufacturability and sustainability.

A faculty supervisor / mentor will be assigned to each project.

Each student team is expected to maintain a log book that would normally be used to serve as a record of the way in which the project progressed during the course of the session.

Salient points discussed at meetings with the supervisor (i.e., suggestions for further meetings, changes to experimental procedures) should be recorded by the student in order to provide a basis for subsequent work.

The logbook may be formally assessed;

A report of the work done during Phase – I must be submitted at the end of the semester, for evaluation.

Assessment components will be as spelt out in the regulations.

The department will announce a marking scheme for awarding marks for the different sections of the report.

The project report must possess substantial technical depth and require the learners to exercise analytical, evaluation and design skills at the appropriate level.

S. No. Description of project work progress


1. Review – 1: Major design project identification, the objective, methodology and expected outcome.

2. Review – 2: Presentation of the proposed work design, implementation and partial result

3. Review – 3: Presentation of complete project work with results and discussion, Demonstration of project work

4. Project report/ Thesis submission

Learning Resources

1. IEEE Journals, Elsevier Journals, Springer Journals, Any open Access Journal, Reference / user manuals, etc.

Learning Assessment



Review - 1 Review - 2 Review - 3 Project Report Viva-Voce

Project Work(Phase I) 15 % 25 % 30 % 15 % 15 %


Course Code


PROJECT WORK PHASE - II Course

Category P


L T P C

0 0 32 16


Nil Co-requisite

Courses Nil

Progressive Courses




CLR-1 : Prepare the student to gain major design and or research experience as applicable to the profession 1 2 3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

CLR-2 : Apply knowledge and skills acquired through earlier course work in the chosen project

Leve

l of T

hink

ing

(Blo

om)

Exp

ecte

d P

rofic

ienc

y (%

)

Exp

ecte

d A

ttain

men

t (%

)

Dis

cipl

inar

y K

now

ledg

e

Crit

ical

Thi

nkin

g

Pro

blem

Sol

ving

Ana

lytic

al R

easo

ning

Res

earc

h S

kills

Tea

m W

ork

Sci

entif

ic R

easo

ning

Ref

lect

ive

Thi

nkin

g

Sel

f-D

irect

ed L

earn

ing

Mul

ticul

tura

l Com

pete

nce

Eth

ical

Rea

soni

ng

Com

mun

ity E

ngag

emen

t

ICT

Ski

lls

Lead

ersh

ip S

kills

Life

Lon

g Le

arni

ng

CLR-3 : Make conversant with the codes, standards, application software and equipment

CLR-4 : Carry out the projects within multiple design constraints

CLR-5 : Incorporate multidisciplinary components

CLR-6 : Acquire the skills of comprehensive report writing



CLO-1 : Design a system / process or gain research insight into a defined problem as would be encountered in engineering practice taking into consideration its impact on global, economic, environmental and social context.

3 85 75 H H H M H H M L H L M L H L H

CLO-2 :

CLO-3 :

The Major project (Phase-II) is a major component of our engineering curriculum: it is the culmination of the program of study enabling the learners to showcase the knowledge and the skills they have acquired, design a product/service of significance, and solve an open-ended problem in engineering.

The Major Project is to be taken up during the final semester of the program, and it can be an extension of the Project Work (Phase-I)

Each student is expected to identify an engineering problem in his / her specialization of study.

Each student must study in-depth the issues / causes & effects underlying the problem and define the objective of the subsequent work.

The project shall be driven by realistic constraints like that related to economic, environmental, social, political, ethical, health & safety, manufacturability and sustainability.

A faculty supervisor / mentor will be assigned to each project.

Each student team is expected to maintain a log book that would normally be used to serve as a record of the way in which the project progressed during the course of the session.

Salient points discussed at meetings with the supervisor (i.e., suggestions for further meetings, changes to experimental procedures) should be recorded by the student in order to provide a basis for subsequent work.

The logbook may be formally assessed;

A report of the work done during Phase – II must be submitted at the end of the semester, for evaluation.

Assessment components will be as spelt out in the regulations.

The department will announce a marking scheme for awarding marks for the different sections of the report.

The project report must possess substantial technical depth and require the learners to exercise analytical, evaluation and design skills at the appropriate level.


S. No. Description of project work progress

1. Review – 1: Major design project identification, the objective, methodology and expected outcome.

2. Review – 2: Presentation of the proposed work design, implementation and partial result

3. Review – 3: Presentation of complete project work with results and discussion, Demonstration of project work

4. Project report/ Thesis submission

Learning Resources

1. IEEE Journals, Elsevier Journals, Springer Journals, Any open Access Journal, Reference / user manuals, etc.

Learning Assessment



Review - 1 Review - 2 Review - 3 Project Report Viva-Voce

Project Work (Phase-II) 15 % 25 % 30 % 15 % 15 %


Course Code

20MAO501T Course Name

OPERATIONS RESEARCH Course

Category O Open Elective

L T P C

3 0 0 3


Nil Co-requisite

Courses Nil

Progressive Courses

Nil

Course Offering Department Mathematics Data Book / Codes/Standards Nil



Learning


CLR-1 : To provide the knowledge about linear programming problems and simplex method. 1 2 3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

CLR-2 : To understand and apply the transportation model and assignment models in engineering applications.

Leve

l of T

hink

ing

(Blo

om)

Exp

ecte

d P

rofic

ienc

y (%

)

Exp

ecte

d A

ttain

men

t (%

)

Dis

cipl

inar

y K

now

ledg

e

Crit

ical

Thi

nkin

g

Pro

blem

Sol

ving

Ana

lytic

al R

easo

ning

Res

earc

h S

kills

Tea

m W

ork

Sci

entif

ic R

easo

ning

Ref

lect

ive

Thi

nkin

g

Sel

f-D

irect

ed L

earn

ing

Mul

ticul

tura

l Com

pete

nce

Eth

ical

Rea

soni

ng

Com

mun

ity E

ngag

emen

t

ICT

Ski

lls

Lead

ersh

ip S

kills

Life

Lon

g Le

arni

ng

CLR-3 : To provide the knowledge about networking, scheduling and crashing of networks.

CLR-4 : To understand and apply the inventory models and game theory in industrial and engineering problems.

CLR-5 : To gain the knowledge about the Markovian model and different kind of Queueing models.

CLR-6 : To apply the optimization techniques and Queueing Theory in the industrial and Engineering applications.


CLO-1 : Students will be able to solve the problems of LPP by simplex and graphical method. 1 85 80 L L M M

CLO-2 : Students will be able to solve transportation and assignment problems. 1 85 80 L L M L M M H

CLO-3 : Students will be able to solve the networking and scheduling problems. 2 85 80 L L M L M L

CLO-4 : Students will be able to apply the inventory and game theory techniques in the engineering problems. 2 85 80 L M M M L M L M H

CLO-5 : Students will be able to formulate concrete problems using Queueing theoretical approaches. 3 85 80 L M L M L M M

CLO-6: Students will be able to apply optimization techniques in industrial and engineering problems. 2 85 80 L L L L L M

Duration (hour)

Module 1/ Linear Programming Problem

Module 2/ Transportation and Assignment

Problems

Module 3/ Networks and Scheduling

Module 4/ Inventory models and Graph theory

Module 5/ Queueing Theory

9 9 9 9 9

S-1 SLO-1 Introduction to Operations Research Transportation model Network models Introduction to Inventory models Introduction to Queueing models

SLO-2 Applications Applications Applications Applications Characteristics

S-2 SLO-1

Linear Programming-Mathematical Formulation

Northwest Corner method Construction of Networks Various Costs and Concepts Poisson arrivals and Exponential service times

SLO-2 Simple Examples Simple Examples Simple Problems Simple examples Symbolic representation

S-3 SLO-1 Graphical Method Vogel’s Approximation method Shortest Route problem EOQ Deterministic inventory models

Single server model with infinite system capacity

SLO-2 Simple Examples Simple Examples Examples Applications Characteristics of the model(M/M/1):(∞/FIFO)

S-4 SLO-1 Simplex Method MODI method Maximal Flow model Problems on EOQ models

Relation between waiting time in the queue and in the system

SLO-2 Examples Simple Examples Examples Problems on EOQ models Selected Problems

S-5 SLO-1 Big M Method Stepping stone method CPM Network Dynamic EOQ models Multiple server model with infinite system capacity


SLO-2 Examples Simple Examples Problems of CPM Applications Characteristics of the model (M/M/s):(∞/FIFO)

S-6 SLO-1 Two phase Simplex method Assignment problems PERT Network No set up EOQ model Selected Problems

SLO-2 Examples Examples and problems Problems of PERT Problems Selected Problems

S-7 SLO-1 Duality The Hungarian method

Problems on CPM & PERT to Engineering

Set up EOQ model (M/M/s):(∞/FIFO) -applications

SLO-2 Examples Examples and problems Problems on CPM & PERT to Engineering

Problems More Problems

S-8 SLO-1 Dual Simplex method Travelling salesman problem Scheduling of Network Elementary Game Theory Non-Markovian model

SLO-2 Examples Methodology Problems Game theory applications M/G/1 Queueing system characteristics

S-9 SLO-1 Sensitivity analysis Applications Crashing of Network Game Theory Simulation PollaczekKhinchine Formula

SLO-2 Application of Simplex method Applications to Engineering problems Problems Problems Applications

Learning Resources

1. H.A. Taha, Operations Research, An Introduction, 10th Edition, Pearson, 2017 2. J.C. Pant, Introduction to Optimization: Operations Research, 7th reprinted edition, Jain

Brothers, Delhi, 2015 3. Frederick S. Hillier, Gerald J. Lieberman, Bodhibrata Nag, PreetamBasu, Introduction to

Operations Research, McGraw Hill Pub., 2017

4. R. Panneerselvam, Operations Research, 2nd Edition, Prentice Hall of India 2012 5. Harvey M Wagner, Principles of Operations Research: Prentice Hall of India 2010

Learning Assessment

Bloom’s

Level of Thinking


CLA-1(20%) CLA-2(25%) CLA-3# (15%)


Level 1 Remember

30 - 30 - 30 - 30 - Understand

Level 2 Apply

40 - 40 - 40 - 40 - Analyze

Level 3 Evaluate

30 - 30 - 30 - 30 - Create

Total 100 % 100 % 100 % 100 %


Course Designers:


1. Mr.V.Maheshwaran, CTS, Chennai, [email protected] 1. Dr. Y.V.S.S. Sanyasi Raju, IIT Madras, [email protected] 1. Dr. A. Govindarajan,SRMIST

2. Dr.K.C.Sivakumar, IIT Madras, [email protected] 2. Prof. Ganapathy Subramanian, SRMIST

3. Dr. D. Prakash, SRMIST






Nil Co-requisite

Courses Nil

Progressive Courses

Nil




CLR-1 : Provide opportunity to study with the top universities through online platform in his / her areas of interest beyond the curriculum

1 2 3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

CLR-2 : Provide full credit transfer, as per university regulations

Leve

l of T

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(Blo

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Exp

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Pro

ficie

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(%)

Exp

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Atta

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Dis

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Kno

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Crit

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Thi

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Pro

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Sol

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Ana

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Rea

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Res

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kills

Tea

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Sci

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Ref

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Thi

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Sel

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Lear

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M

ultic

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Com

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Eth

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Rea

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Com

mun

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Eng

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ICT

Ski

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Lead

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Life

Lon

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CLO-1 : Acquire additional knowledge in his / her areas of interest 1 70 65 H H H H M H H H M H M M M L M

CLO-2 : Take advantage of the flexibility in learning 2 80 75 H H H H H H H H H M H M H H H

Registration process, Assessment and Credit Transfer

1. Students can register for courses offered by approved global MOOCs platforms like Swayam, NPTEL, edX, Coursera or Universities with which SRM partners specifically for MOOCs.

2. Annually, each department must officially announce, to the students as well as to the Controller of Examinations, the list of courses that will be recognized and accepted for credit transfer.

3. The student has to choose online courses listed by the department and should undergo for the minimum period of 8-12 weeks.

4. The department must also officially announce / appoint one or more faculty coordinator(s) for advising the students attached to them, monitoring their progress and assist the department in proctoring the tests, uploading the marks / grades, and collecting and submitting the graded certificate(s) to the CoE, within the stipulated timeframe.

5. Student who desires to pursue a course, from the above department-approved list, through MOOCs must register for that course during the course registration process of the Faculty of Engineering and Technology, SRM University.

6. The maximum credit limits for course registration at SRM will include the MOOCs course registered.

7. The student must periodically submit the marks / grades obtained in various quizzes, assignments, tests etc immediately to the Faculty Advisor or the Course Coordinator for uploading in the university’s academic module.

8. The student must take the final test as a Proctored / Supervised test through a secure, physical testing center.

9. The student must submit the “Certificate of Completion” as well as the final overall Marks and / or Grade within the stipulated time for effecting the grade conversion and credit transfer, as per the regulations. It is solely the responsibility of the individual student to fulfil the above conditions to earn the credits.

10. The attendance for this course, for the purpose of awarding attendance grade, will be considered 100%, if the credits are transferred, after satisfying the above (1) to (7) norms; else if the credits are not transferred or transferable, the attendance will be considered as ZERO.

Learning Resources

1. https://swayam.gov.in/ 2. www.cousera.org 3. www.edx.org

4. www.it.iitb.ac.in 5. Any other online courses offered by reputed entity

Course Code

20GNP620T Course Name

MASSIVE OPEN OLINE COURSES Course

Category O OPEN ELECTIVE

L T P C

3 0 0 3

http://www.cousera.org/

http://www.edx.org/

http://www.it.iitb.ac.in/

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