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  • yms yieldmanagementsolutionswww.kla-tencor.com/ymsmagazineSummer 2007 | Issue 2

    The 45nm Innovation ChallengeThis issue of YMS magazine features a range of articles related to 45nm inspection and metrology, from the latest in mask inspection technology to unique cases involving the application of specialized metrology wafers

    Article TopicsDefect ManagementMetrologyFab EconomicsMaskData StorageProduct News

  • Summer 2007 Yield Management Solutions | www.kla-tencor.com/ymsmagazine

    Featured articles

    A New Approach to Identify Large, Yield Impacting Defects on Polished Si Wafers Hynix Semiconductor Corporation and KLA-Tencor Corporation

    Etch Process Monitoring by Electron Beam Wafer Inspection Powerchip Semiconductor and KLA-Tencor Corporation

    Enabling Manufacturing Productivity Improvement and Test Wafer Cost Reduction KLA-Tencor Corporation

    Wafer-Level Metrology Expands Process Applications at 45nm KLA-Tencor Corporation

    Spectroscopic Ellipsometry Film Metrology Braces for 45nm and Beyond KLA-Tencor Corporation

    Reducing Cycle Time Has Many Benefits KLA-Tencor Corporation

    Field Results from 45nm Die-to-Database Reticle Inspection Toppan Printing Co., Ltd, Advanced Mask Technology Center GmbH & Co and KLA-Tencor Corporation

    Applications of a Laser-Assisted Defect Detection System for CMP Slurry Development in Rigid Disk Polishing KLA-Tencor Corporation

    Product News

    Contents

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    Yield Management Solutions is published by KLA-Tencor Corporation. To receive Yield Management Solutions www.kla-tencor.com/ymsmagazine

    For literature requests, visit: www.kla-tencor.com/products

    2007 KLA-Tencor Corporation. All rights reserved. Material may not be reproduced without permission from KLA-Tencor Corporation. Products in this document are identified by trademarks of their respective companies or organizations.

    Editor-in-ChiefCharles Lewis

    Contributing WritersBecky PintoReeti PunjaLisa Garcia

    Production EditorRobert DellaCamera

    Art Director andProduction ManagerInga Talmantiene

    Production ConsultantJovita Rinkunaite

    Circulation EditorCathy Silva

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    Defect ManageMent

    Metrology

    fab econoMics

    Mask

    Data storage

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  • Summer 2007 Yield Management Solutions | www.kla-tencor.com/ymsmagazine

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    A New Approach to Identifying Large, Yield-Impacting Defects on Polished Si WafersKerem Kapkin, KeunSu Kim, Jason Saito, Hyosik Suh KLA-Tencor CorporationChung Geun Koh, Dae Jong Kim, Byeong Sam Moon, Seung Ho Pyi Hynix Semiconductor Corporation

    identify and sort out wafers with LLPDs before beginning device processing.

    Wafer manufacturers need to detect, accurately identify and separate these defects from the background population of large particles, which may be cleaned or reworked, while avoiding unneeded wafer rejection. Also, since LLPDs are a result of various wafer manufacturing process issues, wafer manufactur-ers must quickly identify the LLPD root cause and implement fixes to prevent unnecessary wafer scrap.

    In this article, we demonstrate a method for classifying these critical LLPDs by utilizing a new unpatterned wafer inspection system, the Surfscan SP2XP. The systems latest technologies of GC (global composite) and RBB (rules-based binning) have proven effective for both the wafer manufacturers final inspec-tion step and IC device manufacturing IQC (Incoming Quality Control) applications.

    For 45nm-generation wafers, innovations in bare wafer inspection technology provide enhanced capture and

    classification of large, shallow defects. New classification technology, combined with multi-channel processing, enables

    wafer manufacturers and IC device makers to find and separate these defects into categories based on whether they are

    cleanable, or require scrapping the wafer. Identifying these defects early in the manufacturing process enables improved

    product quality and higher yield.

    As devices continue to shrink, wafer surface condition, defect size, shape and type are becoming increasingly important factors in device yield, performance and reliability. ITRS (Inter national Technology Roadmap for Semiconductors) guidelines stipulate a sensitivity to critical defects on a bare wafer surface of a size equal to one-half the design rule.

    At the same time, IC manufacturers have been reducing the specification for the total number of defects allowed for accep-tance of incoming wafers and are now specifying limits on the number of large light point defects (LLPDs). These LLPDs are large but very shallow: they may be several microns wide but have a height of only a few nanometers. LLPDs are generated both during single-crystal silicon ingot growth and during the subsequent wafer-making and surface-preparation pro-cesses. These LLPDs manifest themselves on incoming bare silicon wafers in the form of faceted pits or bumps, air pockets and polishing scratches, and have a very high likelihood of becoming yield killer defects. Thus, IC manufacturers must

    Particle COP Residue Scratch

    0.1m 0.1m 0.1m 0.1m

    Figure 1: Conventional defects or LPDs (Light Point Defects) which require increased sensitivity for detection and classification.

    feature story

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  • Summer 2007 Yield Management Solutions | www.kla-tencor.com/ymsmagazine

    Wafer Defect Types and Their Sources

    Conventional small (sub-micron) defects that impact device yield include particles, COPs (crystal originated pits or particles), residues and scratches, and are well characterized. Examples of these defect types are pictured in Figure 1. Large particle defects on the wafer may originate from handling contamination, process equipment, or from the cleanrooms ambient environment. Many of these can be removed with various cleaning processes.

    LLPDs are more challenging to identify and characterize. A typical simplified Si wafer production scheme is shown in Figure 2. The source of faceted LLPD defects can be divided into two primary groups: the crystal-growing process and the wafering process.

    Previously, the full spectrum of LLPD defects could not be separated by type or source and could only be categorized as one group based on their darkfield scattering signatures. However, their identification and classification by individual type is very important. Wafer manufacturers can use this infor-mation to isolate various process-related problems and crystal growth issues, then implement corrective measures. IC device manufacturers can use classification information to create their incoming wafer quality acceptance specifications based on specific LLPD type, defect size and number.

    Conventional technology and methods in use by IC manufac-turers for testing incoming wafer quality are as follows: 1st Step - Unpatterned inspection tool 1st sampling 2nd Step - Manual visual inspection for confirmation 3rd Step - SEM verification

    Until now, wafer manufacturers have been unable to identify and classify LLPDs effectively, especially the separation of an

    important defect type on bare Si wafers faceted LLPDs (Figure 3). The most critical faceted LLPD is the air pocket defect, which forms during the crystal-pulling process and is distributed across the wafer within the silicon substrate. The size of the air pocket exposed to the surface is a function of its location and how much has been revealed during cutting and polishing of the wafer. While exposed air pockets can be measured in various sizes as pits, the buried ones in the bulk remain as voids.

    Other types of faceted defects are created by either mechanical or chemical damage during etching or polishing steps. Although they are limited to the wafer surface and do not exist within the substrate, they can affect implant profile, device topogra-phy and electrical properties, which can destroy a die. Some faceted LLPDs can be reworked with further polishing and etching if caught during inline process monitoring.

    Methods to Detect and Classify LLPD to Prevent Yield Impact

    Wafer manufacturers require a production-worthy inspection technology that allows inspection of all outgoing wafers for all defects of interest (DOIs), with high throughput and economi-cal operating cost. It is necessary to capture the full range of DOI types and to automatically classify them with the highest accuracy and purity. This will prevent out-of-spec wafers from reaching the IC device manufacturer and eliminate unnec