vlsi trendz and some basic linux

8/11/2019 VLSI trendz and some basic LINUX

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Assignment 2 VLSI beyond Moores law and SoC

Linux commands

- Rayyan Sayeed1MS12EC098


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Variation of Design Metrics

In the field of VLSI circuit, the scaling down or the decrease in size of

the semiconductors has happened roughly at an exponential rate. Thishas in turn has resulted in a significant increase in the density of thecircuits on the chip. At the nanometer level, due to the effects ofmanufacturing process variations, the design optimization process hastransitioned from the deterministic domain to the stochastic domain,and the inter- relationships among the specication parameters likedelay, power, reliability, noise and area have become more intricate.

ITRSThe International Technology Roadmap for Semiconductors, knownthroughout the world as the ITRS, is the fifteen-year assessment of thesemiconductor industrys future techno logy requirements. Thesefuture-needs drive present-day strategies for world-wide research anddevelopment among manufacturers research facilities, universities,and national labs.

Technology Nodes over the past years and Moore s Law We can see the technology nodes over the past years and draw aninference that the Semiconductor VLSI technology is roughly followingthe Moore s law. Moore s law basically states that the number

of transistors in a dense integrated circuit doubles approximately everytwo years. The law is named after Gordon E. Moore, co-founder of theIntel Corporation.
http://en.wikipedia.org/wiki/Transistorhttp://en.wikipedia.org/wiki/Integrated_circuithttp://en.wikipedia.org/wiki/Gordon_Moorehttp://en.wikipedia.org/wiki/Intel_Corporationhttp://en.wikipedia.org/wiki/Intel_Corporationhttp://en.wikipedia.org/wiki/Gordon_Moorehttp://en.wikipedia.org/wiki/Integrated_circuithttp://en.wikipedia.org/wiki/Transistor


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Year Technology Node

1971 10 m1974 6 m1977 3 m1982 1.5 m1985 1 m1989 800 nm1994 600 nm1995 350 nm1997 250 nm1999 180 nm2001 130 nm2004 90 nm2006 65 nm2008 45 nm2010 32 nm2012 22 nm2014 14 nm

Using Moore s law we can hence predict the technologies for thecoming years and determine the technology node.

2016 10 nm2018 7 nm2020 5 nm

5 nm by 2020!!!!


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Transistor CountAs the size of the transistor reduces it is quite obvious that we find theno. of transistors to increase. And yet again Moore s law comes into

picture.

So we see that the count of transistors has increased drastically. In1971 the count had been around 2000 In 2011 the transistor count


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Frequency trend

Making of Transistors over the past Years

NPN (discrete)Transistor FabricationThe first step is theselection of an n-typewafer this will act asthe collector of thedevice. The wafer mustbe heavily doped (N D ~1026m -3) in order toreduce the series


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resistance of the collector. A lightly-doped n-type epitaxial layer is then grown onthe surface to increase the reverse-breakdown voltage at the collector-base junction, which is reverse biased under normal operation. (The breakdownvoltage of a p-n junction decreases as the doping on either side increases.) Thenprocesses such as Photo-Lithography, MASKING, and etching are carried out tofabricate the rest

NMOS FabricationA layer of silicon dioxide (SiO2) typically1 micrometer thick isgrown all over the

surface of the waferto protect thesurface, acts as abarrier tothe dopant duringprocessing, andprovides agenerally insulating s

ubstrate on to which other layers may be deposited and patterned. The surface isnow covered with the photo resist which is deposited onto the wafer and spun toan even distribution of the required thickness. The photo resist layer is thenexposed to ultraviolet light through masking which defines those regions intowhich diffusion is to take place together with transistor channels. Assume, forexample, that those areas exposed to UV radiations are polymerized (hardened),but that the areas required for diffusion are shielded by the mask and remainunaffected. Thick oxide (SiO2) is grown over all again and is then masked withphoto resist and etched to expose selected areas of the poly silicon gate and thedrain and source areas where connections are to be made. (Contacts cut) Thewhole chip then has metal (aluminum) deposited over its surface to a thicknesstypically of 1 micro m. This metal layer is then masked and etched to form therequired interconnection pattern.


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Multi-Gate DevicesThe multiple gates may be controlled by a single gate electrode,wherein the multiple gate surfaces act electrically as a single gate, or byindependent gate electrodes. A multi-gate device employingindependent gate electrodes is sometimes called a MultipleIndependent Gate Field Effect Transistor (MIGFET).

FinFET

In the technical literature, FinFET is used somewhat generically todescribe any fin-based, multi-

gate transistor architectureregardless of number of gates.The distinguishing characteristicof the FinFET is that theconducting channel is wrappedby a thin silicon "fin", whichforms the body of the device.

The thickness of the fin(measured in the direction fromsource to drain) determines the

effective channel length of the device.

Gate-all-around (GAA) FETGate-all-around FETs are similar in concept to FinFETs except that the

gate material surrounds the channel region on all sides. Depending ondesign, gate-all-around FETs can have two or four effective gates. Gate-all-around FETs have been successfully built around a silicon nanowireand etched InGaAs nanowires.
http://en.wikipedia.org/wiki/Siliconhttp://en.wikipedia.org/wiki/Nanowirehttp://en.wikipedia.org/wiki/Indium_gallium_arsenidehttp://en.wikipedia.org/wiki/Indium_gallium_arsenidehttp://en.wikipedia.org/wiki/Nanowirehttp://en.wikipedia.org/wiki/Silicon


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Tri-gate FETsThese transistors employ a single gatestacked on top of two vertical gates

allowing for essentially three times thesurface area for electrons to travel. Intelreports that their tri-gate transistorsreduce leakage and consume farless power than current transistors. This

allows up to 37% higher speed, or power consumption at fewer than50% of the previous type of transistors used by Intel. Intel was the firstcompany to announce this technology.
http://en.wikipedia.org/wiki/Electronhttp://en.wikipedia.org/wiki/Subthreshold_leakagehttp://en.wikipedia.org/wiki/Electric_powerhttp://en.wikipedia.org/wiki/Electric_powerhttp://en.wikipedia.org/wiki/Subthreshold_leakagehttp://en.wikipedia.org/wiki/Electron


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ASIC Design Flow

We can broadly classify the ASIC flow design as FRONT end and BACKend. The back end process is carried out by the Tool. The front endprocess is controlled by the user and the process here can be optimized

greatly.SPECIFICATION:Specication is the most important portion of an ASIC design ow.In this step, the features and functionalities of an ASIC chip are dened.Chip planning is also performed in this step. During this process,


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architecture and microarchitecture are derived fromthe required features and functionalities.

ARCHITECTURAL DESIGN:Based on the functional specifications and design goals, the top level,block level architecture would be design on hierarchy. Thede ned architecture must take into consideration all required timing,voltage, and speed/performance of the design.Architectural simulations need to be performed on the draftedarchitecture to ensure that it meets the required specication.

SYNTHESIS:Synthesis is actually a process wherein Source code, .synth scripts, andDESIGN CONSTRAINTS are inputs to the process. And the outputs wouldbe Reports & Bugs, Design Database, And the Gate level VerilogDescription.

PLACEMENT:Each block is allocated its respective place in the floor and optimizationis done.

CLOCK TREE SYNTHESIS:The clock skews the delays that need to be taken care of and all thesetasks are done in clock tree synthesis.

DFT:Design For testability is the test done on the logic blocks. For example,the test of flip-flops is done through Muxes. And using scan insertednet-list files, and tested again if bugs are found.

FLOOR PLANNING & POWER PLANNING:Basically work for the optimization of the given logic based on the


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power consumption and also the position of each block of logic, basedon its interconnection with other blocks of logic.

VLSI beyond Moores Law

Moore's Law makes things useful. By increasing the number oftransistors on integrated circuits to several billions and reducing theirsize to mere nanometers, engineers can produce ever-fastermicroprocessors that are the same size, or even smaller, than the ones

in today's computers. At the same time, Moore's Law increasesefficiency and reduces costs of production. Moore's Law makes thingsuseful. By increasing the number of transistors on integrated circuits toseveral billions and reducing their size to mere nanometers, engineerscan produce ever-faster microprocessors that are the same size, oreven smaller, than the ones in today's computers. At the same time,Moore's Law increases efficiency and reduces costs of production.

In addition to this I also read an article which was quite interesting andseemed very apt for the Beyond Moores Law topic.

Crossbar nanowire chips combine to form tiny CPU for beyond-Moores -law electronics:As transistor technology continues its march forward with smaller,faster components, were getting ever closer to the point at wh ich the

realities of atomic scale will put an end to Moores law unless wefind a way around it. A team of researchers from Harvard and non-profit research company Mitre have devised a possible solution to theproblem using nanowires as a stand-in for traditional transistors in tinyprocessors.
http://computer.howstuffworks.com/moores-law.htmhttp://computer.howstuffworks.com/microprocessor.htmhttp://computer.howstuffworks.com/moores-law.htmhttp://computer.howstuffworks.com/microprocessor.htmhttp://www.extremetech.com/tag/transistorhttp://www.extremetech.com/tag/moores-lawhttp://www.extremetech.com/tag/moores-lawhttp://www.extremetech.com/tag/moores-lawhttp://www.extremetech.com/tag/moores-lawhttp://www.extremetech.com/tag/transistorhttp://computer.howstuffworks.com/microprocessor.htmhttp://computer.howstuffworks.com/moores-law.htmhttp://computer.howstuffworks.com/microprocessor.htmhttp://computer.howstuffworks.com/moores-law.htm


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The device created in the lab is by no means a match for moderncomputer processors, but it is built on a completely new process. Thechip designed by chemist Charles Lieber and his team uses germaniumcore nanowires just 15 nanometers wide. The wires themselves arecoated in silicon and are laid out in parallel on a silicon dioxidesubstrate. Embedded in the surface of the chip is a network ofchromium and gold contacts, but these run the opposite way, creatinga crisscross pattern.

Each of the points in the chip where the nanowire crosses theembedded contacts can act as a programmable transistor node.Applying voltage to the nanowires toggles them between on and off.The researchers call this a crossbar array .

Study of ITRS Road map

The objective of the ITRS is to ensure cost-effective advancements inthe performance of the integrated circuit and the advanced productsand applications that employ such devices, thereby continuing thehealth and success of this industry. The sponsoring organizations arethe European Semiconductor Industry Association, the JapanElectronics and Information Technology Industries Association, theKorean Semiconductor Industry Association, the Taiwan SemiconductorIndustry Association, and the United States Semiconductor IndustryAssociation.

With the progressive externalization of production tools to thesuppliers of specialized equipment, the need arose for a clear roadmapto anticipate the evolution of the market and to plan and control thetechnological needs of IC production. For several years,the Semiconductor Industry Association (SIA) gave this responsibility of
http://en.wikipedia.org/wiki/Semiconductor_Industry_Associationhttp://en.wikipedia.org/wiki/Semiconductor_Industry_Association


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coordination to the United States, which led to the creation of anAmerican style roadmap, the National Technology Roadmap forSemiconductors (NTRS).

(b) ITRS Table Structure Key Lithography-related Characteristics by ProductType

Near-term Years Long-term Years

YEAR of Production 200 3 200

4 200

5 200

6 200

7 200

8 200

9 201

0 201

2 201

3 201

5 201

6 201

8

Technology Node hp90 hp65 hp45 hp32 hp22

DRAM Pitch (nm) 100 90 80 70 65 57 50 45 35 32 25 22 18

MPU/ASIC M1 Pitch (nm) 120 107 95 85 75 67 60 54 42 38 30 27 21

MPU/ASIC Poly Si Pitch (nm) 107 90 80 70 65 57 50 45 35 32 25 22 18

MPU Printed Gate Length (nm) 65 53 45 40 35 32 28 25 20 18 14 13 10

MPU Physical Gate Length (nm) 45 37 32 28 25 22 20 18 14 13 10 9 7

(c) Additional Design Technology Requirements Year of Production 2003 2004 2005 2006 2007 2008 2009 2012 2015 2018 Driver Technology Node hp90 hp65 DRAM Pitch (nm) 100 90 80 70 65 57 50 35 25 18 MPU/ASIC Pitch (nm) 107 90 80 70 65 57 50 35 25 18 MPU Printed Gate Length (nm) 65 53 45 40 35 32 28 20 15 10 MPU Physical Gate Length (nm) 45 37 32 28 25 22 20 14 10 7 SOC new design cycle (months) 12 12 12 12 12 12 11 11 10 9 SOC SOC logic Mtx per designer-year (10-person team) 1.9 2.5 3.3 4.3 5.4 7.4 10.6 24.6 73.4 113 SOC SOC dynamic power reduction beyond scaling (X) 0 0.1 0.1 0.2 0.2 0.2 0.2 6 4.7 8.1 SOC SOC standby power reduction beyond scaling (X) 0.37 1.4 2.4 3.4 5.1 6.4 8.73 18.8 44.4 232 SOC

%Test covered by BIST 20 20 25 30 35 40 45 60 75 90 MPU,SOC

Mtx Million transistors

Manufacturable solutions exist, and are being optimized Manufacturable solutions are known

Interim solutions are known

Manufacturable solutions are NOT known

Source: 2003 ITRS , Tables A, B, and 19, 1, 7, 124.


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Basic Linux Commands

mkdirThis command is used to create a new directory or simply a newfolder inside the folder of the current pathSyntax: mkdir folder_nameExample: $ mkdir ADLD

cdThis command is basically used to change our working directory.The directory name specified should have been created already.Syntax: cd folder_nameExample: cd SIM

cd ~This is used to go to the root folder directly

cd ..This command is used to go the parent folder of the current

working directory vivi basically opens the text editor after creating the file specified.The file will be open for editing once the insert / I key ispressed.Syntax: $ vi file_name.extensionExample: $ vi file.v

:q!Is used to exit the editor without saving the current file.Command basic ally works after Escape key is pressed.


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:wq!Is used to write into the file and then quit it. Command basicallyworks after Escape key is pressed.

:xexecutes the file and then quit. Command basically works afterEscape key is pressed.

cpCommand to copy file1 to file2 preserving the mode, ownershipand timestamp.

$ cp -p file1 file2

Copy file1 to file2. if file2 exists prompt for confirmationbefore overwriting it.

$ cp -i file1 file2 mv

command to rename file1 to file2. if file2 exists prompt forconfirmation before overwriting it.$ mv -i file1 file2$ mv -v will print what is happening during file rename.

lsThis command lists out all the files in the working directory, andlists the information of the files.Usage can be made anywhere.

ls alists out even the hidden files and folders in the working directory.

catThe most common use of cat is to read the contents of files, andcat is often the most convenient command for this purpose.


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Syntax: cat file_nameExample: cat file1

cat file1 > file2

the output from cat is written to file2 instead of being displayedon the monitor screen.

cat >file.extensionThis commands creates the file with the extension and alsoenables the user to write into it at the same time.

cat file1 file2 >file3The contents of file1 and file2 will be copied into file3, with the

contents of file2 after file2. pwd

This is a quite helpful command which gives the path of theworking directory

References:Wikipedia, couple of journals, ITRS website..

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