virgo - aicipc.com boards/virgo_usermanual.pdfvirgo is an ideal server grade motherboard that is...
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UM_Virgo_v4.4_120919
VirgoServer Motherboard
User's Manual
Content
Table of ContentsPreface ������������������������������������������������������������������������������������������������� iSafety Instructions ������������������������������������������������������������������������������ iiAbout This Manual ������������������������������������������������������������������������������ iii
Chapter 1� Product Features ��������������������������������������������������������������11�1 Components ��������������������������������������������������������������������������������������11.2 Specifications������������������������������������������������������������������������������������21�3 Feature ����������������������������������������������������������������������������������������������3
Chapter 2� Hardware Setup ����������������������������������������������������������������42�1 Central Processing Unit Setup ����������������������������������������������������������4
2.1.1 Processor Installation ........................................................................................42�2 System Memory ��������������������������������������������������������������������������������7
2.2.1 DIMM Population ................................................................................................82.2.2 DCPMM DIMM Population ............................................................................. 102.2.3 Memory Installation ........................................................................................ 11
Chapter 3� Motherboard Settings ����������������������������������������������������� 123�1 Block Diagram ���������������������������������������������������������������������������������123�2 Content List �������������������������������������������������������������������������������������133�3 Placement ���������������������������������������������������������������������������������������143�4 Connector and Jumper ��������������������������������������������������������������������15
3.4.1 Connector ......................................................................................................... 153.4.2 Jumper ............................................................................................................. 19
3�5 System LED Indicator����������������������������������������������������������������������203.5.1 Internal LED ...................................................................................................... 20
Chapter 4. BIOS Configuration Settings ������������������������������������������� 214�1 Navigation Keys �������������������������������������������������������������������������������214�2 BIOS Setup ��������������������������������������������������������������������������������������22
4.2.1 Menu ................................................................................................................. 224.2.2 Startup .............................................................................................................. 224.2.3 Update .............................................................................................................. 254.2.4 DCPMM Setup .................................................................................................. 27
4�3 Main �����������������������������������������������������������������������������������������������324.3.1 Main .................................................................................................................. 32
4�4 Advanced ����������������������������������������������������������������������������������������334.4.1 Peripheral Configuration ................................................................................. 334.4.2 Video Configuration ......................................................................................... 334.4.3 OEMBoard Function ......................................................................................... 334.4.4 SIO AST2500 .................................................................................................... 344.4.5 Socket Configuration ....................................................................................... 344.4.6 ME Configuration ............................................................................................. 40
4.4.7 PCH Configuration ........................................................................................... 414.4.8 H2O IPMI Configuration .................................................................................. 424.4.9 APEI Configuration........................................................................................... 424.4.10 Console Redirection ...................................................................................... 424.4.11 H2O Event Log Config Manager .................................................................... 434.4.12 H2oUve Configuration ................................................................................... 43
4�5 Security �������������������������������������������������������������������������������������������444.5.1 Security ............................................................................................................ 44
4�6 Power ����������������������������������������������������������������������������������������������454.6.1 Power ............................................................................................................... 45
4�7 Boot ������������������������������������������������������������������������������������������������464.7.1 Boot .................................................................................................................. 46
4�8 Exit ��������������������������������������������������������������������������������������������������474.8.1 Exit .................................................................................................................... 47
Chapter 5. BMC Configuration Settings �������������������������������������������� 485�1 Network Settings �����������������������������������������������������������������������������485�2 Web GUI ������������������������������������������������������������������������������������������515�3 Firmware Update �����������������������������������������������������������������������������55
Chapter 6� Technical Support ����������������������������������������������������������� 60
Content
Copyright © 2017 AIC, Inc. All Rights Reserved.
This document contains proprietary information about AIC products and is not to be disclosed or used except in accordance with applicable agreements.
Document Release History
Release Date Version Update Content
March2017 1 User's Manual release to public.
July2017 2 1. Gramnatical Error
2. Connector and Jumper
September 2018 3 1. BIOS update
2. New Cover
October2018 3.1 Specification update
January2019 4
1. HW update2. Specification update3. BMC update
August2019 4.1 1. BIOS update
2. DIMM Configuration update
September2019 4.2 Jumper update
November2019 4.3 1.BIOS update
2. Specification update.
December2019 4.4 SW update.
i
Copyright
No part of this publication may be reproduced, stored in a retrieval system, or transmitted in any form or by any means, electronic, mechanical, photo-static, recording or otherwise, without the prior written consent of the manufacturer.
Trademarks
All products and trade names used in this document are trademarks or registered trademarks of their respective holders.
Changes
The material in this document is for information purposes only and is subject to change without notice.
Warning
1. A shielded-type power cord is required in order to meet FCC emission limits and also to prevent interference to the nearby radio and television reception. It is essential that only the supplied power cord be used.
2. Use only shielded cables to connect I/O devices to this equipment.3. You are cautioned that changes or modifications not expressly approved by the
party responsible for compliance could void your authority to operate the equipment.
Disclaimer
AIC shall not be liable for technical or editorial errors or omissions contained herein. The information provided is provided "as is" without warranty of any kind. To the extent permitted by law, neither AIC or its affiliates, subcontractors or suppliers will be liable for incidental, special or consequential damages including downtime cost; lost profits; damages relating to the procurement of substitute products or services; or damages for loss of data, or software restoration. The information in this document is subject to change without notice.
Instruction Symbols
Special attention should be given to the instruction symbols below.
NOTE This symbol indicates that there is an explanatory or supplementary instruction.
CAUTION This symbol denotes possible hardware impairment. Upmost precaution must be taken to prevent serious harware damage.
WARNINGThis symbol serves as a warning alert for potential body injury. The user may suffer possible injury from disregard or lack of attention.
Preface
ii
When installing, operating, or performing maintenance on this equipment, the following safety precautions should always be observed in order to reduce the risk of fire, electric shock, and personal injury.
Read and understand all instructions.• Observe warnings and instructions marked on the product.• For proper mounting instructions, please consult the User’s Manual provided with this
product.• Do NOT place this product on an unstable cart, stand, table or uneven surface that
might cause the product to fall and sustain serious damage.• Only install the equipment identified in the User’s Manual. Use of other equipment
could cause improper connection of circuitry and may result in fire or personal injury.• This product should only be operated with the type of power source indicated on the
marked label. If you are uncertain about which type of power supply is used in your area, consult your dealer or local Power Company.
• Disconnect the power supply module before removing power from the system. Unplug this product from the wall outlet before cleaning. Use a damp cloth for cleaning. Do not use liquid cleaners or aerosol cleaners.
• Do not use this product near a water source, such as a faucet.• Never spill liquids of any kind on this product.• Never shove objects of any kind into this product’s open slots, as they may touch
dangerous voltage points or short out parts and could result in fire or electric shock.• Do not block or cover slots and openings in this unit, as they were made for ventilation
and prevent this unit from overheating. Do not place this product in a built-in installation unless proper ventilation is available.
• Do not disassemble this product. This product should only be taken apart by trained personnel. Opening or removing covers and circuit boards may expose you to electric shock or other risks. Incorrect reassembly can also cause electric shock when the unit is subsequently used.
• Risk of explosion is possible if battery is replaced with an incompatible type. Dispose of used batteries accordingly.
• This product is equipped with a three-wire grounding type plug, a plug with a third (grounding) pin. As a safety feature, this plug is intended to fit only into a grounding type power outlet. If you are unable to insert the plug into the outlet, contact your electrician to replace the outlet. Do not remove the grounding type plug or use a 3-Prong To 2-Prong Adapter to circumvent the safety feature; doing so may result in electric shock and/or damage to this product.
Safety Instructions
iii
Thank you for selecting and purchasing the Virgo Serverboard.This user's manual is provided for professional technicians to perform easy hardware setup, basic system configurations, and quick software startup. This document pellucidly presents a brief overview of the product design, device installation, and firmware settings for the Virgo motherboard. For the latest version of this user's manual, please refer to the AIC website: https://www.aicipc.com/en/productdetail/20855.
Chapter 1 Product FeaturesThis chapter delivers the overall layout of the product, including the fundamental components on the motherboard, design specifications, and noteworthy features. Virgo is an ideal server grade motherboard that is specifically designed to accommodate diverse enterprises for managing heavy workloads, databases, nearline applications, and cloud deployments. This product supports the Intel® Xeon® Scalable Processors and Socket P0 (LGA-3647) with a memory support 12 DDR4 2400/2666 MHz DIMM accross 6 channels per CPU.
Chapter 2 Hardware SetupThis chapter displays an easy installation guide for assembling the CPU (Central Processing Unit) and memory module. Utmost caution for proceeding to set up the hardware is highly advised. The components on the motherboard are highly fragile and vulnerable to exterior influence. Do not attempt to endanger the device by placing the device in a potentially unstable or hazardous surroundings, including positioning the device on an uneven grounds or humid environments.
Chapter 3 Motherboard SettingsThis chapter elaborates the overall layout of the server motherboard, including multifarious connectors, jumpers, and LED descriptions. These descriptions assist users to configure different settings and functions of the motherboard, as well as to confirm the location of each connector and jumper.
Chapter 4 BIOS Configuration SettingsThis chapter introduces the key features of BIOS, including the descriptions and option keys for diverse functions. These details provide users to effortlessly navigate and configure the input/output devices.
Chapter 5 BMC Configuration SettingsThis chapter illustrates the diverse functions of IPMI BMC, including the details on logging into the web page and assorted definitions. These descriptions are helpful in configuring various functions through Web GUI without entering the BIOS setup. For more information of BMC configurations, please refer to IPMI BMC (Aspeed AST2500) User's Manual for a more detailed description.
Chapter 6 Technical SupportFor more information or suggestion, please contact the nearest AIC corporation representative in your district or visit the AIC website: https://www.aicipc.com/en/index. It is our greatest honor to provide the best service for our customers.
About This Manual
1
Chapter 1. Product FeaturesVirgo User Manual
VIRGO
Product specifications and features are subject to change without prior notice�
Spica User Manual Chapter 1. Product FeaturesChapter 1� Product Features
1�1 Components
Dimensions
mm : 304.8 x 330.2inches : 12 x 13
Serial Port
VGA Port
2 x USB 3.0 + RJ45dedicated NIC for BMC
Intel® PCH Integrated10G (Dual SFP+)
Aspeed AST2500BMC + Video (IPMI 2.0)
6 x SFF-8643 Connectors (Supports 6 x PCIe x4 for NVMe SSD)
2 x 10G SFI by SFF-8612 (Oculink)
(PCH C624 SKU only)
1 x M.2 Key (2242/2280) supports
SATA/PCIe x4
3 x PCIe Gen3 x8 Slot
2 x PCIe Gen3 x16 Slot
Total 10 x SATA 6Gb/s(8 Ports by 2 x Mini-SAS +
2 Ports by 7-pin SATA)
2 x Mini-SAS HD Supports 8 x SAS 12G
Broadcom SAS3008 IOC Controller (Optional)
Intel® PCH (Lewisburg)
6 x DDR4 DIMM Slots6 Channel (from CPU0)
LGA3647 Socket P0 for Intel® Xeon® Processor Skylake-SP (CPU0)
6 x DDR4 DIMM Slots6 Channel (from CPU1)
LGA3647 Socket P0 for Intel® Xeon® Processor Skylake-SP (CPU1)
2
Chapter 1. Product FeaturesVirgo User Manual
1.2 Specifications
System
Processor Support
Intel® Xeon® Scalable Processors (Skylake/Cascade Lake/Cascade Lake Refresh)
CPU TDP 165W
UPI Speeds 10.4 GT/s, 9.6 GT/s
Socket Type Socket P0 (LGA-3647 Socket)
System Memory
1 x DIMM per channel
DDR4 2400/2666MHz RDIMM/LRDIMM (feature supports up to DDR4 2933MHz by next gen. process upgrade) - up to 192GB RDIMM SRx4 - up to 384GB RDIMM DRx4 - up to 1536GB RDIMM 3DS 8Rx4 - up to 768GB LRDIMM QRx4 - up to 1536GB LRDIMM 3DS 8Rx4
(Apache Pass) support
ExpansionSlots
additional bracket) supports SATA/PCIe x4
System BIOS
BIOS Type Insyde UEFI BIOS
BIOS Features
redirection
Mode
On-board Devices
SATA/SAS
Intel® Lewisburg PCH on-chip solution
8 ports 12G SAS via 2 x mini-SAS HD (optional)
BMC
Aspeed AST2500 Advanced PCIe Graphics & Remote Management Processor
Serial over LAN
On-board Devices
Network Controller
Controller with dual SFP+ rear connectors
(KR/SFI/XFI) by onboard header (optional by PCH C624 SKU)
BMC dedicated management port
Graphics
Aspeed AST2500 Advanced PCIe Graphics & Remote Management Processor
Input/Output
Serial ATA10 x SATA 6.0 Gb/s ports
LAN dual ports: 10G KR/SFI/XFI (optional by PCH C624 SKU)
management
USB USB3.0/USB2.0
VGA (share with external VGA port)
Serial Port
Other
Additional Information
SAS (Optional)
ports SAS 12 Gb/s
3
Chapter 1. Product FeaturesVirgo User Manual
The Virgo server board offers the latest Intel® Xeon® Scalable Processors technology solutions with compelling performance and provides premium power efficiency, which is optimized for efficient performance platforms (storage, security and communications in-frastructure).
By implementing Intel® Xeon® Scalable Processors, fully integrated microarchitecture, the Virgo server board delivers unmatched performance, providing six channels of DDR4 2400/2666MHz (feature supports up to DDR4 2933MHz by next gen. process upgrade) per socket, dual 10GbE SFP+ and optional internal connector to support configurable dual ports for 10GbE (KR/ SFI/XFI) or 1GbE (KX), and optional Broadcom SAS3008 SAS IOC on-board.
Featured with ground breaking technologies including Intel® Next Generation Microar-chitecture and Instruction Set (AVX-512, VMD, QAT - optional by PCH SKU), Speed Shift Technology, UPI link speeds up to 10.4GT/s, the Virgo server board enable next generation server solutions with an incredible leap in performance in a standard EATX form factor platform.
• Supports Intel® Xeon® Scalable Processors for highest server performance and improved power efficiency
• Supports 2 x PCIe Gen3 x16 slots + 3 x PCIe Gen3 x8 slots + 6 x SFF-8643 each supports PCIe Gen3 x4
• Supports one NGFF (M.2) with PCIe Gen3 x4 / SATA co-design
• Broadcom SAS3008 SAS/SATA I/O Controller for 12Gb/s SAS
• Onboard dual ports 10GbE SFP+ and optional two configurable ports support 10GbE (KR/SFI/XFI) or 1GbE (KX), by internal connector supported by Intel®Lewisburg PCH
• Onboard Baseboard Management Controller for system management and IPMI control
• Embedded components for 5+ year long life
1�3 Feature
4
Chapter 2. Hardware SetupVirgo User ManualChapter 2� Hardware Setup
This section describes a simple instruction guide for installing the hardware components on the serverboard system. Turn off and unplug all system and peripheral devices before proceeding.
2�1 Central Processing Unit Setup The serverboard supports dual Xeon scalable processors and Socket P0 (LGA-3647).
2�1�1 Processor Installation
To ensure a safe and easy setup, you need to prepare before installation:
a T20 Torx screwdriver
ESD wrist strap/mat and conductive foam pad
CAUTIONThe pins of the processor socket are vulerable and easily susceptible to damage if fingers or any foreign objects are pressed against them. Please keep the socket protective cover on when the processor is not installed.
CAUTIONWhen unpacking a processor, hold the processor only by its edges to avoid touching the contacts.
Standard Processor Assembly: A standard processor assembly is comprised of PHM(Processor Heat sink Module) components and processor socket assembly.
Heat sink
Standard Processor Clip
Standard Processor
Bolster Plate
Precsessor Socket
PHM Components
Processor Socket Assembly
5
Chapter 2. Hardware SetupVirgo User Manual
Processor Socker Assembly:The server board includes two processor sockets (LGA-3647), supports two Intel® Xeon® Processor Scalable Family and has a Thermal Design Power (TDP) of up to 165W on selected models.
PHM (Processor Heat sink Module) Component:
Non Frabic Processor
Non FrabicProcessor Clip
Heat sink
6
Chapter 2. Hardware SetupVirgo User Manual
PHM Screw Installation Order:The PHM sits level with the processor socket assembly. The PHM is NOT installed properly if it does not sit level with the processor socket assembly. Once the PHM is seated over the processor socket assembly, the four heat sink torque screws must be secured in the following order as shown below.
Processor Heat Sink – Top View with Screw Tightening Order
NOTE Failure to tighten the heat sink screws in the specified order may cause damage to the processor socket assembly. Heat sink screws should be tighted to 12 in-lbs torque according to the ndicated order on the top of the heat sink label.
7
Chapter 2. Hardware SetupVirgo User Manual
This server board supports up to twelve DDR4 2400 and 2666 Registered ECC DRAM/ Load-Reduced DIMM (LRDIMM)
2�2 System Memory
NOTE-In Virgo case, the lanes from CPU#0 are routed to PCIe slots 1 & 5 and onboard SFF-
8643.-The lanes from CPU#1 are routed to PCIe slots 2/3/4 and the onboard SFF-8643.
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145
146
221222
77 79
287
288
143
144
223
220
7678
1
145
146
221
222
7779
287
288
143
144
223
220
7678
1
145
146
221
222
7779
287
288
143
144
223
220
7678
221
222
7779
287
288
143
144
223
220
7678
1
221
222
7779
287
288
143
144
1
5
61
23
4
5
78
9
pcb
outl
ine
pcb outline
9
CPU1CPU1
CPU0CPU0
JDIMML0JDIMMK0JDIMMJ0
JDIMML0JDIMMK0JDIMMJ0
JDIMMG0JDIMMH0JDIMMI0
JDIMMG0JDIMMH0JDIMMI0
JDIMMC0JDIMMB0JDIMMA0
JDIMMC0JDIMMB0JDIMMA0
JDIMMD0JDIMME0JDIMMF0
JDIMMD0JDIMME0JDIMMF0
1SFF-8643 2SFF-8643
PCIE5
PCIE4
PCIE3
PCIE2
PCIE1
8
Chapter 2. Hardware SetupVirgo User Manual
2�2�1 DIMM Population
DIMM Numbers DIMM ARRANGMENT
2 DIMMs CPU1 CPU0
JDIMM_L0 JDIMM_C0
JDIMML0 JDIMMC0JDIMMK0 JDIMMB0JDIMMJ0 JDIMMA0
JDIMMG0 JDIMMD0JDIMMH0 JDIMME0JDIMMI0 JDIMMF0
CPU 1CPU 1CPU 1 CPU 0CPU 0CPU 0
JDIMML0 JDIMMC0JDIMMK0 JDIMMB0JDIMMJ0 JDIMMA0
JDIMMG0 JDIMMD0JDIMMH0 JDIMME0JDIMMI0 JDIMMF0
CPU 1CPU 1CPU 1 CPU 0CPU 0CPU 04 DIMMs
CPU1 CPU0
JDIMM_L0 JDIMM_C0
JDIMM_J0 JDIMM_A0
JDIMML0 JDIMMC0JDIMMK0 JDIMMB0JDIMMJ0 JDIMMA0
JDIMMG0 JDIMMD0JDIMMH0 JDIMME0JDIMMI0 JDIMMF0
CPU 1CPU 1CPU 1 CPU 0CPU 0CPU 06 DIMMs
CPU1 CPU0
JDIMM_L0 JDIMM_C0
JDIMM_J0 JDIMM_A0
JDIMM_I0 JDIMM_F0
JDIMML0 JDIMMC0JDIMMK0 JDIMMB0JDIMMJ0 JDIMMA0
JDIMMG0 JDIMMD0JDIMMH0 JDIMME0JDIMMI0 JDIMMF0
CPU 1CPU 1CPU 1 CPU 0CPU 0CPU 08 DIMMs
CPU1 CPU0
JDIMM_L0 JDIMM_C0
JDIMM_J0 JDIMM_A0
JDIMM_G0 JDIMM_D0
JDIMM_I0 JDIMM_F0
9
Chapter 2. Hardware SetupVirgo User Manual
JDIMML0 JDIMMC0JDIMMK0 JDIMMB0JDIMMJ0 JDIMMA0
JDIMMG0 JDIMMD0JDIMMH0 JDIMME0JDIMMI0 JDIMMF0
CPU 1CPU 1CPU 1 CPU 0CPU 0CPU 0CPU1 CPU0
JDIMM_L0 JDIMM_C0JDIMM_K0 JDIMM_B0JDIMM_J0 JDIMM_A0JDIMM_G0 JDIMM_D0JDIMM_I0 JDIMM_F0
10 DIMMs
JDIMML0 JDIMMC0JDIMMK0 JDIMMB0JDIMMJ0 JDIMMA0
JDIMMG0 JDIMMD0JDIMMH0 JDIMME0JDIMMI0 JDIMMF0
CPU 1CPU 1CPU 1 CPU 0CPU 0CPU 0
CPU1 CPU0JDIMM_L0 JDIMM_C0JDIMM_K0 JDIMM_B0JDIMM_J0 JDIMM_A0JDIMM_G0 JDIMM_D0JDIMM_H0 JDIMM_E0JDIMM_I0 JDIMM_F0
12 DIMMs
10
Chapter 2. Hardware SetupVirgo User Manual
2�2�2 DCPMM DIMM Population CPU0 CPU1
DIMM JDIMMF0 JDIMME0 JDIMMD0 JDIMMA0 JDIMMB0 JDIMMC0 JDIMML0 JDIMMK0 JDIMMJ0 JDIMMG0 JDIMMH0 JDIMMI0
App Direct Mode
DCPMM DRAM1 DRAM1 DRAM1 DRAM1 DCPMM - - - - - -
Memory Mode
DCPMM DRAM2 DRAM2 DRAM2 DRAM2 DCPMM - - - - - -
Mixed Memory
ModeDCPMM DRAM3 DRAM3 DRAM3 DRAM3 DCPMM - - - - - -
App Direct Mode
DCPMM DRAM1 DRAM1 DRAM1 DRAM1 DCPMM DCPMM DRAM1 DRAM1 DRAM1 DRAM1 DCPMM
Memory Mode
DCPMM DRAM2 DRAM2 DRAM2 DRAM2 DCPMM DCPMM DRAM2 DRAM2 DRAM2 DRAM2 DCPMM
Mixed Memory
ModeDCPMM DRAM3 DRAM3 DRAM3 DRAM3 DCPMM DCPMM DRAM3 DRAM3 DRAM3 DRAM3 DCPMM
NOTEDIMM Type RDIMM 3DS RDIMM LRDIMM 3DS LRDIMM CapacityDRAM1 Any CapacityDRAM2 ≥32GBDRAM3 Any CapacityDCPMM Any Capacity (Uniformly for all channels for system configuration)
NOTEPlease abide to the DCPMM population rules listed below for your system to function accordingly.
• There is only a maximun of 1 DCPMM in each channel.• Populate DCPMM DIMM on IMC0 before IMC1.
11
Chapter 2. Hardware SetupVirgo User Manual
2�2�3 Memory Installation
Step 1 Unlock the dimm socket by pressing the retaining clips outward.
Step 2 Insert the memory module into the slot. Make sure that the DIMM notch is
accurately positioned.
Step 3 Close the retaining clips to complete installation.
DIMM notch
12
Chapter 3. Motherboard SettingsVirgo User Manual
This section describes the jumpers, internal connectors and internal LEDs setting on Virgo motherboard. The motherboard layout and important jumper settings are listed below.
3�1 Block Diagram
Chapter 3� Motherboard Settings
DMI GEN3@8GT/s
LGA3647-0 Socket
SPI FlashW25Q64BVSSIG
CPU TDP 165W
Platform Environment Control Interface(PECI)
DMI3 x 4
MX25L51245GMI-10GFlash
Debug port
USB#3USB#2
ECC DDR4 (1866/2133/2400/2667)
CPU0
MUX
USB#0USB#1
DIMM #A0DIMM #B0
DIMM #C0DIMM #D0
DIMM #E0
CPU0_VRD VR13
XDP
Skylake-SP(Cascade Lake-SP)
CPU1
LGA3647-0 Socket
DIMM #G0
CPU TDP 165W
DIMM #I0 DIMM #K0DIMM #L0
ECC DDR4 (1866/2133/2400/2667)
TDP 19W
Lewisburg-4 PCH
SATAPort #0~9
SATA#0SATA#1
SATA#2SATA#3
PCIe slot X8 (Support NTB)
PCIe slot X16
Port3(IOU2)
PCI-E GEN3 @8GT/s X8
Port2(IOU1)
PCI-E GEN3 @8GT/s X16
Port3(IOU2) Port1(IOU0)
LPC/eSPI
Platform Environment Control Interface(PECI)
@6Gb/s
SATA#6SATA#7
USB2.0 Port #0~3@5Gb/s
USB3.0 Port #0~3
DIMM #F0DIMM #H0 DIMM #J0
CPU1_VRD VR13
PCIe slot2
PCIe slot3
PCIe slot4
PCIe slot5
Port2(IOU1)
NGFF M.2 2242/2280
MUX x1
PCIE x4 or SATA x1
PCI-E GEN3 @8GT/s X4 & SATA @6Gb/s
SATAPort #10@6Gb/s
SATA#8SATA#9
PCI Express x 4
PCI Express x 16
PCIe slot X16
PCI-E GEN3 @8GT/s X16
LSISAS3008
SASPort x4
@12Gb/sSASPort x4
@12Gb/s
PCI Express x 16
S25FL256SAGMFI001
NVSRAMCY14V101LA-BA25
FlashUART0
Debug portICE0
Debug port
PCIe slot X8
PCI-E GEN3 @8GT/s X8
Port1(IOU0)
PCIE x 8PCI-E GEN3@8GT/s
SFF-8643
SFF-8643PCI Express x 4
Port1a(IOU0)
Port1c(IOU0)
Port1d(IOU0)
PCI Express x 8Port3c(IOU2)
Port2a(IOU1)
Port2a(IOU1)
Skylake-SP(Cascade Lake-SP)
Port3a(IOU2)
PCI Express x 4
SATA#4
SPI
NUVOTONNPCT650
SPI FlashW25Q256FVFIQ
TPM 2.0
(Internal Box Header )
Edge Connector
RJ45 x1
SPI
SPI2
USB(X2)RMII
Aspeed AST2500
VGA CONN
VGA Pin Header
PCI Express x 1
COM1(DB-9 CONN)
Pin HeaderBMC Debug
Box Header
COM2
(1x3 pin)
JCOM4(2x5 pin)
USB(X2)
ADM213
ADM213
COM5
USB2.0 Port #4~5
Box Header(2x5 pin)
SFP x2
NCSI
ADM213
COM1
AST_USB Port #0~1 to PCH Port #4~5
EDY4016AABG-DR-F-DDDR4 x16
COM4LCMPin Header(1x5 pin)
Secure boot key
PCI Express x 8
Port3c(IOU2)PCI Express x 8
UPIUPI @10.4GT/s
UPI1
UPI0
UPI0
UPI1 UPI
UPI @10.4GT/s
SFF-8643
SFF-8643
PCIe slot X8 (Support NTB)
PCIe slot1
PCI Express x 8Port3a(IOU2)
PCI-E GEN3 @8GT/s X8
SFF-8643
SFF-8643
SFF-8643
SFF-8643Port1a(IOU0)PCI Express x 4
Port1b(IOU0)PCI Express x 4
Port1c(IOU0)PCI Express x 4
Port1d(IOU0)PCI Express x 4
10/100Mbps dedicatemanagement port
RTL8201EL
SFIx2
SFIx2
I2C4
LM95241CIMM
LM95241CIMM-1
LM95241CIMM-2
SFF-8612
SATA#5
PCI-E GEN3 @8GT/s X4
PCI-E GEN3 @8GT/s X4
PCI-E GEN3 @8GT/s X4
PCI-E GEN3 @8GT/s X4
PCI-E GEN3 @8GT/s X4
PCI-E GEN3 @8GT/s X4
13
Chapter 3. Motherboard SettingsVirgo User Manual
Connector/Jumper/Header Location Connector/Jumper/Header Location1a1b1c
Power Supply Connector
JPWR1, JPWR3, JPWR4 27 Front I/O USB Header JUSB_INT
2 Power Supply Connector JPWR2 28 SSI Front Panel Header JFRNT_SSI
3a3b3c
External Thermal Sensor J2, J13, J24 29 NGFF Connector JNGFF
4a4b4c
CPU Fan HeaderPCH Fan Header
J1 & J22 J21 30 Internal 10GbE
(Reserved) J7
5a5b5c5d5e5f
Fan Header J15, J16, J17, J23, J18, J14 31 SPI ROM Socket JSPI_BIOS
6 SAS IOC ActivityLED Header J19 32 ESPI Header JESPI
7 SAS IOC ErrorLED Header J25 33 Debug Port Header JLPC_DP
8 PMBUS Header JPMBUS 34 PCIe Hot-Plug SMB Header JPCIE_HP
9 SAS IOC UART Header J2035a35b35c
PCIe Hot-Plug Front Panel Header J4, J5, J6
10 SFF-8643 Connector(PCIE)
CN1, CN2, CN3, CN4,CN5, CN6
36 ME Force Recovery Mode Jumper J3
11 SFF-8643 Connector(SAS) CN7, CN8 37 BMC Debug Port Select
Jumper J27
12 Battery Socket JBAT 38a38b Front COM Header JCOM1
JCOM413a13b Serial ATA SATA4
SATA5 39 VROC KEY Header JRAID_KEY14a14b
SATA4 & SATA5 Pin-7 Power Header
J10J11 40 LCM Header JLCM
15 PCH SSGPIO Header JSSGPIO 41 10GbE Carrier Board Header (Reserved) J28
16 Clear CMOS Jumper JCMOS 42 BMC Debug Port Header JBMC_DP17 PCH GPIO Header JPCH_GPIO 43 BMC Reset Jumper JBMC_RST18 BIOS Recovery Mode
Jumper J9 44 BMC I2C1 Header JBMC_I2C1
19Flash Descriptor Security override Jumper
J8 45 BMC GPIO Header JBMC_GPIO
20 NTB JNTB 46 Intruder JINTRUDER21 Speaker JSPKR 47 BMC Buzzer JBUZZER22 System PG Lock JPG_LOCK 48 BMC I2C10 Header JBMC_I2C1023 SATA-DOM Power
Connector JDOM_PWR 49 BMC Disable Jumper JBMC_DIS24 SAS IOC ICE Header J12 50 PCH SGPIO Header JSGPIO25a25b Mini SAS Connector SATA0_3
SATA6_9 51 Front VGA Header JVGA_INT
26 No Reboot(Watch Dog) Jumper J26 52 Power Supply Connector JPWR5
3�2 Content List
14
Chapter 3. Motherboard SettingsVirgo User Manual
3�3 Placement
2B
18
A18
A1 B1
B18
A18
A1 B1
A1
B21
1
2
3 4
4
1
5
12
37
89
TR
PN
ML
KJ
HG
FD
DC
BA
7060 6545 50 5535 4025 3015 205 10
AC
LJGE
ABYV
RN
ANALAJAFAD
BDBBAYAVAR
BU
BNBR
BLBJBF
CABW
144
288
77
222
221
145
1 78
144
288
77
222
221
145
1 78
144
288
77
222
221
145
1 78
EE
DY
DU
DJ
DA
CN
CE
BU
BJ
BA
AN
AE
U
J
A
87
65
43
2143
4241
4039
3837
3635
3433
3231
3029
2827
2625
2423
2221
2019
1817
16
1514
1312
1110
97978
7776
7574
73
7271
7069
6867
6665
6463
6261
6059
5857
5655
5453
5251
5049
4847
4645
448685
8483
8281
80
EE
DY
DU
DJ
DA
CN
CE
BU
BJ
BA
AN
AE
U
J
A
87
65
43
21 43
4241
4039
3837
3635
3433
3231
3029
2827
2625
2423
2221
2019
1817
1615
1413
1211
109 79
7877
7675
7473
7271
7069
6867
6665
6463
6261
6059
5857
5655
5453
5251
5049
4847
4645
44 8685
8483
8281
80
4
1
1
51 302515 2010
AK
AE
R
Y
K
E
A
123456
ABCDEFGH
67
682
74
75 57 1
AB
CD
EF
GH
JK
LM
NP
RT
UV
WY
AA1
AB1
12
34
56
78
910
1112
1314
1516
1718
1920
2122
1
13
1
20
19
21
20
19
2
1
20
19
2
A2
A1
B1
B2
A48
A49
B49
B48
A2
A1
B1
B2
A2
A1
B1
B2
A48
A49
B49
B48
C8C
6
C2 C
3
C5
C9C
7
C4
C1
D6
D8D
3D
2 D5
D9D
7
D4
D1
B1
B4
B7
B9
B8B
6
B2 B
3
B5
A1
A2 A
3A
4A
5 A6
A7
A8
A9
C8C
6
C2 C
3
C5
C9C
7
C4
C1
D6
D8D
3D
2
D5
D9D
7
D4
D1
B1
B4
B7
B9
B8B
6
B2 B
3
B5
A1
A2 A
3A
4A
5 A6
A7
A8
A9
C8C
6
C2 C
3
C5
C9C
7
C4
C1
D6
D8D
3D
2
D5
D9D
7
D4
D1
B1
B4
B7
B9
B8B
6
B2 B
3
B5
A1
A2 A
3A
4A
5 A6
A7
A8
A9
C8C
6
C2 C
3
C5
C9C
7
C4
C1
D6
D8D
3D
2
D5
D9D
7
D4
D1
B1
B4
B7
B9
B8B
6
B2 B
3
B5
A1
A2 A
3A
4A
5 A6
A7
A8
A9
A9
A8
A7
A6
A5
A4
A3
A2
A1 B5B
3B
2 B6
B8
B9B
7
B4
B1
D1
D4
D7
D9
D5
D2 D
3
D8D
6
C1
C4
C7
C9
C5C
3C
2 C6
C8
A9
A8
A7
A6
A5
A4
A3
A2
A1 B5B
3B
2 B6
B8
B9B
7
B4B1
D1
D4
D7
D9
D5
D2 D
3
D8D
6
C1
C4
C7
C9
C5C
3C
2 C6
C8
A9
A8
A7
A6
A5
A4
A3
A2
A1 B5B
3B
2 B6
B8
B9B
7
B4B1
D1
D4
D7
D9
D5
D2 D
3
D8D
6
C1
C4
C7
C9
C5C
3C
2 C6
C8
A9
A8
A7
A6
A5
A4
A3
A2
A1 B5B
3B
2 B6
B8
B9B
7
B4B1
D1
D4
D7
D9
D5
D2 D
3
D8D
6
C1
C4
C7
C9
C5C
3C
2 C6
C8
S
E B
15
4
1
584
4
85
1
1
11
10
20
2
1112
1
1
2
2
9
10
1
2
9
10
1
1
10
9
2
1
9
2
2
910
1 2
10
1
2
910
1
1
65
2
1
6
5
2
1
6
5
2
2
1
2
1
2
12
12
12
2 1
21
21
2
1
21
1
21
21
21
2
1
1
2
4
4
R9
R1
U14
U18
U4
U1
3
1
3
1
12
2324
59
14
1814
6
16
16
1
6
6
16
13
56
810
11
1214
15
pcb outline
pcb
outl
ine
A2
A1
B1
B2
A82
A81
B81
B82
A2
A1
B1
B2
A82
A81
B81
B82
+
223
220
7678
221
222
7779
287
288
143
144
223
220
7678
1
145
146
221
222
7779
287
288
143
144
223
220
7678
1
145
146
221
222
77 79
287
288
143
144
223
220
7678
1
145
146
221
222
77 79
287
288
143
144
223
220
7678
1
145
146
221222
77 79
287
288
143
144
223
220
7678
1
145
146
221
222
7779
287
288
143
144
223
220
7678
1
145
146
221
222
7779
287
288
143
144
223
220
7678
221
222
7779
287
288
143
144
223
220
7678
1
221
222
7779
287
288
143
144
1
5
61
23
4
5
78
9
pcb
outl
ine
pcb outline
9
CPU1CPU0
1a
1c
23
51
38b40
32
41
43
50 1b
44
488
31
47
3a
3c
39
38a
4c
4b
5e
5d
5c
5b
5f
9
6 7
35a35b
35c
30 29 28
27a
34
5a
33
49
37 26 22
15
21
14a14b
13b
3b
13a
10
1 2 3 41 2 3 4
CPU1
20
2
11
12
16 17
19 18 24
42
46
52
25a25b10
45
4a
5 65 6 7 87 8
36
CPU0CPU0
15
Chapter 3. Motherboard SettingsVirgo User Manual
3�4 Connector and Jumper
1a ~ 1c Power Connector (JPWR1, JPWR3 & JPWR4)
2 Power Connector (JPWR2)
52 Power Connector (JPWR5)
4a 4c CPU Fan Header (J1& J22)
4b PCH Fan Header (J21)
5 Fan Header (J14, J15, J16, J17, J18, J23)
6 SAS IOC Activity LED Header (J19)
7 SAS IOC Error LED Header (J25)
8 PMBus Header (JPMBUS)
9 SAS IOC UART Header (J20)+12V+12 V+12 V+12V
GN
DG
ND
GN
DG
ND
GN
D+5V+5V+5VN
.C.
GN
DG
ND
GN
DP
S_O
N#
GN
D-12V+3.3V
+3.3V+12V+12V
+5V_A
UX
PO
WE
R O
KG
ND
+5VG
ND
+5VG
ND
+3.3V+3.3V
GND+12V
GND+12V
GND+12VTACHPWM
PWMTACH+12VGND
GN
D+12VTA
CH
PW
MP
RS
NT_N
FAU
LT
+3.3VSAS_LED_GPIO12SAS_LED_GPIO13SAS_LED_GPIO14SAS_LED_GPIO15
GNDSAS_LED_GPIO8SAS_LED_GPIO9
SAS_LED_GPIO10SAS_LED_GPIO11
+3.3VSAS_LED_GPIO20SAS_LED_GPIO21SAS_LED_GPIO22SAS_LED_GPIO23
GNDSAS_LED_GPIO16SAS_LED_GPIO17SAS_LED_GPIO18SAS_LED_GPIO19
+3.3VGNDPMBUS_ALERT_NSMB_PMBUS_DATASMB_PMBUS_CLK
SAS3008_1V8UART0_RXGNDUART0_TX
3�4�1 Connector
16
Chapter 3. Motherboard SettingsVirgo User Manual
15 PCH SSGPIO Header (JSSGPIO)
17 PCH GPIO Header (JPCH_GPIO)
24 SAS IOC ICE Header (J12)
27 Front I/O USB Header (JUSB_INT)
28 SSI Front Panel Header (JFRNT_SSI)
GN
DP
CH
_SS
DA
TAO
UT1
+3.3V
PC
H_S
SD
ATA
OU
T0P
CH
_SS
LOA
DP
CH
_SS
CLO
CK
PC
H_G
PP
_C16
PC
H_G
PP
_C17
GN
D
ICE
0_TMS
ICE
0_TDO
ICE
0_TDI
N.C
.S
YS
_HA
LT_L0
ICE
0_TRS
T_LIC
E0_TC
KS
AS
3008_1V8
GN
DN
.C.
DVO_5VGNDDDC_DATAOAVSYNCOAHSYNCODDC_CLKO
GNDDACROA
GNDDACGOA
GNDDACBOA
+3.3V_D
UA
L+5V
_AU
XU
IDLE
D_O
UT#
SY
S_H
EA
LTH#2
SY
S_H
EA
LTH#1
LAN
1_LINK
_UP
LAN
1_TRA
FFICI2C
8SD
AI2C
8SC
LIN
TRU
DE
R#
LAN
2_LINK
_UP
LAN
2_TRA
FFIC
+3.3VK
EY
(no pin)P
WR
_LED
#+3.3V
HD
_LED
#S
W_P
WR
_BTN
#G
ND
SW
_RS
T_BTN
#G
ND
UID
_SW
_IN#
+3.3V_D
UA
LFP
_NM
I_BTN
17
Chapter 3. Motherboard SettingsVirgo User Manual
32 EPSI Header (JEPSI)
33 Debug Port Header (JLPC_DP)
34 PCIE Hot-Plug SMB Header (JPCIE_HP)
35 PCIE Hot-Plug Front Panel Header (J4,
PC
H_E
SP
I_ALE
NT1_N
PC
H_E
SP
I_RS
T_NS
MB
_HO
ST_3V
3_CLK
SM
B_H
OS
T_3V3_D
AT
PG
PP
A_P
CH
GN
DP
CH
_PM
E_N
PC
H_LP
C_C
LKR
UN
_NP
CH
_SM
I_N+5V
_AU
X
10
PC
H_LP
C_LA
D0
+3.3VP
CH
_LPC
_LAD
3R
ST_P
LTRS
T_NP
CH
_LFRA
ME
_NC
LK_24M
_DP
80
GN
DP
CH
_LPC
_LAD
1P
CH
_LPC
_LAD
2A
ST_S
ER
IRQ
PC
H_LD
RQ
0_NG
ND
11
CP
U0_H
P_I2C
_CLK
CP
U0_H
P_I2C
_DA
+3.3V
CP
U1_H
P_I2C
_CLK
CP
U1_H
P_I2C
_DA
TG
ND
+3.3VP
RS
NT-1
PW
R FA
ULT-1
PW
R E
NA
BLE
-1A
TTEN
BU
TTON
-1M
RL/E
MIS
-1E
MIL-1
ATTE
N LE
D-1
PW
R LE
D-1
GN
D
+3.3VP
RS
NT-2
PW
R FA
ULT-2
PW
R E
NA
BLE
-2A
TTEN
BU
TTON
-2M
RL/E
MIS
-2E
MIL-2
ATTE
N LE
D-2
PW
R LE
D-2
GN
D
J5, & J6)
18
Chapter 3. Motherboard SettingsVirgo User Manual
38 Front COM Header (JCOM1 & JCOM4)
39 VROC KEY Header (JRAID_KEY)
40 LCM Header (JLCM)
41 10GbE Carrier Board Header (J28)
42 BMC Debug Port Header (JBMC_DP)
44 BMC I2C1 header (JBMC_I2C1)
45 BMC GPIOHeader (JBMC_GPIO)
48 BMC I2C10 header (JBMC_I2C10)
50 PCH SGPIO header (JSGPIO)
51 Front VGA Header (VGA_INT)
GN
D+3.3V
_DU
AL
GN
DP
CH
_GP
P_C
10
SW
_PW
R_B
TN#
SW
_RS
T_BTN
#TX
DC
RX
DC
GN
D
BM
C_U
AR
T_TXD
5B
MC
_UA
RT_R
XD
5G
ND
NCI2C1SCLGNDI2C1SDA
BMC_GPY0BMC_GPY1EXTRST#
I2C9SCLI2C9SDA
GND
GNDI2C10SDAI2C10SCL
PCH_SCLOCKPCH_SLOADPCH_SDATAOUT0
+3.3VPCH_SDATAOUT1
GND
DVO_5VGNDDDC_DATAOAVSYNCOAHSYNCODDC_CLKO
GNDDACROA
GNDDACGOA
GNDDACBOA
DS
RB
RTS
BC
TSB
RIB
N.C
.
DC
DB
RX
DB
TXD
BD
TRB
GN
D
2
9
10
1
GN
DLA
N_LE
D3_1G
LAN
_LED
3_10GLA
N_LE
D3_A
CT
+3.3V_D
UA
L
GN
DLA
N_LE
D2_1G
LAN
_LED
2_10GLA
N_LE
D2_A
CT
+3.3V_D
UA
L
19
Chapter 3. Motherboard SettingsVirgo User Manual
14a SATA4 Pin-7 Power Header (J10)
J10 SettingShort SATA4 pin-7 PowerOpen Normal Default
14b SATA5 Pin-7 Power Header (J11)
J11 SettingShort SATA5 pin-7 PowerOpen Normal Default
16 Clear CMOS Jumper (JCMOS)
JCMOS SettingPin1-2 Normal DefaultPin2-3 Clear CMOS
18 BIOS Recovery Mode Jumper (J9)
J9 SettingShort BIOS Recovery ModeOpen Normal Default
19 Flash Descriptor Security override Jumper (J8)
J8 SettingShort Flash Security overrideOpen Normal Default
20 NTB Jumper (JNTB)
JNTB SettingShort Downstream portOpen Upstream port Default
22 System Power Good Lock (JPG_LOCK)
JPG_LOCK SettingShort LockOpen Normal Default
26 No Reboot(Watch Dog) Jumper (J26)
J26 (No Reboot) Setting
Short EnableOpen Disable Default
36 ME Force Recovery Mode Jumper (J3)
J3 Setting
Short ME Recovery ModeOpen Normal Default
37 BMC Debug Port (J27)
J27 SettingShort JCOMOpen JBMC_DP Default
43 BMC Reset Jumper (JBMC_RST)
JBMC_RST SettingShort Reset BMCOpen Normal Default
49 BMC ARM (JBMC_DIS)
JBMC_DIS SettingShort DisableOpen Normal Default
3�4�2 Jumper
NOTE• If the SATA DOM power is supplied
by the motherboard, please close the jumper.
• If the SATA DOM power is supplied by external power, please open the jumper.
• If the a SATA type hard drive is connected to the motherboard, please open the jumper.
+12V
GN
D
SATA DOM Jumper
20
Chapter 3. Motherboard SettingsVirgo User Manual
3�5�1 Internal LED
Heart Beat Green (Blinking) BMC activity is detected.OFF BMC is not active.
SYS PG LED Green System power is ready.OFF System power is not ready.
RSMRST PG LED Yellow Resume Well Reset is ready.OFF Resume Well Reset is not ready.
SAS IOC Status LEDGreen(Blinking) PHY0-7 activity is detected.OFF PHY0-7 no activity is detected.
SAS IOC Heart Beat LEDGreen(Blinking) SAS IOC activity is detected.OFF SAS IOC no activity is detected.
SAS IOC Error LEDYellow SAS IOC failure is detected.OFF SAS IOC no failure is detected.
NIC 3 10G LED Green (Blinking) 10G link activity is detected.NIC 3 1G LED Yellow (Blinking) 1G link activity is detected.NIC 4 10G LED Green (Blinking) 10G link activity is detected.NIC 4 1G LED Yellow (Blinking) 1G link activity is detected.
NGFF Activity LEDBlue(Blinking) NGFF activity is detected.OFF NGFF activity is not detected.
3�5 System LED Indicator
2B
18
A18
A1 B1
B18
A18
A1 B1
A1
B21
1
2
3 4
4
1
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PN
ML
KJ
HG
FD
DC
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LJGE
ABYV
RN
ANALAJAFAD
BDBBAYAVAR
BU
BNBR
BLBJBF
CABW
144
288
77
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pcb outline
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143
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5
61
23
4
5
78
9
pcb
outl
ine
pcb outline
9
SFP+
LAN2 10G LED LAN1 10G LED
LAN1 1G LED LAN2 1G LEDLAN4 1G/10G LEDLAN3 1G/10G LED
BMC Heart Beat LED
System PG LEDRSMRST PG LED
UID LED
NVME Hot-Plug LED
NGFF Activity LED
SAS IOC Status LED(PHY0~PHY7)SAS IOC Heart Beat LEDSAS IOC Error LED
21
Chapter 4. BIOS Configuration SettingsVirgo User Manual
This chapter demonstrates how to configure the UEFI BIOS settings in your system device. You can enter the BIOS screen during system startup.
To enter BIOS configuration settings,• Press Esc key during the Power-On-Self-Test (POST)
To enter BIOS after POST, you have to restart the system by using one of the three methods:• Press Ctrl + Alt + Delete�• Press the reset button on the system chassis. • Turn the system off and on.
NOTE• The following pages provide the details of BIOS menu. Please be noted that the
BIOS menu are continually changing due to the BIOS updating. The BIOS menu provided are the most updated ones when this manual is written.
• The default value for each BIOS option key may vary per system. The [default] key is for reference only.
4�1 Navigation KeysThe navigation keys are listed below.
Function Key Description< >
< > < >< >
Select item.
< Enter > Select and enter sub-screen.
< + + > < - - > Modify selected option.
< F1 > General help.
< F2 > Previous Value.
< F3 > Optimized defaults.
< F4 > Save & Exit.
< F5> < F6 > Change values.
< F7 > Discard Change and Exit.
< F9 > Load Optimal Default for all values.
< F10 > Save changes and exit.
< F12 > Print Screen.
< Esc > Exit the current menu screen.
Chapter 4. BIOS Configuration Settings
22
Chapter 4. BIOS Configuration SettingsVirgo User Manual
4�2�1 MenuPress and to select the options of the menu bar. Press Enter to access the option screen.
Menu Description
Main Displays basic system information and date & time.
Advanced Allows configuration of advanced system settings.
Security Sets passwords and security functions.
Power Sets the power management parameters.
Boot Sets boot options, such as Quick Boot or USB Boot.
4�2�2 Startup Press ESC to run the BIOS setup procedure.
NOTEWhen Quiet Boot is enables, OEM logo will be displayed instead of post messages.
4�2 BIOS Setup
23
Chapter 4. BIOS Configuration SettingsVirgo User Manual
There will be a message “Entering SETUP” displayed on the diagnostics screen.
Identify the BIOS version.
NOTEFor the official released version, the last digit of the BIOS version must end in a “0.“
24
Chapter 4. BIOS Configuration SettingsVirgo User Manual
Load Optimal Default Setting.
Save the setting and exit the BIOS setup utility.
25
Chapter 4. BIOS Configuration SettingsVirgo User Manual
4�2�3 UpdateTo identify the latest BIOS version, please check the BIOS setup.
26
Chapter 4. BIOS Configuration SettingsVirgo User Manual
Update BIOS by INSYDE H2OFFT-D utility under DOS environmentIf you need to update Flash in the DOS environment, please use H2OFFT-D utility. To use this utility, you must include the flash.bat , H2OFFT-D.exe, and bin file in the same folder. Please follow the instructions to update flash:
Execute flash.bat to update Flash in the DOS environment.
Reboot the system.
27
Chapter 4. BIOS Configuration SettingsVirgo User Manual
4�2�4 DCPMM Setup Refer to section 4.2.2 step 1 and 2 to enter the Front Page menu. Enter the option "Device Management."
In "Device Management" page, enter "Intel(R) Optane(TM) DC Persistent Memory Configuration" to start your configurations.
28
Chapter 4. BIOS Configuration SettingsVirgo User Manual
Intel(R) Optane(TM) DC Persistent Memory Configuration
• DIMMs
29
Chapter 4. BIOS Configuration SettingsVirgo User Manual
• Regions
• Namespaces
30
Chapter 4. BIOS Configuration SettingsVirgo User Manual
• Total Capacity
• Diagnostics
31
Chapter 4. BIOS Configuration SettingsVirgo User Manual
• Preferences
32
Chapter 4. BIOS Configuration SettingsVirgo User Manual
Main Option Key:
4�3�1 MainMain
System time Configures the current time.System date Configures the current date.
4�3 Main
33
Chapter 4. BIOS Configuration SettingsVirgo User Manual
Advanced Option Key:
4.4.1 Peripheral ConfigurationPeripheral Configuration
PCIe SR-IOV [Enable] DisablePCIe ARI Enable [Disable]ARI Forward Enable [Disable]Spread Spectrum Enable [Disable]
4.4.2 Video ConfigurationVideo Configuration
Display Mode Plug In First [On Board First]
4�4�3 OEMBoard FunctionOEMBOARD Function
Messiah Function
SMBIOS Updated SMBIOS Updated [Auto] By UtilitySMBIOS TO BMC Redfish Write SMBIOS to BMC [Enable] Disable
Halt On Error Function Halt On Error [Enable] Disable
Manufacturing Function
Manufacturing Test Mode Enable [Disable]
Dumped Storage USB Storage [SATA Storage]USB Test Function Enable [Disable]SATA Test Function Enable [Disable]
4�4 Advanced
* [ ]: Default option key
34
Chapter 4. BIOS Configuration SettingsVirgo User Manual
4�4�4 SIO AST2500SIO AST2500
Serial Port A Auto [Enable] DisableBase I/O Address 2E8 2F8 3E8 [3F8]Interrupt IRQ3 [IRQ4]Serial Port B Auto [Enable] DisableBase I/O Address 2E8 [2F8] 3E8 3F8Interrupt [IRQ3] IRQ4Serial Port D Auto Enable [Disable]Base I/O Address [2E8] 2F8 3E8 3F8Interrupt IRQ7 [IRQ10]
4.4.5 Socket ConfigurationSocket Configuration
Processor Configuration
Per-Socket Information
Hyper-Threading [ALL] [Enable] Disable
VMX [Enable] DisableEnable SMX Enable [Disable]Extended APIC Enable [Disable]
Common RefCode Configuration
MMCFG Size64M 128M [256M]512M 1G 2G
MMIO High Base[56T] 40T 24T16T 4T 1T
MMIO High Granularity Size
[1G] 4G 16G64G 256G 1024G
Serial Debug Message Level
Disable [Minimum]Normal Maximum
UPI Configuration UPI General Configuration UPI Status
Link Speed Mode Slow [Fast]
Link Frequency Select
[Auto] 9.6Gb/s
10.4Gb/s Use Per Link Setting
Link L0p Enable [Auto] Enable Disable
Link L1 Enable [Auto] Enable Disable
Legacy VGA Socket Min=0, Max=3, [0]
Legacy VGA Stack Min=0, Max=6, [0]
Memory Configuration Integrated Memory Controller (iMC)
Enforce POR [Auto] POR DisableMemory Frequency [Auto] Selections in MHz
IMC BCLK [Auto] 100 MHz 133 MHzMRC PromoteWarnings [Enable] Disable
Promote Warnings [Enable] Disable
Halt on mem Training Error [Enable] Disable
Attempt Fast Boot [Auto] Enable Disable
Attempt Fast Cold Boot [Auto] Enable Disable
MemTest On Fast Boot [Auto] Enable Disable
Enable ADR Enable [Disable]2x Refresh Enable [Auto] Enable Disable
35
Chapter 4. BIOS Configuration SettingsVirgo User Manual
Memory Configuration
Memory Map
Volatile Memory Mode [Auto] 1LM 2LM
AppDirect cache Auto Enable [Disable]eADR Support Auto Enable [Disable]1LM Memory Interleave Granularity
[Auto] 256B Target, 256B Channel
64B Target, 64B Channel
IMC Interleaving [Auto] 1-way Interleave 2-way InterleaveChannel Interleaving
[Auto] 1-way Interleave2-way Interleave 3-way Interleave
Rank Interleaving
[Auto] 1-way Interleave 2-way Interleave4-way Interleave 8-way Interleave
Socket Interleave Below 4GB
Enable [Disable]
Memory RAS Configuration
Static Virtual Lockstep Mode Enable [Disable]
Mirror mode Enable Mirror Mode (1LM) [Disable]
Mirror TAD0 Enabled [Disable]Enable Partial Mirror
Partial Mirror Mode (1LM) [Disable]
UEFI ARM Mirror Enable [Disable]Memory Rank Sparing Enable [Disable]
Correctable Error Threshold Min= 0x0, Max= 0x7fff
SDDC Plus One Enable [Disable]ADDDC Sparing Enable [Disable]Set NGN Die Sparing Enable [Disable]
Patrol Scrub Enable [Disable]Patrol Scrub Interval Min=0, Max=24, [24]
Patrol Scrub Address Mode Reverse Address [System Physical
Address]
NGN ConfigurationNGNVM DIMM Secure Erase Unit
NGN Factory Reset/Clear Enable [Disable]
Average Power Budget Min=10000, Max=18000, [15000]
Publish ARS capability [Auto] Enable Disable
NGN CMD Time [Auto] 1N 2N
NGN ECC Read Check [Auto] Enable Disable
Thermal Throttling Thresholds Offset
[Auto] Enable
CR FastGo Configuration [Auto] Default Option 1 ~ 5
CR Latch System ShutdoWn State
[Enable] Disable
Snoopy mode for 2LM Enable [Disable]
Extended Type 17 Structure Enable [Disable]
Enable power cycle policy [Enable] Disable
Snoopy mode for AD Enable [Disable]
36
Chapter 4. BIOS Configuration SettingsVirgo User Manual
Memory Configuration
NGN ConfigurationNGNVM DIMM Secure Erase Unit
App Direct Memory Hole [Enable] Disable
LSx implementation SWSMI [ASL]
SMBus Max Access Time Min= 0, Max= 4294967295, [350]
SMBus Release Delay Min= 0, Max= 4294967295, [150]
Erase All DIMMs Enable [Disable]S0 CH0~5S1 CH0~5S2 CH0~5S3 CH0~5
Enable [Disable]
Memory DfxConfiguration
Load NGN DIMM Management Drivers
[Auto] Enable Disable
Memory Interleaving [Auto] NUMA 2-way Node
Interleave4-way Node Interleave
Lock NGN CSRs [Auto] Enable DisableNGN ECC Correctable error
[Auto] Enable Disable
NGN ECC Write Check [Auto] Enable Disable
NGN ECC Write Retry Flow Exit [Auto] Enable Disable
C/A Parity Enable [Auto] Enable Disable
High Address Region [Auto] Bit Postion 33~45
Low Mem Channel Config [Auto] Channel 0 Channel 1 Channel 2
CLX A0 Starve Threshold Enable [Disable]
Configuration Mask for 2LM [Normal] Aggressive
CR Halt/Warn Mixed SKU [Auto] Enable Disable
Crystal Ridge ACPI Debug Interface
[ACPI Debug Object] COM1
NFIT debug logs Enable [Disable]
NFIT NVDIMM SKU Based Enable [Disable]
Publish NVDIMM DIMM Ctrl Region SPA
[Enable] Disable
Skip ARS on Boot Enable [Disable
ECC Checking [Auto] Enable Disable2GB Short Stroke Configuration
Interleaved Non-Interleaved [Disable]
Force 1-Ch Way in FM 2-2-2 Configuration
[Enable] Disable
37
Chapter 4. BIOS Configuration SettingsVirgo User Manual
IIO Configuration
PCI 64-Bit Resource Allocation [Enable] Disable
PCIe Train by BIOS [Yes] NoPCIe Hot Plug Auto Manual Enable [Disable]PCIe ACPI Hot Plug Enable [Disable] Per-PortPCI-E Completion Timeout (Global) Disable
Yes [No] Per-Port
PCI-E Global Timeout Value
50us to 10ms 16ms to 55ms 65ms to 210ms [260ms to 900ms]1s to 3.5s 4s to 13s 17s to 64s
PCI-E ASPM Support (Global) L1 Only Disable [Per-Port]
IOAT Configuration Sck0 IOAT Config
Disable TPH Yes [No]
Prioritize TPH Enable [Disable]
Relaxed Ordering Enable [Disable]
IOAT Function 0/1/2/3/4/5/6/7 Items
DMA[Enable]Disable
No SnoopEnable[Disable]
Intel® VT for Directed I/O (VT-d)
Intel® VT for Directed I/O (VT-d)
[Enable] Disable
Interrupt Remapping [Enable] Disable
PassThrough DMA [Enable] Disable
ATS [Enable] DisablePosted Interrupt [Enable] DisableCoherency Support (Non-Isoch)
[Enable] Disable
Access Control Services [Enable] Disable
Intel® VMD technology
Intel® VMD for Volume Management Device on Socket 0/1/2/3
Intel® VMD for Volume Management Device for PStack0~PStack2
Enable [Disable]
VMD port 1A~1D/2A~2D/3A~3D
Enable [Disable]
Hot Plug Capable Enable [Disable]
CfgBar size Min=20, Max=28, [25]
CfgBar attribute32-bit non-prefetchable64-bit non-prefetchable[64-bit prefetchable]
MemBar1 size Min=12, Max=47, [25]
MemBar1 attribute
[32-bit non-prefetchable]64-bit non-prefetchable64-bit prefetchable
MemBar2 size Min=12, Max=47, [20]
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IIO Configuration Intel® VMD technology
Intel® VMD for Volume Management Device on Socket 0
MemBar2 attribute
32-bit non-prefetchable[64-bit non-prefetchable]
64-bit prefetchable
Advanced Power Configuration
CPU P State Control
WFR Uncore GV Rate Reduction Auto Enable [Disable]
Uncore Freq Scaling (UFS) [Enable] Disable
AVX ICCP pre-grant level
[128 Heavy] 256 Light 256 Heavy512 Light 512 Heavy
SpeedStep (Pstates) [Enable] Disable
Config TDP [Normal] Level 1 Level 2P State Domain [All] OneEIST PSD Function [HW_ALL] SW_ALL SW_ANY
SINGLE_PCTL Enable [Disable]Single Power Domain (SPD) Enable [Disable]
Boot performance mode
[Max Performance] Max Efficient Set by Intel
Node Manager
Energy Efficient Turbo [Enable] Disable
Turbo Mode [Enable] DisableCPU Flex Ratio Override Enable [Disable]
Perf P-Limit Differential Min=0, Max=7, [1]
Perf P-Limit Clip Min=0, Max=31, [31]Perf P-Limit Threshold Min=0, Max=31 [15]
Perf P Limit [Enable] Disable
Hardware PM State Control
Hardware P-States
Disable [Native Mode]
Out of Band Mode Native Mode with No Legacy Support
HardwarePM Interrupt Enable [Disable]
EPP Enable [Enable] DisableAPS rocketing Enable [Disable]Scalability Enable [Disable]RAPL Prioritization Enable [Disable]
Package C State Control
Package C StateC0/C1 state C2 stateC6(non Retention) C6(Retention) stateNo Limit [Auto]
C2C3TT Min=0, Max=255, [0]PKG C-state Lat. Neg. Enable [Disable]
LTR IIO Input Take IIO LTR input [Ignore IIO LTR input]MDLL Off [Auto] Enable Disable
Latency Tolerence Requirement
Snoop Latency Override Enable [Disable]
Force Snoop Latency Override
Enable [Disable]
Snoop Latency Multiplier Min=0, Max=7, [0]
Force Non-Snoop Latency Override
Min=0x0, Max=0x3ff, [0x0]
Non-Snoop Latency Override
Enable [Disable]
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Chapter 4. BIOS Configuration SettingsVirgo User Manual
Advanced Power Configuration
Package C State Control
Latency Tolerence Requirement
Non-Snoop Latency Multiplier
Min=0, Max=7, [0]
Non-Snoop Latency Value Min=0x0, Max=0x3ff
Pkg C-state SA Power Management Control
CPU0 SAPMCTL_CFG/CPU1 SAPMCTL_CFG/CPU2 SAPMCTL_CFG/CPU3 SAPMCTL_CFG
IIO0_PKGC_CLK_GATE_DISABLE
Enable
[Disable]IIO1_PKGC_CLK_GATE_DISABLE
Enable
[Disable]IIO2_PKGC_CLK_GATE_DISABLE
Enable
[Disable]UPI01_PKGC_CLK_GATE_DISABLE
Enable
[Disable]UPI23_PKGC_CLK_GATE_DISABLE
Enable
[Disable]MC1 PKGC CLK GATE DISABLE
Enable[Disable]
MC0 PKGC CLK GATE DISABLE
Enable[Disable]
UPI01 PLL Shutdown En
[Enable]Disable
UPI23 PLL Shutdown En
[Enable]Disable
PCIe IIO0 PLL Shutdown En
[Enable]Disable
PCIe IIO1 PLL Shutdown En
[Enable]Disable
PCIe IIO2 PLL Shutdown En
[Enable]Disable
MC0 PLLs Shutdown En
[Enable]Disable
MC1 PLLs Shutdown En
[Enable]Disable
SetVID Decay Disable
Enable[Disable]
SAPMCTL_CFG LOCK
[Enable]Disable
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Chapter 4. BIOS Configuration SettingsVirgo User Manual
4.4.6 ME ConfigurationME Configuration
Server ME Configuration
General ME Configuration
Altitude Min=0x0, Max=0xffff, [0x8000]MCTP Bus Owner Min=0x0, Max=0xffff, [0x0]
Server ME Debug Configuration
Server ME General Configuration
ME Initialization Complete Timeout Min=0, Max=12, [2]
Enable HSIO Messaging [Enable] Disable
DRAM Init Done Enable 0 [1] None
DRAM Initialization Status
[Auto - true status] 0 - Success1 - No Memory in Channels 2 - Memory Init Error
Host Reset Warning 0 [1] None
Enable Pre-DramInit Done ME Reset
[0] 1 None
HMRFPO_LOCK Message [Enable] Disable
HMRFPO_ENABLE Message [Enable] Disable
END_OF_POST Message [Enable] Disable
HECI-1 EnableHECI-2 EnableHECI-3 Enable
[Enable] Disable
Core Bios Done Message [Enable] Disable
Override ICC Clock Settings
Override ICC Clock Settings
Override ICC Clock Settings
[0]
1None
ICC Clock Spread Spectrum
[0]1None
NM Configuration
Boot Mode Override[0]1None
Boot Mode[Performance Optimized]Power Optimized
Cores Disable Override
[0]1None
Cores To Disable Min=0x0, Max=0x7f,[0x0]
Power Measurement Override
[0]1None
Power Measurement Enable[Disable]
Hardware Change Override
[0]1None
Hardware Changed Yes[No]
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Chapter 4. BIOS Configuration SettingsVirgo User Manual
4.4.7 PCH ConfigurationPCH Configuration
PCH Devices PCH state after G3 S0 [S5] Last State
PCH SATA Configuration
SATA Controller [Enable] DisableConfigure SATA as [AHCI] RAIDSupport Aggressive Link Power Management
[Enable] Disable
Port 0~7 [Enable] DisableSATA Port 0 DevSlp Enable [Disable]Hot Plug Enable [Disable]Configure as eSATA Enable [Disable]Mechanical Presence Switch [Enable] Disable
Spin Up Device Enable [Disable]SATA Device Type [Hard Disk Drive] Sata State Drive
SATA Topology [Unknown] ISATA Direct Connect Flex M2
PCH sSATA Configuration
sSATA Controller [Enable] DisableConfigure sSATA as [AHCI] [RAID]Support Aggressive Link Power Management
[Enable] Disable
Port 0~5 [Enable] DisablesSATA Port 0~5 DevSlp Enable [Disable]
Hot Plug Enable [Disable]Configure as eSATA Enable [Disable]Spin Up Device Enable [Disable]sSATA Device Type [Hard Disk Drive] Sata State Drive
SATA Topology [Unknown] ISATA Direct Connect Flex M2
USB Configuration
USB Precondition Enable [Disable]USB Per-Connector Disable Enable [Disable]
USB XHCI MSI Disable WA Enable [Disable]
XHCI Over Current Pins [Enable] Disable
XHCI Wake On Usb Enable Enable [Disable]
Place XHCI BAR below 4GB Enable [Disable]
ADR Configuration
Enable/Disable ADR Platform-POR Enable [Disable]ADR GPIO [GPIO B] GPIO CHost Partition Reset ADR Enable Platform-POR Enable [Disable]
Enable/Disable ADR Timer [Platform-POR] Enable Held-off
ADR timer expire time
[Platform-POR] 0 uS 25 uS 50 uS 100 uS
ADR timer multiplier [Platform-POR] x1, x8, x24, x40, x56, x64, x72, x80, x88, x96
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Chapter 4. BIOS Configuration SettingsVirgo User Manual
4.4.8 H2O IPMI ConfigurationH2O IPMI Configuration
IPMI Support [Enable] DisableBMC Warmup Time Min=0, Max=240, [90]ACPI SPMI Table [Enable] DisableBoot Option Support [Enable] DisableSet BIOS version to BMC [Enable] Disable
BMC Configuration
Watchdog Timer Support Enable [Disable]Not disable in OS Enable [Disable]Watchdog Timer Timeout Min=2, Max=8, [5]
Watchdog Timer Action No Action [Hard Reset] Power Down Power Cycle
Power Cycle Time Support Enable [Disable]Power Cycle Time Min=0, Max=255, [10]Power Button [Enable] DisableReset Button [Enable] DisableNMI Button [Enable] DisableLAN Port Configuration [Dedicated] SharedLAN Channel Number Min=0, Max=15, [1]IPv4 Source Static [DHCP]IPv6 Mode Enable [Disable]IPv6 Prefix Length Min=0, Max=255, [0]
SDR List SDR List Support Enable [Disable]
4.4.9 APEI ConfigurationAPEI Configuration
ACPI Platform Error Interface
APEI Support [Enable] Disable
APEI Error InjectionMEMORY_CE MEMORY_UE_
NON_FATALMEMORY_UE_FATAL PCIE_CE
PCIE_UE_NON_FATAL PCIE_UE_FATAL [Disable]
Defrag Level [ROM Space under 1/4]
ROM Space under 1/3
ROM Space under 1/2
Every time When Error Occur
APEI UEFI Revision [UEFI 2.2] UEFI 2.3.1
4�4�10 Console RedirectionConsole Redirection
Console Serial Redirection Setup
Console Serial Redirect Enable [Disable]
Terminal Type [VT_100] VT_100+ VT_UTF8 PC_ANSIBaud Rate 1200 2400 4800 9600 19200 38400 57600 [115200]Data Bits 7 Bits [8 Bits]Parity Even Odd [None]Stop Bits [1 Bits] 2 BitsFlow Control RTS/CTS XON/XOFF [None]Information Wait Time 0 Second 2 Second [5 Second] 10 Second 30 Second
C.R. After Legacy Boot [Yes] No
Text Mode Resolution AUTO Force 80x25
Force 80x24 (DEL FIRST ROW)
Force 80x24 (DEL LAST ROW)
[Limit 128x40 (Default)]
Auto Refresh [Enable] DisableAuto adjust Terminal resolution
[Enable] Disable
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Chapter 4. BIOS Configuration SettingsVirgo User Manual
4.4.11 H2O Event Log Config ManagerH2O Event Log Config Manager
Configuration Pages
BIOS Event Log Configuration
BIOS Event Log Viewer
Log Event To ALL BIOS[BMC SEL] Memory Disable
Event Log Full option Overwrite Clear All [Stop
Logging]
POST Message Configuration
POST Message Configuration Enable [Disable]
Progress Code Enable [Disable]Error Code Enable [Disable]Debug Code Enable [Disable]Log POST Message Enable [Disable]Show POST Message Enable [Disable]
Serial Debug Message Configuration
EFI DEBUG Message Configuration
Advanced Mode Enable [Disable]DEBUG_INIT Enable [Disable]DEBUG_WARN Enable [Disable]DEBUG_LOAD Enable [Disable]DEBUG_FS Enable [Disable]DEBUG_INFO Enable [Disable]DEBUG_DISPATCH Enable [Disable]
DEBUG_VARIABLE Enable [Disable]
DEBUG_BM Enable [Disable]DEBUG_BLKIO Enable [Disable]DEBUG_NET Enable [Disable]DEBUG_UNDI Enable [Disable]DEBUG_LOADFILE Enable [Disable]
DEBUG_EVENT Enable [Disable]DEBUG_GCD Enable [Disable]DEBUG_CACHE Enable [Disable]DEBUG_VERBOSE Enable [Disable]
DEBUG_ERROR Enable [Disable]EFI DEBUG Message Level Enable [Disable]
Status Code Serial Message Configuration
Show Progress Code Serial Message
Enable [Disable]
Show Error Code Serial Message [Enable] Disable
Show Debug Code Serial Message
Enable [Disable]
Event And Message Pages
BIOS Event Log Viewer Show BIOS Event LogSerial Debug Message Viewer
4.4.12 H2oUve Configuration
H2oUve RedirectionH2oUve Setup H2OUVE Support [Enable] Disable
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Chapter 4. BIOS Configuration SettingsVirgo User Manual
Security Option Key:
4�5�1 SecuritySecurity
Current TPM Device Not Detected TPM 1.2 [TPM 2.0]TPM Active PCR Hash Algorithm [SHA1, SHA256]
TPM Hardware Supported Hash Algorithm
[SHA1, SHA256]
TrEE Protocol Version 1.0 [1.1]TPM Availability [Available] HiddenTPM Operation [No operation] Disable and Deactivate Enable and ActivateClear TPM [0] 1 NonePower on Password Enable [Disable]
4�5 Security
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Chapter 4. BIOS Configuration SettingsVirgo User Manual
Power Option Key:
4�6�1 PowerPower
Wake on PME Enable [Disable]
4�6 Power
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Chapter 4. BIOS Configuration SettingsVirgo User Manual
Boot Option Key:
4�7�1 BootBoot
Boot Type [Dual Boot Type] Legacy Boot Type UEFI Boot TypeQuick Boot [Enable] DisableQuiet Boot Enable [Disable]Network Stack [Enable] Disable
PXE Boot capability [Disable] UEFI:IPv4 UEFI:IPv6UEFI:IPv4/UEFI:IPv6 [Legacy]
Add Boot Options First Last [Auto]
ACPI Selection Acpi1.0B Acpi3.0 Acpi4.0[Acpi5.0] Acpi6.0 Acpi6.1
USB Boot [Enable] DisableEFI Device First Enable [Disable]Timeout Min=0, Max=10, [3]Automatic Failover [Enable] Disable
EFI
Normal Boot Menu [Normal] Advance
Boot Type Order
Hard Disk DriveCD/DVD-ROM DriveUSBPXEOther Device
Other Device
Legacy
Boot Device Priority Normal Boot Menu [Normal] Advance
Boot Type Order
Floppy Drive Hard Disk Drive CD/DVD-ROM Drive USB Others
USB
4�7 Boot
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Chapter 4. BIOS Configuration SettingsVirgo User Manual
Exit Option Key:
4�8�1 ExitSave and Exit
Exit Saving Changes Exit system setup and save your changes.Save Change Without Exit Save your changes without exiting the system.Exit Discarding Changes Discard your changes when existing the system.Load Optimal Defaults Load optimal default items.
Load Custom DefaultsResets the BIOS settings to the default values and overwrites any previously customized settings.
Save Custom Defaults Saves the cumostomized defaults in BIOS settings.Discard Changes Discard your changes.
4�8 Exit
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Chapter 5. BMC Configuration SettingsVirgo User Manual
Insert Ethernet LAN cable into the BMC LAN port.
5�1 Network SettingsUse the BIOS SetupStep 1 BIOS SETUP Advanced H2O IPMI configuration BMC Configuration IPv4 source Static
BMC management port(Dedicated NIC channel 1 )
Spica User ManualChapter 5. BMC Configuration Settings
2 x 10GbE SFP+(Shared NIC channel 8)
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Chapter 5. BMC Configuration SettingsVirgo User Manual
Step 2 Input the IP address. Set static IP.
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Chapter 5. BMC Configuration SettingsVirgo User Manual
Step 3 Input the subnet mask address.
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Chapter 5. BMC Configuration SettingsVirgo User Manual
The IP address below is an example using the default IP setting. The IP address is configurable.
Step 1 Open the browser then type default BMC IP address: 192.168.22.22
Step 2 Use the default user name and password for first-time login to BMC WEB GUI.
Field: Default User Name: admin Password: admin
NOTEThe default user name and password are in lower-case characters.
NOTEUsers who login with the admin user name and password will have full administrative power. The admin password can be changed after login.
5�2 Web GUI
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Chapter 5. BMC Configuration SettingsVirgo User Manual
Dashboard: The Dashboard page gives the overall information about thestatus of a device.
Server Health - Sensor Readings: Then Sensors Readings page displays all the sensor related information.
Settings: The Settings page allows you to access various configuration settings.
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Chapter 5. BMC Configuration SettingsVirgo User Manual
KVM Mouse Setting: The KVM Mouse Setting page displays the setting for mouse emulation from local window to remote screen.
• For Windows OS environment, set mode to absolute.• For Linux OS environment, set mode to relative.• For SLES-11 OS environment, set mode to other mode.
Remote Control: The Remote Control page allow you to access any of the managed devices within your system.
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Chapter 5. BMC Configuration SettingsVirgo User Manual
Environmental setting:
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Chapter 5. BMC Configuration SettingsVirgo User Manual
5�3 Firmware UpdateLog into the BMC web page.
This wizard takes you through the process of firmware upgradation. A reset of the box
will automatically follow if the upgrade is completed or cancelled. An option to Preserve
All Configuration is available. Enable it, if you wish to preserve configured settings
through the upgrade.
WARNINGPlease note that after entering update mode widgets, other web pages and services will not work. All open widgets will be closed automatically. If upgrade process is cancelled in the middle of the wizard, the device will be reset.
NOTEThe firmware upgrade process is a crucial operation. Make sure that the chances of a power or connectivity loss are minimal when performing this operation.• Once you enter into Update Mode and choose to cancel the firmware flash operation,
the BMC must be reset. This means that you must close the Internet browser and log back onto the BMC before you can perform any other types of operations.
• Once Firmware upgrade using web is started, the regular IPMI command will not be allowed for safety concern if Enable IPMI Command handling during flashing support is disabled in project configuration.
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Chapter 5. BMC Configuration SettingsVirgo User Manual
To configure, choose ‘Firmware Image Location’ under Maintenance. To open Firmware
Update page, click Maintenance > Firmware Update from the menu bar. A sample
screenshot of Firmware Update Page is shown below.
The various fields of Firmware Update are as follows.
• Preserve all Configuration: To preserve all configuration.
• Edit Preserve Configuration: To modify the Preserve status settings.
• Select Firmware Image: To Select the Firmware image to be uploaded.
• Start Firmware Update: To Start the Firmware Update.
The protocol information to be used for firmware image transfer during this update is
as follows.
NOTEAll configuration items will be preserved/overwrite as default during the restore configuration operation.
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Chapter 5. BMC Configuration SettingsVirgo User Manual
Procedure
1. Click Preserve all Configuration to preserve all configuration.
2. Click Browse to select firmware image. The Firmware update undergoes the following
steps:
a. Closing all active client requests
b. Preparing Device for Firmware Upgrade
c. Uploading Firmware Image
NOTEA file upload pop-up will be displayed for http/https but in the case of tftp files, the file is automatically uploaded displaying the status of upload.
d. Browse and select the Firmware image to flash and click Upload.
e. Click Start firmware update start the Firmware Update. A warning message will be
prompted you to proceed further.
f. Click OK to start the Firmware Update. The sample screenshot is shown below.
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Chapter 5. BMC Configuration SettingsVirgo User Manual
g. Verifying Firmware Image
In Section Based Firmware Update, you can configure the firmware image for
section based flashing. Check the required sections and click Proceed to update the
firmware.
• If flashing is required for all images, select the option Full Flash .
• If you select Version Compare Flash option from web, the current and uploaded
module versions, FMHlocation, size will be compared.
• If the modules differ in size and location, proceed with force firmware upgrade.
• If all the module versions are same, restart BMC by saying all the module versions
are similar.
• If only few module versions are differ, those module will be flashed.
NOTEOnly selected sections of the firmware will be updated. Other sections are skipped. Before starting flash operation, you are advised to verify the compatibility between image sections.
h. Flashing Firmware Image
i. Resetting the image. The sample screenshot of Firmware update is as shown
below.
NOTEThe Firmware Update page will be disabled and you will not be able to perform any other tasks until firmware upgrade is completed and the device is rebooted. You can now follow the instructions presented in the subsequent pages to successfully update the card’s firmware. The device will reset if update is canceled. The device will also reset upon successful completion of firmware update.
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Chapter 6� Technical Support
Taiwain, Global HeadquartersAddress: No� 152, Section 4, Linghang N� Rd, Dayuan District, Taoyuan City 337, TaiwanTel: +886-3-433-9188Fax: +886-3-287-1818Sales Email: sales@aicipc�com�twSupport Email: support@aicipc�com
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