VCS /VCSi User GuideVersion Y-2006.06-SP2 March 2008

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VCS/VCSi User Guide, version Y-2006.06-SP2

ii

Contents1. Getting Started What VCS Supports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Main Components of VCS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VCSi . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Preparing to Run VCS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Obtaining a License . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Setting Up Your Environment. . . . . . . . . . . . . . . . . . . . . . . . . Setting Up Your C Compiler. . . . . . . . . . . . . . . . . . . . . . . . . . VCS Workflow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Compiling the Simulation Executable . . . . . . . . . . . . . . . . . . . . . Basic Compile-Time Options . . . . . . . . . . . . . . . . . . . . . . . . . Running a Simulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Basic Runtime Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Accessing the Discovery AMS Documentation . . . . . . . . . . . . . . Making a Verilog Model Protected and Portable . . . . . . . . . . . . . 1-3 1-3 1-6 1-6 1-7 1-8 1-9 1-10 1-13 1-14 1-18 1-19 1-20 1-22

i

2. Modeling Your Design Avoiding Race Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Using and Setting a Value at the Same Time . . . . . . . . . . . . Setting a Value Twice at the Same Time . . . . . . . . . . . . . . . . Flip-Flop Race Condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous Assignment Evaluation . . . . . . . . . . . . . . . . . . . . Counting Events. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Time Zero Race Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . Optimizing Testbenches for Debugging. . . . . . . . . . . . . . . . . . . . Conditional Compilation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Enabling Debugging Features At Runtime. . . . . . . . . . . . . . . Combining the Techniques . . . . . . . . . . . . . . . . . . . . . . . . . . Avoiding the Debugging Problems From Port Coercion . . . . . . . Creating Models That Simulate Faster . . . . . . . . . . . . . . . . . . . . Unaccelerated Data Types, Primitives, and Statements . . . . Inferring Faster Simulating Sequential Devices . . . . . . . . . . . Modeling Faster always Blocks . . . . . . . . . . . . . . . . . . . . . . . Using the +v2k Compile-Time Option . . . . . . . . . . . . . . . . . . Case Statement Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Memory Size Limits in VCS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Using Sparse Memory Models . . . . . . . . . . . . . . . . . . . . . . . . . . Obtaining Scope Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . Scope Format Specifications . . . . . . . . . . . . . . . . . . . . . . . . . Returning Information About the Scope. . . . . . . . . . . . . . . . . 2-2 2-2 2-3 2-4 2-5 2-6 2-7 2-8 2-9 2-10 2-13 2-14 2-15 2-16 2-18 2-22 2-23 2-24 2-25 2-25 2-27 2-27 2-30

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Avoiding Circular Dependency . . . . . . . . . . . . . . . . . . . . . . . . . . Designing With $lsi_dumpports for Simulation and Test . . . . . . . Dealing With Unassigned Nets . . . . . . . . . . . . . . . . . . . . . . . Code Values at Time 0. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Cross Module Forces and No Instance Instantiation . . . . . . . Signal Value/Strength Codes . . . . . . . . . . . . . . . . . . . . . . . . . 3. Compiling Your Design Using the vcs Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Incremental Compilation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Triggering Recompilation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Using Shared Incremental Compilation . . . . . . . . . . . . . . . . . . . The Direct Access Interface Directory . . . . . . . . . . . . . . . . . . . . . Initializing Memories and Regs . . . . . . . . . . . . . . . . . . . . . . . . . . Allowing Inout Port Connection Width Mismatches . . . . . . . . . . . Using Lint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Changing Parameter Values From the Command Line. . . . . . . . Checking for X and Z Values in Conditional Expressions . . . . . . Enabling the Checking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Filtering Out False Negatives. . . . . . . . . . . . . . . . . . . . . . . . . HSOPT Technology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Making Accessing an Out of Range Bit an Error Condition. . . . . Compiling Runtime Options Into the simv Executable. . . . . . . . .

2-33 2-34 2-35 2-36 2-36 2-38

3-2 3-3 3-4 3-5 3-7 3-8 3-9 3-10 3-12 3-14 3-15 3-16 3-18 3-20 3-21

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Performance Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . Using Local Disks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Managing Temporary Disk Space on UNIX . . . . . . . . . . . . . . Compile-Time Options That Impede or Accelerate VCS . . . . Compiling for Debugging or Performance . . . . . . . . . . . . . . . 64-32-Bit Cross-Compilation and Full 64-Bit Compilation . . . . . Identifying the Source of Memory Consumption . . . . . . . . . . Minimizing Memory Consumption . . . . . . . . . . . . . . . . . . . . . Running a 64-32-Bit Cross-Compilation . . . . . . . . . . . . . . . . Setting up the Compiler and Linker . . . . . . . . . . . . . . . . . Memory Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Specifying the Compiler, Linker, and -comp64 Option . . . Running a 64-Bit Compilation and Simulation . . . . . . . . . . . . Using Radiant Technology. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Compiling With Radiant Technology . . . . . . . . . . . . . . . . . . . Known Limitations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Potential Differences in Coverage Metrics. . . . . . . . . . . . . . . Compilation Performance With Radiant Technology . . . . . . . Applying Radiant Technology to Parts of the Design . . . . . . . The Configuration File Syntax . . . . . . . . . . . . . . . . . . . . . . . . Configuration File Statement Examples . . . . . . . . . . . . . . Library Mapping Files and Configurations . . . . . . . . . . . . . . . . . . Library Mapping Files. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Overriding the Search Order in the Library Mapping File. Specifying Multiple Library Mapping Files . . . . . . . . . . . . Displaying Library Matching . . . . . . . . . . . . . . . . . . . . . . .

3-23 3-23 3-24 3-25 3-27 3-28 3-29 3-30 3-31 3-32 3-32 3-33 3-34 3-34 3-35 3-35 3-36 3-36 3-36 3-37 3-40 3-45 3-45 3-47 3-47 3-47

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Resolving include Compiler Directives . . . . . . . . . . . . . . Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Configuration Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . Hierarchical Configurations . . . . . . . . . . . . . . . . . . . . . . . The -top Compile-Time Option . . . . . . . . . . . . . . . . . . . . . Limitations of Configurations . . . . . . . . . . . . . . . . . . . . . . 4. Simulating Your Design Running and Controlling a Simulation . . . . . . . . . . . . . . . . . . . . . Invoking a Simulation at the Command Line . . . . . . . . . . . . . Invoking a Simulation From DVE . . . . . . . . . . . . . . . . . . . . . . Save and Restart. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Save and Restart Example . . . . . . . . . . . . . . . . . . . . . . . . . . Save and Restart File I/O. . . . . . . . . . . . . . . . . . . . . . . . . . . . Save and Restart With Runtime Options . . . . . . . . . . . . . . . . Restarting at the CLI Prompt . . . . . . . . . . . . . . . . . . . . . . Specifying a Very Long Time Before Stopping Simulation. . . . . . Passing Values From the Runtime Command Line. . . . . . . . . . . How VCS Prevents Time 0 Race Conditions . . . . . . . . . . . . . . . Improving Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Profiling the Simulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . CPU Time Views . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Memory Usage Views . . . . . . . . . . . . . . . . . . . . . . . . . . .

3-48 3-48 3-49 3-51 3-52 3-53

4-2 4-2 4-2 4-4 4-4 4-6 4-6 4-8 4-8 4-10 4-11 4-12 4-13 4-14 4-24

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5. Using the Discovery Visual Environment Overview of DVE Window Configuration . . . . . . . . . . . . . . . . . . . DVE Panes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Managing DVE Windows. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Managing Target Panes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Docking and Undocking Windows and Panes . . . . . . . . . . . . Dragging and Dropping Docked windows . . . . . . . . . . . . Using the Menu Bar and Toolbar . . . . . . . . . . . . . . . . . . . . . . . . . Setting Display Preferences . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6. VPD and EVCD File Generation Advantages of VPD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . System Tasks and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . System Tasks to Generate a VPD File. . . . . . . . . . . . . . . . . . System Tasks and Functions for Multi-Dimensional Arrays . . Syntax for Specifying MDAs . . . . . . . . . . . . . . . . . . . . . . . Using $vcdplusmemon and $vcdplusmemoff . . . . . . . . . . Using $vcdplusmemorydump . . . . . . . . . . . . . . . . . . . . . . 6-2 6-3 6-3 6-7 6-7 6-9 6-18 5-2 5-4 5-4 5-4 5-6 5-7 5-7 5-10

System Tasks for Capturing Source Statement Execution Data 6-19 Capturing Source Statement Execution . . . . . . . . . . . . . . 6-19 Source Statement System Tasks . . . . . . . . . . . . . . . . . . . 6-21 System Tasks for Capturing Delta Cycle Information. . . . . . . System Tasks for Capturing Unique Event Information . . . . . Runtime Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +vpdbufsize to Control RAM Buffer Size . . . . . . . . . . . . . . . . 6-22 6-23 6-25 6-25

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+vpdfile to Set the Output File Name. . . . . . . . . . . . . . . . . . . +vpdfilesize to Control Maximum File Size . . . . . . . . . . . . . . +vpdignore to Ignore $vcdplus Calls in Code . . . . . . . . . . . . +vpddrivers to Store Driver Information . . . . . . . . . . . . . . . . . +vpdnoports to Eliminate Storing Port Information . . . . . . . . +vpdnocompress to Bypass Data Compression . . . . . . . . . . +vpdnostrengths to Not Store Strength Information. . . . . . . . VPD Methodology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Advantages of Separating Simulation From Analysis . . . . . . Conceptual Example of Using VPD System Tasks . . . . . . . . VPD On/Off PLI Rules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Performance Tips. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EVCD File Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Using the runtime option -dump_evcd . . . . . . . Using System Tasks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7. VCD and VPD File Utilities The vcdpost Utility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Scalarizing the Vector Signals . . . . . . . . . . . . . . . . . . . . . . . . Uniquifying the Identifier Codes . . . . . . . . . . . . . . . . . . . . . . . The vcdpost Utility Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . The vcdiff Utility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . The vcdiff Utility Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . The vcat Utility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . The vcat Utility Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

6-26 6-26 6-27 6-27 6-28 6-28 6-29 6-29 6-29 6-30 6-32 6-33 6-35 6-35 6-36

7-2 7-2 7-3 7-4 7-5 7-6 7-12 7-13

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Generating Source Files From VCD Files . . . . . . . . . . . . . . . Writing the Configuration File. . . . . . . . . . . . . . . . . . . . . . . . . The vcsplit Utility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . The vcsplit Utility Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . The vcd2vpd Utility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . The vcd2vpd Utility Syntax. . . . . . . . . . . . . . . . . . . . . . . . . . . Options for specifying EVCD options . . . . . . . . . . . . . . . . The vpd2vcd Utility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . The vcd2vpd Utility Syntax. . . . . . . . . . . . . . . . . . . . . . . . . . . The Command file Syntax . . . . . . . . . . . . . . . . . . . . . . . . Limitations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . The vpdmerge Utility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Restrictions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Limitations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Value Conflicts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8. Unified Command-Line Interface (UCLI) Compilation and Simulation Options for UCLI . . . . . . . . . . . . . . . Using UCLI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . UCLI Interactive Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . UCLI Command-Alias File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating System Commands . . . . . . . . . . . . . . . . . . . . . . . . . . 9. Using the Old Command Line Interface (CLI) CLI Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

7-17 7-18 7-23 7-23 7-26 7-26 7-27 7-28 7-28 7-30 7-33 7-33 7-35 7-36 7-36

8-2 8-3 8-4 8-9 8-9

9-2

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Navigating the Design and Displaying Design Information . . Showing and Retrieving Simulation Information . . . . . . . . . . Setting, Displaying and Deleting Breakpoints . . . . . . . . . . . . Displaying Object Data Members . . . . . . . . . . . . . . . . . . . . . Setting and Printing Values of Variables . . . . . . . . . . . . . . . . Traversing Call-stacks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Showing and Terminating Threads . . . . . . . . . . . . . . . . . . . . Accessing Events. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Command Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Key Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Debugging a Testbench Using the CLI . . . . . . . . . . . . . . . . . . . . Non-Graphical Debugging With the CLI. . . . . . . . . . . . . . . . . 10. Post-Processing VPD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . eVCD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Line Tracing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Delta Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11. Race Detection The Dynamic Race Detection Tool . . . . . . . . . . . . . . . . . . . . . . . Enabling Race Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . Specifying the Maximum Size of Signals in Race Conditions The Race Detection Report . . . . . . . . . . . . . . . . . . . . . . . . . . Post Processing the Report . . . . . . . . . . . . . . . . . . . . . . . . . .

9-2 9-4 9-7 9-9 9-9 9-9 9-10 9-11 9-11 9-13 9-13 9-14

10-2 10-3 10-3 10-3

11-2 11-4 11-5 11-5 11-8

ix

Debugging Simulation Mismatches . . . . . . . . . . . . . . . . . . . . The Static Race Detection Tool . . . . . . . . . . . . . . . . . . . . . . . . . . 12. Delays and Timing Transport and Inertial Delays . . . . . . . . . . . . . . . . . . . . . . . . . . . Different Inertial Delay Implementations . . . . . . . . . . . . . . . . Enabling Transport Delays. . . . . . . . . . . . . . . . . . . . . . . . . . . Pulse Control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pulse Control with Transport Delays . . . . . . . . . . . . . . . . . . . Pulse Control with Inertial Delays . . . . . . . . . . . . . . . . . . . . . Specifying Pulse on Event or Pulse on Detect Behavior . . . . Specifying the Delay Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13. SDF Backannotation Using SDF Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Compiling the ASCII SDF File at Compile-Time . . . . . . . . . . . . . The $sdf_annotate System Task . . . . . . . . . . . . . . . . . . . . . . Limitations on Compiling the SDF File. . . . . . . . . . . . . . . . . . Precompiling an SDF File . . . . . . . . . . . . . . . . . . . . . . . . . . . Creating the Precompiled Version of the SDF file . . . . . . Specifying an Alternative Name and Location . . . . . . . . . Reading the ASCII SDF File During Runtime . . . . . . . . . . . . . . . Performance Considerations . . . . . . . . . . . . . . . . . . . . . . . . . Replacing Negative Module Path Delays in SDF Files . . . . . Using the Shorter Delay in IOPATH Entries. . . . . . . . . . . . . .

11-10 11-13

12-2 12-4 12-7 12-7 12-9 12-12 12-16 12-20

13-2 13-3 13-3 13-5 13-7 13-7 13-8 13-10 13-13 13-13 13-14

x

Disabling CELLTYPE Checking in SDF Files . . . . . . . . . . . . The SDF Configuration File . . . . . . . . . . . . . . . . . . . . . . . . . . Delay Objects and Constructs . . . . . . . . . . . . . . . . . . . . . SDF Configuration File Commands . . . . . . . . . . . . . . . . . SDF Example with Configuration File. . . . . . . . . . . . . . . . Understanding the DEVICE Construct . . . . . . . . . . . . . . . . . . . . Handling Backannotation to I/O Ports . . . . . . . . . . . . . . . . . . . . . Using the INTERCONNECT Construct . . . . . . . . . . . . . . . . . . . . Multiple Backannotations to Same Delay Site. . . . . . . . . . . . . . . INTERCONNECT Delays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Multisource INTERCONNECT Delays . . . . . . . . . . . . . . . . . . Omitting the +multisource_int_delays Option. . . . . . . . . . Simultaneous Multiple Source Transitions . . . . . . . . . . . . Single Source INTERCONNECT Delays . . . . . . . . . . . . . . . . Min:Typ:Max Delays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Specifying Min:Typ:Max Delays at Runtime. . . . . . . . . . . . . . Using the Configuration File to Disable Timing . . . . . . . . . . . . . . Using the timopt Timing Optimizer . . . . . . . . . . . . . . . . . . . . . . . Editing the timopt.cfg File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Editing Potential Sequential Device Entries. . . . . . . . . . . . . . Editing Clock Signal Entries. . . . . . . . . . . . . . . . . . . . . . . . . . 14. Negative Timing Checks The Need for Negative Value Timing Checks . . . . . . . . . . . . . . .

13-15 13-16 13-17 13-18 13-25 13-28 13-30 13-31 13-31 13-32 13-32 13-34 13-35 13-36 13-37 13-38 13-39 13-40 13-43 13-43 13-44

14-2

xi

Negative Timing Checks for XYZ. . . . . . . . . . . . . . . . . . . . . . The $setuphold Timing Check Extended Syntax . . . . . . . . . . Negative Timing Checks for Asynchronous Controls. . . . . . . The $recrem Timing Check Syntax . . . . . . . . . . . . . . . . . . . . Enabling Negative Timing Checks. . . . . . . . . . . . . . . . . . . . . . . . Other Timing Checks Using the Delayed Signals . . . . . . . . . . . . Checking Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Toggling the Notifier Register . . . . . . . . . . . . . . . . . . . . . . . . . . . SDF Backannotation to Negative Timing Checks . . . . . . . . . . . . How VCS Calculates Delays . . . . . . . . . . . . . . . . . . . . . . . . . . . . Using Multiple Non-Overlapping Violation Windows . . . . . . . . . . 15. SAIF Support Using SAIF Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SAIF System Tasks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

14-2 14-7 14-10 14-11 14-13 14-14 14-18 14-19 14-19 14-20 14-23

15-2 15-2

Typical Flow to Dump the Backward SAIF File using System Tasks 15-5 Criteria for Choosing Signals for SAIF Dumping . . . . . . . . . . . . . 16. SWIFT VMC Models and SmartModels SWIFT Environment Variables . . . . . . . . . . . . . . . . . . . . . . . . . . Generating Verilog Templates . . . . . . . . . . . . . . . . . . . . . . . . . . . Modifying the Verilog Template File . . . . . . . . . . . . . . . . . . . . Monitoring Signals in the Model Window . . . . . . . . . . . . . . . . . . 16-2 16-4 16-5 16-8 15-6

xii

Using LMTV SmartModel Window Commands . . . . . . . . . . . . . . Entering Commands Using the SWIFT Command Channel . . . . Using the CLI to Access the Command Channel. . . . . . . . . . Loading Memories at the Start of Runtime . . . . . . . . . . . . . . . . . Compiling and Simulating a Model . . . . . . . . . . . . . . . . . . . . . . . Changing the Timing of a Model . . . . . . . . . . . . . . . . . . . . . . 17. Using the PLI Writing a PLI Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functions in a PLI Application . . . . . . . . . . . . . . . . . . . . . . . . . . . Header Files for PLI Applications . . . . . . . . . . . . . . . . . . . . . . . . The PLI Table File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PLI Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

16-10 16-13 16-15 16-15 16-16 16-16

17-3 17-4 17-5 17-6 17-9

ACC Capabilities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17-11 Specifying ACC Capabilities for PLI Functions. . . . . . . . . 17-12 Specifying ACC Capabilities for VCS Debugging Features 17-17 Using the PLI Table File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Enabling ACC Capabilities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Globally Enabling ACC Capabilities. . . . . . . . . . . . . . . . . . . . Using Only the ACC Capabilities that You Need . . . . . . . . . . Learning What ACC Capabilities are Used . . . . . . . . . . . Compiling to Enable Only the ACC Capabilities You Need Limitations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Using VPI Routines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17-20 17-21 17-21 17-25 17-25 17-27 17-28 17-29

Enabling ACC Write Capabilities Using the Configuration File 17-22

xiii

Support for the vpi_register_systf Routine. . . . . . . . . . . . . . . PLI Table File for VPI Routines . . . . . . . . . . . . . . . . . . . . . . . Integrating a VPI Application With VCS . . . . . . . . . . . . . . . . . Writing Your Own main() Routine . . . . . . . . . . . . . . . . . . . . . . . . 18. DirectC Interface Using Direct C/C++ Function Calls . . . . . . . . . . . . . . . . . . . . . . . How C/C++ Functions Work in a Verilog Environment . . . . . Declaring the C/C++ Function . . . . . . . . . . . . . . . . . . . . . . . . Calling the C/C++ Function . . . . . . . . . . . . . . . . . . . . . . . . . . Storing Vector Values in Machine Memory . . . . . . . . . . . . . . Converting Strings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Avoiding a Naming Problem . . . . . . . . . . . . . . . . . . . . . . . . . Using Direct Access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Using the vc_hdrs.h File . . . . . . . . . . . . . . . . . . . . . . . . . . . . Access Routines for Multi-Dimensional Arrays . . . . . . . . . . . UB *vc_arrayElemRef(UB*, U, ...) . . . . . . . . . . . . . . . . . . U vc_getSize(UB*,U) . . . . . . . . . . . . . . . . . . . . . . . . . . . . Using Abstract Access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Using vc_handle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Using Access Routines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . int vc_isScalar(vc_handle) . . . . . . . . . . . . . . . . . . . . . . . . int vc_isVector(vc_handle) . . . . . . . . . . . . . . . . . . . . . . . . int vc_isMemory(vc_handle). . . . . . . . . . . . . . . . . . . . . . . int vc_is4state(vc_handle) . . . . . . . . . . . . . . . . . . . . . . . . int vc_is2state(vc_handle) . . . . . . . . . . . . . . . . . . . . . . . .

17-31 17-32 17-32 17-34

18-3 18-5 18-6 18-12 18-14 18-17 18-19 18-20 18-27 18-28 18-28 18-29 18-29 18-30 18-31 18-32 18-33 18-34 18-35 18-36

xiv

int vc_is4stVector(vc_handle). . . . . . . . . . . . . . . . . . . . . . int vc_is2stVector(vc_handle). . . . . . . . . . . . . . . . . . . . . . int vc_width(vc_handle) . . . . . . . . . . . . . . . . . . . . . . . . . . int vc_arraySize(vc_handle) . . . . . . . . . . . . . . . . . . . . . . . scalar vc_getScalar(vc_handle) . . . . . . . . . . . . . . . . . . . . void vc_putScalar(vc_handle, scalar). . . . . . . . . . . . . . . . char vc_toChar(vc_handle) . . . . . . . . . . . . . . . . . . . . . . . int vc_toInteger(vc_handle) . . . . . . . . . . . . . . . . . . . . . . . char *vc_toString(vc_handle) . . . . . . . . . . . . . . . . . . . . . . char *vc_toStringF(vc_handle, char) . . . . . . . . . . . . . . . . void vc_putReal(vc_handle, double) . . . . . . . . . . . . . . . . double vc_getReal(vc_handle). . . . . . . . . . . . . . . . . . . . . void vc_putValue(vc_handle, char *) . . . . . . . . . . . . . . . . void vc_putValueF(vc_handle, char *, char ) . . . . . . . . . . void vc_putPointer(vc_handle, void*) void *vc_getPointer(vc_handle) . . . . . . . . . . . . . . . . . void vc_StringToVector(char *, vc_handle). . . . . . . . . . . . void vc_VectorToString(vc_handle, char *). . . . . . . . . . . . int vc_getInteger(vc_handle) . . . . . . . . . . . . . . . . . . . . . . void vc_putInteger(vc_handle, int) . . . . . . . . . . . . . . . . . . vec32 *vc_4stVectorRef(vc_handle) . . . . . . . . . . . . . . . . U *vc_2stVectorRef(vc_handle) . . . . . . . . . . . . . . . . . . . . void vc_get4stVector(vc_handle, vec32 *) void vc_put4stVector(vc_handle, vec32 *) . . . . . . . . void vc_get2stVector(vc_handle, U *) void vc_put2stVector(vc_handle, U *). . . . . . . . . . . . UB *vc_MemoryRef(vc_handle) . . . . . . . . . . . . . . . . . . . . UB *vc_MemoryElemRef(vc_handle, U indx). . . . . . . . . . scalar vc_getMemoryScalar(vc_handle, U indx) . . . . . . . void vc_putMemoryScalar(vc_handle, U indx, scalar) . . .

18-37 18-38 18-39 18-40 18-40 18-40 18-40 18-41 18-42 18-43 18-44 18-45 18-45 18-46 18-47 18-48 18-49 18-49 18-49 18-50 18-51 18-54 18-55 18-56 18-58 18-61 18-62

xv

int vc_getMemoryInteger(vc_handle, U indx). . . . . . . . . . 18-62 void vc_putMemoryInteger(vc_handle, U indx, int) . . . . . 18-64 void vc_get4stMemoryVector(vc_handle, U indx, vec32 *). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18-64 void vc_put4stMemoryVector(vc_handle, U indx, vec32 *). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18-66 void vc_get2stMemoryVector(vc_handle, U indx, U *) . . . 18-67 void vc_put2stMemoryVector(vc_handle, U indx, U *) . . . 18-67 void vc_putMemoryValue(vc_handle, U indx, char *). . . . 18-68 void vc_putMemoryValueF(vc_handle, U indx, char, char *) 18-68 char *vc_MemoryString(vc_handle, U indx) . . . . . . . . . . . 18-69 char *vc_MemoryStringF(vc_handle, U indx, char) . . . . . 18-70 void vc_FillWithScalar(vc_handle, scalar) . . . . . . . . . . . . 18-72 char *vc_argInfo(vc_handle) . . . . . . . . . . . . . . . . . . . . . . 18-74 int vc_Index(vc_handle, U, ...) . . . . . . . . . . . . . . . . . . . . . 18-75 U vc_mdaSize(vc_handle, U). . . . . . . . . . . . . . . . . . . . . . 18-76 Summary of Access Routines . . . . . . . . . . . . . . . . . . . . . . . . Enabling C/C++ Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Mixing Direct And Abstract Access . . . . . . . . . . . . . . . . . . . . Specifying the DirectC.h File . . . . . . . . . . . . . . . . . . . . . . . . . Useful Compile-Time Options . . . . . . . . . . . . . . . . . . . . . . . . Environment Variables. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Extended BNF for External Function Declarations . . . . . . . . . . . 19. Using the VCS / SystemC Cosimulation Interface Usage Scenario Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Supported Port Data Types . . . . . . . . . . . . . . . . . . . . . . . . . . 19-4 19-5 18-77 18-81 18-83 18-83 18-84 18-85 18-85

xvi

Verilog Design Containing SystemC Leaf Modules . . . . . . . . . . . Input Files Required. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Generating the Wrapper for SystemC Modules . . . . . . . . . . . Instantiating the Wrapper and Coding Style. . . . . . . . . . . . . . Controlling Time Scale and Resolution in a SystemC Module Contained in a Verilog Design . . . . . . . Compiling a Verilog Design Containing SystemC Modules . . Using GNU Compilers on Sun Solaris . . . . . . . . . . . . . . . Using GNU Compilers on Linux . . . . . . . . . . . . . . . . . . . . SystemC Designs Containing Verilog Modules . . . . . . . . . . . . . . Input Files Required. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Generating the Wrapper . . . . . . . . . . . . . . . . . . . . . . . . . . . . Instantiating the Wrapper. . . . . . . . . . . . . . . . . . . . . . . . . . . . Compiling a SystemC Design Containing Verilog Modules . . Elaborating the Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Considerations for Export DPI Tasks . . . . . . . . . . . . . . . . . . . Use syscan -export_DPI . . . . . . . . . . . . Use a Stubs File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Specifying Runtime Options to the SystemC Simulation . . . . Using GNU Compilers on SUN Solaris . . . . . . . . . . . . . . Using GNU Compilers on Linux . . . . . . . . . . . . . . . . . . . . Using a Port Mapping File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Using a Data Type Mapping File . . . . . . . . . . . . . . . . . . . . . . . . . Debugging the SystemC Portion of a Design . . . . . . . . . . . . . . . Debugging the Verilog Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . Debugging Both the Verilog and SystemC Portions of a Design.

19-6 19-7 19-8 19-11 19-13 19-14 19-14 19-15 19-15 19-16 19-17 19-19 19-20 19-21 19-22 19-22 19-23 19-24 19-25 19-25 19-26 19-27 19-29 19-29 19-30

xvii

Transaction Level Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Interface Definition File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Generation of the TLI Adapters . . . . . . . . . . . . . . . . . . . . . . . Transaction Debug Output. . . . . . . . . . . . . . . . . . . . . . . . . . . Instantiation and Binding . . . . . . . . . . . . . . . . . . . . . . . . . . . . Supported Data Types of Formal Arguments. . . . . . . . . . . . . Miscellaneous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Using the Built-in SystemC Simulator . . . . . . . . . . . . . . . . . . . . . Using a Customized SystemC Installation. . . . . . . . . . . . . . . . . . 20. Using OpenVera Assertions Introducing OVA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Built-in Test Facilities and Functions . . . . . . . . . . . . . . . . . . . Using OVA Directives. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . How Sequences Are Tested Using the assert Directive . . How Event Coverage Is Tested Using the cover Directive OVA Flow. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Checking OVA Code With the Linter Option . . . . . . . . . . . . . . . . Applying General Rules with VCS . . . . . . . . . . . . . . . . . . . . . Linter General Rule Messages. . . . . . . . . . . . . . . . . . . . . Applying Magellan Rules for Formal Verification . . . . . . . . . . Linter General Rule Messages: . . . . . . . . . . . . . . . . . . . . Compiling Temporal Assertions Files . . . . . . . . . . . . . . . . . . . . . OVA Runtime Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Code Coverage Options. . . . . . . . . . . . . . . . . . . .

19-31 19-33 19-36 19-37 19-38 19-40 19-42 19-42 19-43

20-2 20-2 20-3 20-4 20-6 20-7 20-8 20-8 20-9 20-16 20-16 20-19 20-21 20-24

xviii

OpenVera Assertions Post-Processing . . . . . . . . . . . . . . . . . . . . OVAPP Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Building and Running a Post-Processor . . . . . . . . . . . . . . . . OVA Post-Processing CLI Commands . . . . . . . . . . . . . . . . . Using Multiple Post-Processing Sessions . . . . . . . . . . . . . . . Multiple OVA Post-Processing Sessions in One Directory . . Viewing Output Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Viewing Results in a Report File . . . . . . . . . . . . . . . . . . . . . . Viewing Results with Functional Coverage . . . . . . . . . . . . . . Using the Default Report . . . . . . . . . . . . . . . . . . . . . . . . . Assertion and Event Summary Report . . . . . . . . . . . . . . . Command Line Options . . . . . . . . . . . . . . . . . . . . . . . . . . Customizing the Report with Tcl Commands . . . . . . . . . . Using OVA with Third Party Simulators . . . . . . . . . . . . . . . . . . . . Inlining OVA in Verilog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Specifying Pragmas in Verilog . . . . . . . . . . . . . . . . . . . . . . . . Methods for Inlining OVA . . . . . . . . . . . . . . . . . . . . . . . . . . . . Unit Instantiation Using the Unit-Based Checker Library . Instantiating Context-Independent Full Custom OVA . . . . Template Instantiation Using the Template-Based Checker Library . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Inlining Context-Dependent Full Custom OVA . . . . . . . . . Case Checking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Context-Dependent Assertion Pragmas. . . . . . . . . . . . . . General Inlined OVA Coding Guidelines . . . . . . . . . . . . . . . . Using Verilog Parameters in OVA Bind Statements . . . . . . . . . .

20-24 20-25 20-26 20-31 20-32 20-32 20-41 20-41 20-42 20-42 20-44 20-45 20-47 20-48 20-48 20-49 20-50 20-52 20-54 20-56 20-58 20-59 20-60 20-62 20-63

xix

Use Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Enabling Verilog Parameter Expansion . . . . . . . . . . . . . . Limitations on the Input . . . . . . . . . . . . . . . . . . . . . . . . . . Recommended Methodology . . . . . . . . . . . . . . . . . . . . . . Caveats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Post-processing Flow. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Use Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . OVA System Tasks and Functions . . . . . . . . . . . . . . . . . . . . . . . Setting and Retrieving Category and Severity Attributes. . . . Starting and Stopping the Monitoring of Assertions . . . . . . . . Global Monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Category and Severity-Based Monitoring. . . . . . . . . . . . . Name-Based Monitoring. . . . . . . . . . . . . . . . . . . . . . . . . . Controlling the Response To an Assertion Failure. . . . . . . . . Display Custom Message For an Assertion Failure. . . . . . . . Task Invocation From the CLI . . . . . . . . . . . . . . . . . . . . . . . . Debug Control Tasks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Calls From Within Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Developing a User Action Function . . . . . . . . . . . . . . . . . 21. OpenVera Native Testbench Major Features Supported in Native Testbench OpenVera . . . . . High-level Data Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Flow Control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Other Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Getting Started With Native Testbench OpenVera . . . . . . . . . . . Basics of an OpenVera Testbench. . . . . . . . . . . . . . . . . . . . .

20-63 20-64 20-64 20-66 20-66 20-67 20-67 20-68 20-69 20-70 20-70 20-73 20-73 20-74 20-75 20-76 20-77 20-78 20-82

21-3 21-3 21-3 21-4 21-5 21-6

xx

Preprocessor Directives . . . . . . . . . . . . . . . . . . . . . . . . . . Top Level Constructs . . . . . . . . . . . . . . . . . . . . . . . . . . . . Program Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . "Hello World!" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . The Template Generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . Multiple Program Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Configuration File Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . Configuration File. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Use Model for Multiple Programs . . . . . . . . . . . . . . . . . . . Compiling Multiple Programs . . . . . . . . . . . . . . . . . . . . . . NTB Options and the Configuration File. . . . . . . . . . . . . . Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Example Configuration File . . . . . . . . . . . . . . . . . . . . . . . . . . Compiling and Running the OpenVera Testbench . . . . . . . . . . . Compiling the Testbench with the OpenVera Design . . . . . . Compiling the Testbench Separate From the OpenVera Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Separate Compilation of Testbench Files for VCS . . . . . . Compiling the Design, the Testbench Shell And the Top-level Verilog Module. . . . . . . . . . . . . . . . . . . . Loading the Compiled Testbench On simv. . . . . . . . . . . . Limitations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Compile-time Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Runtime Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

21-6 21-7 21-7 21-8 21-9 21-11 21-11 21-11 21-12 21-13 21-15 21-19 21-19 21-24 21-24 21-25 21-26 21-27 21-28 21-29 21-29 21-37

Class Dependency Based OpenVera Source File Reordering 21-41 Circular Dependencies . . . . . . . . . . . . . . . . . . . . . . . . . . . 21-43 Dependency-based Ordering in the Presence of Encryption21-43

xxi

Using Encrypted Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Testbench Functional Coverage . . . . . . . . . . . . . . . . . . . . . . . . . Coverage Models Using Coverage Groups . . . . . . . . . . . . . . Measuring Coverage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Controlling Coverage Collection Globally . . . . . . . . . . . . . . . Unified Coverage Reporting. . . . . . . . . . . . . . . . . . . . . . . . . . Coverage Reporting Flow. . . . . . . . . . . . . . . . . . . . . . . . . Persistent Storage of Coverage Data and Post-Processing Tools . . . . . . . . . . . . . . . . . . . . . . . . . . . Unified Coverage Directory and Database Control . . . . . Loading Coverage Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Solver Choice . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Automatic Solver Orchestration . . . . . . . . . . . . . . . . . . . . . . . Temporal Assertions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Temporal Assertion Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . Adding Assertion Objects to a Testbench. . . . . . . . . . . . . Including the Header Files . . . . . . . . . . . . . . . . . . . . . . . . Setting Up the AssertEngine Object. . . . . . . . . . . . . . . . . Controlling Assertion Reporting . . . . . . . . . . . . . . . . . . . . Resetting Assertion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Instantiating Assertion Objects. . . . . . . . . . . . . . . . . . . . . Controlling Evaluation Attempts . . . . . . . . . . . . . . . . . . . . Counting Successes and Failures . . . . . . . . . . . . . . . . . . Setting Up the AssertEvent Objects . . . . . . . . . . . . . . . . . Instantiating AssertEvent Objects . . . . . . . . . . . . . . . . . . Suspending Threads . . . . . . . . . . . . . . . . . . . . . . . . . . . . Eliminating AssertEvent Objects . . . . . . . . . . . . . . . . . . . Terminating the AssertEngine . . . . . . . . . . . . . . . . . . . . .

21-44 21-45 21-46 21-49 21-51 21-53 21-54 21-56 21-56 21-58 21-61 21-62 21-63 21-65 21-65 21-66 21-66 21-66 21-67 21-67 21-68 21-68 21-69 21-69 21-70 21-70 21-71

xxii

Example Testbench . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Running OpenVera Testbench with OVA . . . . . . . . . . . . . . . . Running OpenVera Testbench with SVA . . . . . . . . . . . . . . . . Running OpenVera Testbench with SVA and OVA Together . OpenVera-SystemVerilog Testbench Interoperability . . . . . . . . . Scope of Interoperability . . . . . . . . . . . . . . . . . . . . . . . . . . . . Importing OpenVera types into SystemVerilog . . . . . . . . . . . Data Type Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Mailboxes and Semaphores . . . . . . . . . . . . . . . . . . . . . . Events . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Strings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Enumerated Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Integers and Bit-Vectors . . . . . . . . . . . . . . . . . . . . . . . . . Arrays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Structs and Unions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Connecting to the Design . . . . . . . . . . . . . . . . . . . . . . . . . . . Mapping Modports to Virtual Ports . . . . . . . . . . . . . . . . . Semantic Issues with Samples, Drives, and Expects . . . Miscellaneous Issues . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Blocking Functions in OpenVera . . . . . . . . . . . . . . . . . . . . . . The terminate, wait_child, disable fork, and wait fork Constructs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Constraints and Randomization . . . . . . . . . . . . . . . . . . . Functional Coverage . . . . . . . . . . . . . . . . . . . . . . . . . . . . Use Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Using Reference Verification Methodology with OpenVera . . . . . Limitations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

21-71 21-74 21-74 21-75 21-75 21-76 21-77 21-80 21-81 21-83 21-83 21-83 21-86 21-87 21-88 21-89 21-89 21-93 21-94 21-94 21-94 21-94 21-95 21-96 21-98 21-98

xxiii

Testbench Optimization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

21-99

NTB Performance Profiler . . . . . . . . . . . . . . . . . . . . . . . . . . . 21-99 Enabling the NTB Profiler. . . . . . . . . . . . . . . . . . . . . . . . . 21-100 Performance Profiler Example . . . . . . . . . . . . . . . . . . . . . 21-100 VCS Memory Profiler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Use Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . UCLI Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . CLI Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21-105 21-106 21-106 21-107

Incremental Profiling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21-107 Only Active Memory Reported . . . . . . . . . . . . . . . . . . . . . 21-108 VCS Dynamic Memory Profile Report . . . . . . . . . . . . . . . 21-108 22. SystemVerilog Design Constructs SystemVerilog Data Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Variable Data Types for Storing Integers . . . . . . . . . . . . . . . . The chandle Data Type . . . . . . . . . . . . . . . . . . . . . . . . . . . . . User-Defined Data Types. . . . . . . . . . . . . . . . . . . . . . . . . . . . Enumerations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Methods for Enumerations . . . . . . . . . . . . . . . . . . . . . . . . The $typeof System Function . . . . . . . . . . . . . . . . . . . . . . . . Structures and Unions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Structure Expressions . . . . . . . . . . . . . . . . . . . . . . . . . . . SystemVerilog Arrays. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Multiple Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Indexing and Slicing Arrays . . . . . . . . . . . . . . . . . . . . . . . SystemVerilog Testbench Constructs Outside Programs . . . Writing To Variables. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22-2 22-2 22-3 22-5 22-5 22-6 22-8 22-10 22-13 22-14 22-15 22-16 22-18 22-19

xxiv

Force and Release on SystemVerilog Variables . . . . . . . . . . Automatic Variables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Multiple Drivers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Release Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Integer Data Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Unpacked Arrays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Structures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Using the VPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SystemVerilog Operators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . New Procedural Statements . . . . . . . . . . . . . . . . . . . . . . . . . . . . The unique and priority Keywords in if and case Statements The do while Statement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SystemVerilog Processes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . The always_comb Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . The always_latch Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . The always_ff Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . The final Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tasks and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tasks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Passing Arguments by Setting Defaults. . . . . . . . . . . . . . . . . SystemVerilog Packages. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Exporting Time Consuming User-Defined Tasks with the SystemVerilog DPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Hierarchy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

22-20 22-21 22-22 22-23 22-24 22-26 22-27 22-28 22-30 22-31 22-31 22-34 22-35 22-35 22-38 22-38 22-39 22-39 22-40 22-41 22-44 22-46 22-50 22-54

xxv

The $root Top-Level Global Declaration Space . . . . . . . . . . . New Data Types for Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . Instantiation Using Implicit .name Connections . . . . . . . . . . . Instantiation Using Implicit .* Connections. . . . . . . . . . . . . . . New Port Connection Rules for Variables . . . . . . . . . . . . . . . Ref Ports on Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Interfaces. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Using Modports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functions In Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Enabling SystemVerilog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Disabling unique And priority Warning Messages . . . . . . . . . . . . 23. SystemVerilog Assertion Constructs Immediate Assertions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Concurrent Assertions Overview . . . . . . . . . . . . . . . . . . . . . . . . . Sequences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Using Formal Arguments In A Sequence . . . . . . . . . . . . . Specifying a Range of Clock Ticks . . . . . . . . . . . . . . . . . . Unconditionally Extending a Sequence . . . . . . . . . . . . . . Using Repetition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Specifying a Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Value Change Functions . . . . . . . . . . . . . . . . . . . . . . . . . Anding Sequences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Intersecting Sequences (And With Length Restriction) . . Oring Sequences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Only Looking For the First Match Of a Sequence . . . . . .

22-54 22-56 22-58 22-58 22-59 22-60 22-62 22-66 22-68 22-69 22-69

23-2 23-3 23-3 23-5 23-5 23-6 23-6 23-9 23-9 23-10 23-11 23-11 23-12

xxvi

Conditions for Sequences . . . . . . . . . . . . . . . . . . . . . . . . Specifying That Sequence Match Within Another Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Using the End Point of a Sequence . . . . . . . . . . . . . . . . . Level Sensitive Sequence Controls . . . . . . . . . . . . . . . . . Properties . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Using Formal Arguments in a Property . . . . . . . . . . . . . . Implications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Inverting a Property . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Past Value Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . The disable iff Construct. . . . . . . . . . . . . . . . . . . . . . . . . . assert Statements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . assume Statements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . cover Statements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Action Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Binding An SVA Module To A Design Module . . . . . . . . . . . . Parameter Passing In A bind Directive. . . . . . . . . . . . . . . The VPI For SVA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SystemVerilog Assertion Local Variable Debugging . . . . . . . . . . Controlling How VCS Uses SystemVerilog Assertions . . . . . . . . Compile-Time And Runtime Options . . . . . . . . . . . . . . . . . . . Ending Simulation at a Number of Assertion Failures . . . . . . Disabling SystemVerilog Assertions at Compile-Time . . . . . . Entering SystemVerilog Assertions as Pragmas . . . . . . . . . . Options for SystemVerilog Assertion Coverage. . . . . . . . . . . Reporting On Assertions Coverage . . . . . . . . . . . . . . . . . . . .

23-12 23-13 23-13 23-14 23-17 23-18 23-19 23-21 23-22 23-22 23-23 23-24 23-25 23-28 23-29 23-31 23-32 23-33 23-35 23-36 23-41 23-42 23-42 23-44 23-45

xxvii

Tcl Commands For SVA And OVA Functional Coverage Reports. . . . . . . . . . . . . . . . . . . . . . . . . . . . The assertCovReport Report Files . . . . . . . . . . . . . . . . . . . . The report.index.html File. . . . . . . . . . . . . . . . . . . . . . . . . The tests.html File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . The category.html File . . . . . . . . . . . . . . . . . . . . . . . . . . . The hier.html File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Assertion Monitoring System Tasks . . . . . . . . . . . . . . . . . . . . Assertion System Functions . . . . . . . . . . . . . . . . . . . . . . . . . Using Assertion Categories . . . . . . . . . . . . . . . . . . . . . . . . . . Using OpenVera Assertion System Tasks . . . . . . . . . . . . Using Attributes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Stopping And Restarting Assertions By Category . . . . . . 24. SystemVerilog Testbench Constructs Enabling Use of SystemVerilog Testbench Constructs . . . . . . . . VCS Flow for SVTB. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Options For Compiling and Simulating SystemVerilog Testbench Constructs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Compile-Time Options . . . . . . . . . . . . . . . . . . . . . . . . . . . Runtime Options. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Compile Time or Runtime Options . . . . . . . . . . . . . . . . . . The string Data Type . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . String Manipulation Methods . . . . . . . . . . . . . . . . . . . . . . . . . String Conversion Methods . . . . . . . . . . . . . . . . . . . . . . . . . . Predefined String Methods . . . . . . . . . . . . . . . . . . . . . . . . . . Program Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

23-49 23-56 23-57 23-62 23-62 23-63 23-64 23-68 23-68 23-69 23-70 23-71

24-1 24-1 24-2 24-2 24-3 24-4 24-5 24-5 24-8 24-12 24-15

xxviii

Arrays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Dynamic Arrays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . The new[ ] Built-In Function . . . . . . . . . . . . . . . . . . . . . . . The size() Method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . The delete() Method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Assignments to and from Dynamic Arrays . . . . . . . . . . . . Associative Arrays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Wildcard Indexes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . String Indexes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Associative Array Assignments and Arguments. . . . . . . . Associative Array Methods. . . . . . . . . . . . . . . . . . . . . . . . Queues . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Queue Methods . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . The foreach Loop. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Array Aggregates (Reduction/Manipulation) Methods in Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Classes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Creating an Instance (object) of a Class . . . . . . . . . . . . . . . . Constructors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Assignment, Re-naming and Copying . . . . . . . . . . . . . . . . . . Static Properties. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Global Constant Class Properties . . . . . . . . . . . . . . . . . . . . . Method Declarations: Out of Class Body Declarations . . . . . Class Extensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Subclasses and Inheritance. . . . . . . . . . . . . . . . . . . . . . . . . . Abstract classes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Polymorphism. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

24-20 24-20 24-20 24-22 24-22 24-22 24-24 24-25 24-25 24-26 24-26 24-29 24-31 24-34 24-37 24-40 24-41 24-42 24-44 24-45 24-46 24-47 24-49 24-49 24-50 24-52

xxix

Scope Resolution Operator :: . . . . . . . . . . . . . . . . . . . . . . super keyword . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Casting. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Chaining Constructors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Accessing Class Members . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Properties . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ................................................ Methods . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . this keyword . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class Packet Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Unpacked Structures in Classes . . . . . . . . . . . . . . . . . . . . . . Random Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Random Variables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Constraint Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . External Declaration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Inheritance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Set Membership . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Weighted Distribution . . . . . . . . . . . . . . . . . . . . . . . . . . . . Implications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . if else Constraints. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Global Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Default Constraints. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Variable Ordering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Unidirectional Constraints . . . . . . . . . . . . . . . . . . . . . . . . Static Constraint Blocks . . . . . . . . . . . . . . . . . . . . . . . . . .

24-54 24-55 24-56 24-58 24-62 24-62 24-63 24-64 24-66 24-66 24-68 24-68 24-69 24-72 24-72 24-73 24-75 24-76 24-78 24-79 24-80 24-87 24-88 24-99

Randomize Methods . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-100 randomize() . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-100 pre_randomize() and post_randomize() . . . . . . . . . . . . . . 24-100

xxx

Controlling Constraints. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-102 Disabling Random Variables . . . . . . . . . . . . . . . . . . . . . . . . . 24-105 In-line Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-108 In-line Constraint Checker . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-109 Random Number Generation. . . . . . . . . . . . . . . . . . . . . . . . . 24-111 Seeding for Randomization . . . . . . . . . . . . . . . . . . . . . . . . . . 24-115 randcase Statements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-116 Random Sequence Generation. . . . . . . . . . . . . . . . . . . . . . . . . . 24-117 RSG Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-118 Production Declaration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-119 Production Controls . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Weights for Randomization . . . . . . . . . . . . . . . . . . . . . . . if-else Statements. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . case Statements. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . repeat Loops . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . break Statement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . return Statement. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-122 24-122 24-123 24-125 24-126 24-126 24-127

Aspect Oriented Extensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-128 Aspect-Oriented Extensions in SV. . . . . . . . . . . . . . . . . . . . . 24-130 Processing of AOE as a Precompilation Expansion . . . . . . . 24-132 Weaving advice into the target method . . . . . . . . . . . . . . 24-137 Pre-compilation Expansion details. . . . . . . . . . . . . . . . . . . . . 24-142 Precedence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-143 Array manipulation methods . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-165 Array ordering methods . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-165 reverse() . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-165

xxxi

sort() . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-166 rsort() . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-166 Array locator methods . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . find() . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . find_index(). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . find_first() . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . find_first_index(). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . find_last() . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . find_last_index() . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . min() . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . max() . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . unique() . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . unique_index() . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Array reduction methods . . . . . . . . . . . . . . . . . . . . . . . . . . . . sum() . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . product() . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . and() . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . or() . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xor() . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-167 24-167 24-168 24-168 24-169 24-170 24-170 24-171 24-171 24-172 24-173 24-173 24-173 24-174 24-175 24-175 24-176

Interprocess Synchronization and Communication . . . . . . . . . . . 24-177 Semaphores . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-177 Semaphore Methods . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-179 Mailboxes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-180 Mailbox Methods . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-182 Events . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Waiting for an Event . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Persistent Trigger . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Merging Events . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-183 24-183 24-184 24-185

xxxii

Reclaiming Named Events . . . . . . . . . . . . . . . . . . . . . . . . 24-186 Event Comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-187 Clocking Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-188 Clocking Block Declaration . . . . . . . . . . . . . . . . . . . . . . . . . . 24-188 Input and Output Skews . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-193 Hierarchical Expressions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-194 Signals in Multiple Clocking Blocks . . . . . . . . . . . . . . . . . . . . 24-194 Clocking Block Scope and Lifetime . . . . . . . . . . . . . . . . . . . . 24-195 Clocking Block Events . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-196 Default Clocking Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-196 Cycle Delays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-197 Input Sampling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-198 Synchronous Events . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-199 Synchronous Drives. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-199 Drive Value Resolution. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-200 Clocking Blocks in SystemVerilog Assertions . . . . . . . . . . . . 24-200 Sequences and Properties in Clocking Blocks . . . . . . . . . . . 24-201 SystemVerilog Assertions Expect Statements. . . . . . . . . . . . . . . 24-202 Virtual Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-207 Scope of Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-208 Virtual Interface Modports . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-208 Driving a Net Using a Virtual Interface . . . . . . . . . . . . . . . . . 24-209 Virtual Interface Modports and Clocking Blocks . . . . . . . . . . 24-209 Array of Virtual Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-211 Clocking Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-212

xxxiii

Event Expression/Structure . . . . . . . . . . . . . . . . . . . . . . . . . . 24-213 Null Comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-213 Not Yet Implemented . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-214 Coverage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-214 The covergroup Construct . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-215 Defining a Coverage Point . . . . . . . . . . . . . . . . . . . . . . . . . . . Bins for Value Ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . Bins for Value Transitions. . . . . . . . . . . . . . . . . . . . . . . . . Specifying Illegal Coverage Point Values . . . . . . . . . . . . . 24-217 24-217 24-221 24-222

Defining Cross Coverage. . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-223 Defining Cross Coverage Bins . . . . . . . . . . . . . . . . . . . . . 24-224 Cumulative and Instance-based Coverage . . . . . . . . . . . . . . 24-226 Cumulative Coverage. . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-226 Instance-based Coverage . . . . . . . . . . . . . . . . . . . . . . . . 24-227 Coverage Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-227 Predefined Coverage Methods . . . . . . . . . . . . . . . . . . . . . . . 24-230 Predefined Coverage Group Functions . . . . . . . . . . . . . . 24-230 Unified Coverage Reporting. . . . . . . . . . . . . . . . . . . . . . . . . . 24-237 The Coverage Report . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-238 The ASCII Text File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-238 The HTML File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-240 Persistent Storage of Coverage Data and Post-Processing Tools 24-241 Unified Coverage Directory and Database Control . . . . . 24-241 Loading Coverage Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-243 VCS NTB (SV) Memory Profiler . . . . . . . . . . . . . . . . . . . . . . . . . 24-246 Use Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-246

xxxiv

UCLI Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . CLI Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Incremental Profiling. . . . . . . . . . . . . . . . . . . . . . . . . . . . . Only Active Memory Reported . . . . . . . . . . . . . . . . . . . . .

24-247 24-247 24-248 24-248

VCS NTB (SV) Dynamic Memory Profile Report . . . . . . . . . . 24-249 The Direct Programming Interface (DPI) . . . . . . . . . . . . . . . . . . . 24-251 Limitations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-253 Include Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24-253 Time Consuming Blocking Tasks . . . . . . . . . . . . . . . . . . . . . . 24-255 25. Source Protection Encrypting Source Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Encrypt Using Compiler Directives . . . . . . . . . . . . . . . . . . . . Encrypting Specified Regions . . . . . . . . . . . . . . . . . . . . . . . . Encrypting The Entire Source Description . . . . . . . . . . . . . . . Encrypting SDF Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Specifying Encrypted Filename Extensions . . . . . . . . . . . . . . Specifying Encrypted File Locations . . . . . . . . . . . . . . . . . . . Multiple Runs and Error Handling . . . . . . . . . . . . . . . . . . . . . Permitting CLI/PLI Access to Encrypted Modules . . . . . . . . . Simulating Encrypted Models . . . . . . . . . . . . . . . . . . . . . . . . . . . Using the CLI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Using System Tasks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Writing PLI Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Mangling Source Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Creating A Test Case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25-3 25-3 25-4 25-5 25-9 25-10 25-10 25-10 25-11 25-12 25-12 25-13 25-13 25-14 25-23

xxxv

Preventing Mangling of Top-Level Modules . . . . . . . . . . . . . . Appendix A. VCS Environment Variables

25-24

Simulation Environment Variables. . . . . . . . . . . . . . . . . . . . . . . . Optional Environment Variables . . . . . . . . . . . . . . . . . . . . . . . . . Appendix B. Compile-Time Options

A-2 A-3

Options for Accessing Verilog Libraries . . . . . . . . . . . . . . . . . Options for Incremental Compilation . . . . . . . . . . . . . . . . . . . Options for Help and Documentation. . . . . . . . . . . . . . . . . . . Options for SystemVerilog . . . . . . . . . . . . . . . . . . . . . . . . . . . Options for OpenVera Native Testbench . . . . . . . . . . . . . . . . Options for Different Versions of Verilog . . . . . . . . . . . . . . . . Options for Initializing Memories and Regs . . . . . . . . . . . . . . Options for Using Radiant Technology. . . . . . . . . . . . . . . . . . Options for 64-bit Compilation . . . . . . . . . . . . . . . . . . . . . . . . Options for Debugging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Options for Finding Race Conditions . . . . . . . . . . . . . . . . . . Options for Starting Simulation Right After Compilation . . . . Options for Compiling OpenVera Assertions (OVA). . . . . . . . Options for Compiling For Simulation With Vera . . . . . . . . . . Options for Compiling For Coverage Metrics. . . . . . . . . . . . . Options for Discovery Visual Environment and UCLI . . . . . . Options for Converting VCD and VPD Files . . . . . . . . . . . . . Options for Specifying Delays . . . . . . . . . . . . . . . . . . . . . . . . Options for Compiling an SDF File . . . . . . . . . . . . . . . . . . . .

B-4 B-6 B-9 B-9 B-11 B-15 B-16 B-16 B-16 B-17 B-20 B-21 B-22 B-23 B-23 B-30 B-31 B-32 B-35

xxxvi

Options for Profiling Your Design. . . . . . . . . . . . . . . . . . . . . . Options for File Containing Source File Names and Options Options for Compiling Runtime Options into the simv Executable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Options for Pulse Filtering . . . . . . . . . . . . . . . . . . . . . . . . . . . Options for PLI Applications . . . . . . . . . . . . . . . . . . . . . . . . . Options to Enable and Disable Specify Blocks and Timing Checks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Options to Enable the VCS DirectC Interface . . . . . . . . . . . . Options for Negative Timing Checks . . . . . . . . . . . . . . . . . . . Options for Flushing Certain Output Text File Buffers . . . . . . Options for Controlling Messages . . . . . . . . . . . . . . . . . . . . . Options for Cell Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . Options for Licensing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Options for Controlling the Assembler . . . . . . . . . . . . . . . . . . Options for Controlling the Linker . . . . . . . . . . . . . . . . . . . . . Options for Controlling the C Compiler . . . . . . . . . . . . . . . . . Options for Source Protection . . . . . . . . . . . . . . . . . . . . . . . . Options for Mixed Analog/Digital Simulation . . . . . . . . . . . . . Options for Changing Parameter Values . . . . . . . . . . . . . . . . Checking for X and Z Values in Conditional Expressions . . . Options to Specify the Time Scale . . . . . . . . . . . . . . . . . . . . . General Options. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Enable Verilog 2001 Features . . . . . . . . . . . . . . . . . . . . . Enable the VCS/SystemC Cosimulation Interface . . . . . . Reduce Memory Consumption. . . . . . . . . . . . . . . . . . . . .

B-37 B-38 B-39 B-40 B-41 B-42 B-43 B-43 B-44 B-45 B-48 B-49 B-50 B-50 B-51 B-54 B-56 B-56 B-57 B-57 B-58 B-58 B-58 B-58

Options for Simulating SWIFT VMC Models and SmartModels B-45

xxxvii

TetraMAX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Make Accessing an Undeclared Bit an Error Condition . . Treat Output Ports As Inout Ports . . . . . . . . . . . . . . . . . . Allow Inout Port Connection Width Mismatches. . . . . . . . Specifying a VCD File. . . . . . . . . . . . . . . . . . . . . . . . . . . . Memories and Multi-Dimensional Arrays (MDAs) . . . . . . Specifying a Log File . . . . . . . . . . . . . . . . . . . . . . . . . . . . Hardware Modeling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Changing Source File Identifiers to Upper Case . . . . . . . Defining a Text Macro. . . . . . . . . . . . . . . . . . . . . . . . . . . . Specifying the Name of the Executable File. . . . . . . . . . . Returning The Platform Directory Name . . . . . . . . . . . . . Specifying Native Code Generation . . . . . . . . . . . . . . . . . For Long Calls . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Appendix C. Simulation Options

B-59 B-59 B-59 B-59 B-59 B-60 B-60 B-61 B-61 B-61 B-62 B-62 B-62 B-62

Options for Simulating OpenVera Testbenches . . . . . . . . . . . Options for Simulating OpenVera Assertions. . . . . . . . . . . . . Options for SystemVerilog Assertions . . . . . . . . . . . . . . . . . . Options for a CLI Command File . . . . . . . . . . . . . . . . . . . . . . Options for Specifying VERA Object Files . . . . . . . . . . . . . . . Options for Coverage Metrics . . . . . . . . . . . . . . . . . . . . . . . . Options for Enabling and Disabling Specify Blocks . . . . . . . . Options for Specifying When Simulation Stops . . . . . . . . . . . Options for Recording Output . . . . . . . . . . . . . . . . . . . . . . . . Options for Controlling Messages . . . . . . . . . . . . . . . . . . . . . Options for Discovery Visual Environment and UCLI . . . . . . Options for VPD Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

C-2 C-4 C-6 C-9 C-10 C-10 C-12 C-13 C-13 C-14 C-15 C-15

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Options for Controlling $gr_waves System Task Operations. Options for VCD Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Options for Specifying Min:Typ:Max Delays . . . . . . . . . . . . . Options for Flushing Certain Output Text File Buffers . . . . . . Options for Licensing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . General Options. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Viewing the Compile-Time Options Used to Create the Executable . . . . . . . . . . . . . . . . . . . . . . . . Stopping Simulation When the Executable Starts . . . . . . Recording Where ACC Capabilities are Used . . . . . . . . . Suppressing the $stop System Task . . . . . . . . . . . . . . . . Enabling User-Defined Plusarg Options. . . . . . . . . . . . . . Enabling Overriding the Timing of a SWIFT SmartModel. Specifying acc_handle_simulated_net PLI Routine and MIPD Annotation . . . . . . . . . . . . . . . . . . . . . . . . . Appendix D. Compiler Directives and System Tasks

C-17 C-18 C-19 C-20 C-21 C-22 C-22 C-22 C-22 C-23 C-23 C-23 C-23

Compiler Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Compiler Directives for Cell Definition . . . . . . . . . . . . . . . . . . Compiler Directives for Setting Defaults . . . . . . . . . . . . . . . . Compiler Directives for Macros . . . . . . . . . . . . . . . . . . . . . . . Compiler Directives for Detecting Race Conditions . . . . . . . . Compiler Directives for Delays. . . . . . . . . . . . . . . . . . . . . . . . Compiler Directives for Backannotating SDF Delay Values. . Compiler Directives for Source Protection . . . . . . . . . . . . . . . Compiler Directives for Controlling Port Coercion . . . . . . . . . General Compiler Directives . . . . . . . . . . . . . . . . . . . . . . . . .

D-2 D-2 D-3 D-3 D-5 D-5 D-7 D-7 D-8 D-8

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Compiler Directive for Including a Source File . . . . . . . . . D-8 Compiler Directive for Setting the Time Scale . . . . . . . . . D-9 Compiler Directive for Specifying a Library . . . . . . . . . . . D-9 Compiler Directive for Maintaining The File Name and Line Numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-10 Unimplemented Compiler Directives . . . . . . . . . . . . . . . . . . . System Tasks and Functions. . . . . . . . . . . . . . . . . . . . . . . . . . . . System Tasks for SystemVerilog Assertions Severity . . . . . . System Tasks for SystemVerilog Assertions Control . . . . . . . System Tasks for SystemVerilog Assertions . . . . . . . . . . . . . System Tasks for VCD Files . . . . . . . . . . . . . . . . . . . . . . . . . System Tasks for LSI Certification VCD and EVCD Files . . . System Tasks for VPD Files. . . . . . . . . . . . . . . . . . . . . . . . . . System Tasks for SystemVerilog Assertions . . . . . . . . . . . . . System Tasks for Executing Operating System Commands . System Tasks for Log Files . . . . . . . . . . . . . . . . . . . . . . . . . . System Tasks for Data Type Conversions . . . . . . . . . . . . . . . System Tasks for Displaying Information . . . . . . . . . . . . . . . . System Tasks for File I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . System Tasks for Loading Memories . . . . . . . . . . . . . . . . . . . System Tasks for Time Scale. . . . . . . . . . . . . . . . . . . . . . . . . System Tasks for Simulation Control . . . . . . . . . . . . . . . . . . . System Tasks for Timing Checks. . . . . . . . . . . . . . . . . . . . . . System Tasks for PLA Modeling . . . . . . . . . . . . . . . . . . . . . . System Tasks for Stochastic Analysis . . . . . . . . . . . . . . . . . . System Tasks for Simulation Time. . . . . . . . . . . . . . . . . . . . . D-10 D-10 D-11 D-11 D-12 D-12 D-15 D-18 D-25 D-26 D-27 D-28 D-28 D-29 D-31 D-32 D-32 D-33 D-36 D-36 D-37

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System Tasks for Probabilistic Distribution . . . . . . . . . . . . . . System Tasks for Resetting VCS . . . . . . . . . . . . . . . . . . . . . . General System Tasks and Functions . . . . . . . . . . . . . . . . . . Checks for a Plusarg . . . . . . . . . . . . . . . . . . . . . . . . . . . . SDF Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Counting the Drivers on a Net . . . . . . . . . . . . . . . . . . . . . Depositing Values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Fast Processing Stimulus Patterns. . . . . . . . . . . . . . . . . . Saving and Restarting The Simulation State . . . . . . . . . . Checking for X and Z Values in Conditional Expressions IEEE Standard System Tasks Not Yet Implemented in VCS . Appendix E. PLI Access Routines

D-38 D-38 D-39 D-39 D-39 D-40 D-40 D-40 D-41 D-41 D-42

Access Routines for Reading and Writing to Memories . . . . . . . acc_setmem_int. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . acc_getmem_int . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . acc_clearmem_int . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . acc_setmem_hexstr. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . acc_getmem_hexstr . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . acc_setmem_bitstr. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . acc_getmem_bitstr. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . acc_handle_mem_by_fullname . . . . . . . . . . . . . . . . . . . . . . . acc_readmem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . acc_getmem_range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

E-2 E-4 E-5 E-6 E-6 E-11 E-12 E-15 E-16 E-17 E-18 E-19 E-20 E-21

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acc_getmem_size . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . acc_getmem_word_int. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . acc_getmem_word_range . . . . . . . . . . . . . . . . . . . . . . . . . . . Access Routines for Multidimensional Arrays . . . . . . . . . . . . . . . tf_mdanodeinfo and tf_imdanodeinfo. . . . . . . . . . . . . . . . . . . acc_get_mda_range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . acc_get_mda_word_range() . . . . . . . . . . . . . . . . . . . . . . . . . acc_getmda_bitstr() . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . acc_setmda_bitstr() . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Access Routines for Probabilistic Distribution . . . . . . . . . . . . . . . vcs_random . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vcs_random_const_seed . . . . . . . . . . . . . . . . . . . . . . . . . . . . vcs_random_seed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vcs_dist_uniform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vcs_dist_normal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vcs_dist_exponential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vcs_dist_poisson . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

E-22 E-23 E-24 E-25 E-26 E-28 E-29 E-31 E-32 E-33 E-34 E-35 E-35 E-36 E-37 E-38 E-39

Access Routines for Returning a String Pointer to a Parameter Value E-39 acc_fetch_paramval_str. . . . . . . . . . . . . . . . . . . . . . . . . . . . . Access Routines for Extended VCD Files . . . . . . . . . . . . . . . . . . acc_lsi_dumpports_all . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . acc_lsi_dumpports_call . . . . . . . . . . . . . . . . . . . . . . . . . . . . . acc_lsi_dumpports_close. . . . . . . . . . . . . . . . . . . . . . . . . . . . acc_lsi_dumpports_flush . . . . . . . . . . . . . . . . . . . . . . . . . . . . E-40 E-40 E-42 E-43 E-45 E-46

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acc_lsi_dumpports_limit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . acc_lsi_dumpports_misc . . . . . . . . . . . . . . . . . . . . . . . . . . . . acc_lsi_dumpports_off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . acc_lsi_dumpports_on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . acc_lsi_dumpports_setformat . . . . . . . . . . . . . . . . . . . . . . . . acc_lsi_dumpports_vhdl_enable . . . . . . . . . . . . . . . . . . . . . . Access Routines for Line Callbacks . . . . . . . . . . . . . . . . . . . . . . acc_mod_lcb_add .