university of tehran 1 microprocessor system design omid fatemi 8088 microprocessor...

University of Tehran 1

Microprocessor System Design

Omid Fatemi

8088 Microprocessor

([email protected])


Outline

• Moore’s law

• 80x86 history

• Pin configuration

• Minimal / Maximal mode

• Address latch enable

• Bi-directional data bus


Computer modules

CPUMemory

(RAM, ROM)Peripherals

(IO)

Data Bus

Control Bus

Address Bus

KeyboardMonitorPrinterMouseMicrophoneDisk


Intel’s Microprocessors and Moore’s law

Model Year Introduced Clock Rate Transistors per chip

4004 1971 0.1 MHz 2,250

8008 1972 . 0.2 MHz 3,500

8080 1974 . 2 MHz 5,000

8086 1978 * 5 MHz 29,000

80286 1982 * 6 MHz 120,000

386™ processor 1985 ** 16 MHz 275,000

486™ DX processor 1989 ** 26 MHz 1,180,000

Pentium® processor 1993 *** 60 MHz 3,100,000

Pentium II processor 1997 *** 233 MHz 7,500,000

Pentium III processor 1999 *** 450 MHz 24,000,000

Pentium 4 processorhttp://www.intel.com/pressroom/archive/backgrnd/30thann_funfacts.htm

2000 *** 1500 MHz 42,000,000


From Intel Sitehttp://www.intel.com/pressroom/archive/backgrnd/30thann_funfacts.htm

•Today, there are 40 microprocessors in the average middle-class American household. The number increases to 50 when a PC and all the surrounding paraphernalia are added.1 •These microprocessors are hidden in bathroom scales with digital readouts, irons with automatic shutdown switches and even the common electronic toothbrush that possesses some 3,000 lines of computer code.1 •Today's automobiles have, on average, more than 50 microprocessors controlling things such as air bags, brakes, engines, windows, door locks and cruise control.2 •Developed during the 1970s, the microprocessor became most visible as the central processor of the personal computer. Microprocessors also play supporting roles within larger computers as smart controllers for graphics displays, storage devices, and high-speed printers. However, the vast majority of microprocessors are used to control a broad array of devices from consumer appliances and PC-enhanced toys to satellites orbiting the earth.3 •The microprocessor has made possible the inexpensive hand-held electronic calculator, the digital wristwatch, and the electronic game. Microprocessors are used to control consumer electronic devices, such as the programmable microwave oven and videocassette recorder; to regulate gasoline consumption and antilock brakes in automobiles; and to monitor alarm systems.3

It all started 30 years ago, November 1971•Intel began development of the first microprocessor in 1969 as part of a project to design a set of chips for a family of programmable calculators from Japanese calculator manufacturer Busicom. •Originally, Busicom owned the rights to the microprocessor having paid Intel $60,000. Realizing the potential for the "brain" chip, Intel offered to return the $60,000 in exchange for the rights to the microprocessor design. •Busicom agreed and Intel introduced the 4004 to the worldwide market on November 15, 1971. The 4004 sold for $200 each. The key to the success of the microprocessor idea was to provide a software programmable device. Prior to the invention of the programmable microprocessor, chips were designed to perform specific "fixed" functions.

Today's state-of-the-art Pentium® 4 Processor•The latest direct descendant of the 4004 is the Intel® Pentium® 4 processor for desktop personal computers. •Today's cutting edge Pentium 4 microprocessor operates at 2 billion cycles per second. •It took 28 years to go from a speed of 108,000 cycles per second performance in the 4004 brain chip to1 billion cycles per second (1 gigahertz) with the Intel® Pentium® III processor - and only 18 months to break the 2 gigahertz barrier with the August announcement of the latest Pentium 4 microprocessor.

Pentium 4 processor-based personal computers (at price points ranging from under $1,000 to $2,000) are fueling the latest trends in home computing - from digital music and home digital movie making to photo-realistic 3D images and visual environments delivered on and off the net in advanced games, education and shopping experiences.


The Microprocessor

• An integrated circuit with millions of

transistors interconnected with very small

aluminum wires.

• Controls and directs activities of the PC

• Execute stored programs


Memory

Von Neumann Architecture

Data

Microprocessor

Registers

Actual Processor

Program

Address Lines

Data Lines

Control Lines


The 8086 Family:The Late 1970’s

• Could address up to 1 mb of memory at a time when other CPU’s could only address 64 kb. The 16 bit external bus too powerful.

• The 8088 replaced the 8086 and had only an 8 bit external bus

• The 8088 CPU was the first chip used in IBM’s microcomputers


The 80286 Family:1983

• Wanted to make the 286 backward compatible with the 8088’s.

• So had 2 modes: – Real mode-less powerful

– Protected mode-very powerful

» Could access up to 16 mb of memory

» Needed a special operating system

» But most users only had DOS


The 386 DX: 1985

• First true 32 bit chip, all buses 32 bits wide

• Capable of running in real mode, 286 protected mode and its own 386 protected mode

• In 386 protected mode it had 2 new functions:– Virtual memory- could use hard drive to pretend that computer had

up to 4 GB of data!

– Virtual 8086- 8086 bubbles created for DOS


The 386 SX:1988

• How different from the 386DX?– External data bus reduced to 16 bits

– Address bus reduced to 24 bits, which limited memory use to 16 mb

– First popular lap tops were based on the 386SX but was called the 386 SL and ran on 3.3 volts


The 486DX:1989

• How different from the 386 family?– A built in math coprocessor

» Performs high math functions

– A built in 8K cache on same chip

» This was an SRAM cache that stores code read in the past. When the CPU asks for the code again, it doesn’t have to go to DRAM to get it.


486SX:1991

• Same as 486 DX except the math co-processor is disabled.


The Pentiums:1993

• Had 64 bit external data bus that split internally as 2 dual pipelined 32 bit buses

• Supported an 8K write through cache for programs

• Most early pentiums ran at 3.3 volts. This conserved heat. Voltage regulators on the motherboard can decrease voltage


Pentiums continued

• Includes clock doubling through the setting of jumpers

• Most later Pentuims use SPGA, Standard Pin Grid Array. This allows staggers the pens and allows for higher pen density


Pentium Pro(P6):1995

• Quad pipelining

• Dynamic processing

• On chip L2 cache

• Uses Socket 8


Recent Pentiums:After 1996

• MMX- helps with multimedia products

• Increased multipliers/clocks- 45 multipliers

• Improved processing- better cache branch

predicting

• Improved superscalar architecture

• SSE/SSE2 instructions


8088 Microprocessor

Minimum Mode


Pin Configuration

8088

AD0

AD 1

AD 2

AD 3

AD 4

AD 5

AD 6

AD 7

A8

A9

A10

A11

A12

A13

A14

A15

A16 / S3

A17 / S4

A18 / S5

A19 / S6

SSO

DEN

DT / R

IO / M

RD

WR

ALE

INTA

MN / MX

READY

CLK

RESET

TEST

HLDA

HOLD

NMI

INTR


Power and Ground Pins

• Vcc – pin 40

• Gnd – pin 1 and 20


Address Pins

• AD0..AD7

• A8..A15

• A19/S6, A18/S5, A17/S4, A16/S3


Data Pins

• AD0..AD7


Control Pins

• MN/MX’ (input)– Indicates what mode the processor is to operate in

• READY (input)– When given an input LOW, it will go into a wait state

• CLK (input)– Provides basic timing for the processor

• RESET (input)– Causes the processor to immediately terminate its

present activity

– To reset the microprocessor, this must be HIGH for at least 4 clock cycles


Control Pins

• TEST’ (input)– Connect this to HIGH

• HOLD (input)– Connect this to LOW

• HLDA (output)


Control Pins

• INTR (input)– Interrupt request

• INTA’ (output)– Interrupt Acknowledge

• NMI (input)– Non-maskable interrupt


Control Pins

• DEN’ (output)– Data Enable

– It is LOW when processor wants to receive data or processor is giving out data

• DT/R’ (output)– Data Transmit/Receive

– When HIGH, direction of data lines is from microprocessor to memory/devices

– When LOW, direction of data lines is from memory/devices to microprocessor

• IO/M’ (output)– Device/Memory

– When HIGH, microprocessor wants to access I/O Device

– When LOW, microprocessor wants to access memory


Control Pins

• RD’ (output)– When LOW, it indicates that the microprocessor is

performing a read access

• WR (output)– When LOW, it indicates that the microprocessor is

performing a write access

• ALE (output)– Address Latch Enable

– Provided by the microprocessor to latch address

– When this is HIGH, microprocessor is using AD0..AD7, A19/S6, A18/S5, A17/S4, A16/S3 as address lines


Clock Signal

• needed by the microprocessor to synchronize signals

• ideally a square wave having a constant frequency


8086 Signals


ASYNC

AEN2

RDY2

AEN1

RDY1

CSYNC

EF1

F/C

X2

X1

RES

READY

CLK

PCLK

OSC

RESET

8088

AD0

AD 1

AD 2

AD 3

AD 4

AD 5

AD 6

AD 7

A8

A9

A10

A11

A12

A13

A14

A15

A16 / S3

A17 / S4

A18 / S5

A19 / S6

SSO

DEN

DT / R

IO / M

RD

WR

ALE

INTA

MN / MX

READY

CLK

RESET

TEST

HLDA

HOLD

NMI

INTR

R

C

5V Providing Clock, Reset, and Ready Signal


ASYNC

AEN2

RDY2

AEN1

RDY1

CSYNC

EF1

F/C

X2

X1

RES

READY

CLK

PCLK

OSC

RESET

8088

AD0

AD 1

AD 2

AD 3

AD 4

AD 5

AD 6

AD 7

A8

A9

A10

A11

A12

A13

A14

A15

A16 / S3

A17 / S4

A18 / S5

A19 / S6

SSO

DEN

DT / R

IO / M

RD

WR

ALE

INTA

MN / MX

READY

CLK

RESET

TEST

HLDA

HOLD

NMI

INTR

R

C

5V

5V

Minimum Mode


Minimum Mode

8088

AD7 - AD0

A15 - A8

A19/S6 - A16/S3

DEN

DT / R

IO / M

RD

WR

ALE


Minimum Mode

MEMORY

D7 - D0

A7 - A0

A15 - A8

A19 - A16

RD

WR

8088

AD7 - AD0

A15 - A8

A19/S6 - A16/S3

DEN

DT / R

IO / M

RD

WR

ALE


Processor Timing Diagram of 8088 (Minimum Mode)for Memory or I/O Read

ALE

T1

CLOCK

T2 T3 T4

AD7 - AD0

A15 - A8

A19/S6 - A16/S3

DT/R __

IO/M __

____

RD

DEN______

A15 - A8

A7 - A0 D7 - D0 (from memory)

A19 - A16 S6 - S3

if I/O ACCESS this is HIGH, if MEMORY ACCESS this is LOW


Will the circuit be able to perform memory read?

;assume that initially the values

;of the registers are:

;BX = 1234, DS = 9000

MOV AL, [BX]



ALE

T1

CLOCK

T2 T3 T4

AD7 - AD0

A15 - A8

A19/S6 - A16/S3

DT/R __

IO/M __

____

RD

DEN______

A15 - A8


A19 - A16 S6 - S3



Minimum Mode

MEMORY

D7 - D0

A7 - A0

A15 - A8

A19 - A16

RD

WR

8088

AD7 - AD0

A15 - A8

A19/S6 - A16/S3

DEN

DT / R

IO / M

RD

WR

ALE


Minimum Mode

MEMORY

D7 - D0 Q7 - Q0

OE

LE 74LS373

D7 - D0 Q7 - Q0

OE

LE 74LS373

D7 - D4 Q7 - Q4

OE

LE

D3 - D0 Q3 - Q0

74LS373GND

GND

GND

D7 - D0

A7 - A0

A15 - A8

A19 - A16

RD

WR

8088

AD7 - AD0

A15 - A8

A19/S6 - A16/S3

DEN

DT / R

IO / M

RD

WR

ALE


Octal Transparent Latch with 3-State Output

74LS373

Q0

Q1

Q2

Q3

Q4

Q5

Q6

Q7

D0

D1

D2

D3

D4

D5

D6

D7

OE

LE



ALE

T1

CLOCK

T2 T3 T4

AD7 - AD0

A15 - A8

A19/S6 - A16/S3

DT/R __

IO/M __

____

RD

DEN______

A19 - A0from 74LS373 to memory


S6 - S3A19 - A16

A19 - A0 from 74LS373


A15 - A8


Will the circuit be able to perform memory read?

;assume that initially the values

;of the registers are:

;BX = 1234, DS = 9000

MOV AL, [BX]


Processor Timing Diagram of 8088 (Minimum Mode)for Memory or I/O Read (with 74373)

ALE

T1

CLOCK

T2 T3 T4

AD7 - AD0

A15 - A8

A19/S6 - A16/S3

DT/R __

IO/M __

____

RD

DEN______



S6 - S3A19 - A16

A19 - A0 from 74LS373


A15 - A8


Minimum Mode

D7 - D0 Q7 - Q0

OE

LE 74LS373

MEMORY

D7 - D0 Q7 - Q0

OE

LE 74LS373

D7 - D4 Q7 - Q4

OE

LE

D3 - D0 Q3 - Q0

74LS373GND

GND

GND

D7 - D0

A7 - A0

A15 - A8

A19 - A16

RD

WR

8088

AD7 - AD0

A15 - A8

A19/S6 - A16/S3

DEN

DT / R

IO / M

RD

WR

ALE

What about Data read and write


Minimum Mode

MEMORY

D7 - D0 Q7 - Q0

OE

LE 74LS373

D7 - D0 Q7 - Q0

OE

LE 74LS3738088

AD7 - AD0

A15 - A8

A19/S6 - A16/S3

DEN

DT / R

IO / M

RD

WR

ALE

D7 - D4 Q7 - Q4

OE

LE 74LS373

D3 - D0 Q3 - Q0

GND

GND

GND

D7 - D0A7 - A0 B7 - B0

E

DIR 74LS245

A7 - A0

A15 - A8

A19 - A16

RD

WR


Processor Timing Diagram of 8088 (Minimum Mode)for Memory or I/O Read (with 74245)

ALE

T1

CLOCK

T2 T3 T4

AD7 - AD0

A15 - A8

A19/S6 - A16/S3

DT/R __

IO/M __

____

RD

DEN______


S6 - S3A19 - A16

A19 - A0 from 74LS373


D7 - D0from memory to 74LS245

D7 - D0 (from memory)

D7 - D0 from74LS245

garbageA7 - A0

A15 - A8


Minimum Mode

MEMORY

D7 - D0 Q7 - Q0

OE

LE 74LS373

D7 - D0 Q7 - Q0

OE

LE 74LS3738088

AD7 - AD0

A15 - A8

A19/S6 - A16/S3

DEN

DT / R

IO / M

RD

WR

ALE

D7 - D4 Q7 - Q4

OE

LE 74LS373

D3 - D0 Q3 - Q0

GND

GND

GND

D7 - D0A7 - A0 B7 - B0

E

DIR 74LS245

A7 - A0

A15 - A8

A19 - A16

RD

WR


Minimum Mode

MEMORY

D7 - D0 Q7 - Q0

OE

LE 74LS373

D7 - D0 Q7 - Q0

OE

LE 74LS3738088

AD7 - AD0

A15 - A8

A19/S6 - A16/S3

DEN

DT / R

IO / M

RD

WR

ALE

D7 - D4 Q7 - Q4

OE

LE 74LS373

D3 - D0 Q3 - Q0

GND

GND

GND

D7 - D0A7 - A0 B7 - B0

E

DIR 74LS245

A7 - A0

A15 - A8

A19 - A16

RD

WR

Simplified Drawing of8088 Minimum Mode

D7 - D0

A7 - A0

A15 - A8

A19 - A16

MEMR

MEMW


Minimum Mode

MEMORY

D7 - D0

A19 - A0

RD

WR

SimplifiedDrawing of

8088 MinimumMode

D7 - D0

A19 - A0

MEMR

MEMW

university of tehran 1 microprocessor system design omid fatemi 8088 microprocessor...

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