unit 9 - digital

12
COMPUTER AIDED DESIGN 2 COMPUTER AIDED DESIGN 2 (E3004) (E3004) INTRODUCTION TO INTRODUCTION TO THE DIGITAL CIRCUITS THE DIGITAL CIRCUITS SIMULATION SIMULATION

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8/7/2019 UNIT 9 - DIGITAL

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COMPUTER AIDED DESIGN 2COMPUTER AIDED DESIGN 2

(E3004)(E3004)

INTRODUCTION TOINTRODUCTION TO

THE DIGITAL CIRCUITSTHE DIGITAL CIRCUITSSIMULATIONSIMULATION

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Digital Circuits Simulation

PSpice can simulate digital circuits andProbe can output a timing diagram

showing the relationship between all the

signals propagating in the circuit.

Digital circuit simulation involves the

simulation of pure digital circuit that is

constructed of  logic gates and logic

devices only.

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Digital Circuits Simulation

Examples of logic gates are AND, OR, NAND,NOR and XOR.

Examples of logic devices are multiplexer,

demultiplexer, encoder, decoder, adders, flip-

flops, counters, registers and analog-digital-analog converters.

During simulation, all inputs are simulated using

digital stimulus and digital signals. Transientanalysis is used as the analysis setup.

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DRAWING DIGITAL LOGIC CIRCUIT USING

AND GATE LOGIC

y The behavior of a digital circuit isexplained most succinctly in a truth table.

y Example: In the circuit shown in the next

slide, only three components are involved.y The first component is the AND gate and

the other two are called stimulus

generators (as HI or LO)

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AND GATE

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You can run a transient analysis at thispoint and plot the signals, but they will just be straight lines, showing the logiclevel of each signal.

However a digital circuit that remains in aconstant state all the time is of littleinteresting.

Eventually, you are going to encounter acircuit that needs to be stimulated with aclock pulse.

Setting up Simulation

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Setting Up a stimulus generators

y To add a time varying 'clock pulse' to your  

circuit, enter the parts menu and get a part

labelled STIM1 and place that as the input to

a device. Double click on the STIM1 to openup a dialogue box that looks like this:

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Setting Up a stimulus generators

fill it in with the Time Step that you want your 

'clock' to have. This Time Step value is the your 

'clock' pulse.

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Setting up The Simulation

When you are running the transient

analysis, don't forget to change your  

print step and the final time so you will

actually be able to see the results.

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Setting up The Simulation

When you are running the transient

analysis, don't forget to change your  

print step and the final time so you will

actually be able to see the results.

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GENERATING TIMING DIAGRAM FOR

INPUT AND OUTPUT SIGNALS

When the analysis is complete, \Trace \Add

opens the window containing the signal

options. All three traces are of interest, so click

DSTIM1:PIN1, DSTIM2:PIN1, and U1A:Y

insuccession, to make all three traces appear on

the plot.

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output Diagram

Notice that only logic states, highs and lows, aredisplayed on the vertical axes, and NOT voltage levels.

From the timing diagram it is obvious that an AND gate

produces a high on the output only when both inputs are

high.