ultra high-speed cmos circuits · 2 1 introduction fig. 1.1 cmos future graphene fet cmos...

Ultra High-Speed CMOS Circuits

Sam Gharavi • Babak Heydari

Ultra High-Speed CMOSCircuits

Beyond 100 GHz

With contributions to Chapters 6 and 7 fromM.C. Frank Chang and M.H. Gharavi

123

Sam GharaviElectrical Engineering DepartmentUniversity of California, Los AngelesLos Angeles, CA 90095-1594, [email protected]

Babak HeydariStevens Institute of TechnologyHoboken, NJ 07030, [email protected]

ISBN 978-1-4614-0304-3 e-ISBN 978-1-4614-0305-0DOI 10.1007/978-1-4614-0305-0Springer New York Dordrecht Heidelberg London

Library of Congress Control Number: 2011933660

© Springer Science+Business Media, LLC 2011All rights reserved. This work may not be translated or copied in whole or in part without the writtenpermission of the publisher (Springer Science+Business Media, LLC, 233 Spring Street, New York,NY 10013, USA), except for brief excerpts in connection with reviews or scholarly analysis. Use inconnection with any form of information storage and retrieval, electronic adaptation, computer software,or by similar or dissimilar methodology now known or hereafter developed is forbidden.The use in this publication of trade names, trademarks, service marks, and similar terms, even if they arenot identified as such, is not to be taken as an expression of opinion as to whether or not they are subjectto proprietary rights.

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Springer is part of Springer Science+Business Media (www.springer.com)

Contents

1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.1 Future of CMOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.2 The Terahertz Gap . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.3 Shift of Paradigm in the IC Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21.4 Potential New Applications and Technologies . . . . . . . . . . . . . . . . . . . . . . . 31.5 This Book . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2 mm-Wave Device Modeling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52.1 The Importance of Modeling in mm-Wave . . . . . . . . . . . . . . . . . . . . . . . . . . . 52.2 High Frequency Modeling Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.2.1 Large Signal Modeling .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102.3 Measurement and De-embedding .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

2.3.1 RF Measurement Pads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112.3.2 Open-Short De-embedding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122.3.3 Recursive Modeling Process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

2.4 Cascode Modeling .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3 mm-Wave Device Optimization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 233.1 Device Performance Metrics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 233.2 Layout Effect on Device Performance .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

3.2.1 Parasitic Resistance Optimizations . . . . . . . . . . . . . . . . . . . . . . . . . . . 273.2.2 Multi-Finger Layout Optimization . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

3.3 Round-Table Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 293.4 mm-Wave Power Device Optimization .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

4 mm-Wave CMOS Noise Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 354.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 354.2 Two Port Noise Models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 354.3 CMOS Noise Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 374.4 mm-Wave Noise Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

v

vi Contents

4.5 Noise Sensitivity Analysis to Parasitics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 414.6 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

5 Unilateralization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 475.1 Theory of Unilateralization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

5.1.1 Mason Gain as a Maximum Gain. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 495.2 2-Port Unilateralization Techniques . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 495.3 N-Port Unilateralization .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 505.4 Single Transistor Unilateralization.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 525.5 Simulated Results and Implementation .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

5.5.1 Implementation and Experimental Results . . . . . . . . . . . . . . . . . . . 55References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

6 Terahertz CMOS Devices, Circuits and Systems . . . . . . . . . . . . . . . . . . . . . . . . . 596.1 Ultra-High Speed CMOS Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

6.1.1 CMOS with Enhanced-Mobility Channel . . . . . . . . . . . . . . . . . . . . 606.1.2 Graphene High-Speed Transistors . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61

6.2 Ultra-High Speed CMOS Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 636.2.1 Nano-Scale CMOS Transceivers

in the 90–170 GHz Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 646.2.2 CMOS THz Oscillator Based on Linear Superposition . . . . . 676.2.3 THz CMOS Push–Push Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . 696.2.4 300 GHz Fundamental-Tone Oscillator in CMOS . . . . . . . . . . . 706.2.5 600 GHz CMOS Passive Imager . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 716.2.6 200 GHz CMOS Frequency Divider . . . . . . . . . . . . . . . . . . . . . . . . . . 72

6.3 Ultra-High Speed Systems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 736.3.1 Ultra-High-Speed Data Communication . . . . . . . . . . . . . . . . . . . . . 736.3.2 Direct Antenna Modulation Systems . . . . . . . . . . . . . . . . . . . . . . . . . 76

6.4 Chapter Summary and Conclusion.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79

7 Imaging Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 817.1 Photons Interaction with Matter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 817.2 Active and Passive Imaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 827.3 Optical Versus Non-optical Imaging .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83

7.3.1 Responsivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 837.4 Attenuation .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 847.5 Image Quality Metrics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85

7.5.1 Spatial Resolution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 857.5.2 Contrast . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 887.5.3 Penetration Depth . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88

7.6 Passive Imaging Basics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 887.7 Imaging Arrays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 907.8 Medical Imaging .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91

Contents vii

7.8.1 X-ray Imaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 917.8.2 Magnetic Resonance Imaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 937.8.3 Nuclear Imaging .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98

7.9 Emerging New Medical Imaging Applications . . . . . . . . . . . . . . . . . . . . . . 987.10 Chapter Summary and Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103

Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105

Chapter 1Introduction

1.1 Future of CMOS

Silicon technology at frequencies above 100 GHz is a newborn field withtremendous potentials. This newborn field can be thought as the intersection ofa new generation of devices, circuits, systems and applications. From the deviceview point, the economic fuel of the IC industry, CMOS technology, is reachinga turning point due to the physical limitation of silicon in the super-scaled nodes.As a result, fundamental changes have been envisioned for the CMOS in thenear term. For example, hybrid CMOS/III-V devices, CMOS-compatible hybridphotonics/electronics technologies and nano-engineered graphene-based FET arethree parallel research efforts for shaping the future of the devices. We will brieflyintroduce these topics in Chap. 6. The ultimate goal of all these research efforts isto engineer a device that can operate in the terahertz1 band while preserving thebeloved features of the CMOS for mixed-signal VLSI integration (Fig. 1.1).

1.2 The Terahertz Gap

The terahertz frequency band has been traditionally inaccessible neither by photonicdevices, nor by the electronic devices. Perhaps that is why this band has been calledthe “terahertz gap”. In simple terms, this inaccessibility has been due to the “low-pass” nature of active electronic devices (e.g. diodes and transistors) caused by thetransient time and R-C parasitics and the “high-pass” nature of photonic devices dueto the bandgap energy levels. The main impediment to filling the terahertz gap inan industrial scale remains the lack of a cheap, solid-state source that can deliverenough power while operating at room temperatures. There has been an exponential

1We refer to the 100 GHz to 10 THz range as the terahertz band in this book.

S. Gharavi and B. Heydari, Ultra High-Speed CMOS Circuits: Beyond 100 GHz,DOI 10.1007/978-1-4614-0305-0 1, © Springer Science+Business Media, LLC 2011

1

2 1 Introduction

Fig. 1.1 CMOS future

Graphene FET

CMOS compatiblephotonics

CMOS/III-VHybrid

Electronics domain

Photonics domain

THz gap

Fig. 1.2 THz gap

growth in the terahertz technology research over the past few years. The exponentialgrowth of terahertz technology research has motivated the IEEE to launch a newpublication called the “IEEE transaction on terahertz science and technology” in2011 (Fig. 1.2).

1.3 Shift of Paradigm in the IC Design

From the circuit design perspective, the traditional paradigm of electronic IC designis no longer applicable to the new setup. The miniature wavelength at higherfrequencies and larger dimensions of chips (due to the increased complexity), haveseriously challenged the old, lumped-element-based, IC design approaches. In the

1.4 Potential New Applications and Technologies 3

Fig. 1.3 Electrically largechips

d > λ

emerging circuit paradigm, interconnects and components are treated as electricallylarge and chips often include radiating elements. This convergence of circuits andelectromagnetics opens new opportunities for implementing novel systems.

One example of such novel systems is called the “Near-Filed Direct AntennaModulation (NFDAM)” and will be covered in Chap. 6. IC design at 100 GHzand above follows no well-established and commonly-accepted method yet andindividual designers have their unique methodologies. We will present some funda-mental, innovative techniques such as device optimization and unilateralization inChaps. 1–5. In addition, examples of different design methodologies from differentresearch group will be presented in Chap. 6 (Fig. 1.3).

1.4 Potential New Applications and Technologies

Several applications have been envisioned for terahertz. Many of these proposedapplications are still in the feasibility verification phase in the labs. For example,terahertz band offers unique features that can be exploited in medical and non-medical imaging and spectroscopic applications. The non-ionizing nature of theterahertz waves (as opposed to the X-ray) and their sensitivity to the waterconcentration make them ideal for skin analysis as we will see in Chap. 7. Alsoterahertz waves have been applied to the label-free genetic sequencing. On the otherhand, terahertz waves easily penetrate clothing, textile and packaging materials. Assuch, they have been proposed for security screening and weapon detection purposes(Fig. 1.4). Also the unique “signature” of many chemicals at the terahertz bandmakes the terahertz waves very attractive for spectroscopic applications.

From a different perspective, the increasing data rate demand for the wirelesscommunication systems can no longer be satisfied with the current availablestandards. A simple extrapolation of the wireless data rates trend in the past fewyears will reveal a need for links as fast as 10–20 Gbps at application layer and morethan 25 Gbps at the PHY layer in the upcoming few years. Such data rates cannotbe achieved with the current standards (e.g. the 60 GHz) and requires a move tohigher frequency bands (e.g. 300 GHz and above) with higher available unlicensedbandwidths.

4 1 Introduction

Fig. 1.4 Weapon detection with terahertz imaging

1.5 This Book

This book is divided into two parts. In part I, which includes Chaps. 2, 3, 4 and 5anumber of new device modeling and optimization techniques are presented. Thesetechniques will equip the designer with the tools such as “device unilateralization”and layout optimization to get the best possible performance out of a giventechnology node. The mentioned techniques are generic and not limited to anyspecific CMOS node. In part II, which includes Chaps. 6 and 7, we will overviewthe state of the art in ultra-high speed integrated devices, circuits and systems.Also some fundamental concepts from imaging and medical imaging are coveredin part II.

Chapter 2mm-Wave Device Modeling

Circuit designers are mostly used to assume device models as given, instantiatetheir desired devices in their schematic windows, set up the simulation and run!They might perform their simulations in a number of different process corners andthis is as much as they should worry about the whole notion of device modeling.mm-wave circuit design, at least for now, is an exception and both active andpassive devices need extensive modeling. In this section, first reasons for thisimportance are discussed, then the device modeling procedure up to 100 GHz ispresented and modeling results for single-transistor devices are shown. This followsby a discussion about measurement and de-embedding at these frequencies. Finallymodeling of cascode devices are is included as an example of a multi-transistorstructure.

2.1 The Importance of Modeling in mm-Wave

Available models that circuit designers use in their daily simulations are the so-called “compact” models. Compact models are the interface between the technologyand the design. A circuit designer learns about a process by experimenting with thecompact model, rather than running expensive and time-consuming experiments.

Several good compact models have been developed for digital, analog, and RFapplications [1,6,18,20]. These models use a combination of physical and empiricalmethods to develop general equations, usually a large number of them, to describethe behavior of the device. Several parameters are embedded in each equation inorder to capture the details of a given technology. These parameters are necessarilydetermined through complicated curve fitting procedures (parameter extraction) andshape the familiar model card for circuit designers. Most compact models havethe advantage of describing the behavior of the device in all regions of operationat the same time. Furthermore, they provide small and large signal analysis aswell as noise analysis. They also operate over a fair range of geometry, width andlength of the device, over which the extracted parameters are valid. This generality


5

6 2 mm-Wave Device Modeling

5 10 15 20 25 30 35 40 45 50 55 600 65

0. 1

0. 2

0. 3

0. 4

0. 5

0. 6

0. 7

0. 8

0. 9

0. 0

1. 0

S11

S22

S12

Fig. 2.1 S parameters of an 80μm common-source device, measurement versus model usingavailable BSIM3v3 foundry model

however comes with an accuracy penalty if the model is used over a bias orgeometry range outside of the extraction process. Moreover, the core equationsin most compact models have been derived under quasi-static assumptions. This,together with the fact that most of available extracted parameters are also for lowfrequency applications, make these compact models less desirable and inaccurate formillimeter wave applications. Figure 2.1 shows the foundry modeled S parametersof a common-source device and compares it with the actual measurement of thedevice.

There are two main reasons for this inaccuracy: First of all, as mentioned before,the fact that the parameter extraction has been done in lower frequencies makes theextrapolation to mm-wave frequencies problematic [2]. Some of device mechanismsthat are not well captured at low frequencies, and naturally not modeled properly,have considerable effect on the performance of the device in higher frequencies,resulting in some inaccuracy. The substrate network including capacitances andresistances is an example of such an effect [13]. The inaccuracy due to this effectcould be addressed by increasing the frequency range of parameter extractionprocess.

The second reason for the error in modeling – which is more difficult to address –is due to the layout effect [5, 11]. The device interconnections to the outsideworld introduce small inductors, resistors and capacitors to the model. These smallcomponents are generally negligible at lower frequencies making the device modelmore or less independent of layout. These components however change and in factdominate the performance of the device as the frequency increases and thereforeshould be included in the model. An accurate prediction of these parasitic requires

2.1 The Importance of Modeling in mm-Wave 7

Fig. 2.2 A sample 90 nm test chip fabricated for modeling and characterizing

a detailed full-wave electromagnetic simulation, which is difficult and lengthy.Therefore existing compact models are used as the core for a hybrid customizedmm-wave model. In essence, each small finger of the transistor is modeled withthe “intrinsic” transistor model and interconnects are captured by a combinationof selective electromagnetic simulation and experimental techniques. Due to theimportance of device modeling in this project, two round of test structures werefabricated and modeled. The micrograph of one of these chips is shown in Fig. 2.2.The test chip contains common-source, common-gate and cascode transistorswith various sizes as well as different transmission lines and capacitors. Thecharacterized devices were used in all circuits designed and fabricated in 90 nmprocess in Berkeley wireless research center.

Given the difficulties in modeling the device, one may be tempted to workdirectly with measured data. In traditional microwave design the common approachis to use measured S-parameter data for a specific device and treat the transistor asa black box [9, 19]. This approach is very accurate in nature and accounts for allparasitics and distributed effects associated with the device and the layout. Whilethis method is sufficient for small-signal circuit design applications, the accuracyof the S-parameter data hinges on reliable measurements of the device and de-embedding structures. As a result, the accuracy of the method may deteriorate forvery high frequencies, both due to limited accuracy of test equipment and due tode-embedding errors. Besides, since S-parameters are small-signal in nature, thismethod is not suitable for simulation of any non-linear circuit such as mixers oroscillators or the assessment of the dynamic range of amplifiers. Moreover, becausethe transistor is treated as a black-box, there is no physical insight for improving


the device performance or layout. Due to these issues, for mm-wave application, acombination of “RF” and traditional microwave methodology is preferred even forsmall-signal applications.

2.2 High Frequency Modeling Procedure

A typical transistor layout designed for high frequency is shown in Fig. 2.3a. Thedevice usually is long and narrow as it is designed with a large number of shortfingers to minimize the gate resistance. A connection at the gate and the drain,usually in the form of a transmission line connects the device to the outside world.These transmission lines are connected through a 45◦ taper to the transistor for a

Fig. 2.3 (a) Layout of atypical high frequencyMOSFET. (b) A cross-sectionof a MOS transistor showingvarious parasitics

Tline

Ground

Ground

Bridge

Gat

e Ta

per

Multi-finger Device

Dra

in T

aper

Tline

Ground

a

b

2.2 High Frequency Modeling Procedure 9

Fig. 2.4 Model of a common-source NMOS (a) S11 with and without the gate resistance. (b) S22with and without the substrate resistance network

proper current distribution to and from the device. The cross-section of a device isalso shown in Fig. 2.3b to show several parasitics that should be considered in thehigh frequency modeling of the transistor.

At mm-wave frequencies, series resistive and inductive parasitics become moresignificant.While the resistive parasitics are always a part of the device, the inductiveportion is usually more significant in high-frequency transistors because of thespecial layout onsiderations as mentioned earlier. Consequently, it is critical toproperly model these parasitics, in addition to the capacitive effects that are tradi-tionally captured by digital CMOS models. Moreover, neglecting or oversimplifyingthe substrate network of the device can introduce a considerable error at thesefrequencies. Figure 2.4 shows the error in the S11 and S22 of the device caused byignoring the gate resistance and the substrate network in the small signal model ofa typical NMOS transistor.

Equivalent circuits have been an effective approach to analyze the electricalbehavior of a device by representing the important components [4, 17]. As shownin Fig. 2.5a MOSFET device can be divided into two portions: intrinsic part andextrinsic part. The intrinsic part (the shaded area in Fig. 2.5) is the familiar hybrid-πmodel of the device, used for low frequency circuit analysis. The extrinsic partconsists of parasitic resistances and inductances at the gate,drain and source as wellas a proper substrate network. It is shown that a three resistor substrate network issufficient to model the device behavior in the mm-wave frequencies [8]. Note thatextrinsic parasitic capacitances between various terminals could be embedded in theinternal device capacitances and be modeled as a part of the intrinsic part.

For each model, the extrinsic component values and device parameters wereextracted from measured data using a hybrid optimization algorithm in AgilentIC-CAP [12]. Values of the components that could minimize the measurement tomodel error are not unique and one could come up with several equivalent circuitsof the device for the same set of measurement data. This is acceptable as long as themodel is used within the measured range of frequency. However, if the component


Fig. 2.5 Small signal high frequency equivalent circuit of a MOS transistor

values in the model are made close to their physical values,there is an additionalbenefit and they can be used in frequencies well beyond the maximum measuredfrequency. Moreover, having a physical equivalent model can help with an accurateassessment of the value of parasitics and the sensitivity of the device performanceto them. These information are very useful in optimization of the device physicalstructure as will be discussed in Chap. 3. Because of these reasons, the initial valuesof the components are calculated using proper equations and based on the measuredY parameters of the device up to 20 GHz [17]. The initial value of external resis-tances and inductances could also be estimated by simulating the connection leadsand contacts on the terminals using EM simulators. These initial values then are fedto the optimizer with reasonable tuning ranges to get an accurate physical model.

2.2.1 Large Signal Modeling

Although small signal models are usually sufficient for the design of linear circuits,the design of high performance non-linear blocks such as mixers, oscillators andpower amplifiers depends on capturing the nonlinear characteristics of the activedevices over a wide range of voltage and current.

Developing a large-signal equivalent model from the scratch is a very compli-cated process and many physical effects that affect the DC behavior of the deviceneed to be considered. Fortunately, available compact models, such as BSIM3v3or BSIM4 are specifically created to capture most of these effects. By addingproper parasitics to these foundry given compact models as shown in Fig. 2.6, bothDC nonlinearities and high frequency effects could be captured simultaneously.Since external terminal resistances and the substrate network are added manually,the BSIM model should be adjusted to turn-off the internal options for theseparasitics. Moreover, due to the inherent accuracy compromise in these models to

2.3 Measurement and De-embedding 11

Fig. 2.6 Large signal highfrequency equivalent circuitof a MOS transistor

enable them to cover all geometries, the DC behavior of each individual device couldbe made more accurate and should be also fitted to the measurement by adjustingproper BSIM parameters [7].

2.3 Measurement and De-embedding

In the high frequency measurement of active and passive devices, the effect ofprobing pads and extra leads are typically subtracted from the measurement througha de-embedding method [23]. In direct de-embedding, the measured results fromtest structures (such as open and short circuits) are used directly and subtractedfrom the measurements. In a model based approach, a suitable physical equivalentcircuit topology is selected and rough values for these equivalent circuit parametersthen are estimated using a combination of equation-based calculations based on lowfrequency data. The final fine tuning and fitting is done using an optimizer such asAgilent IC-CAP [12]. In this section we review the major de-embedding proceduresand discuss the problems and advantages of the various techniques.

2.3.1 RF Measurement Pads

Since most connections to the external world go through measurement pads, a goodmodel for the pad is critical. In the model based de-embedding approach, this model


Fig. 2.7 Layout of a common RF GSG pad

also serves as a foundation for de-embedding the effects of the pads whereas in thedesign of building blocks, the effects of the pads must be included in order to predictthe real world performance of the device or circuit.

A common RF pad arrangement is the ground-signal-ground (GSG) structureshown in Fig. 2.7. These pads mate naturally with CPW probes and have good per-formance in the mm-wave band. Often the signal pad is shielded from the substrate,forming a grounded CPW (G-CPW) structure at the pad. If the transmission lineleads to the rest of the circuit are microstrip or G-CPW, then this is the best optionto use. Otherwise, if CPW is used, the decision to ground the pad is not clear cut.A shielded pad will form a high-Q structure, since the fields are isolated from thelossy substrate, but the shield adds extra capacitance and a discontinuity in the fieldsfrom the probe to the device. In order to reduce the pad capacitance, the signal padis reduced to the minimum allowable probing dimensions, or about 90 μm×90μm,for 150 μm pitch pads. For smaller pitch pads, smaller pads can be used. The RF padis considerably smaller than the ground pads. A short 45◦ taper is used at the outputof the pad in order to reduce the reflections due to discontinuities. In the exampleshown, a 40 μm, 50Ω transmission line connects the pad to the rest of the circuits.

2.3.2 Open-Short De-embedding

A popular de-embedding approach is the so-called open de-embedding, whichsimply removes the effects of the pads from the measurement structure shown inFig. 2.8a by subtracting the measured Y parameters of the pad from the measureddevice, as shown in Fig. 2.8b. The key assumption is that the pads are connected inparallel to the DUT, which neglects the physical nature of the pads and treats thesignal entry/exit points as lumped circuit nodes. The equivalent circuit for parasiticsthat could be captured in the open measurement is shown in Fig. 2.9. For the DUTwe can write:

Ydut = Ym −Yo (2.1)


Ground

P1 P2DUT

Ground

Ground

a b c

Ground

P1 P2

Ground

Ground

P1 P2

Fig. 2.8 (a) The device under test and the measurement pads. (b) The open test structure. (c) Theshort test structure

Fig. 2.9 The equivalentmodel of parasitics for theopen de-embedding

DUT

Y1 Y2

Y3

Input Output

And we can write these equations for the parasitics:

Y3 = −Y12,o = −Y21,o (2.2)

Y1 = Y11,o +Y12,o (2.3)

Y2 = Y22,o +Y21,o (2.4)

The other assumption for in the open de-embedding is that we can indeedmeasure a true pad open structure by simply open circuiting the pad test structure.In reality, the open circuits have finite fringe capacitance and radiation, whichinvalidates the above assumptions. In practice this procedure is quite accurate upto 10 GHz for small on-chip structures. In summary, open de-embedding removesthe shunt parasitics from the measured device.

As the frequency increases, open de-embedding is not sufficient to de-embedall the parasitics and a more common approach is the so called open-short de-embedding. In this approach, in addition to measuring the embedded structure andopen pads, a short structure as shown in Fig. 2.8c is also measured. A typical DUTwith parasitics can be represented by an equivalent circuit shown in Fig. 2.10.

If we device the matrix Z′s as

Z′s =

(Z1 + Z3 Z3

Z3 Z2 + Z3

)(2.5)


Fig. 2.10 The equivalentmodel of parasitics for theopen-short de-embedding

DUT

Y1 Y2

Y3

Z1 Z2

Z3

Input Output

Then we can calculate the Z′s matrix from this equation:

Z′s = (Ys −Yo)

−1 (2.6)

the same correction is applied to the measured data of interest

Y ′m = Ym −Yo (2.7)

and then the modified short measurement is subtracted from the measurements

Z′′m = Y ′−1

m −Z′s = (Ym −Yo)−1 − (

Z−1s −Yo

)−1(2.8)

In practice this technique is reliable up to about 40 GHz or more, depending on thesize of the test structures. By neglecting the distributed nature of the pads, we arelimited to frequencies where all dimensions are negligibly small compared to thewavelength.

2.3.3 Recursive Modeling Process

Evidently, the de-embedding step is a major source of inaccuracy at mm-wavefrequencies. It introduces error in the data due to imperfect assumption aboutthe de-embedding structures. For example, for open-short de-embedding, the errorarises from imperfect open and short especially at higher frequencies and thedistributed nature of the structure. These inaccuracies make the de-embedded resultnoisy, directly affecting the accuracy of the extracted model. In order to resolvethis problem several high frequency de-embedding methods have been proposed[14, 15, 22]. Here as an alternative a model based de-embedding approach, dubbedthe recursive modeling has been employed.

A typical test structure comprises of probing pads, lead transmission lines andthe device under test (DUT). In this method, probing pads are modeled in the firststep. Pad models are then used to model the transmission line leads and finally the


Fig. 2.11 Equivalent circuitof pad includes a section oftransmission line

43.5 fF

240 mΩ

2.77 Ω

14.3 pH

Zo = 47.3 ΩL = 40.8 µm

two models are employed to model the complete DUT. Typically all different teststructures use identical probing pads and lead transmission lines making it sufficientto model them only once for all the structures. This modeling technique in principalis applicable for any structure, passive or active, as long as an equivalent circuit cancapture the behavior of the structures.

The circuit shown in Fig. 2.11 is used to model the pad over a broad frequencyrange from 40 MHz to 65 GHz. The parallel branch represents the equivalent circuitfor the pad itself and the series branch models the extra lead. The 1-port S parametersmeasurements are performed for the pad in two configurations, the first with theoutput port connected to ground, and the second with the output port left open. Toincrease the accuracy of the modeling, the Z and Y parameters of the model aresimultaneously matched with the measured parameters in both configurations. Theresults in Fig. 2.12 show that the model accurately captures the RF pad behaviorover the frequency range of interest.

The transmission line that is used as a lead from the probe to the device has to bemodeled in the next step. Coplanar waveguide (CPW) transmission lines are usedin all test structures. A length scalable electrical transmission-line model has beendeveloped to capture the complex propagation constant and frequency dependentcharacteristic impedance. Figure 2.13 shows the modeling result for a 500μm CPWtransmission line with a 4μm signal-to-ground gap.

In the next step, the DUT is modeled. The complete model of the measuredstructure is made by connecting the previously modeled pad and transmission linewhose models should be kept unchanged during this step and the equivalent modelof the DUT that could be both small-signal or large-signal as was discussed inthe previous section. The initial guesses of the equivalent circuit components arecalculated and the whole model is then fitted to the raw device measurement throughoptimization of transistor core and external parameters.

An experimental verification of this approach has been performed. All themeasurements have been done using on-chip probing up to 110 GHz. AgilentIC-CAP software and the hybrid optimization method has been employed to performmodel optimizations. Figure 2.14 shows the modeling result, the measured andmodeled real and imaginary parts of S-parameters for an 80μm/0.09μm transistorup to 100 GHz. The cleanness of the measured data is an advantage of this methodwhich helps the accuracy and speed of the modeling process. The good agreement


5 10 15 20 25 30 35 40 45 50 55 60 650

5

10

0

15

a

bFrequency (GHz)

Im (

Zin

)

Im(Zin) vs. Freq, pad, port grounded

5 10 15 20 25 30 35 40 45 50 55 60 650

-1500

-1000

-500

-2000

0

Frequency (GHz)

Im (

Zin

)

Im(Zin) vs. Freq, pad, port open

Fig. 2.12 Measured vs. simulated ℑ(Z) parameters for the RF pad with the port (a) grounded and(b) open

0.0

0.1

0.2

-0.1

0.3

15 20 25 30 35 40 45 50 55 6010 65

-0.5

0.0

0.5

-1.0

1.0

ImagImag

real

real

Freq(GHz) Freq(GHz)

15 20 25 30 35 40 45 50 55 6010 65

S12 S11

Fig. 2.13 Measured versus model of a 500μm long CPW transmission line with gap spacingS = 4μm

2.4 Cascode Modeling 17

Fig. 2.14 Measured (marker) versus simulated (lines) S-parameters of a 40μm/90nm transistormodeled using the recursive approach

between the model and measurement suggests that the extended lumped hybrid-pimodel is valid to frequencies as high as 100 GHz.

Figure 2.15 compares the result of the proposed modeling technique to the open-short de-embedding method. The difference can be best noticed by comparingY-parameters. The de-embedded data is clearly noisy especially for frequencies inthe millimeter-wave bands. For frequencies in the K and Ka bands, the two modelsgive similar results. The discrepancy however gets significant for frequencies higherthan 40 GHz showing the inaccuracy of open-short de-embedding for millimeter-wave applications. The error becomes specially significant in the imaginary parts ofY11 and Y22 and the real part of Y21. These would result in major circuit performancedegradations as we approach 100 GHz. The method was also tested with measureddata up to 60 GHz and the predicted data at 100 GHz were compared to the actualmeasurement at this frequency and found to be in a good agreement. This indicatesanother important advantage of this modeling method that is its ability to extendbeyond the measurement frequency without introducing significant error.

2.4 Cascode Modeling

Cascode devices are used extensively in mm-wave design. These devices couldpotentially provide higher gain compared to common-source devices and areusually unconditionally stable at these frequencies due to the isolation between


10 20 3 0 4 0 5 0 6 0 70 80 90 100

0 1100.002

0.006

0.010

0.014

-0.002

0.018

0.02

0.04

0.06

0.08

0.00

0.10

Freq(GHz)

Real

Imag

Imag

Imag

Imag

Imag

Y11

10 20 30 40 50 60 70 80 90 10 0

0 110

-0.005

-0.003

-0.001

-0.007

0.001

-0.020

-0.015

-0.010

-0.005

-0.025

0.000

Freq(GHz)

Real

Imag

Y12

10 20 30 40 50 60 70 80 90 100

0 110

0.05

0.06

0.07

0.04

0.08

-0.030

-0.015

-0.045

0.000

Real

Imag

Re

al

Re

al

Re

al

Re

al

Freq(GHz)

Y21

10 20 30 40 50 60 70 80 90 10 0

0 1 10

0.008

0.012

0.016

0.004

0.020

0.010.020.030.040.050.06

0.00

0.07

Freq(GHz)

Real

Imag

Y22

Fig. 2.15 Comparison of the open/short versus recursive de-embedding/modeling approach forthe Y parameters of a 40 μm/90nm

2.4 Cascode Modeling 19

Vin

Rsub2

Cgs1

Cgd1

Cgs2

Cgd2

Cdb1

Cdb2

Rsub1

Rsub3

M1

M2

Vout

a

b

Rsub4

Rd2

Ld2

Cdb3

Rs1

Ls1

Rg1Lg1

CextLext

Fig. 2.16 Equivalent circuit of a cascode device. The transistors can be replaced with a hybrid-πmodel for small signal modeling

input and output [16]. To minimize the capacitance at the junction of the inputand cascode device, a shared junction structure as shown in Fig. 2.16a is usuallyused.1 Because of using this structure, cascode devices need special treatment in

1This is more explained in Chap. 5.


Fig. 2.17 Comparison of measured and modeled device S-parameters

modeling and a simple connection of the two single transistor models does notaccurately predict the device high frequency behavior and specifically can introducesubstantial error in the Y22 of the device [3].

An equivalent circuit of a cascode transistor is shown in Fig. 2.16b. The modelis essentially similar to the common-source model that was discussed earlier. Oneimportant difference is the way the substrate network is modeled. Because of theshared junction structure, the substrates of the two devices are shared and this needsto be considered in the equivalent circuit. This substrate can be a source of feedbackbetween the output and input [10]. The second gate of the device is also connected toa bypass capacitor to ensure a high frequency ground to avoid oscillation. Becauseof the sensitivity of the cascode gate to parasitics, the proper equivalent model ofthe capacitor should be included on the cascode gate.

To test the accuracy of the model, a sample 40 μm/90 nm is measured andcompared to the model using the proposed method. The close match betweenmeasured and modeled S-parameters up to 65 GHz as shown in Fig. 2.17 confirmsthe validity of the model as well as the modeling procedure.

References 21

References

1. The BSIM 3v3 and 4.4.0 Website, http://www-device.eecs.berkeley.edu/bsim3BSIM Website2. Cheng Y, Hu C (1999) MOSFET Modeling and BSIM3 User’s Guide. Springer, New York3. Choong CY et al (2003) Small-signal substrate resistance effect in RF CMOS cascode

amplifier. IEEE Microwave and Wireless Components Letters, vol 13, pp 253–2554. Dambrine G et al (1988) A new method for determining the FET small-signal equivalentcircuit.

IEEE Transaction on Microwave Theory and Techniques, vol 36, pp 1151–11595. Doan CH, Emami S, Niknejad AA, Brodersen RW (2005) Millimeter-Wave CMOS Design.

IEEE Journal of Solid-State Circuits, vol 40, pp 144–1556. EKV model website, http://legwww.epfl.ch/ekv/EKV Website7. Emami S, Doan CH, Niknejad AM, Brodersen RW (2004) Large-signal millimeter-wave

CMOS modeling with BSIM3. IEEE RFIC Symp Dig, pp 163–1668. Enz C (2000) MOS transistor modeling for RF design. IEEE J of Solid-State Circuits, vol 35,

pp 186–2019. Gonzalez G (1996) Microwave Transistor Amplifiers. 2nd edn. Prentice-Hall Inc

10. Heydari B, Adabi E, Bohsali M, Afshar B, Arbabian MA, Niknejad AM (2007) Internal uni-lateralization technique for CMOS mm-wave amplifiers. RFIC Digest of Papers, pp 463–466

11. Heydari B, Bohsali M, Adabi E, Niknejad AM, mm-Wave Devices and Circuit blocks up to104GHz in 90nm CMOS. IEEE J of Solid State Circuits, vol 42 pp 2893–2903

12. ICCAP website, http://eesof.tm.agilent.com/products/iccap main.htmlICCAP website13. Jia OJ et al (1998) CMOS RF modeling for GHz communication IC’s. Digest of Technical

papers, VLSI symposium, pp 94–9514. Kolding TE (2000) A four-step method for de-embedding gigahertz on-wafer CMOS measure-

ments. IEEE Trans Electron Devices, vol 47, pp 734–74015. Koolen MCAM et al (1991) An improved de-embedding Technique For on-wafer High-

Frequency Characterization, IEEE Bipolar Circuits and Technology Meeting, pp 191–19416. Lee TH (2003) The design of CMOS radio-frequency integrated circuits, 2nd edn. Cambridge

University Press, Cambridge17. Lovelace D et al (1994) Extracting small-signal model parameters of silicon MOSFETtransis-

tors. Microwave Symposium Digest, vol 2, pp 865–86818. MOS11 website, http://www.semiconductors.philips.com/Philips Models/mos models/

model11/ MOS11 Website19. Pozar DM (2004) Microwave Engineering. 3rd edn. Wiley20. PSP model website, http://www.nxp.com/Philips Models/mos models/psp/PSP Website21. Tsividis Y (2003) Operation and modeling of the MOS transistor, 2nd edn. Oxford University

Press, Oxford22. Wei X et al (2007) An improved on-chip 4-port parasitics de-embedding method with

application to RF CMOS. 2007 Topical Meeting on Silicon Monolithic Integrated Circuitsin RF Systems, pp 24–27

23. Ytterdal T, Cheng Y, Fjeldly TA (2003) Device modeling for analog and RF CMOS circuitdesign, 1st edn. Wiley, New York

Chapter 3mm-Wave Device Optimization

As was mentioned in the previous chapter, device performance in mm-Wavefrequencies is deeply under the influence of layout parasitics. Apart from the urgefor layout dependent models, as was pointed out before, this has another importantconsequence: Unlike low frequency circuit design in which the device design isabsolutely in the realm of process engineers, here the circuit designer could- andshould- alter the device performance by changing the device layout [1, 3]. Thisenables the designer to layout the device based on the performance metric whichis more important in any specific application. It might be astounding in the first lookhow much the device layout could vary certain device parameters. fmax, for instance,which is an indicator of the speed of the transistor, have been reported for a similarprocess, CMOS 90 nm, from 80 GHz to up to 300 GHz mainly due to differences inlayout [2, 8].

Millimeter-wave device design is essentially customizing the device layout inorder to maximize certain performance metrics. Performance metrics for mm-wave devices are several, ft , fmax, maximum stable gain at a given frequency,maximum unilateral gain at a given frequency and minimum noise figure are themost important ones. That which metric is to be considered as an optimizationtarget depends on the specific application of the device. In this chapter, we firstlook more closely at some of the most important device performance parameters.Then few examples of device optimization including a novel “round-table” deviceare presented. In the end, there is a brief discussion about the optimization processfor large devices used as power delivering transistors.

3.1 Device Performance Metrics

There are several performance parameters for a transistor, and each defines theperformance in a different way. Unity current gain frequency ( ft ), unity power gainfrequency ( fmax), maximum stable gain (MSG), and maximum unilateral gain (U)are the most popular metrics as shown on Fig. 3.1. Noise performance and linearity


23

24 3 mm-Wave Device Optimization

0

5

10

15

20

25

30

35

40

45

-5

50

0.2

0.4

0.6

0.8

1.0

0.0

1.2

h21

Ma s o n G a in

M S G

Sta

bili

ty F

act

or(

k)

ft

fmax

1 10 100 200

Freq(GHz)

dB

Fig. 3.1 MSG, U and h21 of a sample common-source device. The ft and fmax of the device ispointed at the unity values of h21 and U curve respectively

of the device are also crucial when it comes to specific circuit blocks such as lownoise or power amplifiers. In order to maximize the performance of a device throughlayout optimization, it is crucial to consider the correct figure of merit and thecriteria for optimization.

The unity current gain frequency, ft , is the most popular high frequency numberof a process and is basically the frequency in which the current gain of the devicebecomes one. It can be calculated from the h21 of the device and is equal to [9]:

ft = fh21=1 ≈ 2πGm

Cgs +Cgd(3.1)

In this equation Gm is the effective transconductance of the device and Cgs andCgd are total gate to drain and gate to source capacitances of the device, includingparasitic capacitances. When the layout is reasonable in a way that does not addconsiderable extra capacitances, ft is mostly determined by the intrinsic devicecharacteristics and is improved by scaling and/or process optimization. Becauseresistive losses in the input and output do not affect this parameter, the device layouthas negligible effect on ft .

Although ft is the most common performance metric for a given technologynode, it does not reflect the performance level of a specific device at that technologynode. What actually matters more is the power gain of a device rather than its currentgain [6]. A device can remain active (have power gain larger than one) in frequencieswell above ft . For this reason fmax – the maximum frequency in which the device haspower gain – is a more valid metric to show the limit of the activity of the transistor.The unity power gain frequency, fmax, strongly depends on parasitic losses of the

3.1 Device Performance Metrics 25

device and can be improved (or degraded) by optimizing the layout of the transistor.Depending on the layout, the fmax could vary from below ft to values considerablyhigher than ft . The ratio, fmax/ ft is a figure of merit that shows the optimality ofthe layout. Depending on the assumptions, several equations have been proposed toevaluate the fmax of a MOS transistor. Assuming the reasonable assumption that Rs

is smaller than the total gate resistance the fmax can be written as [7]:

fmax ≈ ft

2√

Rtg

(gds + 2π ftcgd

) (3.2)

In which Rtg is the total gate resistance. This equation shows the effect of Rg and

Cgd on the value of fmax and indicates these are the main factors that need to beminimized to increase the fmax. We will see the detail of this optimization in thenext section.

While ft and fmax indicate unity gain frequencies and indicate limits of theperformance of the device, MSG and Mason’s Gain (U) represent the performanceof the device at the frequency of interest.

U , is the gain of the device under the condition that the device is unilateralizedthrough some feedback mechanisms or some circuit techniques [5].1 More impor-tantly, it is also a figure of merit independent of the topology in which the device isemployed and is important in applications where device or circuit unilateralizationtechniques are used. The value of U can be calculated from this equation [5]:

U =|S21/S12 −1|2

2(k|S21/S12|−ℜS21/S12)(3.3)

Where k is the stability factor and can be calculated from this equation:

k =1−|S11|2 −|S22|2 + Δ 2

2|S12S21| (3.4)

In an open loop structure, the achievable gain could be considerably lower than theMason Gain specially in frequencies below ft /2; thus we need a different metricfor open loop applications where reaching U is not an option. MSG is a goodcandidate to serve this goal. To better grasp a sense out of MSG, the case for thestability of the device in question should be beard in mind. Under frequencies ofhigh gain condition, devices are generally conditionally unstable. This means thatunder certain source/load impedance conditions, there is a chance that the circuitstarts oscillating. Considerable amount of literature is available to come up withparameters that represent an instability potential of a device. The most commonmeasure is k parameter that is directly calculated through S parameters and ensures

1A general condition for N-port unilateralization is presented in Chap. 5.


and unconditional stability when is above 1. As the Fig. 3.1 suggests, the MSGcurve consists of two separate regions distinguished by a kink in between. The kinkhappens at k = 1 and at a frequency after which the device becomes unconditionallystable. The equation for MSG is also piece-wised based on k:

Δ = S11S22 −S12S21 (3.5)

MSG =|S21||S12| if k < 1 (3.6)

MAG = (k−√

k2 −1)|S21||S12| if k > 1 (3.7)

It’s worth noting that at frequencies before the kink, the unconditional stability isensured by adding as much loss to the input/output ports to drive k exactly equal to1 and MSG is calculated based on this assumption. As a result, the internal gate anddrain resistances of the device do not affect the MSG as long as they are less than therequired add-on resistance to make the device stable. This is an important fact thathelps designing especially high performance power devices as will be discussed inthe next section. In the k < 1 region, the MSG of a MOS transistor is proportional togm/cgd , the ratio of feedforward and feedback factors of the device. As a result cgd isvery crucial factor in MSG optimization. The source resistance can also change thevalue of MSG through changing the effective gm of the device. After the frequencyin which device becomes unconditionally stable, the parasitic losses at the input andoutput terminals increase the value of K and make the MSG drop faster.

Although these metrics are in correlations with each other, changing one doesnot always guarantee a change in the other and ultimately the application and thetopology in which the device is used determine the goal parameter. Generally Masongain and it’s unity cross over, i.e. Fmax, are more sensitive to the layout than themaximum stable gain, especially where the device is conditionally stable, due to theloss compensation in MSG calculation.2

3.2 Layout Effect on Device Performance

To determine the effect of layout on device parameters, a physical small signalmodel is used in order to ascertain the effect of each parasitic on the desired per-formance metrics of the device. The small-signal model of the device, discussed inthe previous section, is not necessarily unique and different combination of lumpedelement values could satisfy the required matching between the measurement andthe simulation result. As a result, in order to make the model physical and extendable

2Noise analysis and optimization is discussed in Chap. 4.

3.2 Layout Effect on Device Performance 27

G

S DDist. Channel Resistance

Resist

ance

Gate

Dist.

Fig. 3.2 Distributed gate and channel resistance

to higher frequencies, the values of these parasitics were partly determined through3D EM simulation (HFSS) and were set as the initial value for optimization.

The developed physical small-signal model helps determine the effect of eachparasitic element on the performance of the transistor. Ultimately this insight canbe used to determine the optimal transistor layout. For example, the layout of acommon source device has been optimized for fmax. The starting point for thisprocedure was a 80×1μm/90 nm sized device with an MSG of 7.5 dB at 60 GHzand the extrapolated fmax of 143 GHz. A sensitivity analysis was performed for thedeveloped model and the variation of maximum unilateral gain (Mason’s Gain) andMSG together with maximum frequency of operation were determined.

As expected, the gate to drain capacitance and the gate resistance have thelargest impact on fmax, and thus layout methods should give the first priority totheir minimizing. As we noted earlier, MSG does not change with a reductionin gate and drain series resistances when the transistor is conditionally stable(k ≺ 1). The source resistance, however, changes the MSG since it changes theeffective transconductance through its local feedback effect. A more detail analysisof parasitic resistances and their minimization methods are discussed in the nextsection.

3.2.1 Parasitic Resistance Optimizations

Gate resistance is the most important resistive parasitic that needs to be minimized.A large gate resistance significantly reduces the fmax and available gain. It alsoaffects the noise performance of the device as will be shown in Chap. 4. The gatenetwork can be viewed as a distributed RC transmission line as is shown in Fig. 3.2.The total gate resistance can be divided into three parts [4]:

Rgate = Rpolyg + RNQS

g + Rwireg (3.8)


Rc

Drain

Gate

Source

Substrate

Rldd

Rsalicide

Rvia

Fig. 3.3 Various portions of a MOSFET drain resistance

The NQS resistance is an intrinsic device parameter and is a function of thegeometry and bias conditions and to optimize the gate resistance one should focuson the other two portions. The Rwire

g can be minimized by increasing the number of

connection vias from the gate to the top metal layer. Rpolyg can be written as [10]:

Rpolyg =

Rsh

Nf L f

(Wext +

Wf

α

)(3.9)

In this equation, Rsh is the gate sheet resistance, Wf is the channel width per finger,Lf is the channel length, Nf is the number of fingers, and Wext is the extension ofthe polysilicon gate over the active region that is imposed by the design rules. Thefactor α is related to the distributed nature of the gate resistance and is equal to 1/3or 1/12 for single and double gate contacts respectively [6]. Equation (3.9) suggeststhat using more short fingers can reduce the poly gate resistance. The effect of fingerwidth reduction becomes minor as soon as the poly gate resistance becomes a smallportion of the total gate resistance in (3.8) and is not beneficial any more. Moreover,as will be seen later in this chapter, short finger width can negatively affect theperformance of large power devices.

The source and drain resistances have several components including the viaresistance, the salicide resistance and the resistance of the LDD region as is shownin Fig. 3.3. However, the contact and the LDD sheet resistances usually dominatethe total resistance. Accordingly, their values can be written as:

Rd = Rd0 +rdw

Nf Wf(3.10)

Rd = Rs0 +rsw

Nf Wf(3.11)

3.3 Round-Table Structure 29

where rdw and rsw are the parasitic drain and source resistances with unit width andRd0 and Rs0 represent the width independent part. Increasing the number of fingersand connection vias help to reduce Rd and Rs too although the number of fingershas to be decided based on gate resistance considerations and other issues relatedto large power devices as will be described later in this chapter. The value of Rs

needs to be minimized as it affects the effective gm and the noise performance of thedevice. On the other hand, circuit performance metrics, neither fmax nor NFmin, arenot much sensitive to the value of Rd and the circuit layout could be optimized infavor of other parameters if there is any trade-off.

3.2.2 Multi-Finger Layout Optimization

The NMOS structure was modified based on these findings. Mainly the shape ofgate and drain tapers, number of gate vias, and width of connections and gate/drainoverlap regions were changed. Figure 3.4 shows a layout comparison of the structurebefore and after modification. The measured performance of the initial device andthat of the modified device is shown in Fig. 3.5. The fmax for the improved structureis up to 178 GHz. The MSG of the device is intact however since the device is in theconditionally stable region as was expected.

3.3 Round-Table Structure

As was showed in the last section the optimal multi-finger layout of an NMOSdevice could increase the fmax up to 20%, but increasing the performance furtherrequired further innovation. This is particularly true of the available gain in theconditionally stable frequencies. In order to improve the performance of the deviceeven further, a new structure for the device is proposed. The idea is to reduce theparasitic losses by using a modular approach in device design and using multi-pathconnections between various modules.

The building block is a standard 10μm cell with double-gate contacts in order todecrease the finger resistance of the device. Since each finger of the device formsa distributed RC network, double contact reduces the resistance of each finger bya factor of four [9]. These cells are then connected in a matrix or circular fashiondepending on the desired size of the final transistor. Figure 3.6 shows a W = 60μmNMOS using a circular connection, hence the name “Round-Table”. This structureuses external double-contacts (between cells) and multi-path connections betweensources and drain of the sub cells. The layout trade-offs were addressed based onthe results of the predictive model discussed in the previous section.

Several dimensions of these devices were fabricated in 90 nm CMOS process.Measurements were carried out up to 65 GHz and probing pads were de-embedded


Fig. 3.4 Initial (a) andimproved (b) layout for an80μm/90 nm device. Theimproved layout includesmore substrate contacts,higher density of gate anddrain vias and smaller taper

a

b

Fig. 3.5 The effect of layoutimprovement on Mason Uand MSG

0

10

20

30

40

-10

50

GHz

101 100 200

dB

M a so n G a in

M S G

M o d ifie d

In itia l

3.3 Round-Table Structure 31

Fig. 3.6 Layout of a round-table device

Fig. 3.7 Measured h21, Mason’s U and MSG for a 40μm/90 nm round-table device

from the devices. Figure 3.7 shows MSG, Mason’s gain (U) and h21 of a W = 40μmround-table NMOS. The fmax is calculated by extrapolation of the Mason’s gainU for frequencies between 20 GHz to 50 GHz, a frequency range where the mostreliable data occurs. As evident, measurements suggest significant improvement inboth the speed and the desired gain of these devices as compared to regular RFtransistors with the same number of fingers. Even though ft remains almost constant(100 GHz), fmax improved by almost two fold, or to about 300 GHz. This is of coursethe extrapolated fmax since the device introduces new high frequency poles after100 GHz, rendering the linear approximation of the Mason curve inaccurate beyond


Table 3.1 Parasiticcomparison between a regularlayout and a round-tablelayout

Value Regular Round table

Rg(Ω ) 4.46 2.23Rd(Ω) 3.54 2.42Rs(mΩ ) 627 438Cgs(fF) 35.7 57.1Cgd(fF) 21.3 17.2

100 GHz. Unlike the improvement of the regular multi-finger device presented in theprevious section, the MSG of the round-table device increases even at frequenciesin which the device is conditionally stable. The MSG at 60 GHz is 8.5 dB up fromthe value of 7.5 dB (regular NMOS) for I = 28μA/μm. The ratio fmax to ft , ameasure of the optimality of the physical structure of the device, is close to 3, thehighest reported for CMOS. The improvement of the MSG is the result of decreasedsource resistance and parasitic drain to gate capacitance that both act to decreasethe internal series and shunt feedback gains respectively. The improvement of fmax

was mostly due to reduction in the gate and drain resistances. Table 3.1 comparesthe result of extracted small-signal parameters of a round-table W = 40μm deviceto a regular optimized multi-finger 40 μm transistor. All the resistive losses havebeen reduced considerably as shown in the accompanying table. The parasitic gate-source capacitance of the device is increased. This is mainly due to the increasedoverlap capacitance between source and gate in order to reduce the gate and sourceresistances. This is a good trade-off since the cgs can be tuned out by the matchingnetwork.

3.4 mm-Wave Power Device Optimization

The design of a power amplifier hinges around the selection of the appropriate powerdevice. Large devices are quite popular to deliver a large amount of current to theoutput load in the output stage of power amplifiers. A large power device can berealized in different ways, with a standard multi-finger layout, an array “round table”layout as described in the previous section, or as a delay equalized structure. Theprimary considerations for the design of the amplifier include sufficient power gainGp, stability, output power Po, and the drain efficiency η . The maximum stablepower gain of a 2μ versus 4μ finger width transistor are shown in Figs. 3.8 and3.9. Both devices have 100 fingers and so the 400μ device should in theory beable to deliver twice the power of the 200μ device. The 200μ device is biasedwith 47 mA whereas the 400μ device is biased at 94 mA. It is interesting to notethat the 400μ device is unconditionally stable as the gate resistance stabilizes thedevices. The 200μ device is only conditionally stable, but the unstable region occursfor only a small inductive range when the load is terminated in a small resistance.The larger device, though, has smaller maximal stable gain (MSG ∼ 6.8 dB versus

3.4 mm-Wave Power Device Optimization 33

Kink Frequencies

55 GHz

85 GHz

Fig. 3.8 A comparison of device power gain as a function of device layout (2μ versus 4μ fingerwidth)

Fig. 3.9 Load impedance contours of constant device power gain and contours of constant outputpower

MSG ∼ 8.4 dB). More importantly, the variation in gain is much more rapid as wemove away from the optimal point, which means that process variations would leadto more variation of power gain. Utilizing a large device with small finger width,though, is problematic due to the difficulty in making the gate/drain transmissionlines. This difficulty is apparent in the layout of such a device (Fig. 3.10), where thetransition region introduces extra series resistance and shunt capacitance into thesignal path. The measured MSG of this device is less than 5 dB, less than half ofthe optimal device width.


Fig. 3.10 A W = 400μdevice realized with 400fingers

References

1. Cheon KS et al (1997) CMOS layout and bias optimization for RF IC design applications.Digest of IEEE Microwave Symposium, vol 2, pp 945–948

2. Guo JC, Lien WY, Hung MC et al (2003) Low-K/Cu CMOS logic based SoC technology for10 Gb transceiver with 115 GHz fT, 80 GHz fMAX RF CMOS, high-Q MiM capacitor andspiral Cu inductor. VLSI Digest of Technical Papers, pp 39–40

3. Heydari B, Bohsali M, Adabi E, Niknejad AM, mm-Wave Devices and Circuit blocks up to104GHz in 90nm CMOS. IEEE J. of Solid State Circuits, vol 42 pp 2893–2903

4. Jin X et al (1998) An effective gate resistance model for CMOS RF and noise modeling.IEDM’98 Technical Digest, pp 961–964

5. Mason SJ (1954) Power gain in feedback amplifiers. Trans IRE Professional Group on CircuitTheory, vol CT-1, no 2, pp 20–25

6. Niknejad AM (2007) Electromagnetics for high-speed analog and digital communicationcircuits, 1st edn. Cambridge University Press, Cambridge

7. Sze SM (1990) High speed semiconductor devices. Wiley, New York8. Tiemeijer LF et al (2004) Record RF performance of standard 90 nm CMOS technology. IEDM

Technical Digest, pp 441–4449. Tsividis Y (2003) Operation and modeling of the MOS transistor, 2nd edn. Oxford University

Press, Oxford10. Ytterdal T, Cheng Y, Fjeldly TA (2003) Device modeling for analog and RF CMOS circuit

design, 1st edn. Wiley, New York

Chapter 4mm-Wave CMOS Noise Analysis

4.1 Introduction

The range of many wireless communication systems is limited by the sensitivityof their receivers, meaning the minimum amount of signal to noise ratio that thereceiver can successfully detect [8]. This sensitivity heavily depends on the noisefigure of the entire receiver. However since the noise of each stage is normalized bythe total gain of previous stages, as Friis equation predicts, the noise figure of thelow-noise amplifier essentially dominates the entire receiver sensitivity [2].

Although several noise mechanisms such as flicker, shot-noise and generation-recombination noise can be considered for a MOS device, at high frequencies, themain source of noise that is important to linear circuits is the thermal noise [3].Due to the direct effect of the noise figure of LNA on the performance of theentire receiver, this parameter should be accurately predicted during the designprocess. Moreover, in the low noise amplifier design, coming up with a simultaneousoptimization of noise performance with other important circuit parameters such asgain and input match is always a challenge and needs an accurate noise model. Inthis chapter, first, the general noise representation methods for any two port networkis overviewed, then the thermal noise model of CMOS devices is discussed. This isfollowed by a section about CMOS mm-wave noise model and the behavior of noiseparameters versus frequency and layout parasitics. In the end, the developed modelis compared with some experimental results in the 50–75 GHz frequencies.

4.2 Two Port Noise Models

Two-port theory provides a means to represent a noisy two-port in terms of anoiseless two port and its corresponding two noise sources. Modeling the noiseof a two port network is essentially based on a generalized Thevenin’s theorem.Just like deterministic two port parameters, the noise model can be represented in


35

36 4 mm-Wave CMOS Noise Analysis

noiseless network

a b

c

i1 i2V1

V2

V1i1

noiseless network

+ - +-

noiselessnetwork

+ -

Fig. 4.1 Equivalent two-port noise representation (a) Admittance (PRC) model; (b) Impedancemodel; (c) ABCD model

admittance, impedance or ABCD form as shown in Fig. 4.1. These noise sourcesform a correlation matrix that is Hermitian and non-negative. The PRC and ABCDrepresentations are the most common forms and their correlation matrix are shownas following:

Cny =

⎛⎝i1i∗1 i1i∗2

i2i∗1 i2i∗2

⎞⎠ (4.1)

CnA =

⎛⎝vnv∗n vni∗n

inv∗n ini∗n

⎞⎠ (4.2)

In both of these matrices, C11 and C22 are positive real and C12 = C∗21. Thus, C11,

C22 together with the real and imaginary parts of C12 form four noise parametersthat are sufficient to fully characterize the noise behavior of a two port network.Most of the time, the ABCD matrix is needed to be calculated starting from thePRC representation from this equation:

CnA =

⎛⎝0 B

1 D

⎞⎠Cn

Y

⎛⎝ 0 1

B∗ D∗

⎞⎠ (4.3)

In which A, B, C, and D are the ABCD matrix elements. Circuit designers are morefamiliar with another four parameter noise representation

F = Fmin +Rn

Gs|Ys −Yopt |2 (4.4)

in which Fmin is the minimum achievable noise figure, Rn is the noise sensitivityresistance, and Yopt is the optimal source noise admittance. Also Ys = Gs + jBs isthe source admittance of the network.

4.3 CMOS Noise Model 37

To bridge between this representation and the ones mentioned earlier, one canuse the ABCD representation. This form is a function of the circuit representationas follows:

CnA =

⎛⎜⎜⎝

RnFmin −1

2−RnY

∗opt

Fmin −12

−RnYopt Rn|Yopt|2

⎞⎟⎟⎠ (4.5)

and the four circuit parameters can be calculated by solving the corresponding fourequations [12].

4.3 CMOS Noise Model

The main source of transistor noise in mm-wave frequencies is thermal noise.Thermal noise is the result of the kinetic energy of particles. These thermally-excitedparticles in a conductor undergo a random walk Brownian motion via collisionswith the lattice of the conductor. This random walk produces random electricalcharacteristics in the device terminals.

Among the various methods proposed for MOSFET noise modeling, the VanDer Ziel model is the most widely accepted one [11].Van Der Ziel modeled the FETnoise as a voltage modulated resistor, capacitively coupled to the gate as depicted inFig. 4.2. This way, two noise sources for the channel resistance and the induced gatenoise are calculated. As the source of both these noises are the channel noise, thereis a strong correlation between these two sources. However due to the distributednature of the channel that translates to infinite noise sources, the represented sourcesare not completely correlated. Van Der ziel model is essentially a PRC model asdescribed earlier. The value of the two sources and their correlation can be calculatedusing these equations:

i2d = 4kT Δ f γgd0 (4.6)

i2g = 4kT Δ f δgg (4.7)

noise source

Fig. 4.2 Generation of channel and induced gate noise in MOSFET


c � igid√i2gi2d

(4.8)

gg � ζω2C2

gs

gd0(4.9)

where γ , δ , and ζ are bias-dependent factors; gd0 is the drain output conductanceunder zero drain bias; gg is the real part of the gate-to-source admittance; and c isthe cross correlation coefficient.

For a long channel MOSFET, γ is 2/3 when the channel is pinched off and 1when the channel is symmetric [11]. Values of δ , ζ and c could be also calculatedto 4/3, 0.2 and j0.395 respectively. Although the model is well matched with longchannel transistors, substantial increase has been observed and reported in both γand δ for short channel MOSFETs [1,4,10]. There have been extensive discussionson the amount of noise increase and subsequently the value that γ an δ take as wellas the physical source of the origin of this excess noise. However, recently therehas been a consensus that the noise parameter, γ , is substantially smaller than whatinitially had been assumed and its value for a saturated MOSFET is close to twiceas its long channel value [5, 6, 9].

4.4 mm-Wave Noise Model

The main problem with PRC and ABCD models is that the correlation between thetwo noise sources, makes the simulation difficult as few circuit simulator tools offercorrelated noise sources. To remedy this problem, Pospieszalsky proposed a newmodel, as shown in Fig. 4.3, based on two uncorrelated noise sources in the sourceand drain sides. This model, assumes two uncorrelated noise sources, rgs and rds tomodel the channel noise. The temperature of these two resistors are set to Tg andTd , the only model parameters, respectively where Tg is close to the environmenttemperature while Td a is much higher temperature and could go up to several

Fig. 4.3 Pospieszalski modelassumes two uncorrelatednoise sources, rgs at Tg andrds at Td

4.4 mm-Wave Noise Model 39

thousands. In this model, the rgs noise is responsible for the correlated part of thechannel noise as if the Td is set to zero, the model represents a noise process withρc = − j.

Based on the procedure described in the previous section, the noise optimalsource impedance can be calculated using the Cy and ABCD matrices of the device.Ignoring the effect of C−gd for now, the Ropt and Xopt will be

Ropt =

√(ftf

)2 rdsTg(Rg + rgs)Td

+(rgs + Rg)2 (4.10)

Xopt =1

ωCgs(4.11)

At low frequency, when f is much smaller than ft , the second term in the Ropt

equation could be neglected and the equation simplifies to

Rlow fopt =

ftf

√(Rg + rgs)rdsTg

Td(4.12)

This value could be much larger than Rg + rgs, the optimal gain resistance.This considerable difference, makes it crucial to use simultaneous noise and gainoptimization techniques.

As the frequency approaches the ft of the device, this approximation becomesinvalid. In fact, the two terms become comparable in value for such frequencies.To get an approximate value for Ropt in this case, we need few assumptions. Thevalue of rgs is equal to 1

ngmand n is a value between 3 to 5. We can also assume

that Rg, by using some good layout techniques, is roughly equal to rgs. We canfurther assume that Td is 10 to 15 times larger than Tg and gm is roughly 10 timeslarger than gds, the Ropt will become

Ropt = kn(Rg + rgs) kn =√

2...2 (4.13)

In fact the optimal noise resistance is only a factor of kn larger than the optimalgain resistance. In this simple model, the imaginary part of optimal noise and gainsources are also equal. As a result the optimal noise and gain source impedancesapproach each other as evident on Fig. 4.4. These imply that, if the Rn is sufficientlysmall, minor compromise in the noise and gain performance, can result in thesimultaneous noise/power match as we approach and pass the ft of the device.Even small deviation from the optimal noise source, can have a considerable noisepenalty if the value of Rn is large. Calculation of Rn is more complicated and needsconsidering the effect of the gate to drain capacitance of the device to show the realtrend. The value of Rn is equal to the value of A in the ABCD noise matrix of thedevice, considering both Rg and Cgd as shown in Appendix III.


Fig. 4.4 Optimal noise andgain impedances for a 40μdevice for f = 1 to 100 GHz

Opt Noise source

Opt gain source

Fig. 4.5 (a) Simulated NFmin and Rn for a 40μ common-source round-table device; (b) noise andgain circles for optimal, optimal −0.3 dB and optimal −0.5 dB at 60 GHz

Rn = rgsTg

T0

g2m

(gm +CgsCgdrgsω2)2 +C2gdω2

+Td

T0

gds(1 + r2gsC

2gsω2)

(gm +CgsCgdrgsω2)2 +C2gdω2

(4.14)

Both these terms show a reduction with the frequency and the simulated Rn

is shown in Fig. 4.5a. The implication is that the penalty to be paid as a resultof a deviation from the optimal noise impedance gets smaller as the frequencyapproaches ft . In fact this together with the closeness of the optimal noise andgain impedances, suggest that with a compromise of about 0.5 dB in gain and noisefigure, one can get a simultaneous noise and gain match as depicted in Fig. 4.5b.

It is worth mentioning the importance of considering the Cgd of the device inthe Rn calculation. If the Cgd is neglected, (4.14) simplifies to the more familiarequation.

Rn = rgsTg

T0+

Td

T0

gds

g2m

(1 + r2

gsC2gsω

2) (4.15)

4.5 Noise Sensitivity Analysis to Parasitics 41

10 20 30 40 50 60 70 80 900 100

1

2

3

4

5

0

6

50

55

60

65

45

70

Rn

NF

min

Fig. 4.6 NFmin and Rn for a 40μ cascode device

This would imply a direct relation between Rn and frequency that could bemisleading. In fact, high frequency device noise measurements for non-silicontechnologies, had shown the reduction of Rn with frequency [7] and the effect isverified for CMOS as will be represented in the next section.

It is expected however, that if the output and input of the device are de-coupled,as is the case for cascode devices, the Rn experiences a moderate increase with thefrequency in the mm-wave region as predicted by (4.15). This prediction is verifiedboth in simulation and measurements. The simulated Rn and Fmin for a cascodedevice is shown in Fig. 4.6. This increase has been observed in measurements aswell [7].

4.5 Noise Sensitivity Analysis to Parasitics

Determining the noise contribution of various noise sources and the sensitivity of thenoise performance to their values are essential specially when it comes to optimizea device for a low noise applications. Figure 4.7a shows the contribution shareof different noise sources of a round-table device based on the proposed model.The sensitivity of the noise figure to the increase in the parasitic resistances havebeen also shown in the Fig. 4.7b. It is clear that with a reasonable layout to keepthe parasitic gate resistance low, most of the device noise comes from the drain sidenoise source. The parasitic gate resistance is the second large contributor and it is themain controllable noise source that shows a large sensitivity as well. This suggestthat even further reduction of Rg could still significantly help in terms of noiseperformance of the device and should be considered for devices specifically tailoredto low noise applications.1 The source resistance, although showing rather a largesensitivity, does not contribute to the overall noise figure as it is sufficiently smallfor the round-table device.

1The detail of the relationship between Rg and the device layout has been discussed in Chap. 2.


Rds Contributiona

b

Rgs Contribution

Gate parasitic Resistance

Drain parasitic Resistance

Substrate network

Source Resistance

Gate parasitic Resistance

Drain parasitic Resistance

Substrate network

Source Resistance

Fig. 4.7 (a) Noise contribution of various noise sources for a round-table device; (b) noisesensitivity of the device to parasitic noise sources

Fig. 4.8 The substrate noisecoupling to the channel

R*sub

Ccp

Vns

a(f). Vns.

gmba(f). Vns.

The drain and substrate resistances demonstrate low noise contribution as well aslow sensitivity. The noise of the drain resistance is scaled down by the gain of thedevice. The substrate resistance noise capacitively couples to the channel and canadd to the drain current noise based on the effective gmb of the device.

¯i2sub = 4kT0R∗

subg2mb

1 + ω2C2cpR2

sub

(4.16)

R∗sub is the effective substrate resistance assuming a simple one resistor substrate

network and Ccp is the associated coupling body to channel capacitor as depicted inFig. 4.8. Due to the low pass nature of the filter formed by the substrate resistanceand the coupling capacitor, this noise is not of a great importance in high frequencyas verified by sensitivity and noise contribution analysis.

4.5 Noise Sensitivity Analysis to Parasitics 43

Lg CgdRg

Rgi(Tg)

CgsRsLs

Rd Ld

Cds Rdsgm

Cdb

Rsub2Rsub1Lg

Rsub3

Td

Fig. 4.9 The employed model for noise analysis

0

1

2

3

4

5

6

a

b

50 55 60 65 70 75

NFmin

Rn

Freq ( GHz)

0

10

20

30

40

50

60

70

50 55 60 65 70 75

Freq ( GHz )

Fig. 4.10 Simulated and measured (a) NFmin and (b) Rn for a 40μ common-source round-tabledevice


4.6 Experimental Results

For the complete noise simulation, the small signal model as shown in Fig. 4.9 hasbeen used. The Td and Tg of the device have been set to 4,200 K and 310 K while allthe parasitic resistances have the environment temperature to fit the measured data.

The noise measurement is performed for the frequency range of 50 to 75 GHzalthough the data in the lower frequency range is very scattered and most ofthe reliable data occur after 60 GHz. The noise data was de-embedded using therecursive de-embedding method described in Chap. 2. Figure 4.10a, b comparesthe simulated and measured minimum noise figure and noise resistance for theround-table 40μm device. The slight increase in the NFmin as well as the predictedreduction in Rn can be seen in these measurements while both values have goodagreements with the model.

Figure 4.11 demonstrates the measured and modeled optimal noise impedanceand compares it to the measured optimal gain impedance. While the model andmeasurement show a good agreement, the optimal gain impedance is also veryclose to the corresponding noise impedance as was explained and predicted in theprevious section.

00.10.20.30.40.50.60.70.80.9

1a

b50 55 60 65 70 75

100

120

140

160

180

200

50 55 60 65 70 75

Fig. 4.11 Simulated and measured optimal noise impedance and measured optimal gainimpedance (a) magnitude (b) phase for a 40μ common-source round-table device

References 45

References

1. Abidi AA (1986) High-Frequency Noise Measurements on FETs with Small Dimentions. IEEETransactions on Electron Devices, vol 33, no 11, pp 1801–1805

2. Fries HT (1944) Noise Figures of Radio Receivers. Proceedings of the Institute of RadioEngineers, vol 32, pp 412–422

3. Goo JS (2001) High Frequency Noise in CMOS Low Noise Amplifiers. PhD Thesis, StanfordUniversity

4. Jindal RP (1986) Hot-electron effects on channel thermal noise in fine-line NMOS field-effecttransistors. IEEE Transactions of Electron Devices, vol 33, pp 1395–1397

5. Jung-Suk Goo et al (2001) Physical Origin of the Excess Thermal Noise in Short ChannelMOSFETs. IEEE Electron Device Letters, vol 22, no 2, pp 101–103

6. Navid R et al (2002) The physical phenomena responsible for excess noise in short-channelMOS devices. International SISPAD Conference, pp 75–78

7. Niknejad AM, Hashemi H (2008) mm-wave devices and circuits8. Razavi B (1997) RF Microelectronics, 1st edn. Prentice Hall PTR9. Scholten AJ et al (2003) Noise modeling for RF CMOS circuit simulation. IEEE Transactions

on Electron Devices, vol 50, pp 618–63210. Triantis DP (1996) Thermal noise modeling for short-channel MOSFETs. IEEE Transactions

of Electron Devices, vol 43, pp 1950–195511. van der Ziel A (1986) Noise in solid state devices and circuits.Wiley, New York12. Vandelin GD, Pavio AM, Rohde UL (2005) Microwave circuit design, using linear and non-

linear techniques, 2nd edn. Wiley, New York

Chapter 5Unilateralization

The limited performance of transistors at high frequencies usually result in anincrease in the number of gain stages which proportionally adds to the powerdissipation of the system and also degradates the noise performance of the circuit.As a result, circuit techniques to improve the gain-power efficiency of devices atfrequencies in the vicinity of the ft of the device are highly valued.

On the other hand, it is of a theoretical value to construct a systematicmethod of boosting the gain of an N-port active networks and to determine themaximum possible stable gain achievable out of such a network. As the maximumstable gain is inversely proportional to the reverse feedback conductance of anetwork, minimizing this feedback path is a way to increase the potential gain ofthe network. In the extreme case, where this feedback is canceled out completely,the network becomes unilateral. At this point, the network is also very stable dueto the lack of reverse feedback. As a result of these two effects, unilateralizationtechniques are highly valued techniques for RF and mm-wave circuit design.

5.1 Theory of Unilateralization

In 1953, when transistors where only 5 years old, people had started consideringthem for RF applications, limited in the VHF range for old-time devices. Mason[3] started a goal to look for an invariant property of two port networks that couldbe used as a figure of merit for high frequency devices. The problem is defined asfollow:

Consider a linear two port network as shown in Fig. 5.1a (both being two portand linear are essential constraints for the problem). An invariant metric has to beindifferent to any lossless transformation to the network. Any transformation of thedevice can be conceptualized as an embedding network, similar to Fig. 5.1b. The4-port embedding network has to be linear, lossless and reciprocal.

Mason has shown that all conceivable transformation that satisfy the constraintsin the four port network, could be realized from just three basic transformations.


47

48 5 Unilateralization

Fig. 5.1 (a) used as an amplifier (b) embedded in a 4-port lossless reciprocal network

These transformations are Reactance Padding, Real Transformation and Inversion.In terms of impedance matrix they could be represented as follow:

1. Reactance padding

[Z11 Z12

Z21 Z22

]=[

Z11 Z12

Z21 Z22

]+ j

[x11 x12

x21 x22

]

2. Real transformation

[Z11 Z12

Z21 Z22

]=[

n11 n12

n21 n22

][Z11 Z12

Z21 Z22

][n11 n12

n21 n22

]

3. Inversion [Z11 Z12

Z21 Z22

]=[

Z11 Z12

Z21 Z22

]−1

These three transformations could be realized with several different circuits.Now the problem reduces to finding an index in terms of the impedance matrixthat remain intacts to these three transformation. The reactance padding keeps[Z − Zt ] and [Z + Z∗] unchanged while the real transformation reduces this to thedeterminant of [Z−Zt ][Z + Z∗]−1. In the end, inversion transformation restrict onlythe magnitude of this matrix to be invariant. The resulting invariant term from allthese three basic transformations is thus:

U =|det(Z−Zt)|det(Z + Z∗)

This could be written in the more familiar forms of

U =|Z12 −Z21|2

4{ℜ(Z11)ℜ(Z22)−ℜ(Z12)ℜ(Z21)} (5.1)

U =|Y12 −Y21|2

4{ℜ(Y11)ℜ(Y22)−ℜ(Y12)ℜ(Y21)} (5.2)

At this point, the desired invariant metric is found and this in fact is the majorresult of Mason’s paper.

5.2 2-Port Unilateralization Techniques 49

5.1.1 Mason Gain as a Maximum Gain

Other than being invariant, U implies a maximum gain under certain condition. Ifthe original twoport network is unilateralized using a 4-port linear lossless reciprocalnetwork, then the value of U is equal to the value of maximum stable gain of thatnetwork. A more formal proof to this statement is as follow:

Writing the maximum stable gain equation in a slightly different form we have

Gmax =|Y21||Y12|

1

k +√

k2 −1(5.3)

Now

Gumax = lim

Y12→0Gmax =

|Y21|24ℜ(Y11)ℜ(Y22)

(5.4)

Setting Y12 to zero in the (5.2) gives the same result proving that Gumax is equal to U .

This suggests that the stable gain of a unilateral network is bounded by mason gain.It is however crucial to remember that U is not the maximum gain unless the

device is first unilateralized using an embedding network. if the device is notunilateral, the maximum stable gain could be significantly higher than U as will bedemonstrated in the following sections. In fact, as we pass the unilateral frequency,on one hand, K decreases since the network becomes less stable and makes theexpression in the parenthesis in (5.3) increase. This in competition with the ration of|Y21| and |Y12| determines the global maximum of the stable gain over the frequency.However, since the gain and stability increase coincide at the point where thedevice is unilateral, several circuit techniques to achieve unilateralization have beendeveloped as will be discussed in the next section.

5.2 2-Port Unilateralization Techniques

Investigating unilateralization techniques has a long history. Cheng [1] in his classicpaper in 1953, presented a general scheme and some circuit implementation forunilateralization of 2-port networks all require transformers. A more commonlyused technique is neutralization which can be implemented more easily and oftenused as a subsequent for unilateralization in moderate frequencies. Neutralizationmay be defined as “the process of balancing out an undesirable effect” [1]. Thetechnique is mostly investigated for common-source/common-emitter devices. Forthis architecture, the dominant reverse feedback element is the Cμ of the device andneutralization goal is to cancel out the effect of this capacitor. This could be achievedby simply resonating out the capacitor, using an inductor as depicted in Fig. 5.2a.A large series capacitor is needed to dc couple the gate and the drain. More over,this technique is narrow band due to its resonance nature.


Fig. 5.2 (a) Neutralization using a resonating inductor. (b) Cross coupled capacitor neutralization

A wider band neutralization could be achieved as shown in Fig. 5.2b [4]. Theidea is that CN is sized in such a way that it injects a negative current equal tothe magnitude of the feedback current passing through Cgd so that the total currentreturns to the input becomes zero. As the drain voltages of a differential pairhave opposite phases, the negative current could be achieved with this architecture.For mm-wave application however, the parasitic inductance of the neutralizationcapacitance becomes significant and could limit the applicability of this method. Itis also important to remember that neutralization is equivalent to unilateralization,only if the reverse feedback is pure imaginary. This is not the case for architecturesother than common-source/base. The assumption of imaginary reverse feedback forcommon-source/base also breaks in frequencies close to ft as other effects becomeimportant. A general condition for unilateralization in such frequencies could beachieved by looking at the desired circuit as a multi-port network.

5.3 N-Port Unilateralization

For an N-port network, the unilateralization technique translates into finding propercomplex terminations for the (N-2) ports to make the remaining 2-port unilateral.

Consider an N-port network as shown in Fig. 5.3. One can readily write theN dimensional admittance parameters relating input voltages and currents withdesignated signs shown on the picture:

In = Y 1−n1−n Vn (5.5)

This equation could be decomposed in this fashion:

I1−2 = Y 1−21−2 V1−2 +Y 3−n

1−2 V3−n (5.6)

I3−n = Y 3−n3−n V3−n +Y 1−2

3−n V1−2 (5.7)

5.3 N-Port Unilateralization 51

Fig. 5.3 N-port network with N-2 external complex termination

For which Y m1−m2k1−k2

represents a (k2 − k1 + 1)× (m2 − m1 + 1)matrix with yi j

elements for which i and j change from k1 to k2 and m1 to m2 respectively.Now assume that ports 3 to n are terminated by a series of complex loads with

admittances equal to Y iext(i : 3...n). These loads introduce another set of equations:

I3−n = YextV3−n +Y 1−23−n V1−2 (5.8)

In which

Yext =

⎡⎢⎢⎢⎢⎣

Y 3ext 0 · · · 0

0 Y 4ext

......

. . ....

0 · · · 0 Y next

⎤⎥⎥⎥⎥⎦ (5.9)

Combining (5.6)–(5.8), the parameters for the resulted twoport network will be:

¯Y 1−21−2 = Y 1−2

1−2 −Y 3−n1−2 (Yext +Y 3−n

3−n )−1Y 1−23−n (5.10)

Using this equation, the set of Y iext s to make ¯Y12 = 0 could be found to realize

unilateralization.To check the applicability of this technique, two other conditions must be tested.

First, to take advantage of the benefits of this method, it is desirable to realize thisgain boost using passive components to form the Yext , requiring its real part to bepositive at all frequencies. The unilateral network needs also to be stable. Sincethe Y 12 = 0, this condition translates to Re(Y 11) and Re(Y 22) be positive, putting acondition over the original Y parameters set. These will become more clear in the3-port discussion.


Fig. 5.4 (a) Unilateral common-source and common gate; (b) simplified small signal model for3-port CMOS

5.4 Single Transistor Unilateralization

The first natural candidate for testing the theory is a single transistor. Ignoring thebody terminal for simplification, a transistor is a three terminal device which canbe terminated with a proper external impedance to increase the gain as describedearlier. In order to see the possibility of this method, we test it for the twowidely used gain stages, the common-source and common-gate devices as shownin Fig. 5.4a. For the hybrid-pi model of transistor as depicted on Fig. 5.4b, theadmittance metric is:

Y3 =

⎡⎣ gm + gds + jωc1 −gds −gm − jωc1

−(gm + gds) gds + jωc2 gm − jωc2

− jωc1 − jωc2 jω(c1 + c2)

⎤⎦ (5.11)

Using these parameters in (5.11), the required Yext could be determined for thesetwo structures. For the common-source structure, it can be readily seen that theunilateralization is not achievable using passive devices since the real part of Yext isnegative over all frequencies:

Yext = −gds

(1 +

C1

C2

)−gm − jωC1 (5.12)

The common-gate is a more interesting. The required Yext for this structure is asfollow:

ℜ(Yext) =ω2C1C2

gds(5.13)

ℑ(Yext) = −ω(C1 +C2)− gmC2

gds(5.14)

5.4 Single Transistor Unilateralization 53

Implying that unilateralization is achievable with a passive inductive impedance.Using a series R-L circuit to realize the load, the required inductance and resis-tance is

Lext =gds

ω2((C1 +C2)gds + gmC2 + (C1C2ω)2

(C1+C2)gds+gmC2

) (5.15)

Rext =LextC1C2ω2

(C1 +C2)gds + gmC2(5.16)

Since an inductor at the gate is a classical method to build an oscillator, it’snatural to question the stability of this structure. For the unilaterized common-gatestructure, the real parts of Y 11 and Y 22 are as follow

ℜ(Y 11) = gm + gds

(1 +

C1

C2

)≥ 0 (5.17)

ℜ(Y 22) =ω2(C1 −C2)C1

g2m +ω2C2

1

gds ≥ 0 (5.18)

The first condition is always met. To satisfy the stability at the output, it is neededthat C1 be larger than C2 with a proper margin. With a reasonable control overexternal parasitics, this is almost always the case for CMOS processes hence ensuresthe stability of the structure. In fact, the condition for oscillation is the opposite ofwhat we are looking for, requiring the Y12 to be equal to infinity. This translates toYext +Y33 be equal to zero. Considering an inductor at the gate, this condition yieldsto the familiar frequency of oscillation:

ωosc =1√

(c1 + c2)Lext(5.19)

Using (5.19) and (5.16) it can be shown that the difference between the twofrequencies can be shown as follow:

ωosc −ωuni =(ωoscωuni)2

ωosc +ωuni

(Lext c2β + Lext

(c1c2ωuni)2

(c1 + c2)+ c2β

)(5.20)

Since this difference is always positive, it implies that the unilateralizationfrequency always happens first and the difference is a function of the β as wellas internal capacitances of the device.


5.5 Simulated Results and Implementation

The value of the required L and R were calculated for NMOS devices of varioussize in the 90 nm technology. These devices were modeled up to 100 GHz to extractthe required device parameters based on the method described in Chap. 2.

For a sample 40× 1μm/90 nm, Fig. 5.5a shows the magnitude of Y12 and thestability factor. The gate network is set to make Y12 zero at 40 GHz. The stabilityfactor is above one confirming the stability of the device as was predicted inthe previous section. Figure 5.5b compares the maximum stable gain as opposeto the maximum unilateral (Mason) gain. The significant difference between thetwo types of the gain is apparent in frequencies far below the unilateralizationfrequency. At this frequency, the two gains become equal as suggested by thedefinition of the Mason gain. Interestingly, the stable gain goes beyond this value.As un-intuitive as it might seem at first, it actually does not contradict with theMason theory. The theory in fact suggests that the U is the maximum unilateral gainand is invariant to the type of the external network that has been used to realize theunilateralization [2]. The gain boost resulted from this technique could be up to 7 dBat the unilateral point and up to 13 dB at the peak gain depending on the frequencyof operation and the size of the device.

Fig. 5.5 (a) Simulatedmagnitude of Y12 and thestability factor (k) and (b)device maximum stable gainand maximum unilateral gain(Mason gain)

5.5 Simulated Results and Implementation 55

Fig. 5.6 (a) Required Lext and Rext values for unilateralization for NMOS devices of W = 20 μ ,40 μ , and 60 μ , L = 90 nm. (b) Simulated oscillation frequency vs. unilateralization frequency forW = 40 μ

Figure 5.6a shows the corresponding Lext and Rext for three sizes of an NMOSdevice with the same multi-finger layout structure. The needed inductance is verylarge at lower frequencies, but quickly drops to reasonable integrable values as thefrequency increases to mm-wave region. The required inductor also decreases forlarger device sizes due to larger internal capacitances. These two suggest that themethod is mostly suitable for relatively large devices and frequencies beyond 5 GHz.Resistance value on the other hand, is quite steady versus frequency and is on theorder of few ohms for. Figure 5.6b illustrates how the oscillation frequency changesversus unilateralization frequency for different values of external inductances andshows a significant distance between these two frequencies as predicted by (5.20).

Practically, a by pass capacitance is usually used at the gate of common-gatedevices to minimize the effects of biasing lines. With a value of few pFs, the selfresonance frequency of such capacitors usually happen somewhere in the mm-waveregion implying the existence of a series inductance of few pHs with the capacitor.An external inductance in a form of a short transmission line could be used to set anet inductive impedance based on (5.16). The line could also be designed to set therequired resistance.

5.5.1 Implementation and Experimental Results

Cascode devices are used extensively due to their larger gain and the input-outputisolation. The gain benefit that normally associated with cascode structures is notnecessarily available at mm-wave frequencies as the unilateral assumption breaks.Figure 5.7 compares the measured maximum available gain (MSG) between anormal common source device and a cascode device. As evident in the figure,the maximum available gain of the cascode device is considerably higher at highfrequencies, but gets close to the value for the common source device at mm-wavefrequencies. At 60 GHz for example, both devices show similar MSG of around7.5 dB.


Fig. 5.7 Comparison of maximum stable gain (MSG) between a common source and cascodestructure using similar current

The described technique could essentially be used for cascode structures byplacing the required network at the second gate of the device. To calculate therequired impedance, the input device and the shared substrate network needs to becounted in the calculations. Using the small-signal model of the device as shown inFig. 5.8, the required admittance at the second gate could be calculated as follows:

ℜ(Yext) =ω2Cgd

(G2

sub ((3Cgs +Cdb)gm2 +−3CgsGsub)+CdbCgsω2 (2Cdbgm2 +CgsGsub −2Cdbgm2))

(G2

sub +ω2C2db

)(G2

sub +ω2C2gs

)(5.21)

ℑ(Yext) = ω

(3Cgd −Cgs +

CgdGsub (Cdbgm2 −CgsGsub)(C3

dbω2 +CdbG2sub −CgdG2

sub −C2dbCgdω2

)

−GsubCgd(2Cdb −3Cgd

)(Gsub −gm2)

(Cdb −Cgd)(G2sub +C2

gdω2)

)(5.22)

The unilateralization procedure was implemented on a sample 80 μm/90 nmcascode device using an integrated 2 pF external capacitor in series with a total of50 pH of external inductance. The 2 pF finger “MOM” capacitor was modeled andits internal inductance was used in the modeling process.

Figures 5.9a and b the measured and modeled S12 of the device as well asthe maximum available gain up to 65 GHz. The fall-off of the magnitude of thereverse reflection parameter, S12 after 20 GHz corresponds to the increase in the

5.5 Simulated Results and Implementation 57

Fig. 5.8 Small-signal model of a cascode structure used in hand calculations

Fig. 5.9 (a) Device S12; (b) device maximum stable gain

maximum available gain in the same frequency range. Both these effects are wellin agreement with the modeling results. The peak gain at 50 GHz is close to 20 dBwhich is drastically larger than the 8 dB gain for the case of normal cascode, asshown previously in Fig. 5.7.

The noise performance of the device was simulated using Pospieszalski noisemodel with the aid of the proposed small-signal circuit [5]. The equivalent noiseparameter γ was set to 1.3 as suggested by [6]. The effect of unilateralizationtechnique was investigated on the minimum noise figure and equivalent noiseresistance (Rn) by changing the series inductance at the second gate LC tank. The


Fig. 5.10 Simulated device noise resistance parameter Rn minimum achievable noise figure NFmin

effect is minor as shown in Fig. 5.10a. While NFmin decreases slightly when thedevice goes into unilateral region, Rn increases and no clear overall benefit ordisadvantage is associated with technique in terms of noise performance. However,the technique enables the designer to trade-off gain for noise optimization whichresults in an overall more power efficient amplifier.

References

1. Cheng CC (1955) Neutralization and unilateralization. IRE Trans Circuit Theory, vol CT-2, no 2,pp 138–145

2. Gupta MS (1992) Power gain in feedback amplifiers, a classic revisited. IEEE Trans MicrowTheory Tech, vol 40, no 5, pp 864–879

3. Mason SJ (1954) Power gain in feedback amplifiers. Trans IRE Professional Group on CircuitTheory, vol CT-1, no 2, pp 20–25

4. Niknejad AM (2007) Electromagnetics for High-Speed Analog and Digital CommunicationCircuits, 1st edn. Cambridge press

5. Pospieszalski MW (1989) Modeling of noise parameters of MESFETs and MODFETs andtheirfrequency and temperature dependence. IEEE Transactions on Microwave Theory andTechniques, vol 37, pp 1340–1350

6. Triantis DP (1996) Thermal noise modeling for short-channel MOSFETs. IEEE Transactions ofElectron Devices, vol 43, pp 1950–1955

Chapter 6Terahertz CMOS Devices, Circuits and Systems

Sam Gharavi and Frank ChangElectrical Engineering Department, University of California, Los Angeles(UCLA), Los Angeles, CA, USAe-mail: [email protected]

This chapter reviews the state of the art in CMOS devices, circuits and systemsoperating at 100 GHz and above. Section 6.1 is devoted to the CMOS devices.CMOS geometric scaling is going to reach a point where other technologies suchas the III-V, the nano-engineered Graphene, and even the photonics will merge.It is therefore important to understand the possible future paths for the CMOStechnology. This topic is presented in Sect. 6.1 by means of introducing two parallelresearch efforts on the mobility-enhanced FETs and the nano-engineered FETs.We will then present some of the recently-published, ultra-high speed CMOSintegrated circuits in Sect. 6.2. Most of the integrated circuits presented in Sect. 6.2are stand-alone building blocks that are designed to experiment the high-frequencylimits of the advanced CMOS nodes. There are also a few circuits which aredesigned with a specific final application in mind. Finally, in Sect. 6.3 we willreview two examples of system-level efforts. Such system-level innovations opennew design paradigms that can be exploited by the circuit designers.

6.1 Ultra-High Speed CMOS Devices

From the device speed standpoint, at the time of writing this manuscript, the 45 nmCMOS technology with the maximum oscillation frequency of around 400 GHz hasthe best high-speed performance among all semiconductor technologies which arein large-volume, industrial production. It is also expected that maximum oscillationfrequencies of around 600 GHz will be observed shortly in the 22 nm CMOS node[1]. Such high-speed CMOS devices will make it possible to design tuned amplifiersoperating at 300 GHz and higher. Therefore CMOS is entering the Terahertz regime.Due to its very low production cost and the possibility of integration with verydense digital circuits, it is natural to think that the CMOS technology will be themainstream technology for the numerous potential applications in the Terahertzregime.


59

60 6 Terahertz CMOS Devices, Circuits and Systems

CMOS technology is the main focus of this book. Interestingly however, it hasbeen predicted that a combination of high-mobility materials such as Germanium(Ge) and Gallium-Arsenide (Ga-As), or even nano-engineered materials such asGraphene will be merged with the super-scaled CMOS devices of 16 nm and lowerchannel lengths. On the other hand, an interesting research effort has started onbuilding CMOS-compatible photonic integrated circuits [2]. As a result, what isknown today as the silicon CMOS, is going to change significantly over the courseof next few years. The remainder of this section is divided into two subsections.In the Sect. 6.1.1 we will present the research efforts on the mobility-enhancedFETs. Section 6.1.2 is devoted to the nano-engineered, Graphene-based FETs.

6.1.1 CMOS with Enhanced-Mobility Channel

Study of the challenges associated with the scaling of CMOS in the low-nano meterera and the potential solutions to these challenges is the subject of an active anduniversal research effort. The Emerging Research Material (ERM) working groupof the International Roadmap for Semiconductor (ITRS) reports the summary ofthese research efforts [3]. The ultimate goal of the mentioned research efforts is todesign devices that can be used for the analog/RF applications in the terahertz bandand are suitable for the VLSI digital applications at the same time. Such devicesmust exhibit a number of key attributes, most important of which are [4]:

1. Low access resistance from the outside world to all device terminals2. High drive current density3. Thin wells4. High sheet career density5. High-energy and thin gate barriers

These constraints are usually quantified and summarized in the device “scalinglaw”. As an example, Table 6.1 summarizes the scaling law for the FET bandwidthextension by a factor γ [5]. For the CMOS technology, following the scalinglaws has become very challenging. In particular, CMOS technology suffers fromvery poor transport of silicon. This poor transport has become the performancebottleneck in the super-scaled CMOS nodes. The undesired issues caused by thesilicon channel in the super-scaled CMOS devices are usually referred to as the“short-channel effects”. These challenges motivated the device engineers to changethe standard process flow of the CMOS technology. In particular, device engineersare considering use of other materials with higher electron (and hole) transports toreplace silicon in the MOSFET channels of the future transistors. Examples of suchmaterials are the III-V materials with high electron mobility and Germanium (Ge)with high hole mobility.

When a new device process is designed it is of very high importance that thedrain and the source of the devices remain “self-aligned” to the gate. In [4], afully self-aligned, MOSFET process with In-Ga-As channel has been developed.

6.1 Ultra-High Speed CMOS Devices 61

Table 6.1 MOSFET scaling law for a bandwidth extension with ratio γ [5]

Parameter Law

Gate length, source and drain contact length: Lg , Ls/d(nm) γ−1

Gate width: Wg(nm) γ−1

Equivalent oxide thickness: Teq = ToxideεSiO2/εoxide(nm) γ−1

Dielectric capacitance: Cox = LgWgεSiO2/Teq(fF) γ−1

Inversion thickness: Tinv = Twell/2(nm) γ−1

Semiconductor capacitance: Csemi = WgLgεsemi/Tinv(fF) γ−1

Density of state capacitance: CDOS = q2nm∗LgWg/2πh2(fF) γ−1

Electron density: ns(cm−2) γ1

Gate-channel capacitance: Cg-ch = 1/(1/Cox +1CDOS +1/Csemi)(fF) γ−1

Transconductance: gm ≈Cg-chvinj/Lg(mS) γ0

Gate-source or drain fringing caps: Cgd ∝ Wg(fF) γ−1

Source/drain access resistance: Rs,Rd(Ω) γ0

Source /drain contact resistivity: (Ω−μm) γ−1

Drain current: Id ≈ gm(Vgs −Vth)(mA) γ0

Drain current density (mA/μm) γ1

In this process, a 4.7nmAl2O3 gate dielectric is deposited on a 5nm In0.53Ga0.47Aschannel. The gate is made of a blanket W/Cr/SiO2 deposition. The source anddrain regions are made of 50 nm thick InAs and are fully self-aligned to the gate.The source and drain contacts have 1−3Ωμm2 resistance.

Figures 6.1 and 6.2 show a micro-photograph of the fabricated devices in thisprocess along with the DC drain current of a 200 nm gate length device in thisprocess, respectively.

Currently, the state of the art, mobility-enhanced FET devices are still in theresearch phase. Many challenges must be addressed in the lab before these newdevices can replace the silicon in an industrial setting [3].

6.1.2 Graphene High-Speed Transistors

Invention of Graphene (two-dimensional sheet of carbon atoms) in 2004 igniteda revolution in the science and technology [6].1 This exciting discovery grabbedthe attention of the solid-state physics community very quickly. Device engineers

1Inventors of Graphene were awarded the Nobel Prize in physics in October 2010.


Fig. 6.1 InGaAs FET,(a) oblique view (b) crosssectional view [4] ( c© IEEE2010)

Fig. 6.2 Current for a 200 nm gate length III-V FET in [4] ( c© IEEE 2010)

6.2 Ultra-High Speed CMOS Circuits 63

recognized a great potential in Graphene from solid state devices perspective.The most exciting features of Graphene from a device engineering perspective are:(1) it’s very high carrier transport, (2) it’s purely two-dimensional lattice structure.These promising attributes motivated the fabrication of the first Graphene-basedFET in 2007 [7]. Shortly after that the first high-speed Graphene FET with aGigahertz cut–off frequency was reported in 2008 [8].

The exceptional features of Graphene make it an ideal candidate for the ultra-highspeed FET devices. Graphene transistors with the record cut-off frequencies of300 GHz have been reported recently [9]. The achieved device speed in [9] issignificantly higher than the silicon CMOS devices with comparable gate lengths.Due to the immaturity of Graphene FET technology, Graphene FET speeds s are farbehind what Graphene can potentially offer in theory.

Graphene FET is theoretically a promising alternative for silicon FET. However,many problems with the existing implementations of the Graphene FET devicesmust be addressed before Graphene can replace silicon in the industry. The mostchallenging technical issue is creating a well-controlled and high-yield band gapfor Graphene. Such band gap will resolve the poor turn-off and weak drain-currentsaturations of the current Graphene FETs [10].

6.2 Ultra-High Speed CMOS Circuits

Non-stopping device scaling has made the integrated circuit design to undergoa fundamental change of paradigm. In classical integrated circuit world, the on-chip dimensions were much smaller than the on-chip wavelengths at the operationfrequencies of the chips. This fact has considerably changed over the past few years;main due to two reasons (1) the increased size of the chips due to the increasedcomplexity of the systems (2) the decreased cut-off wave-length2 of the devices dueto the geometric scaling. Figure 6.3 shows these trends and the mentioned shift ofparadigm [11].

There is no efficient and systematic method for designing circuits in thementioned new paradigm yet. It is instructive however, to review the techniquesexploited by different researchers. The following examples in this section(Sects. 6.2.1– 6.2.6) were chosen to familiarize the reader with a diverse set ofterahertz circuit design techniques.

One keystone to all these design strategies is the accurate modeling of the activeand passive devices in order to predict the performance of the circuit. Modelingcan be either merely simulation-based [12] or based on a combination of previousmeasurements and simulations [13].

2The cut-off wavelength denoted by λT , is defined as the wavelength of the electromagnetic wavestravelling on the chip at the cut-off frequency of the device.


Fig. 6.3 Chip size and cut-off wavelength as a function of time [11]

6.2.1 Nano-Scale CMOS Transceivers in the 90–170 GHz Range

Authors in [14] have reported their CMOS transceivers operating in the 90–170GHzrange. They have also outlined their design methodology and have delved intothe design issues on the architecture, circuit, and device layout levels. From thefinal application standpoint, due to the comparable power levels of the radios andimagers, authors of [14] believe that the same transceivers are suitable for bothimaging and wireless radio applications.

An attention-grabbing architecture for a passive imaging camera is proposed in[14]. The proposed camera architecture is a combination of the beamforming arrayarchitecture and the traditional switched-antenna passive imagers. The proposedarchitecture has a sub-array, zoom-in capability that can be turned on only ifneeded. In other terms, different subsets of pixels can be grouped together in abeamforming manner only if zooming is desired in a certain direction.3 In order tosave power, the proposed imager can also operate in the low-resolution, low-powermode with minimum active pixels. A block diagram of this imaging architecture[14] is shown in Fig. 6.4.

Working at frequencies above 100 GHz offers an enormous advantage for on-chip integration of imagers. At these frequencies, the distance between the adjacentantennas4 in a phased array becomes comparable to the dimensions of the on–chiptransceivers. Therefore large number of pixels can be integrated on a single standardCMOS die without any extra area overhead from the antennas.

3We will see in the next chapter that beamforming increases spatial resolution of an imager, byincreasing its effective aperture size.4In a phased array antenna, the distance between adjacent antenna elements is usually set aroundhalf of the free-space wavelength at the operation frequency of the array. At 100 GHz, the free-space wavelength is about 3 mm and the antenna element spacing is therefore around 1.5 mm.


Fig. 6.4 Passive low-power camera with zoom-in capability proposed in [14] ( c© IEEE 2009)

In their previous publications, the same research group as in [14], had introduceda high-frequency, CMOS sizing and biasing methodology called the “constantcurrent densities” [15]. The inspiration behind this design methodology is thatthere are current densities at which the high-frequency performance of the CMOS isoptimum. These current densities have been shown to remain fairly constant whenthe CMOS devices scale down. As a result, these optimal current density rules canbe applied to various advanced CMOS nodes. For example, many advanced CMOSnodes exhibit their best maximum oscillation frequency, fmax, at a current densityclose to 0.25 mA

μm .5

Figure 6.5 [15] shows the fmax of a few submicron CMOS nodes. As evident fromthis figure, the current density at which these devices show their highest fmax is fairlyconstant. The mentioned design strategy can be very helpful when a circuit needs tobe transferred from an older technology node to a more advanced node. In particularif reliable, RF, device models are not available yet for the new technology node.

Authors in [14] believe that the transistor device layout is one of the mostsignificant factors that determine the performance of circuits operating at 100 GHzand above. As such, they have suggested that different device layouts be usedfor different circuit applications. The justification behind this suggestion is thatdifferent device layout parasitic elements have different impacts on the transistor RFperformance. For example, often in a low-noise amplifier (LNA) the most imperativedevice metric is the minimum noise figure, NFmin, which is most sensitive to theparasitic gate resistance. Therefore transistor layouts that minimize the gate parasiticresistance are the most favorable for the low-noise amplifiers design. However, thesame layout strategies might not be optimal for a power amplifier (PA) or a tunedamplifier designs. This is why having at least five specialized layouts are highly

5Current densities are per unit width of the transistors.


Fig. 6.5 Measuredmaximum oscillationfrequency of differentCMOS.technology nodes asfunction of current density[15] ( c© IEEE 2007)

recommended for the circuit design at 100 GHz and above. These specialized devicelayouts are:

1. Common-source stage with grounded source2. Common-source stage with inductive degeneration3. Common-gate stage4. Cross-coupled pair for VCO5. Differential pairs

As mentioned earlier in this chapter, modeling plays a critical role in the ultra-highspeed circuit design. An algorithmic modeling approach based on iterations betweenthe electromagnetic (EM) simulations of the passive components, schematicsimulations and RC-extractions of the transistors is described in [14].

By applying all these design techniques, authors in [14], have designed aset of CMOS transceivers operating in the 90–140GHz range. As an example,Fig. 6.6 shows the block diagram and the die photograph of a 140 GHz CMOSreceiver reported in [14]. The mentioned receiver is designed in the 65 nm CMOStechnology and includes an on-chip dipole antenna, a LNA, a double-balancedmixer and IF amplifiers. In line with the optimal current density method describedabove, most of the transistors have been biased at 0.25mA/μm which correspondsto peak fmax of the process. Lumped, spiral inductors and transformers (as op-posed to transmission-line-based inductors) have been used for matching at allplaces.

No RF process options (e.g. MIM caps) beyond the pure digital CMOS processhave been exploited in this design. All decoupling capacitors were implemented asmetal-on-metal (MoM) capacitors.


Fig. 6.6 Block diagram and die photograph of a 140 GHz receiver reported in [14] ( c© IEEE 2009)

Testing the integrated circuits operating at 100 GHz and above imposes uniquechallenges. The mentioned 140 GHz receiver has been no exception. Due tothe lack of viable, external local oscillator (LO) signals at 140 GHz, authors in[14] have driven their circuit with an LO signal at 100 GHz for the conversiongain measurement of the receiver chain. The measurement results are shown inFig. 6.7.

6.2.2 CMOS THz Oscillator Based on Linear Superposition [16]

Authors in [16] reported a 324 GHz CMOS frequency generator. This frequencygenerator superimposes the phase-shifted versions of a fundamental oscillation at81 GHz. One of the novelties of this design is in the introduction of the “linear


Fig. 6.7 Rx chain conversion gain for the 140 GHz receiver in [14] ( c© IEEE 2009)

Fig. 6.8 Linear superposition method for frequency quadrupling reported in [16] ( c© IEEE 2008)

superposition” technique. In this technique, which is conceptually depicted inFig. 6.8, four sinusoidal signals at a frequency f0 are phase-shifted, rectified, andadded to each other. The resulting waveform will have a strong harmonic at 4 f0.The theoretical efficiency of this superposition is about 17% [16].

One attractive property of the linear superposition method is its generality. Thesame method is applicable to other technologies and other frequencies.


Fig. 6.9 Schottky diode cross section and equivalent circuit model in a CMOS technology [17]( c© IEEE 2010)

6.2.3 THz CMOS Push–Push Oscillator [17]

Authors in [17] believe that until the CMOS technology is capable of amplificationat THz, passive detectors based on the Schottky diodes offer a viable option,compatible with the CMOS fabrication. Such diodes can exhibit cut-off frequenciesas high as 1 THz and can be used for frequency multiplication to generate THzsignals. The cross-section and circuit model of a Schottky diode in the CMOStechnology are depicted in Fig. 6.9.

Also authors in [17] have demonstrated a 410 GHz CMOS, push-push VCO inthe 45 nm CMOS technology. The push technique has been exploited in the designof the mentioned VCO in order to multiply the fundamental frequency.

As mentioned before, one tricky part of the Terahertz integrated circuit labo-ratory development process is the testing and measurement. Since no commercialelectronic probe can operate at frequencies above 110 GHz, measurements shouldrely on other innovative techniques. One of these techniques is to radiate the signalsusing an on-chip antenna. This technique was exploited in the measurement setupof the mentioned 410 GHz CMOS VCO in [17]. The spectrum of the radiatedelectromagnetic waves has then been measured using the optical infrared equipment.The schematic and die photograph of the circuit are shown in Fig. 6.10.


Fig. 6.10 simplified schematic and die photograph of the 410 GHz VCO in [17] ( c© IEEE 2010)

Fig. 6.11 Oscillatortopology in [18] ( c© IEEE2010)

6.2.4 300 GHz Fundamental-Tone Oscillator in CMOS

None of the on-chip oscillators previously shown in this chapter were fundamentaloscillators. A fundamental (first harmonic), 300 GHz, CMOS oscillator is reportedin [18]. The proposed circuit topology for this oscillator is different from theconventional, cross-coupled pairs and allows the core oscillator circuit to toleratehigher device non-idealities. Due its superior circuit topology, the designed oscil-lator in [18] has been capable of providing a fundamental oscillation at 300 GHzwhile consuming only 3.5 mA from a 1 V supply in the 65 nm CMOS technology.The VCO topology is shown in Fig. 6.11. In order to simplify the measurements, adown-conversion mixer driven by an external, W-band source is also integrated withthe oscillator on the same chip.

A die photograph of the oscillator and the mixer is shown in Fig. 6.12.


Fig. 6.12 Die photograph ofthe oscillator and mixer in[18] ( c© IEEE 2010)

6.2.5 600 GHz CMOS Passive Imager

A focal plane, passive imaging array operating at 600 GHz is presented in [19].The “self-mixing” phenomenon, which is caused by the signal leakage in theresistive, down-converting mixers, is exploited and embraced as an energy detectionscheme in this work. The self-mixing scheme eliminates the need for a localoscillator signal. The main drawback of the self-mixing method is that it entirelyloses the phase information of the signal. A block diagram and die photograph ofthe detector is shown in Fig. 6.13.

The input signal is sensed by an on-chip, folded dipole antenna and is thenapplied to the self-mixing, differential pair. Additional capacitors C1 and C2 havebeen added to enhance the leakage and self-mixing. Transmission lines TL1 andTL2 have been used for power matching.

One interesting aspect of this work is that it has been implemented in the 0.25μCMOS technology with the maximum oscillation frequency on the order of 30 GHz(twenty times smaller than the operation frequency of the imager). This has beenfeasible because the imager is fully passive and the self-mixing scheme eliminatesthe need for the LO signal. The focal-plane, passive, imager array has beentested and proved functional. The test setup and measurement results are availablein [19].


Fig. 6.13 Block diagram and die photograph of the one pixel of the passive focal plane imager in[19] ( c© IEEE 2008)

6.2.6 200 GHz CMOS Frequency Divider

Frequency dividers are keystones to the frequency synthesis. There is a traditionaltradeoff between the division center frequency and the locking ratio of the frequencydividers. In order to relax this tradeoff, a novel frequency division scheme that cansupport locking ranges as wide as %20 at frequencies as high as 200 GHz has beenproposed and implemented in [20].

More specifically, Authors of [20] have suggested the injection of both voltageand current signals in a time-interleaved scheme in order to increase the lock-ing range. This novel idea has been implemented in the TSMC 65 nm CMOStechnology.

6.3 Ultra-High Speed Systems 73

As with other ultra-high speed circuit blocks reviewed in this section, testing ofthis chip has imposed unique challenges. In particular, generating a 200 GHz signalwith sufficient power to server as the divider input is quite challenging. Authors of[20] have devised a three-step testing technique to overcome the abovementionedchallenge. A mm-wave external source has been fed to the cascade of a multiply-by-three block, a power amplifier and a multiply-by-two block to generate the200 GHz input signal with adequate power. The figure of merit of the circuits6

in [20] outperforms that of all previously shown, similar works.

6.3 Ultra-High Speed Systems

This section is devoted to the ultra-high speed system efforts. Section 6.3.1 delvesinto the challenges and opportunities of the terahertz, wireless, data communicationsystems with potential data rates of tens of Gbps. To the best of our knowledge,no illustrations of such systems have been reported in the CMOS technology yet.However, there is a huge pool of potential applications. Section 6.3.2 is devoted tothe concept of near-field, direct, antenna modulation (NFDAM). NFDAM is a novelarchitecture that has become implementable on-chip, and also has an enormouspotential for new wireless applications at frequencies above 100 GHz.

6.3.1 Ultra-High-Speed Data Communication

By a simple extrapolation of the data rates of the commercial, wireless datacommunication systems from 1990s to today, we can expect that data rates ashigh as 10–20Gbps will be needed soon. Presently, the highest data-rates for thecommercial, wireless data communication systems belongs to the 60 GHz radioswhich can support up to 5 Gbps (in short range). Current systems therefore do notmeet the required data rates of 10–20Gbps for the future.

One natural way of increasing the data rates is moving to the higher centerfrequencies with more accessible bandwidths. Two options for the higher frequencybands can be imagined: (1) near infrared/visible range (2) terahertz band (from100 GHz to 10 THz). There are several factors that severely limit the achievabledata rates at the infrared frequencies and above. These factors include the eye safetypower limit, the poor sensitivity of detectors and receivers at the visible range,and the high ambient light noise from the natural radiations [21]. The alternativeis moving to the terahertz band. For example, there is almost 50 GHz of unregulatedbandwidth centered around 350 GHz [21]. This band also enjoys a relatively low

6Figure-of-merit for frequency dividers is defines as the center frequency times the locking rangedivided by the power consumption.


Fig. 6.14 Measurement of refractive index and absorption of a sample at THz for the purpose ofchannel modeling [22] ( c© IEEE 2007)

atmospheric attenuation. A link budget analysis at this band reveals the need forhighly directive antennas, with gains on the order of 30 dBi [21].7

The preferred mode of communication at terahertz is the directive, line of sight(DLOS) communication. However, if the DLOS is blocked by an object, directive,non-line of sight (DNLOS) might be exploited to close the communication link [21].The idea behind DNLOS is to have “mirrors” that can properly reflect and redirectthe blocked DLOS [21].

Due to the tight link budgets, precise modeling of the communication channelis a key to the successful design of ultra-high data rate systems. Such accuratechannel modeling requires characterization and modeling of the scattering profileof different materials in indoor and outdoor scenarios. A channel modeling researcheffort based on the three-dimensional ray-tracing for the terahertz wireless can befound in [22]. Figure 6.14 shows an example of the measured scattering parametersin [22].

Based on the channel models and the link budget analysis, achievable data ratesfor a 350 GHz communication link have been simulated in [21]. Figure 6.15 showstwo of such simulations for the line of sight and non-line of sight scenarios. Basedon these simulations, data rates as high as 10 Gbps seems reasonably achievable.

7Considering that free space path loss at 300 GHz for one meter is about 80 dB, which is roughly20 dB higher than the path loss for an average WLAN communication system working at 3 GHz,and the lower power level of sources at higher frequencies, the need for the high-gain antennasmakes sense.


Fig. 6.15 Simulated achievable data rates for a 350 GHz wireless link indoors (a) through lineof sight (b) through multiple scattering rays. Unit for data-rate numbers is Gbps [21] ( c©IEEE 2008)

From the hardware standpoint, one of the most challenging components in aterahertz communication system is the modulated source. We will return to theproblem of Terahertz sources in the next chapter.

A wireless radio operating at 300 GHz is reported in [23]. Although this radiooperates at a rather low data rate of around 100 Mbps, it proves the feasibility ofclosing a wireless link at 300 GHz.

For the future, ultra-high speed, wireless, data communication systems, utilizingthe diversity is a necessity. Diversity which can be in time, frequency, or space, helpsovercome severe channel conditions and increases the throughput of the system [24].In particular, spatial diversity is more attractive at higher frequencies due to theshort wavelengths and small antenna dimensions. In addition to the conventionalbeamforming, spatial multiplexing schemes can also be used [24]. In the spatialmultiplexing, several independent data streams are transmitted through the channel.Spatial multiplexing has been mostly exploited by the wireless communication


Fig. 6.16 NFDAM-based communication system. Antenna pattern changes by means of switch-able reflectors in the vicinity of the main radiator. Received data is a function of direction [26]( c© IEEE 2009)

systems working at a few gigahertzes. However, examples of mm-wave wirelesscommunication systems utilizing the spatial multiplexing has been shown in [25].

6.3.2 Direct Antenna Modulation Systems

The miniature wavelengths at 100 GHz and above make it possible to have multiple,on-chip, radiating elements. Moreover, adding the active switching devices tothese radiating elements makes it possible to merge the electromagnetic boundaryconditions with data transmission in a variety of ways [26]. One possible schemefor mixing the data transmission and the electromagnetic boundary conditions isthrough the “near-field direct antenna modulation” (NFDAM) [27].

Unlike the conventional, baseband-modulation systems in which modulationsymbols sent by a transmitter are the same at all spatial directions, NFDAM makesit feasible to have direction-dependent data streams. As a result, higher securitycan be achieved. The idea in the NFDAM is that the binary data bits modulatethe phase and amplitude of the antenna patterns. As a result, receivers located atdifferent directions in the space will receive different modulation data from thesame transmitter. Antenna patterns can be changed by altering the electromagneticboundary conditions of the antenna through a few reflectors in the vicinity of themain radiator. These reflectors are controlled by an array of switches driven by thebinary bits. Figure 6.16 shows a conceptual NFDAM system.

Due to the strong dependence of the received data on the spatial direction,NFDAM systems have a very narrow “information beam-width”. Information beam-width is defined as the range of angles at which the bit error rate (BER) of the systemremains within a specific range. Figure 6.17 shows the BER of a NFDAM-basedsystem as a function of the angular position [26].


Fig. 6.17 Information beam-width of a NFDAM – based communication system [26]. System’sbit error rate drops sharply as a function of deviation angle from the intended direction ( c© IEEE2009)

Fig. 6.18 A sample block diagram of a NFDAM system. Main radiator antenna is a dipole andbaseband data controls the reflectors by means of switches. Baseband coarse control signals A andB are optional [26] ( c© IEEE 2009)

Another interesting property of the NFDAM systems from the circuit’s stand-point is their relaxed bandwidth requirements for the power amplifier. Because aconstant-envelop, locked carrier signal goes through the power amplifier, a highlyefficient and narrowband power amplifier can be used, regardless of the system’sbandwidth. This point can be better understood by looking at the system blockdiagram of an NFDAM system in Fig. 6.18 [26].

NFDAM systems can also be used in a phased array configuration. While thelow information beam-width of the NFDAM systems provides higher security,the reduced antenna beam-width of the phased array will lead to higher powerefficiency. This concept is shown in Fig. 6.19.

Fully integrated NFDAM systems have been demonstrated in [27] at the 60 GHz.A similar concept is reported at 90 GHz in [28].


Fig. 6.19 Left: single NFDAM system right: NFDAM systems in a phased array configuration[26] ( c© IEEE 2009)

6.4 Chapter Summary and Conclusion

In this chapter we reviewed cases of ultra-high speed CMOS devices, circuitsand systems. As we discussed in Sect. 6.1, CMOS technology is about to undergochanges in order to accommodate the RF circuits working at the terahertz band, andthe VLSI digital circuits. In particular, one major impediment to the performanceof the super-scaled CMOS is the poor transport of silicon. This problem can bemitigated by introducing self-aligned processes that use high-mobility compoundsor nano-engineered materials in their channels.

At circuit level, the shift of paradigm from the traditional electronic worldto the new era in which chip dimensions are comparable to (or even biggerthan) the wavelength was introduced in Sect. 6.2. As we saw in Sect. 6.2, thereis no systematic design flow for the terahertz CMOS circuit design. Differentdesigners have their own methods. One keystone to the design process is theiterative electromagnetic modeling of the passive components and the active deviceparasitic extraction. We also saw that testing the integrated circuits at terahertzfrequencies imposes unique challenges due to the lack of standard equipmentat theses frequencies. We saw how testing can be done at these frequencies byintroducing on-chip antennas, on-chip down-conversion of the signals or throughother innovative methods.

At the system level, we reviewed two research efforts. One is for the futureultra-high speed, wireless data communications and the other is the near-filed directantenna modulation.

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Chapter 7Imaging Applications

Sam Gharavi and Frank ChangElectrical Engineering department, University of California,Los Angeles (UCLA), Los Angeles, CA, USAe-mail: [email protected]

Mohammed H. GharaviTehran University of Medical Sciences, Tehran, Iran

Applications of the CMOS technology above 100 GHz are much less recognizedthan its applications below 100 GHz. Envisioned applications for the CMOS above100 GHz can be divided into two main groups: (1) the imaging applications and(2) non-imaging applications. Imaging applications range from the medical imagingto remote sensing to security and concealed weapon detection. Non-imagingapplications include (but are not limited to) very fast wireless or chip-to-chipcommunications and industrial sensors.

This chapter is devoted to the imaging applications. The chapter starts bydiscussing the basics of imaging physics. After the general imaging introduction,we will review the medical imaging. Finally, at the end of this chapter, a fewemerging imaging applications at the terahertz frequency band is outlined.

7.1 Photons Interaction with Matter

Although the term “imaging” has a much broader meaning, what we mean byimaging in this chapter is only limited to the sensing of the energy wavesemitted by an object in order to extract information about the object’s physicalstructure and/or compounding materials. Most often, the mentioned energy wavesare electromagnetic waves. Electromagnetic waves interact with objects at photonlevel.

Interaction of a photon with a material is a random event with different possibleoutcomes. Photon may just pass through the material or it may hit a non-uniformity(e.g. an atomic particle or cells in tissues or surface roughness) when it travels inthe material. When a photon hits an atomic particle it injects energy to the atom.In other terms, the photon “excites” the atom. The electron cloud of the excited atomtypically radiates back the photon’s extra energy through the emission of a secondphoton at a different direction (and possibly with a different wavelength) comparedto the primary photon. This type of interaction which involves the deviation of the


81

82 7 Imaging Applications

Fig. 7.1 Scattering of aphoton due to collision withan atom. The secondaryphoton is deviated and mighthave a different wavelength,compared to the primaryphoton

λ1 λ2Ε

θ

primary photon from a straight trajectory is called “scattering”.1 Figure 7.1 shows aconceptual photon scattered after colliding with an atom [1].

Another possible outcome of the interaction of a photon with a martial is calledthe “absorption”. Absorption happens when the photon energy is transformed toheat or to other types of energy and hence the atom doesn’t radiate any secondaryphoton.

7.2 Active and Passive Imaging

In the context of imaging, electromagnetic waves that are emitted from an objectcan either originate from the natural emissions of the object or can be in responseto an energy wave sent from the imager. Imagers are classified as either passive oractive based on this difference. Active imagers transmit their own electromagneticenergy toward the objects in a scene and sense the waves after they interact with theobjects.2 Passive imagers on the other hand, rely on the electromagnetic energy thatis naturally emitted from the objects. This natural radiation is sometimes called the“blackbody radiation” and is a function of the object’s temperature and the materialsthat object is made of.

Due to the low power-level of the natural radiations, passive imaging is generallymore prone to noise and therefore requires receivers with higher sensitivity.Compared to active counterparts, passive imagers can operate with lower powerconsumption because they do not have transmitters. Passive imagers are alsocompletely harmless to the object or tissue that is imaged. Active imagers requirea computationally-expensive post-processing step called the “inverse scattering”in order to form an image. This is while passive imagers usually do not requirethe inverse scattering and are hence less computationally expensive. Active imagerstypically can reproduce the image of a scene regardless of the illuminationconditions while passive imagers are more prone to the environmental variationssuch as natural and artificial illuminations of the environment [2].

1Several different scattering mechanisms such as Rayleigh scattering and Thompson scatteringhave been defined in Physics. As an introductory text on imaging, we choose to treat all thesescattering types similarly in this chapter.2Most imagers sense the waves that are scattered back from the object but some imaging systemssuch as X-ray measure the waves that pass through the objects.

7.3 Optical Versus Non-optical Imaging 83

7.3 Optical Versus Non-optical Imaging

When we think of imaging optical imaging is the first thing that comes to mind.Optical imaging uses electromagnetic energy in the infrared, visible and sometimesultraviolet range. If the electromagnetic waves used for in the imaging don’t lie inthe mentioned range, imaging can be called “non-optical”. Examples of non-opticalimaging are X-ray, mm-wave and terahertz imaging. Figure 7.2 shows examples ofimages taken at the mm-wave spectrum [2].

7.3.1 Responsivity

In the context of imaging, a detector is a transducer that converts the optical energyto the electrical energy. Responsivity is the conversion gain of the detector and isusually expressed as Ampere/Watts or Volts/Watts. Responsivity is a function of thephoton’s wavelength, λ , and the quantum efficiency3 of the detector, η , and can beexpressed as:

R = qηhcλ

(7.1)

In (7.1), R is the detector’s responsivity with the unit of Ampere/Watts, q is thecharge of an electron and h is the Plank’s constant. As a numerical example,a 300 GHz imager with 50% quantum efficiency has responsivity equal to402.8 Ampere/Watts.

Fig. 7.2 Passive millimeter wave imaging examples. Left: optical image of a man hiding aweapon. Right: passive mm-wave image of the same person [2] ( c© IEEE 2003)

3Quantum efficiency is defined as the average number of electron-hole pairs that are released, pereach photon that is collected by the detector.


7.4 Attenuation

We previously mentioned that the photon interaction with material is a randomprocess. The statistical distribution of the possible interactions of a photon witha host material depends on the photon’s wavelength and the atomic structure ofthe host material. For example, the probability that a photon scatters at some pointduring its travel in a host material is a function of the photon’s wavelength, theatomic structure of the host material and the thickness of the host martial slab. As aninsightful and general rule, the higher the atomic number of the host material andthe thicker the slab of the material the higher the likelihood of scattering [1].

One commonly used notion in all physical sciences is the notion of “attenuation”.In the context of matter and photon interaction, attenuation is the process ofelimination of photons from a beam of photons as the beam travels in a hostmaterial. Both absorption and scattering of the photons contribute to the attenuation.Depending on the photon energy4 level, either absorption or scattering can bethe dominant attenuating mechanism. Attenuation is usually expressed per unitof host material thickness. As an example, Fig. 7.3 shows the attenuation of theelectromagnetic waves as they pass through one kilometer of the atmosphericmaterial [2].

Fig. 7.3 Attenuation of electromagnetic beam caused by travelling 1km in atmosphere at differentwavelengths and for different weather conditions [2] ( c© IEEE 2003)

4Photon energy and wavelength are related through Planck’s equation.

7.5 Image Quality Metrics 85

By looking closely at Fig. 7.3, we can recognize “propagation windows” at whichthe atmospheric attenuation exhibits a local minimum. Some of these windows arecentered at λ = 8.5,3.2,2.1and1.3mm, corresponding to the frequencies of 35, 94,140, and 220 GHz, respectively. These propagation windows are suitable for long-distance wireless communications, imaging or radar.

7.5 Image Quality Metrics

Image quality is a broad concept that applies to all types of images from medicalimages to photographs to radar images. Quality therefore depends on the ultimatepurpose of an image. For example, in the medical imaging, the more accurately animage can help diagnose an abnormality the higher its quality. Humans are veryvisual creatures and they can quickly assess the quality of an image by just lookingat it. However, in order to quantify the image quality, we need to understand themetrics commonly used to measure the image quality. We also need to know howdifferent physical parameters affect each image quality metric. The metrics used todescribe the image quality are rather universal. The intended function of the imagedetermines which parameter is more important. For example, to diagnose a verysmall tumor in a tissue, image needs to have a high “spatial resolution”. However, todistinguish two big masses made of very similar materials the image needs to exhibita high contrast between the two materials. These concepts are briefly described here.

7.5.1 Spatial Resolution

Spatial resolution (or simply resolution) is a measure of the imaging system’sability to distinguish between two separate small objects as they get smaller andcloser together.5 Spatial resolution is tightly connected to the “point spread function(PSF)” of the imaging system. If we consider an imaging system as a linear andtime-invariant system whose input is the physical object and whose output is theimage of the object, then the PSF is the impulse response of the system. To have abetter understanding of the PSF, consider a very narrow wire as the object (input).Because this object (input) closely resembles an impulse, the image (output) ofit closely resembles the imaging system’s PSF. It is needless to say that an idealimaging system is the one whose PSF is just a point. Such a system can replicate anobject perfectly. An imaging system can have “isotropic” or “non-isotropic” PSF.Isotropic PSF is rotationally symmetric while non-isotropic PSF is not. Figure 7.4shows the point stimulus and an isotropic and a non-isotropic PSF [1].

5Although it is more appropriate to assign resolution to the imaging system, sometimes resolutionis assigned to the image.


Fig. 7.4 Point spread function (a) A point stimulus (b) Isotropic PSF (c) Anisotropic PSF [1]

Fig. 7.5 Three differentspatial resolutions defined fora 3-D imager

Resolution can be defined as the full-width-at-half-maximum (FWHM) of thePSF. For three-dimensional imagers, it is common to define three different reso-lutions called “axial”, “lateral “and “elevational”. The axial resolution is definedalong the propagation direction of the beam in the far-field and is perpendicularto the two-dimensional image plane. The lateral and elevational resolutions aresometimes referred to as “in-plane” resolutions. Figure 7.5 shows the three spatialresolutions for a general three-dimensional imager.

In pulse-based active imagers, the axial resolution is a function of the pulse-width. As the pulse bandwidth increases, pulse-width decreases and the axialresolution becomes higher. To understand this concept, envision two identical smallobjects separated by a small axial distance. The received pulses, after scatteringback from these two objects are identical in shape and only delayed relative toeach other. The amount of delay is proportional to the axial separation of the twoobjects6. As the transmitted pulses get narrower in time, the overlap between thereceived pulses decreases and the imager’s ability to separate the two identicalobjects increases. This concept is depicted in Fig. 7.6. In [3], a fully integrated pulse-based imager transmitter with pulse widths as low as 35ps is reported.

Roughly speaking, in-plane resolutions of most imaging systems are fundamen-tally limited to their operation wavelengths. This physical limitation is imposed

6To be more precise, the amount of delay is given by τ = dc , where d is the axial separation of two

objects and c is the speed of waves in the medium.

7.5 Image Quality Metrics 87

Fig. 7.6 Effect of pulse-width on the axial resolution of pulse-based imagers. (Top) The imagercan distinguish the scattered waves from two close objects and (bottom) the imager cannot fullydistinguish between the two close objects

by the “diffraction limit”7 law [5]. For example, if an imaging system operates at220 GHz, its in-plane resolution limit is approximately on the order of a millimeter,which is the wavelength of light at 220 GHz. Since wavelength is inversely pro-portional to frequency, typically imagers with higher operation frequencies exhibithigher spatial resolutions. Another factor that affects the in-plane image resolutionis the size of effective aperture or antenna used for the detection. The higher theaperture size, the higher the in-plane resolution [5]. Most imagers include an arrayof pixels. If the antenna pattern of a group of pixels is directed toward the samedirection, their aperture sizes add and as a result, higher resolution in the focusdirection can be achieved.

7Many techniques such as near-filed imaging or super-lenses have been proposed [4] to overcomethe diffraction limit. However, this doesn’t change our general discussion.


7.5.2 Contrast

Contrast is the difference between the image intensities at two close regions8. Highercontrast images are better in distinguishing different objects. Our eyes are sensitiveto the contrast. We usually describe low-contrast images as “washed-out”. Figure 7.6shows the effect of contrast on the appearance of an image.

Contrast of an imaging system is highly dependent on the underlying physicsof the imaging. In every imaging system, one physical parameter is mapped to thesignal intensity level. For example, magnetic resonance imaging (MRI) is known forhaving a high soft-tissue contrast compared to the X-ray imaging [1]. We will seelater that the X-ray imaging maps the attenuation of different tissues to the imageintensity. MRI on the other hand, maps the magnetic spin density9 to the imageintensity. Since different soft tissues exhibit very close attenuations at the X-rayfrequencies, the X-ray imaging cannot provide a very high contrast between two softtissues. On the other hand, soft tissues typically can have very different magneticresonance parameters leading to a high contrast in the MR imaging.

7.5.3 Penetration Depth

Penetration depth of an electromagnetic wave in a material is a function of thehost material’s attenuation at the photon’s wavelength. Depending on the imagingapplication and frequency of operation, penetration depth of the electromagneticwaves in the materials may need to be taken into account. As an example, X-rayscan penetrate a much deeper distance in the biological tissues when compared to thevisible range light waves [1]. This is why the X-ray medical imaging systems canare used to image the internal body organs while optical imagers cannot be used forsuch purpose.

7.6 Passive Imaging Basics

Passive imagers typically consist of a radiometer (radiation detector) and theirimage contrast is based on the difference between the “emissivity”, ε, of differentobjects. Emissivity is a measure of the amount of energy an object emits from itssurface and is a unit-less number between 0 and 1. A perfect radiator or “blackbody”exhibits an emissivity equal to one. A perfect reflector such as a metal exhibits

8More formally, the contrast can be defined as I(x2,y2)−I(x1,y1)I(x1,y1) where I(x1,y1) and I(x2,y2) are the

image intensities at two different regions.9There are many other contrast sources available in MRI. Spin density is the most basic and theeasiest to understand.

7.6 Passive Imaging Basics 89

Table 7.1 Effective emissivity of some objects at different imagingfrequencies [2] ( c© IEEE)

SurfaceEmissivityat 44 GHz

Emissivityat 94 GHz

Emissivityat 140 GHz

Bare metal 0.01 0.04 0.06Dry asphalt 0.89 0.91 0.94Dry concrete 0.86 0.91 0.95Smooth water 0.47 0.59 0.66Rough dirt 1.00 1.00 1.00

emssivities close to zero. The amount of emissions from an object at the thermalequilibrium state, is a function of the product of is emissivity, ε, and its absolutetemperature, T0, and is called “surface brightness temperature”, TS, and is given by

TS = εTo (7.2)

Typical numerical values of the emissivity of a few materials at the imagingfrequencies are shown in Table 7.1 [2].

In addition to the intrinsic emissivity of the objects in a scene, the way the sceneis illuminated plays a significant role in the passive imaging. For example, a perfectmetal has emissivity of zero but can act as a mirror and send the emissions fromother objects toward the imager. To capture this effect, the product of the object’sreflectivity, ρ , and the radiometric temperature of the illuminations sources, Tilumm,should be added to the surface brightness temperature in (7.2). The result is calledthe “effective surface brightness”, TSeff, which is given by [2]:

TSeff = εTo +ρTillum (7.3)

As suggested by Table 7.1, the amount of inherent emissions from an object dependson the frequency too. As a result, an “emission spectrum” can be defined for anyobject. A typical emission spectrum is shown in Fig. 7.7 [2]. Almost all objects emitmuch more power in the infrared range compared to the mm-wave and terahertzrange. However, infrared detectors usually exhibit very poor noise characteristicscompared to the terahertz and mm-wave detectors [2]. The lower noise of the mm-wave and terahertz detectors makes their overall performance comparable with (oreven better than) the infrared imagers despite the lower available emitted power.Also mm-wave and THz imagers are less sensitive to the weather conditionscompared to the visible or infrared imagers [2]. As can be seen in Fig. 7.7, infra-red radiations are almost completely blocked by the fog.


Fig. 7.7 Three images of one scene with different contrasts. Image on the right has the most andimage on the left has the least contrast

7.7 Imaging Arrays

Imagers are typically formed by several pixels (i.e. detectors and receivers) in anarray configuration. The signals picked up by these pixels are then combined toform an image. Imaging arrays can be divided into two main classes: (a) the “focalplane arrays” (b) the “scanning arrays”.

In focal plan arrays, a two-dimensional (2-D) array of detectors is located atthe focal plane of a lens and the desired field-of-view is imaged in a single shot.Different detectors capture different parts of the field of view in a focal plan array.Focal plane imaging arrays are more common in the infrared frequency band.However, they can be applied to other frequency bands. In chapter 1, an exampleof a focal plane imaging array working at 600 GHz was presented.

In the scanning arrays, image of the field of view is taken line by line. The mainbeam of the antenna array is steered either mechanically or electronically. Scanningarrays typically need fewer number of pixels compared to the focal plane arrays.This benefit is at the expense of having a higher image acquisition delay.

Similar to the radio receivers, imagers can also benefit from the multiple-antennatechniques. Examples of such multiple antenna techniques are the beamforming andthe spatial multiplexing. Depending on the communication channel, link budgetand the data throughput, using one of these multiple-antenna techniques is moreadvantageous. For example, when the channel has a strong and dominant line-of-sight mode, beamforming works the best. Whereas, for the highly scatteringchannels with weak line-of-sight modes, the spatial multiplexing works better.In the beamforming receiver arrays, the signals received by the different pixelsare assumed to be the delayed replicas of each other. This assumption is onlyaccurate for the channels with low to moderate multiple scattering. When there

7.8 Medical Imaging 91

is sever multiple scattering, the signals received from different pixels become highlyuncorrelated.

Beamforming arrays can improve the signal to noise ratio (SNR). One intuitiveexplanation to such SNR improvement is that the signals received by different pixelsare highly correlated, while the noises are uncorrelated. The SNR of the combinedsignals is therefore higher than the individual signals. As mentioned earlier, arraysalso increase the in-plane spatial resolution of the imager by increasing the effectiveantenna aperture.

7.8 Medical Imaging

As mentioned previously, optical imaging of the biological samples is limited toshallow tissues due to the very high attenuation of waves in the biological tissues atthe optical frequency range. The electromagnetic spectrum outside the visible rangeis widely used for deeper medical imaging. Examples are in the X-rays (includingmammography and computed tomography), magnetic resonance imaging (MRI),and nuclear medicine. This section is designed to give a reader with no medicalimaging background, a very brief review of the X-ray, MRI, and nuclear imaging.The recently emerged medical imaging at the mm-wave and terahertz frequencieswill then be discussed in Sect. 7.10.

Different imaging modalities have different strengths and weaknesses. For ex-ample, there is a well-known, universal tradeoff between the penetration depth andthe resolution of different imaging modalities. Figure 7.8 shows this tradeoff for anumber of imaging modalities. In this figure, the resolution and penetration depthof the following medical imaging modalities have been shown: (1) non-opticalmodalities including MRI, CT and ultrasound (2) optical modalities including:optical coherence tomography (OCT), and confocal microscopy.

7.8.1 X-ray Imaging

As described before, a photon beam experiences some attenuation as it travelsthrough a piece of material. The amount of attenuation is mainly a function ofthree parameters: (1) the wavelength of the photon (2) the atomic structure of thematerial (3) the thickness of the material [1]. For a given material, a parameter calledthe “mass attenuation coefficient”, μ , is defined at every photon wavelength.10

The attenuation, A, of a photon beam due to travelling in a piece of material withmass attenuation coefficient μ is given by

A = eμx, (7.4)

in which x is the travel distance.

10It is common to define mass attenuation coefficient of materials at different photon energy levels.Photon energy level, E, and wavelength, λ , are connected though E = hc

λ where h is Planck constantand c is the speed of light.


Fig. 7.8 Typical emissivity spectrum of ground and space objects [2] ( c© IEEE 2003)

Table 7.2 Mass attenuationcoefficient of a few materialsat the 50-keV photon [1]

Material μ @ 50 Kev (cm−1)

Hydrogen 0.00028Fat 0.193Water 0.214Compact bone 0.573

Table 7.2 shows the mass attenuation coefficients of some materials at a typicalX-ray photon energy level of 50 KeV [1].

X-ray imagers have a transmitter (called the X-ray tube) which emits an X-raybeam toward the objects. The beam then travels through the objects and exits fromthe other side. The attenuation of the photon beam compared the original photonbeam is measured at the other side of the object by means of an X-ray detector [1].X-ray imaging is therefore an active imaging system according to our classificationin Sect. 7.2.

The diffraction limit law predicts a maximum resolution on the nanometer rangefor the X-ray systems. Practical medical X-ray systems however, cannot achieveresolutions better than a few hundred microns. This means that the X-ray medicalimaging systems are not diffraction-limited.

One major restriction to using the X-ray for in vivo imaging is the “ionizing”nature of the X-rays. In simple terms, this means that the X-ray photons have enoughenergy to detach the electrons from their host atoms and consequently ionize theatoms. Excessive exposure to ionization radiation increases the chances of cancerand other chronic diseases [1]. In the United States there are strict legal regulationsthat limit the total amount of X-ray dose, a human can be exposed to.

Figure 7.9 shows an X-ray image of a human body. As described before, theattenuation is mapped to the gray-scale image intensity. Lighter areas in the


Fig. 7.9 Tradeoff between resolution and penetration depth for several imaging modalities: (1)MRI (2) CT (3) ultrasound (4) conventional OCT, (5) ultra-high resolution OCT 6) confocalmicroscopy

image correspond to more attenuation. For example, bones exhibit relatively highattenuation at X-ray (refer to Table 7.2), therefore they appear relatively lighter inthe image.

A single X-ray image provides one projection of the object through a singleline. Computed Tomography (CT) is an extension to this single projection andcan be thought as the 3-D version of the X-ray. The mathematics of CT was firstintroduced by Radon in 1917. Radon proved that a complete image of an unknownobject can be reproduced if one had infinite number of projections through theobject. This theorem is the main idea behind “tomographic11 imaging”. Computedtomography starts with of a series of X-ray projections of the object taken fromdifferent angles. After these projections are taken, the image of the unknown objectis reconstructed through an algorithm called the “backprojection” [1]. Figure 7.10shows a CT image of a human head.

For in-depth understanding of X-ray and CT imaging reader is referred to [1]

7.8.2 Magnetic Resonance Imaging

Magnetic Resonance (MR) imaging is a powerful and noninvasive imaging modalitywith no ionizing hazard. The most common applications for MR imaging includesstudies of the central nervous system (CNS) and musculoskeletal (MSK) system.Besides its huge clinical significance, MR imaging is a very active field of research.

11The word tomography consists of –tomo (slice) and –graphy (image).


Fig. 7.10 X-ray image ofhuman body

New techniques and applications for the MR are introduced every day. One of theunique advantages of the MR imaging is the extreme flexibility. MR offers a widerange of physical parameters to image and many control knobs to tailor the imageto a specific application. Also MR imaging can be done in almost any desired crosssection of an object. In depth understanding of how MR imaging works requires awhole book. Nevertheless it is instructive to have a very basic understanding of theMR operation. MR imaging is based on the “nuclear magnetic resonance” (NMR)phenomenon, briefly explained in the following paragraphs.

Atoms with odd number of protons (and/or odd number of neutrons) possessmagnetic angular momentum.12 Magnetic angular momentum is also referred to as“nuclear spins” (or simply spins). In the biological samples, hydrogen atom is themost abundant and by far the most frequently used atom spin for MR. The MRimaging is based on the interaction of spins with external applied magnetic fields.There are three different magnetic fields involved in the MR imaging: (1) a huge,constant magnetic field, B0, produced by a magnet in the MR scanner (2) a radio-frequency (RF) magnetic field, B1, produced by the RF coils (3) the linear gradientfields, G, produced by the gradient coils. We will explain the interactions of thesethree fields with the spins in the following paragraphs.

12One intuitive description of angular magnetic moment is a charge which is spinning.


In the absence of an external magnetic field, the spins of most atoms are dispersedrandomly and hence their net macroscopic magnetic moment is zero. When anexternal magnetic field, B0, is applied, two interesting phenomena occur: (1) thespins lean to align themselves to the external magnetic field and produce a netmagnetization (2) the spins exhibit a so-called “resonance”13 by rotating aroundthe axis of the main field at an angular frequency called the “Larmor frequency”.This angular frequency, ω , is proportional to the applied magnetic field and is givenby the following equation:

ω = γB0 (7.5)

In (7.5), γ is the “gyromagnetic ratio” of the atom. A classical, numerical exampleis for the hydrogen atoms in an external magnetic field with the strength of 1Tesla.In this case the angular frequency of the spins is roughly 42.6 MHz. We can concludethat the gyromagnetic ratio of hydrogen is around 42.6 MHz/T.

If the frequency of a RF, magnetic field, B1, is tuned to the Larmor frequencyof the spins, it can “excite” the spins “on-resonance”. One intuitive explanationis that B1 acts similar to a torque that rotates the spins by a an angel determinedby the strength and duration of B1. After the RF pulse is turned off, spins have atendency to go back to their equilibrium state (i.e. rotating around the main field atthe Larmor frequency). Before the spins completely return to their equilibrium, theyinduce an electromotive force (EMF) by the Faraday’s induction law in a receivingcoil that records the MR signal. The generated signal is called the “free inductiondecay” (FID).

MR imaging includes recording of an array of FID signals and then reconstruct-ing the image based on a mapping between the recorded FID signals and the spinsof the object under study. An object can be thought as a collection of thousandsof tiny oscillators inducing RF signals. The purpose of the MR imaging is then toestablish a mapping between the FID signals and the spatial distribution of the tinyoscillators [6].

A very central part of the MR imaging is the “spatial localization”. The FIDsignals received at the receiving coils are the net superposition of many tinyoscillators in the excited region. In order to construct an image, it is important todetermine the contribution of different parts of the region in the overall recordedFID signal. In the MR imaging, the spatial localization is achieved by applying thelinear gradient fields in addition to the main field. To get an intuitive idea of how thisworks, consider the following example. Imagine the main magnetic field is appliedin the z direction in the x-y-z Cartesian space. If a small linear x-gradient field Gx isapplied in addition to the main field, the total magnetic fields of different points inthe space become slightly different depending on their position as given by:

B(x,y,z) = z∧[B0 + xGx] (7.6)

13This is why this imaging modality is called magnetic resonance.


As a result, the angular frequency of spins at different locations becomes a functionof the spin position as given by:

ω(x,y,x) = γ(B0 + xGx) (7.7)

Different spins therefore contribute to the overall FID at different frequencies andare separable by means of a Fourier decomposition of the FID signal. In other terms,there is a linear mapping between the frequency components of the FID and theposition of the source spin.

The diffraction limit law predicts a maximum resolution on the order of a fewtens of centimeters for MR imaging. MR imaging however, can achieve spatialresolutions on the order of a few millimeters! This apparent contradiction can beexplained through the spatial localization. The RF field consists of a superpositionof many closely- spaced tiny sources. Despite the coarse wavelength of the RF wave,location of these tiny sources can be resolved because their spatial positions areencoded by their frequencies. This is while in the derivations of the diffraction limitlaw, no spatial localization is assumed.

A MR image of a human brain is shown in Fig. 7.11. It is useful to compareFigs. 7.10 and 7.11. Unlike CT, MR can differentiate between the fine soft tissuestructures of the brain. This soft tissue contrast is a huge advantage for the MRimaging. One of the main disadvantages of MR imaging is the relatively longacquisition time.

We only touched upon some basic concepts in the MR imaging in this section.Interested readers are encouraged to refer to [1] and [6] for more information.

Recently, there has been an interest in scaling down the physical dimensionsof the MR imaging systems for point-of-care diagnosis. Such scaling imposesseveral challenges to the design of the MR imaging hardware. In particular scalingthe magnet and the associated electronic transceiver is challenging. The mainchallenge with smaller magnets is that their magnetic field is not uniform. As aresult, the spatial localization that ideally should be a linear mapping betweenthe resonance frequency of dipoles and their spatial locations becomes a non-linear, coordinate-dependent mapping. This problem can be overcome by usingsophisticated electronic transceivers and robust communication schemes. In [7] thecapabilities of integrated circuits are exploited to demonstrate a CMOS transceiverdesigned for a small MR system. The block diagram of the system is depicted inFig. 7.12.

The scanner designed in [7] is based on the “Spectral Scanning MRI” (SSMRI)method. SSMRI method is capable of working in inhomogeneous magnetic fields.Readers are referred to [7] for more details.


Fig. 7.11 Head CT image

Fig. 7.12 MR image of a human brain


Fig. 7.13 Scaled down Spectral Scanning MRI (SSMRI) transceiver in [7] ( c© IEEE 2009)

7.8.3 Nuclear Imaging

Nuclear imaging belongs to the category of “functional imaging”. Functionalimaging provides information about the physiological state of the body organs inaddition to anatomical information. A radioactive isotope is given to the patient innuclear imaging. After the isotope distributes in the patient’s body, it starts emittingX-rays and gamma-rays. Then a detector senses the emissions of the isotope afterthey pass through the body.

For example, thallium tends to concentrate in the healthy heart tissues, but doesnot concentrate in infracted or ischemic areas of the heart. Thallium is thereforeused for the functional imaging of heart.

Similar to X-ray and CT, nuclear imaging can be either line projections ortomographic. The tomographic version of the nuclear imaging is called “SinglePhoton Emission Computed Tomography” (SPECT). In SPECT, a gamma cameracollects the emissions from the patient’s body at many different angles. Figure 7.13shows a myocardial stress test utilizing thallium.

7.9 Emerging New Medical Imaging Applications

New medical imaging techniques are introduced on regular basis. These newtechniques usually fall into one of the two main categories:

1. Imaging applications that combine two previously-existing modalities to takeadvantage of the strengths of both modalities. Many possible combinations canbe imagined. For example, MR and OCT are combined in [8].

7.9 Emerging New Medical Imaging Applications 99

2. Imaging applications that exploit unexplored frequency bands and novel physicalphenomena to provide cheap and portable medical imagers for both soldiers andcivilians. In battlegrounds such imagers can prove very useful for fast assessmentof the soldier’s wounds and burns. For civilians they can prove useful in theearly detection of cancer or for monitoring chronic conditions like diabetes. Oneexample in this category is the terahertz medical imaging. Today’s fast CMOSdevices are potentially suitable for implementation of some of these imagingapplications. One can exploit the unprecedented speed, low manufacturing costand high computational capabilities of the CMOS to make cheap and portableimagers in high production volumes.

Several new directions have been opened recently in the medical imaging field. Thetopic that we cover here is the sub-millimeter wave and terahertz (T-ray) imagingfor medical applications. This direction has been selected due to its extremely highpotential and feasibility of implementation in the high speed CMOS.

T-ray covers the electromagnetic spectrum from 100 GHz to around 10 THz.Medical applications of the electromagnetic waves below 100 GHz (e.g. microwave)and above 10 THz (e.g. infrared, or X-ray) have been far more investigated than inthe 100 GHz–10 THz range. Traditionally, this has been due to the lack of affordable,efficient and practical sources and detectors at terahertz frequencies.

The absence of practical, solid-state sources and detectors in the THz/mm-wavefrequency range is why this frequency band is sometimes referred to as “THz gap”[9]. This gap is surrounded by the electronic devices domain covering from DC toaround 100 GHz and the photonics device domain working above 10 THz.

Electronic devices such as transistors are limited by the transit time and parasiticRC delays. As a result, these devices have a low-pass nature and their output powerdrops as frequency increases. Currently, the highest frequency at which most ofthese devices can operate is less than a terahertz. On the other hand, conventionalphotonic devices such as bipolar laser diodes have a high-pass nature because theirminimum photon energy should be higher than a certain level (e.g. the band gap).Typical operation frequencies are higher than 10 THz. As a result, the terahertzrange is not reachable by typical electronic or photonic devices. This concept isdepicted in Fig. 7.14.

Recent advances in the solid-state technology have narrowed the terahertz gapfrom electronics end and from the photonics end. From the photonics end, theevolution of new devices such as the terahertz, quantum, cascade lasers [10] andthe terahertz metamaterials [11] have pushed the photonics domain to the terahertzrange. From the electronics side even the digital CMOS technology has started tobe operable in the terahertz range.

Along with applications in remote sensing and security monitoring, the possiblemedical applications of the terahertz waves are being explored by the researchers.Theoretically speaking, T-rays can offer unique imaging capabilities. Their penetra-tion depth in the biological tissues is much higher than that of the infrared waves andtheir spatial resolution is much finer than that of the microwaves. Also, they do nothave the undesired ionizing effects of X-rays. Some other unique characteristics of


Fig. 7.14 A nuclear functional image of the heart using Thallium. Areas of low blood flow containless diffused Thallium and appear as cold spots.

Electronics domain

Photonics domain

THz gap

Fig. 7.15 THz gap is accessible neither by electronics nor by photonics devices

the T-rays have been demonstrated in practice. For example, T-rays have shown tohave a very high sensitivity to the amount of water (H2O) in a tissue [12]. This is dueto two reasons (1) the attenuation of electromagnetic waves in H2O is very high atthe mm-wave/THz band (2) H2O has a very high dielectric constant at terahertz [12].

In the medical fields, T-rays have been investigated for dermatology applications[12] and DNA detection [13]. In dermatology, the high sensitivity of T-rays towater concentration has been exploited to measure the skin burn levels for assessingthe wounds and detecting the skin cancer [12]. Authors of [12] have reported theterahertz skin burn assessment which is depicted in Fig. 7.15. As can be seen inthis figure, the burned skin appears darker in the images due to its lower waterconcentration and hence lower reflection coefficient at terahertz. Terahertz can alsopenetrate clothing and textile. For example in the same Fig. 7.15, burned skin is stilldetectable under layers of gauze.

7.9 Emerging New Medical Imaging Applications 101

Fig. 7.16 THz used for skin imaging in [12]. Lighter areas means more reflection. (a) Normalskin. (b) Burned skin. (c) Burned skin under 5 layers of gauze. (d) Burned skin under 10 layers ofgauze ( c© OSA 2008)

In the DNA detection, T-rays have been used as a means of label-free probing ofthe binding state of the DNA [13].

Advances in the THz sources and detectors contributed to making the tera-hertz frequency band reachable. There are two main groups of terahertz sources:(1) electronics-based sources (2) photonics-based sources. Currently the electronics-based terahertz sources are mostly the traditional MMICs based on backward waveoscillators, Gunn diodes and super lattice devices. The electronic sources cover onlythe lower range of the mm-wave/ THz frequencies from 100 GHz to 0.5 THz andtheir output power is relatively limited. Photonics devices cover the upper end of theterahertz range from 1 THz to 10 THz. Figure 7.16 depicts the output power level oftypical solid-state electronic and photonic devices as a function of frequency [15].

Owing to the non-stopping scaling of the CMOS technology, the silicon-basedterahertz sources have become a reality. Unfortunately however, none of the tera-hertz signal-sources which have been demonstrated in the CMOS technology hasenough output power-level for the medical applications yet. At the time of writing


Fig. 7.17 Photonics and electronics sources at THz [14] ( c© IEEE 2008)

this manuscript, a 300 GHz CMOS with power generator/radiator with EIRP14 =−1dBm has the highest achieved radiated power by CMOS at the terahertz band[16]. Currently, photonics-based terahertz sources such as the terahertz, quantumcascade laser (QCL) are still dominant in the medical applications due to their higherpower levels. QCL working at terahertz needs to be cooled down to temperaturesmuch less than the room temperature. This cooling requirement is the majordisadvantage of QCL.

There are many technical issues that should be addressed in order for medicalTHz technology to make the transition from the academia to the industry. Two ofthese technical issues are the low resolution and the low acquisition speed of theterahertz imaging as described below [9].

If conventional imaging techniques are used, the diffraction limit for the mm-wave/THz is roughly on the order of 3μm to 3 mm. Such resolution may not beadequate for some applications. A remedy to this issue is using the techniquesthat can reach beyond the diffraction limit. For example, the near-field imagingand metamaterials super lenses [17] can be used. One problem with the near-filedimaging is that it limits the imager-to-object-distance to less than a wavelength(3μm to 3 mm in this case). Such small distances can be restrictive especially for invivo imaging.

THz sources are currently expensive. This usually means only one source isavailable and should be scanned mechanically to image the whole field of view.As a result, the scanning times are usually very long. This problem can be mitigatedif more affordable solid-state sources are in an array configuration with electronicbeamsteering.

14EIRP stands for Effective Isotropic Radiated Power, captures both the output power anddirectivity of the antenna.

References 103

Before finishing this chapter, it is worthwhile to refer to the interesting researchon the CMOS–compatible photonic devices [18]. Silicon has interesting opticalproperties, which make it suitable as a host medium for building devices that canguide, route, direct and manipulate the light. On the other hand, due to the hugecommercial momentum of the CMOS technology, CMOS-compatibility is a greatadvantage for new device technologies. CMOS-compatible photonics integration isan effort to fabricate the photonics components and CMOS circuits on the samedie. CMOS-compatible photonic devices are more compact and exhibit higherperformance. Also, CMOS-compatible integration reduces the fabrication cost forhigh-volume production. An interesting example of photonic integrated devicesworking in the terahertz regime can be found in [19].

7.10 Chapter Summary and Conclusions

Imaging is a promising application for the ultra-high speed CMOS technology. Dueto the interdisciplinary nature of the imaging, it is instructive for to have a basicunderstating of the imaging terminology and concepts. This chapter was writtenwith this goal in mind. Sections 7.1–7.9 were designed to provide a reader with abasic understanding of the imaging physics. Section 7.10 introduced the terahertzmedical imaging, as a new topic which has recently been opened in the medicalimaging field. As we saw in Sect. 7.10, due to the inaccessibility of the terahertzband by the electronics or photonics devices, this frequency band used to be a gap.Recent advances in the electronic and photonic devices have made this band to bereachable. As we saw in Sect. 7.10, terahertz band offers unique features for medicalimaging. As an example, the sensitivity of THz electromagnetic waves to the waterconcentration in a tissue offers an opportunity for dermatology and cancer detectionapplications [20].

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4(3):39–503. Arbabian A, Afshar B, Chien J-C, Kang S, Callender S, Adabi E, Dal Toso S, Pilard R, Gloria

D, Niknejad AM (2010) “A 90 GHz-Carrier 30 GHz-Bandwidth Hybrid Switching Transmitterwith Integrated Antenna,” IEEE International Solid-State Circuits Conference (ISSCC).

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ISBN 05216392126. Nishimura DG (2010) Principles of magnetic resonance imaging7. Hassibi A, Babakhani A, Hajimiri A (2009) A spectral-scanning nuclear magnetic res-

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8. Gulsen G, Birgul O, Unlu M, Shafiiha R, Nalcioglu O (2006) Combined diffuse opticaltomography (DOT) and MRI system for cancer imaging in small animals. Technol Canc ResTreat 5(4):351–363

9. Humphreys K, Loughran JP, Gradziel M, Lanigan W, Ward T, Murphy JA, O’Sullivan C(2004) Medical applications of terahertz imaging: a review of current technology and potentialapplications in biomedical engineering, Engineering in Medicine and Biology Society, 2004.IEMBS ‘04. 26th Annual International Conference of the IEEE, vol.1, pp.1302–1305, 1–5Sept. 2004

10. Kohler R et al. (2002) Terahertz semiconductor-heterostructure laser. Nature 417:156–15911. Ferguson B, Zhang X-C (2002) Materials for terahertz science and technology. Nat

Mater 1(1):26–3312. Taylor ZD, Singh RS, Culjat MO, Suen JY, Grundfest WS, Lee H, Brown ER (2008) Reflective

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label-free genetic diagnostics. Appl Phys Lett 80:154–15614. Huang D, LaRocca TR, Chang M-CF, Samoska L, Fung A, Campbell RL, Andrews M (2008)

Terahertz CMOS frequency generator using linear superposition technique. IEEE J Solid StateCirc 43(12):2730–2738

15. Tonouchi M (2007) Cutting-edge Terahertz technology. Nat Photon 1:97–10516. Sengupta K, Hajimiri A (2011) “Distributed active radiation for THz signal generation” to

appear in the IEEE International Solid-State Circuits Conference (ISSCC)17. Zhang X, Liu Z (2008) Nat Mater 7:435 [CAS].18. Izhaky N, Morse MT, Koehl S, Cohen O, Rubin D, Barkai A, Sarid G, Cohen R, Paniccia MJ

(2006) Development of CMOS-compatible integrated silicon photonics devices. IEEE J SelTop Quant Electron 12(6):1688–1698

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Index

AAbsorption, 72, 80, 82Attenuation, 72, 82–83, 86, 89–91, 98Axial, lateral, elevational resolutions, 84

BBand gap, 61, 97Bit error rate (BER), 74, 75Blackbody radiation, 80, 86

CCapacitance, 12, 13, 19, 27, 32, 33, 39, 48,

53, 59Cascode, 5, 7, 17–20, 40, 41, 53–55CMOS, 1, 2, 4, 9, 23, 29, 32, 35–44, 50, 51,

57–76, 79, 94, 97, 99–101Common-gate, 7, 50, 51, 53, 64Common-source, 6, 7, 9, 17, 20, 24, 40, 43, 44,

47, 48, 50, 64Computed tomography, 89, 91, 96Concealed weapon detection, 79Confocal microscopy, 89, 91Constant current densities, 63Constant-envelop, 75Contrast, 83, 86, 88, 94Cross-coupled, 64, 68

DDecoupling capacitors, 64Directive, line of sight (DLOS)

communication, 72Directive, non-line of sight (DNLOS), 72Diversity, 73

EEffective isotropic radiated power (EIRP),

100Effective surface brightness, 87Emerging research material (ERM), 58Emission spectrum, 87Emissivity, 86, 87, 90EM simulation, 10, 27, 64ERM. See Emerging research materialExtraction, 5, 6, 76

Ffmax, 23–27, 29, 31, 32, 63, 64Focal plane, 69, 70, 88Free induction decay (FID), 93, 94Frequency dividers, 70–71Full-width-at-half-maximum (FWHM), 84Functional imaging, 96Fundamental oscillation, 65, 68

GGallium-Arsenide (Ga-As), 58Geometric scaling, 57, 61Germanium (Ge), 58Graphene, 1, 57–61

IIII-V, 1, 57, 58, 60Imaging applications, 79–101Imaging passive/active–imaging optical vs.

non-optical, 62, 69, 80, 81, 86–87Inductance, 48, 51, 53–55Information beam-width, 74, 75In-plane resolutions, 84

S. Gharavi and B. Heydari, Ultra High-Speed CMOS Circuits: Beyond 100 GHz,DOI 10.1007/978-1-4614-0305-0, © Springer Science+Business Media, LLC 2011

105

106 Index

Interaction of a photon with a material, 79International Roadmap for Semiconductor

(ITRS), 58Inverse scattering, 80Isotropic/non-isotropic PSF, 83, 84

LLarge-signal model, 10–11Larmor frequency, 93Linear superposition, 65–67Local oscillator (LO), 65, 69Locking ranges, 70Low-noise amplifier (LNA), 63

MMAG, 26Magnetic resonance imaging (MRI), 86, 89,

91–96Mammography, 89Mason’s unilateral gain, 27, 52Mass attenuation coefficient, 89, 90Metal-on-metal (MoM) capacitors, 54, 64Minimum noise figure, 23, 42, 55, 63Modeling, 4–20, 35, 36, 54, 55, 61, 64, 72, 76MRI. See Magnetic resonance imaging

NNear-field, direct, antenna modulation

(NFDAM), 3, 71, 74–76Noise parameters, 35Nuclear magnetic resonance (NMR), 92Nuclear spins, 92

OOptical coherence tomography (OCT), 89, 91,

96

PPA. See Power amplifierParasitic, 6, 9, 24, 26, 27, 29, 32, 41, 42, 48,

63, 76, 97Penetration depth, 86, 89, 91, 97Phased array, 62, 75, 76Point spread function (PSF), 83, 84Power amplifier (PA), 10, 24, 32, 63, 71, 75Primary photon, 79, 80Propagation windows, 83PSF. See Point spread function

RRay-tracing, 72Remote sensing, 79, 97Responsivity, 81

SScaling law, 58, 59Scanning arrays, 88Scattering, 72, 73, 80, 82, 84, 88, 89Schottky diodes, 67Secondary photon, 80Self-aligned, 58, 59, 76Self-mixing, 69Short-channel effects, 58Single photon emission computed tomography

(SPECT), 96Spatial localization, 93, 94Spatial multiplexing, 73, 74, 88Spatial resolution, 62, 83–85, 89, 94, 97Spectral scanning magnetic resonance imaging

(SSMRI), 94, 96Substrate, 6, 9, 10, 12, 20, 28, 30, 41, 42, 54Substrate loss, 24, 26, 29Substrate network, 6, 9, 10, 20, 41, 42, 54Substrate resistivity, 9, 41, 42Surface brightness temperature, 87

TTerahertz (THz), 1–4, 57–76, 79, 81, 87, 89,

97–101Thz gap, 2, 97, 98Tomographic imaging, 91, 96Transistor layout, 8, 27, 63Transistors, 1, 5, 7–9, 19, 23, 31, 37, 45, 58,

59, 61, 63, 64, 97Transmission line, 7, 8, 11, 12, 14–16, 27, 33,

53, 64, 69

UUnilateral, 45, 47–49, 52, 53, 56Unilateral gain, 23, 27Unilateralization, 3, 4, 25, 45–56

WW-band, 68

XX-ray imaging, 86, 89–91

ultra high-speed cmos circuits · 2 1 introduction fig. 1.1 cmos future graphene fet cmos...

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