Tomorrow’s Smart Mobile Systems –

By the Power of Ten

Bernd Adler

Intel Mobile Communications

Division Vice President, Wireless CTO

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A Mobile System – By the Power of 10

A Mobile System – By the Power of 10

A Mobile System – By the Power of 10

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A Mobile System – By the Power of 10

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A Mobile System – By the Power of 10

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A Mobile System – By the Power of 10

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A Mobile System – By the Power of 10

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A Mobile System – By the Power of 10

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A Mobile System – By the Power of 10

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A Mobile System – By the Power of 10

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Inflection Points Driving our Business Opportunities

Everything that benefits from a connection will have one

50 B

5 B

1 BPLACES

PEOPLE

THINGS

1875

Inflection

points

Personal Mobile

Digital Society

Sustainable World

Global

Connectivity

1900 1925 1950 1975 2000 2025

Beyond an Embedded Chip: Creating End-to-end Connected Experiences

15 BILLIONINTELLIGENT CONNECTED DEVICES

35 TRILLIONGIGABYTES OF DATA

$3 TRILLIONOPPORTUNITY

ManufacturingRetail

Predictive maintenance

Data FeedForward

Unit level traceability

The Internet of Things

Automotive

ConnectedPassenger

ConnectedVehicle

ConnectedTransport

InventoryDistortion

CustomerInsight

Omni Channel

Experience

Everything is Connected - Data is the New Currency

From Device Centric to User Centric Computing

Desktop PCs

Convertible

Tablets

Form Factor Innovation

Facial Analysis

Wireless Charging

Augmented RealityTouch

Voice

Perceptual

Emerging Technologies

Ultrabook

LinkMe

FreeMe

KnowMe

ExpressMe

SECURITY

Big Data Cloud Internet of Things

Client Continuum

SECURITY

Cybercrime is a ~$1 Trillion Industry

Big Scale attacks

Crime as a Service

Below the OS

Ransom-ware

Mobile Malware

>15Bn Attack Surfaces by

2020

Risk: Loss of Intellectual Property, Loss of Brand, Loss of Trust

100

101

102

103

The 5G Requirements Space

Delay

[ms]

Links [per Km2]

102

104

106

Mobile logistics

Cloud office

Augmented

reality

New idea born

tomorrow

Multiuser UHD

telepresence

103106109

Throughput

[kbps/km]

Interactive

HD TV

Sensors

Vehicular

telematics

2G,3G,4G

Emergency

Gaming

Train

The 5G Requirements Space

• Mobility: 0 km/h → 500 Km/h

• Frequency range: 400MHz → 300GHz

• Latency: millisecond → seconds

• Always-on users per cell: hundreds → millions

• Duty cycles: milliseconds → days

• Signaling loads: <1% → 100%

100

101

102

103

Delay

[ms]

Links [per km2]

102

104

106

Mobile logistics

Cloud office

Augmented reality

New idea born

tomorrow

Multiuser UHD

telepresence

103106109

Throughput

[kbps/km²]

Interactive

HD TV

Sensors

Vehicular

telematics

2G,3G,4G

Emergency

Gaming

Train

Next-Generation Network Design

New Spectrum Hz

System Densification

Advanced Source Coding, Enhanced Spectral Efficiency

• Sub-6GHz and mm-wave• LSA/SAS, White-space, unlicensed

spectrum• Inter-RAT aggregation – WiFi, WiGig, LTE

bps/Hz/node

nodes / km²

×

×

• Small Cells, Radio Heads, HetNet• NNT – New Network Topologies• AIS Advanced Interference Suppresion

• H.256, EVS, Optimal Scheduling • MIMO and Non-othogonal modulation• Network Coding• Multi-flow Node aggregation=

Fundamental Network KPI: Capacity per unit area bps/km²

The Carrier Aggregation Opportunity

Intra-band contiguous CA Intra-band non-contiguous CA

Inter-band CA

Channel 1 Channel 2

Frequency Band A Frequency Band A

Channel 1 Channel 2

Frequency Band A

Channel 1

Frequency Band B

Channel 2

IEEE 802.11ac (5GHz) IEEE 802.11ad (60GHz)

Data rate 600Mbps* 2Gbps**

DVD - 4.7GB > 2 min 20 sec

Blu-ray - 25GB > 13min 106 sec ( <2min )

84 MHz ~580 MHz ~7000 MHz

The mm Wave Opportunity

ISM 60 GHz bandISM

2.4 5.150

U-NII2e

U-NII2

U-NII1

5.470 57 645.850

*) 80MHz, 2 SS, 64-QAM rate 5/6, 800 ns**) 4-elem., SC PHY, π/2-QPSK rate 5/8

10x greater capacity than lower unlicensed bands in US

GHz

40

80

120

160

200

240

500 1000 1500 2000 2500

The MIMO Opportunity

(MHz)

Req

uir

edan

ten

na

sep

arat

ion

for

MIM

O(mm)

Ultrabook form factor

Tablet form factor

Phone form factor

Modern LTE Femto Cell

Average data rate

50 Mbps/cell MU

HPBW: 2-3°HPBW: 70-90°

Average data rate

50 Gbps MU

mmWave Small Cellvs.

throughput x 1000

energy efficiency x 30

Link Control @ 700MHz

Data @ mmWave

Overlay Network Densification and Integration

Transmit / Receive Anchor + Booster for spectrum usage

Collaborative Networks

• Exponential traffic growth, Gbps expected100x+ by 2025 unless network capacity limits traffic

• Low latency access gains importanceCritical in dense traffic areas

• Emerging device class: Internet of ThingsVery low power, data rates from very low to very high

• Smart phone → Smart personal companionCommunications, sensors, WWW, …

Future Trends and Requirements

Future Trends and Requirements

... and much more to come

Intel Keeping Moore’s Law Alive and Well

90 nm

2003

180 nm

1999 130 nm

200165 nm

2005 45 nm

2007 32 nm

2009 22 nm

2011

Enabling new devices with

higher functionality & complexity

while controlling

power, cost, size

14nm

2014

A “ System of Systems” Needs a Holistic Design Approach

System

Concept

Formalized Specification

Hardware

Concept

Software

Concept

System

Integration

Verification

Hardware

Implementation

Verification

Software

Implementation

Verification

Traditional HW/SW Development

SW Development

(Pre-Silicon) HW Development

SW0.1 SW0.2 SW0.3 SW1.0

HW0.1

....

HW0.3HW0.2 HW1.0....

HW / SWIntegration

ES1.0

SW1.0

HW/SW Co-Design with Virtual Prototypes

SW Development

(Pre-Silicon) HW Development

HW-Model

Virtual Prototype

SW0.1 SW0.2 SW0.3 SW1.0

HW0.1

....

HW0.3HW0.2 ....

SW0.1 SW0.2 SW0.3

HW1.0

ES1.0

SW1.0

HW0.4

....HW / SW

Integration

Challenge:Real time simulation of

multi-path scenarios

before silicon...

VP Performance Not Even Close to Being Sufficientto Perform Real Time Testing

Setup to reduce (Post Silicon) Drive Test Effort

Ray tracing

Field data capture

Radio channel processing and

conversion

Lab testing

Performance

simulations

Standardization

Spherical Channel Hardware Test setup Over the Air

Radio Fader

Anechoic

Chamber

Base Station

Emulator

Sounder

Measurement

Channel models

IP Reuse

• SoC = IP Plug&Play?

• Reuse of internal and commercial IP can boost productivity

– System-level integration becomes key, enabled by ESL (SystemC/TLM)

– Biggest pain point: Lack of interoperability

– Missing TLM representations

– Functional incompatibility model ↔ model

– Incompatibility: model ↔ ESL tool

– Common approach to control, configuration, inspection missing

• Request to EDA: Take pain off IP reuse

The Perfect Customer Meeting in 2014

Customer: “What is the power consumption of your 2017 platform for browsing ?”

Customer: “And how does this change over SoC manufacturing tolerances ?”

Vendor replies with efficient and accurate enough system level power simulations

Vendor replies by refining system level simulations to greater level of detail

Impact of Un-coordinated System Power Optimization

PowerTargets

Actual PowerBehavior

?

Requirements

Use cases Hardware Software

HW SW

Imp

lem

en

tati

on

Hardware

Software

Inte

gra

tio

n

Optimization

The Architectural Design Challenge

Consider energy during system architecture

Predict energy consumption of not yet implemented embedded SW on

not yet designed systems-on-chip

Cover all components:

Digital, analog/RF

HW/SW partitioning

Consider realistic

mobile radio network

conditions

System Design by the Power of Ten

*

System Design by the Power of Ten

*

Level of AbstractionScope

of SimulationSimulatedRealtime

System Network 10 sec

Transaction SoC 10 ms

Instruction / RTL IP Blocks 10 µs

Transistor Circuits 10 ns

Physical Devices 10 ps

Awkward Handling of an On-Chip Inductorwithin Different Design Domains

Package PCB

Needed: Transparent View Through Domains

PCB:

!Draw Shield Above Coil!

Package:

!Do Not Route Across Coil!

Chip Top Level:

!Do Not Route Across Coil!

Analog Macro:

Coil

Efficient Propagation / Validation of Design Aspects

EDA Innovations

1970 1980 1990 2000 2010

ESL

HLS

Verification: Formal /

Constrained random

Decades of evolutionary EDA

GDS

SPICE HDL

RTL Synthesis

Decades of disruptive EDA

Automatic Layout (P&R)

DFT / ATPG

Biggest need: Improve collaboration

Master System Complexity through Collaboration

• Challenges in system desgin

– Complex features

– Large teams

– Many disciplines

• Holistic co-design approach

– Hardware ↔ Software

– In-house ↔ external IP

– Power optimization across disciplines

– Chip ↔ package ↔ board

Conclusions

• Market requirements– Data, data, data

– Time to market, cost

• 5G design challenge: extreme collaboration and co-design– Increasing complexity

– Fragmentation of use case scenarios

– System power estimation

– Concurrent HW/SW design

– Chip/package co-design

– IP reuse

• EDA requirements– Standardization (interoperability: model ↔ model, model ↔ tool)

– Connected tools, methods, flows spanning hierarchy levels