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TI Delivers Industry's First Wireless DigitalBaseband Processor on Advanced 65-nmProcess9 March 2005
Texas Instruments Incorporated (TI) (NYSE: TXN)announced it is delivering fully functional wirelessdigital baseband devices from its advanced65-nanometer (nm) CMOS process technology.The announcement fulfills TI's commitment madeone year ago when it disclosed details of the65-nm process and techniques to shrink the 90-nmdesign area by half, leverage strained-silicon toboost transistor performance by 40 percent, andreduce leakage power from idle transistors by afactor of 1000. TI is among the first semiconductormanufacturers to deliver working 65-nm products.
TI's 65-nm process technology gives us the abilityto pack hundreds of millions of transistors thatsupport both analog and digital functionality intightly integrated system-on-a-chip (SoC)solutions," said Dr. Hans Stork, chief technologyofficer of Texas Instruments. "By delivering theindustry's first 65-nm device for the wirelessmarket, TI is giving mobile customers access tomore processing performance for the mostadvanced applications in a smaller, lower powerchip."
65-nm Innovations Will Extend Battery Life
With advanced multimedia and high-end digitalconsumer electronics functionality increasingprocessing demands, a focus on low powersemiconductor technologies has become ofheightened importance. To address this concern,TI has implemented several innovative powermanagement techniques in its 65-nm platform.
First is TIs SmartReflexTM dynamic powermanagement technology that automatically scalespower supply voltage based on user performancedemands and helps control power consumption indevices like TIs OMAPVoxTM processors. Byclosely monitoring circuit speed, SmartReflex can
dynamically adjust voltages to meet the exactperformance requirements without sacrificingoverall system performance. As a result, minimumpower is used for each operating frequency,extending battery life and reducing the amount ofheat produced by the device.
TI applies other techniques at 65-nm to reduce thepower consumed by transistors when they are idle,including the time when a mobile phone is instandby mode waiting to receive a call. Theseinnovations include back-biasing of SRAM memoryblocks and retention flip-flop circuitry that allowsvoltages to drop extremely low without requiring arewrite of logic or memory content. Together theseadvancements can deliver up to a 1000 timesreduction in power leakage.
"Texas Instruments continues to execute on amanufacturing and technology developmentstrategy that is second to none," commented LenJelinek, principal analyst for iSuppli Corporation."TI's advances in 65-nm manufacturing technologyhave raised the bar of excellence for companiesdesigning CMOS technology for mobile wirelessapplications, consumer products andmicroprocessors."
SoC Design Flexibility
TI continues its approach of offering severaloptimized process recipes to balance the uniqueneeds of end products or applications. This is donethrough adjustments to the transistors gate length,threshold voltage, gate dielectric thickness or biasconditions for example. The 65-nm design libraryoffers an unprecedented number of options formaximum design flexibility and optimization.
A very low power offering extends battery life inportable products such as 3G wireless handsets,
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digital cameras and audio players with increasinglysophisticated multimedia features. A mid-rangeoffering supports DSP-based products and TIshigh performance ASIC library geared towardcommunication infrastructure products. The highestperformance version of TIs 65-nm processsupports Sun Microsystems UltraSPARC familyof 64-bit processors.
Enabling Analog and Digital Integration
The 65-nm process will support TIs revolutionaryDRPTM architecture in future products to integratedigital RF functionality in single-chip wirelesssolutions. By processing RF functionality in digitalCMOS, TI reduces the manufacturing cost andpower consumption of the transmit and receivefunctions, and frees up much-needed board spacefor advanced applications and functionality.
Additionally, TI includes access to ASIC librariesthat support a range of different threshold voltagetransistors that can be combined to optimizecircuitry for power consumption or highperformance. This includes a number ofanalog/mixed signal macros that use optimizedanalog transistors and high-density MIM capacitors.For SoC designs, especially those targeted forportable systems where silicon area is premium,integrating analog functions can enable lighter-weight, less expensive, more mobile applications.
Leveraging Latest Materials and Manufacturing
The 65-nm process includes up to 11 layers ofcopper interconnect integrated with a low kdielectric, OSG, with a k (dielectric constant) of 2.8- 2.9. Low-k materials reduce active powerconsumption, as well as capacitance andpropagation delays within the interconnect layers ofa device, thereby boosting overall chipperformance. Other improvements include aninduced strain on the transistor channel during chipprocessing to increase electron and hole mobility;nickel silicide to lower both gate and source / drainresistance, and ultra-shallow source / drainjunctions. A unique use of differential offset spacersallows independent optimization of the NMOS andPMOS transistors, driving performance andminimizing leakage.
TI's 65-nm process is planned for both 200mm and300mm production, with fully qualified productionexpected in late 2005.
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APA citation: TI Delivers Industry's First Wireless Digital Baseband Processor on Advanced 65-nmProcess (2005, March 9) retrieved 2 February 2019 from https://phys.org/news/2005-03-ti-industry-wireless-digital-baseband.html
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