THREE-PHASE SINGLE STAGE AC-DC BUCK-BOOST CONVERTER OPERATING IN BUCK AND BOOST MODES

Altamir Ronsani Borges◊ and Ivo Barbi* ◊Department of Electrical and Telecommunications Engineering: University of Blumenau (FURB)

Blumenau – SC - Brazil arb@furb.br

*Power Electronic Institute (INEP): Federal University of Santa Catarina (UFSC) Florianópolis – SC – Brazil

ivobarbi@inep.ufsc.br

Abstract – This paper presents a single stage three phase Buck-Boost AC-DC converter operating in continuous conduction mode (CCM). The converter operates with high power factor in wide input voltage range (60 – 140 VRMS line-to-neutral). It has three operations modes: Buck, Boost and a combination of both, named Buck+Boost. The original topology, operation stages, mains waveforms and equations for Buck and Boost modes are presented. Simulation results for a 1.5 kW , 150 V output voltage converter are also show.

Keywords – Three-phase AC-DC converter, Buck-

Boost, power factor correction.

I. INTRODUCTION

The three-phase AC-DC converters evolution is remarkable, comparing the first diode based structures with the current ones. Several factors contributed to this development, such as semiconductor and microelectronics progress. The creation and adoption of standards for regulating the electrical equipments interferences in the power grid, such as IEEE-519, IEC-555, IEC-6100-3-2 and IEC-6100-3-4 [1], also had an important influence as lead to increased research efforts in the area.

A wide variety of three-phase AC-DC converter topologies was developed, aimed to comply with the most varied and stringent specifications [2-6]. Some of them have been highlighted as the Boost and Buck converters [3].

Other converters, in spite of their interesting features, have few references in the literature. This is the case of the Buck-Boost converters, even presenting a step up/down output voltage characteristic, has not received considerable attention [7-10].

The main Buck-Boost three-phase topologies found in literature are [2, 5]: • Association of Buck-Boost single-phase modules; • Converters with two stages of power processing; • Converters with single stage of power processing;

In [11] is proposed a topology based on three Buck+Boost single phase modules association, while in [12] is proposed a topology associating ĆUK single phase converter modules. The main advantage of this configuration is that single phase PFC techniques can be used directly, with a little additional development effort [2].

A two stages converter has its input currents controlled by a structure, while output voltage regulation is controlled by another [2].

In [10] two configurations of bidirectional two stages three-phase Buck-Boost converters are presented. The first is named ĆUK-ĆUK converter and the second consists of a SEPIC converter input stage, coupled with a ZETA converter output stage. An unidirectional structure composed by a three-phase Buck PFC converter cascaded with a DC/DC Boost converter is presented in [13, 14]. A converter formed by a VIENNA Boost PFC rectifier on the input stage and a DC/DC three-level Buck on the output stage, is presented in [15].

A single stage converter has its input currents and output voltage regulation controlled by same structure [2].

The single-stage topologies found in literature are derived from DC/DC converters with step up/down features. Boost-Buck converter (ĆUK) is the basis for the converter discussed in [8]. A topology based on Buck-Boost converter is presented in [9], while in [7], a SEPIC derived converter is proposed.

II. THE PROPOSED CIRCUIT

A. The original single-phase circuit The proposed circuit is based on the Buck+Boost

single-phase PFC converter, presented in [7]. The basic configuration is shown in Fig. 1 (the input filter was omitted).

Fig. 1. Buck+Boost single phase PFC.

For the attainment of the three-phase version of the circuit, some changes were carried out in the single-phase topology. As shown in Fig. 2, switch S1 is incorporated to the rectifier circuit along with the diodes D1 and D2; inductor L is divided into two equal inductors (L1 and L2) and the D8 diode is added to the structure.

The voltage source VO represents the association of the output capacitor with the resistive load, as depicted in Fig. 1. The three-phase rectifier circuit is obtained through a single-phase module for each phase, connected in wye, as presented in Fig. 3.

176978-1-4577-1646-1/11/$26.00 ©2011 IEEE

+

(a) (b)

Fig. 2. (a) Switch S1 is incorporated to the rectifier circuit; (b) Final single-phase module.

Fig. 3. Final circuit of three-phase Buck-boost PFC converter.

In the circuit of Fig. 3, switches S1A, S1B and S1C are named Buck switches, while S2A, S2B and S2C are called Boost switches. All switches are IGBT-type.

III. MODULATION STRATEGY

As a three wire topology is been studied, the input currents meet the relationship defined in (1): A B CI I I 0+ + = (1)

Thus, controlling two phases, the third is automatically defined. In order to implement this strategy, the periods in which the current of each phase is indirectly controlled were defined. It was done by dividing the grid voltage period into sectors, as shown in Fig. 4.

Fig. 4: Sectors definition.

In each sector, the phase with higher absolute value is submitted to indirect control. In order to enable the

described strategy, its switches are turned on throughout the sector.

Three modulators (one per phase) compose by two superposed saw-tooth waves and two comparators, are used, as shows Fig. 5.

Fig. 5: Carriers wave forms and modulator circuit.

IV. OPERATION MODES

The operating regions are defined as the ratio of output voltage and the line-to-line voltage input - VAB (t) and VAC (t) for sector 3.

Boost Mode: O

P

V>1

V

Buck Mode: O

P

V 1<V 2

Buck+Boost Mode: O

P

V1 < <12 V

Where VP is the line-to-line voltage peak .

Table I shows the expressions of the static gain for each phase along the sector 3, for the three operation modes.

TABLE I Static gains for Buck, Boost and Buck+Boost converter

operation modes

BUCK

12

⎛ ⎞<⎜ ⎟

⎝ ⎠O

P

VV

BUCK+BOOST

1 12

⎛ ⎞< <⎜ ⎟

⎝ ⎠O

P

VV

BOOST

1⎛ ⎞

>⎜ ⎟⎝ ⎠

O

P

VV

Oj

ij

Ok

ik

V d (t)V (t)

V d (t)V (t)

=

=

Oj

ij

O

ik k

V d (t)V (t)

V 1V (t) 1 d (t)

=

=−

O

ij j

O

ik k

V 1V (t) 1 d (t)

V 1V (t) 1 d (t)

=−

=−

Where i, j and k correspond to phases A, B or C, such that

iN jN kNV (t) V (t) V (t)> > .

V. OPERATION STAGES

Only Buck and Boost modes are discussed in this paper. The Buck+Boost is a composite of previous modes, which one phase operates in Buck mode while another in Boost mode. Fig. 6 presents the pulse generation schemes for Buck and Boost switches of one phase, considering the operation on Buck and Boost modes, respectively.

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Table II presents the switches command signals for the three operation modes (Buck, Boost and Buck+Boost) in sector 3.

In Fig. 7, the pulses applied to switches and the behavior of parameters that define the operation stages for Buck and Boost modes are outlined.

Fig. 6. Pulses generation for Buck and Boost switches.

TABLE II Command signals for each mode of operation.

S1A S2A S1B S2B S1C S2C BUCK 1 1 0 0

BOOST 1 1 1 1 BUCK + BOOST 1 1 0 1

Where:

1 = Switch turned on; 0 = Switch turned off;

= Switch that receives command pulses.

On the Table III the ranges that define the stages, valid for both operation modes, are shown

TABLE III Ranges of operation stages.

STAGE INTERVAL STAGE INTERVAL 1 t0 – t1 4 t3 – t4 2 t1 – t2 5 t4 – t0 3 t2 – t3

A. Operation Stages –Buck Mode This operation mode comprises five steps, whose limits

are defined by interval t0 to t4, according to shown in Fig. 7. • t0: D4A is blocked by extinction of it current; • t1: S1B is turned off; • t2: S1C is turned off; • t3: The currents of L1B and L1C are extinct; • t4: A new switching cycle is started with S1B and S1C

turned on.

Fig. 7: Waveforms outline for parameters that define the Buck

and Boost modes operation stages.

Buck mode operation introduces an input current discontinuity, requiring the use of an input filter. An typical LC filter per phase was employed, whose design was based on [16].

B. Operation Stages –Boost Mode This operation mode comprises five steps, whose limits

are defined by interval t0 to t4, as shown in Fig. 7. • t0: D4A is blocked by extinction of it current; • t1: S2B is turned off; • t2: S2C is turned off; • t3: A new switching cycle is started with S2B and S2C

turned on; • t4: D7C and D8B are blocked by the extinction of it

current. In Fig. 8 and Fig. 9, the configurations assumed by the

converter operating in Buck and Boost modes, respectively, are presented.

VI. EXPERIMENTAL RESULTS In order to validate the theoretical analysis, a prototype

with the following features was implemented: • Input line-to-neutral voltage range: 60 to 140 VRMS; • Output voltage: 150 V; • Switching frequency: 39600 Hz; • Output power: 1500 W.

For this input voltage range, the converter operates in the modes shown in the Table IV.

TABLE IV Ranges of operation modes

Input voltage range (VRMS) Operation mode 60 to 80 Boost 80 to 127 Buck+Boost

Above 127 Buck The values of THD and power factor were obtained

with the software WaveStar version 2.8.1.

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Fig. 8: Buck mode operation stages.

Fig. 9: Boost mode operation stages.

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Figure 10 depicts the waveforms for three input currents (IA, IB and IC) on Boost operation mode. The total harmonic distortion (THD) of these currents, varies between 3,9% (IA) and 5% (IC).

IA IB IC

IA = 31. 01 AP-P

Fig. 10: Boost mode: input currents waveforms.

In Figure 11 the line-to-neutral voltage VAN and IA current are presented, where it can be observed the high power factor in the boost mode (0.997).

Fig. 11: Boost mode: Line-to-neutral VAN and input current IA

waveforms.

The inductors L1A and L2A currents waveforms are shown in Figure 12. In each phase, the current of these inductors is equal and corresponds to the rectified input current.

Fig. 12: Boost mode: inductors L1A and L2A currents waveforms.

In Figure 13 the waveforms of voltage VAN (CH1), the signal that indicates the sectors 3, 4, 9 and 10 (CH2), and the voltage across the switch S2A (CH4) are presented. Through the waveform of CH4 is possible to prove that the voltage across the boost switch has de same magnitude of the load voltage (166 V).

Fig. 13: Boost mode: Line-to-neutral VAN (CH1); signal that

indicates the sectors 3, 4, 9 and 10 (CH2) and voltage across the switch S2A (CH4).

Figure 14 depicts the three unfiltered input currents (IA, IB and IC) waveforms on Buck operation mode.

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Fig. 14: Buck mode: unfiltered input currents waveforms.

Figure 15 shows the three filtered input currents waveforms (IA, IB and IC). The harmonic distortion of these currents varies between 5.7% (IA) and 6.1% (IC).

Fig. 15: Buck mode: filtered input currents waveforms.

In Figure 16 the line-to-neutral voltage VAN and the filtered IA current in Buck mode are presented, where it can be observed the high power factor in this mode (0.974).

In Figure 17 are shown the inductors L1A and L2A currents waveforms (CH3 and CH2, respectively) and line-to-neutral VAN (CH4).

In Figure 18 are presented the waveforms of S2A command signal (CH1) and voltage across the switch S2A (CH3). Through the waveform of CH3 is possible to observe that the voltage across the boost switch has de same magnitude of the line-to-line input voltage (376 V peak).

Fig. 16: Buck mode: Line-to-neutral VAN and filtered input current

IA waveforms.

Fig. 17: Buck mode: inductors L1A and L2A currents waveforms

(CH3 and CH2, respectively) and line-to-neutral VAN (CH4).

Figure 18: Buck mode: Voltage across the switch S2A (CH3) and

S2A command signal (CH1).

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VII. CONCLUSION

From experimental results, it can be seen that the circuit present high power factor in both Buck and Boost operation modes.

The proposed topology efficiency varies with the operating mode: 74% for Boost mode and 87% for Buck mode, at rated power. Large part of this low efficiency is explained by the high voltage drop across the diodes. Diodes with lower voltage drop are being selected to increase efficiency.

On the other hand, as the focus of the design was not to optimize the efficiency but only to prove the theoretical analysis of the structure, these results can be improved.

The current distortion observed in Buck mode is due to unbalance and distortion of input voltages. Alternatives to reduce the influence of these factors on the input current are being studied.

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