Testability of Testability of Integrated CircuitsIntegrated Circuits

Presented by Srujana Aramalla

Instructor: Dr.Roman Stemprok

TestingExpressed by checking if the outputs of a functional system correspond to the inputs applied to it.

Design for Testability (DFT)

Ability of simplifying the test of any system

Goals of DFTMinimizing the cost of system productionMinimizing system test complexityImproving qualityAvoiding problems of timing discordance

Terminology

Practical DFT guidelines

1.Improve controllability and observability

2. Use multiplexers

3. Partition large circuits

4. Divide long counter chains

5. Initialize sequential logic

6. Avoid clock gating

7. Strictly distinguish between signal and clock

8. Separate analog and digital circuits

References

http://vlsi.wpi.edu/webcourse/toc.htmlhttp://vlsi.wpi.edu/webcourse/links.html