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The top documents tagged [fpga logic chain]
A Low-Power Wave Union TDC Implemented in FPGA Wu, Jinyuan Fermilab Yanchen Shi and Douglas Zhu Illinois Mathematics and Science Academy Sept. 2011
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Improving Single Slope ADC and an Example Implemented in FPGA with 16.7 GHz Equivalent Counter Clock Frequency Wu, Jinyuan Fermilab John Odeghe, Scott
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A Digitization Scheme of Sub-uA Current Using a Commercial Comparator with Hysteresis and FPGA-based Wave Union TDC Wu, Jinyuan Fermilab Sept. 2012
219 views