status of detector prototype (for hawaii meeting at big island) august 24, 2002 yee bob hsiung for...
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Status of Detector Prototype(for Hawaii meeting at Big Island)
August 24, 2002
Yee Bob HsiungFor
Koji Ueno, Yuri Velikzhanin Yanan Guo and Eddie Huang
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First Simple Prototype
Optical – commercial Fresnel Lens (NTK-F300, f30cm, size=30cm, pitch=0.5mm, PMMA UV), UV filter (BG3)
MAPMT – Hamamatsu 4x4 (H6568) or 8x8 (H7546)
Readout electronics – Preamp, Receiver, Trigger, ADC and DAQ
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Checking Fresnel Lens
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Focal Spot Size at Center
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Focal Spot Size 8cm Off Center
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Readout Setup
PMT Preamp.
Freshnell lens
UV filter
HamamatsuPMT8x8 or 4x4
1 or 416-channelspreamplifiers
Receiver
2 or 88-channelsreceivers
Trigger
ADC DAQ
64-channelsAcromag
ADC
64-channelsTrigger module
VME
At PC,Visual C++
based
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Hamamatsu MAPMT testAnode Uniformity of different channels
NTU
0
10
20
30
40
50
60
70
80
90
100
0 8 16 24 32 40 48 56 64
Series1
Series2
Series3
Series4
Series5
Series6
Series7
Series8
Series9
Series10
Series11
Series12
HAMAMATSU
0
10
20
30
40
50
60
70
80
90
100
0 8 16 24 32 40 48 56 64
Series1
Series2
Series3
Series4
Series5
Series6
Series7
Series8
Series9
Series10
Series11
Series12
Measured at NTU
Data from Hamamatsu
Broken PMT
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Hamamatsu MAPMT test
AAnode sensitivity (sum of 64 channels)
Broken PMT
Anode Sens.
1 2 3 4 5 6 7 8 9 10 11 12
from HAMAMATSU
measured at NTU
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Preamplifier schematics
+-
FromPMT
+-
FromPMT
Current sensitive version(current -> voltage)
Charge Sensitive version(charge -> voltage)
to save space on receiver
Power supply (16-channels preamplifier):380mA on +/- 5V (3.8W, 240mW/channel)
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Waveform ~ exp(-t/T), T~1uS
Preamplifier test with test pulse Q~3*10^6 e (~10 photons)
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Signals with different polarity look equally
Preamplifier test with test pulse Q~3*10^6 e (~10 photons)
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Response on pulse to LEDTypical minimum voltage needed for LED lighting is 2-2.5 V
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Response on pulse to LEDResponse on two photons with ~ 2 us delay
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Receiver's Single channel schematics
+-
Shaper
ComparatorLVDS
transmitter
To Trigger
From
preamp.
100 nSDelay line To ADC
(one from these two outputs)Peak &
Hold
Control from Trigger
here are someproblems (another PCBis needed)
We could use these outputs for prototype test
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D
B A
C
NIM input
NIM output
DONE
- + - +1
16
- + - +1
16
OUTPUT
Universal VMEMother-boardXCS10-tq144
Mezzanine boardXCS30XL-tq144
GND
EVENT
GND
LVDS-2
LVDS-1- +
TTL-S
A,B,C,D:4 34pin IDE connectors
which accept64 LVDS Inputsfrom receivers
EVENT
To receiversOnly the last receiver terminated
To ext. trigger of IP341s
Front Panel
Trigger module
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ClusterHit: signal from an anode exceeds threshold.
Geometric Trigger:
•Count: hit number >= N (preset, 3~7);
•Geom: a cell and any of its 8 adjacent cells are hit.
selfneighbors
Processed byOther ‘self’
Trigger moduleTrigger logic: two hits in adjacent cells + one hit at any place
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Trigger Waveform
LVDS input
LVDS output
EVENT_T output
settings:CSR=67Delay=2Width=4Dead-time=20Max #=255Masks=-1
Jitter due 40Mhz operating clock
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Data acquisition
ADC SBS PCWindows,
Visual C++
Tested DAQ speed (64-channelsversion) with test pulse to ADC:800 events/sec.
ADCdata
On linetrigger
Buffer RAMHarddisc
HistogramsHarddisc
DAQ schematics
VME
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Data acquisition
StartPauseClearSave DataSave Histograms
Toolbar:
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Data acquisition (16-channels version)Last event monitor
Hit Sum monitors
Event rate
Last triggered event
Sum triggered events
Triggered event rate
Trigger settings
Full Sum monitors
System status monitor
ADC base adderessNumber of stored events
ADC FIFO monitor
Buffer size monitor
Memory used
Histograms monitor
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Data acquisition (64-channels version)
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Summary
In the past 3 months, we have tried to develop and put together a complete system for the first simple prototype with commercial Fresnel lens
Bench test for readout electronics are nearly done
Bench test for the first simple prototype will follow
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Near Future Hardware Plan
Finish the lab bench test of the simple prototype
Background survey at Mt. Lu-Lin in Taiwan as a field test for the prototype in September or October.
Plan a background survey at Mt. Hualalai.