Sprinkler Buddy

Presentation #12: “Final Presentation Outline”4/25/2007

Team M3Kalyan Kommineni

Kartik Murthy Panchalam Ramanujan

Sasidhar UppuluriDevesh Nema

Design Manager: Bowei Gai

“Low Cost Irrigation Management For Everyone !”

Current Status• Determine Project • Develop Project Specifications • Plan Architectural Design

– Determination of all components in design – Detailed logical flowchart

• Design a Floor Plan • Create Structural Verilog • Make Transistor Level Schematic • Layout • Testing (Extraction, LVS, and Analog Sim.)

Final Presentation Outline

• Marketing (Kalyan)• Project Description (Panchalam)• Behavior/Algorithmic Description (Panchalam)• Design Process (Sasi)• Floor Plan Evolution (Sasi)• Layout (Kartik)• Verification (Devesh)• Issues Encountered (Devesh)• Specifications (Kartik)• Conclusions (Kartik)

Sprinkler Buddy Marketing

• Why Sprinkler Buddy ?

$52 Million market potential

1.1 Billion potential customers

100% yearly market growth

6 month payback to customer

Sprinkler Buddy at-a-glance

Large and Untapped Market

• 95% of the 1.1 billion farmers are from developing nations

• 60% of irrigation water wastage in these nations

The South Asian Farmer• Average yearly income is $795.56• 25% of yearly earnings are lost In water

costs

Current Solutions: Expensive/Un-automated• Prohibitively expensive for the average

farmer• Customer forced to make a choice• Do not adhere to standard guidelines

Sprinkler Buddy: The low cost, automated solution !

The Sprinkler Buddy Advantage

Simple ease of use

Low Power Design

Exhaustive Metrics

Low Cost Solution

Rain Bird

Gorman-Rupp Jain Sprinklers

Sprinkler Buddy

Minimal Setup and ServiceSolar Powered DesignUN Certified Water Output CalculationsLow Cost Alternative

Project Description

• Overview of Chip’s features– Brief description of water equation– Breakdown of modes– Key Feature Listing

• Power Gating• Quiet bit line SRAM• Semi-Clocked Architecture

Behavioral Description

• Detailed description of each mode using flowcharts– Translation of algorithm to hardware– FSM specifications– Sharing of FPUs

• Interaction between modes• Detailed description of main FSM

(power)

Design Process• Verilog

– Verification and simulation of FSM control• Floor Plan

– Describe placement method• Schematic

– Optimal Sizing – Selection of logic style according to power

requirements– Power shut off integration

• Layout– Compact custom shaped designs– FSMs – Power and Clock Distributions

Floor Plan Evolution

• Show all iterations • Describe reasoning behind

differences• Display all 7 versions

Layout

• Show cool layouts– All major components– Power Gating– FSMs

• Show different metal layers

Verification

• Verification methodology• Outputs from all modes• VDD gating simulation

VDD Rise Verification

VDD Fall Verification

Mode Output Verification

Mode Output Verification

Final Error Output Verification

Final Valve Enable Output Verification

Issues Encountered

• Routing of Control Signals • Partitioning of work• Gnd gating • Lots of other problems…

Sprinkler Buddy Specification

• Chip Specification– Area, Density, Transistor Counts, etc.

Conclusion

• Wrap it up