solution ...bedzyk.mccormick.northwestern.edu/files/publications/210_wang... · solution-processed...

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© 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim (1 of 9) 1500427wileyonlinelibrary.com

Solution-Processed All-Oxide Transparent High-Performance Transistors Fabricated by Spray-Combustion Synthesis

Binghao Wang , Xinge Yu , Peijun Guo , Wei Huang , Li Zeng , Nanjia Zhou , Lifeng Chi , Michael J. Bedzyk , * Robert P. H. Chang , * Tobin J. Marks ,* and Antonio Facchetti *

B. Wang, Dr. X. Yu, W. Huang, Prof. T. J. Marks, Prof. A. Facchetti Department of Chemistry Northwestern University 2145 Sheridan Road , Evanston , IL 60208 , USA E-mail: [email protected]; [email protected] B. Wang, Prof. L. Chi Institute of Functional Nano & Soft Materials (FUNSOM) Jiangsu Key Laboratory for Carbon-Based Functional Materials and Devices Soochow University 199 Ren’ai Road , Suzhou 215123 , China P. Guo, Dr. N. Zhou, Prof. R. P. H. Chang Department of Materials Science and Engineering and the Materials Research Center Northwestern University 2220 Campus Drive , Evanston , IL 60208 , USA E-mail: [email protected] L. Zeng, Prof. M. J. Bedzyk, Prof. T. J. Marks Applied Physics Program and the Materials Research Center Northwestern University 2220 Campus Drive , Evanston , IL 60208 , USA E-mail: [email protected] Prof. A. Facchetti Polyera Corporation 8045 Lamon Avenue , Skokie , IL 60077 , USA

DOI: 10.1002/aelm.201500427

and ZnO for thin fi lm transistor (TFTs) on SiO 2 dielectrics provides electron mobilities in excess of 16 and 25 cm 2 V −1 s −1 for 250 °C and 400 °C growth, respectively. [ 2b , 4b , 18 ] Further-more, to achieve low-voltage operation and scaling of the TFT dimensions, high dielectric constant ( k = 7–20) MO gate dielec-trics, such as Al 2 O 3 , Y 2 O 3 , ZrO 2 , HfO 2 , have been utilized. [ 9 ] However, the morphological and microstructural require-ments for TFT dielectric layers are more stringent than for semiconducting layers, to ensure low leakage currents, high breakdown voltages, high capacitances, and minimal bulk/interface trap densities. [ 5c , 10 ] Thus, high processing tempera-tures (>400 °C) and signifi cant thicknesses (≥100 nm) are typically required for solution-processed dielectric fi lms to ensure complete organic component degradation and forma-tion of dense MO networks. [ 11 ] For example, pioneering work of Anthopoulos demonstrated that spray-coating ZnO TFTs at 400 °C affords electron mobilities greater than 40 cm 2 V −1 s −1 and ≈10 7 on/off current modulation ratios on a ≈100 nm HfO 2 gate dielectric grown by spray pyrolysis at 450 °C. [ 12 ] Similarly, spin-coated 100 nm thick ZrO 2 dielectric fi lms annealed at 450 °C enable indium tin zinc oxide (ITZO)/indium gal-lium zinc oxide (IGZO) bilayer TFTs with high mobilities of ≈40 cm 2 V −1 s −1 and 3 V operating voltages. [ 9c ] Recently, dilute solution-adapted wire bar-coating was employed to fabricate high-quality 10–40 nm thick Al 2 O 3 and HfO 2 dielectric layers. How-ever, post-deposition temperatures were very high (≈400 °C) and the resulting IGZO TFTs exhibited an average mobility of only 5 cm 2 V −1 s −1 . [ 2d ]

This laboratory recently reported combustion synthesis as an effective low-temperature growth technique for solution-processed MO semiconducting fi lms. [ 13 ] Using liquid metal + oxidizer + fuel precursors, localized and highly exothermic chemical transformations occur within the spin-coated fi lms, affording rapid M-O-M lattice condensation at temperatures of 200–300 °C. However, gas evolution during the short pro-cessing times interferes with fi lm continuity and densifi cation for >5 nm fi lms, thus requiring time-consuming multi-step coating and annealing. [ 14 ] Recently, we reported a new high-speed spray-combustion synthesis (SCS) approach to MO fi lm growth, [ 7 ] producing high-density, macroscopically continuous fi lms for diverse MO semiconductors, and with carrier mobility and electrical uniformity rivaling that of magnetron-sputtered fi lms. However, low-voltage operation was only demonstrated for TFTs with a ZrO 2 dielectric, grown by sol–gel spin-coating and annealing at 500 °C. [ 15 ] Furthermore, thermally evaporated

Metal oxides (MOs) are versatile materials that provide diverse electronic functionality ranging from insulators, to semicon-ductors, to conductors. Furthermore, MO fi lms have attracted great interest for the next-generation electronics due to their environmental/thermal stability, excellent optical transparency, and versatile mechanical properties. [ 1 ] Unlike capital-intensive vacuum-based physical/chemical vapor deposition growth pro-cesses, liquid-phase precursors offer diverse thin-fi lm/device fabrication routes for large-scale roll-to-roll production using ink-jet printing, dip-coating, bar-coating, slot-die coating, and spray-coating. [ 2 ] Regarding semiconducting MO fi lm growth, recent reports including sol–gel on chip, [ 3 ] spray pyrolysis, [ 4 ] sol–gel fi lm, [ 5 ] and amine-hydroxo precursors, [ 6 ] represent sig-nifi cant advances. Among these, spray pyrolysis enables the growth of dense, high-quality MO fi lms over large areas at moderate temperatures (250–400 °C) and in fabrication (FAB)-compatible processing times. [ 7 ] Thus, spray pyrolysis of In 2 O 3

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Adv. Electron. Mater. 2016, 2, 1500427

http://doi.wiley.com/10.1002/aelm.201500427

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© 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim1500427 (2 of 9) wileyonlinelibrary.com

Al source and drain electrodes were used, a process not com-patible with high throughput roll-to-roll fabrication.

Here, we report the fi rst systematic fabrication of all-SCS pro-cessed all-oxide TFTs utilizing an automated spray-coater with an ultrasonic nozzle, to produce droplets with mathematically defi ned sizes. The result is uniform, homogenous coatings, and TFT fabrication, which integrates high-quality ZrO 2 or Al 2 O 3 gate dielectrics, a high-mobility indium zinc oxide (IZO) or IGZO semiconductor, and indium tin oxide (ITO) conducting elements in the same platform. Detailed morphological, structural, and electrical characterization shows that SCS provides rapid, effi -cient, precision fabrication of high-quality fi lms. The SCS-derived dielectric fi lms have low leakage current densities (10 −7 A cm −2 at 2 MV cm −1 ) and high areal capacitance (>600 nF cm −2 ), while the SCS-derived ITO contacts have conductivity ≈265 S cm −1 . Here the SCS-derived IZO and IGZO TFTs with SCS ZrO 2 gate dielectrics and Al contacts have electron mobilities up to 42.5 cm 2 V −1 s −1 and 32.5 cm 2 V −1 s −1 , respectively, indicating good dielectric-semicon-ductor interfacial quality. Additionally, SCS IZO TFTs on fl exible ZITO-coated AryLite polyester substrates with mobilities up to 10 cm 2 V −1 s −1 are demonstrated, and fi nally, all-SCS-derived all-oxide transparent IGZO TFT arrays achieve maximum mobili-ties of ≈8 cm 2 V −1 s −1 at operating voltages of <3 V.

Since dielectric fi lm topological quality is essential for optimum TFT function, SCS conditions were fi rst optimized to maximize dielectric strength. ZrO 2 and Al 2 O 3 growth con-ditions were investigated using ZrO(NO 3 ) 2 and Al(NO 3 ) 3 precursors/oxidizers, acetylacetone (AcAcH) as the fuel,

and 2-methoxyethanol as the solvent. Optimization involved varying parameters such as oxidizer:fuel molar ratio (from 1.0:1.2 to 1.0:3.25), precursor concentration (from 0.03 M to 0.075 M ), and fi lm growth parameters such as substrate tempe rature (250° to 350 °C) and precursor solution feed rate (0.5 to 2.0 mL min −1 ). It is found that the Zr:AcAcH and Al:AcAcH molar ratios, concentrations, and substrate tempe-ratures strongly infl uence ZrO 2 and Al 2 O 3 fi lm thickness, morphology, densifi cation, and dielectric properties. To assess fi lm quality, metal-insulator-semiconductor (MIS) devices were fabricated with doped Si (bottom) and Al (top) contacts. Figure 1 a and Figure S1 (Supporting Information) show rep-resentative MIS J – V plots, and Table 1 compiles relevant data.

ZrO 2 was used fi rst as an optimization platform. One trial set focused on how fi lm leakage varies with the Zr:AcAcH ratio (Table 1 , entries 1–3) at fi xed temperature (300 °C) and metal concentra-tion (0.03 M ). The leakage current density is found to be constant (≈2.0 × 10 −7 A cm −2 at 2.0 MV cm −1 ) over Zr:AcAcH ratios of 1.0:1.0 to 1.0:2.0, but rises precipitously to 4.6 × 10 −6 A cm −2 for Zr:AcAcH = 1.0:3.25, suggesting that excess fuel causes incomplete precursor thermolysis. The combustion process refl ects a balance between the fuel:oxidizer molar ratio, type of metal precursor(s), and combustion onset temperature. Exces-sive acetylacetone will not combust to generate large amounts of local heat but simply adsorbs energy by vaporizing. Although we have not yet investigated the mechanistic details of this process, it is intuitive to assume that excessive AcAcH vaporiza-tion will create pinholes rather than promote lattice formation

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Figure 1. a) Current density ( J ) as a function of voltage ( V ) for ZrO 2 dielectrics fabricated by SCS or spin-coated CS at different temperatures. Test device structure is n ++ Si/dielectric/Al. b) XRR plots of the indicated MO fi lms. c) Breakdown fi eld of SCS-derived ZrO 2 and Al 2 O 3 fi lms grown at the indicated temperatures. d) Dielectric constant of SCS-derived Al 2 O 3 and ZrO 2 fi lms grown at the indicated temperatures.

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and densifi cation. Besides leakage current, fi lm thickness is also affected by the Zr:AcAcH ratio. Thus, SCS solutions with reduced AcAcH content require longer coating times to achieve the same fi lm thickness, suggesting that some metal precursor may be lost by vaporization if not coordinated by AcAcH. Thus, a 0.03 M ZrO(NO 3 ) 2 solution without AcAcH requires ≈300 spray passes to achieve a ≈10 nm thick ZrO 2 fi lm at 300 °C, while the same solution with acac (Zr:AcAcH = 1.0:2.0) requires only 32 spray passes. This likely explains why reported spray-pyrolysis depositions of dielectric fi lms require high precursor concentra-tions (0.1–3.8 M ) and processing at 400 °C–500 °C. [ 4a , 12,16 ]

X-ray refl ectivity (XRR) measurements were performed on the present dielectric fi lms to determine fi lm thickness and mass density ( ρ m ) from the electron density ( ρ e ) profi les and Equation ( 1) :

ρ ρ=m

e

e A

M

N N (1)

where M is the molar mass, N e is the total number of electrons for assumed stoichiometry, and N A is Avogadro’s constant. The mass densities of the present SCS ZrO 2 fi lms are 4.45 g cm −3 , 4.81 g cm −3 and 4.63 g cm −3 for Zr 4+ : AcAcH molar ratios = 1.0:1.0, 1.0:2.0, and 1.0:3.25, respectively. The combustion pro-cess is a balance between the fuel-oxidizer molar ratio, type of metal precursor(s), and the onset combustion temperature. Here, the lower density for the 1:0:2.0 and 1.0:3.25 composi-tions may be rationalized by the fact that sub-stoichiometric amounts of AcAcH cannot effi ciently coordinate the metal ion precursors whereas an excess amount of AcAcH will vaporize during combustion adsorbing energy, thus preventing MO lattice formation. However, these data indicate that the pre-cursor molar ratio = 1.0:2.0 affords dielectric fi lms with the greatest density, and therefore this ratio was used for fabri-cating all dielectric layers in this study.

Next, metal precursor concentration effects were investi-gated over the range 0.03–0.075 M (Table 1 , entries 2, 4, 5)

while maintaining a 300 °C processing temperature, and it is found that increased metal concentrations increase the fi lm leakage current from 1.7 × 10 −7 to 2.0 × 10 −6 A cm −2 . Finally, fi lm deposition temperature effects were investigated for ZrO 2 , proceeding from 250 °C (Table 1 , entry 6) to 300 °C (entry 2) to 350 °C (entry 7), and over the same temperature range for Al 2 O 3 (entries 9–11). As might be anticipated, SCS fi lm leakage current density progressively falls with the increasing pro-cessing temperature, and for all these SCS dielectric fi lms is < 3.0 × 10 −7 A cm −2 at 2.0 MV cm −1 —far lower than those of spin-coated CS dielectric fi lms (Table 1 entries 8 and 12), where the leakage current densities are > 3x larger, as are those of recently reported spin-coated sol-gel fi lms annealed at ≥ 350 °C. [ 9c , 17 ] Note that the large leakage currents of the spin-coated CS fi lms refl ect nanoscale pinholes/porosity reasonably caused by gas evolution during combustion. [ 7 ] Furthermore, the present SCS fi lms exhibit far higher breakdown fi elds (Figure 1 c) than spin-coated CS fi lms and spin-coated, bar-coated, or spray-pyrolysis dielectric fi lms. [ 2d , 4a , 9c , 12 ] For example, the highest breakdown fi eld for the present SCS ZrO 2 fi lms (300 °C) reaches 9.5 MV cm −1 , 3–6× greater than that of spin-coated and spray-pyrolysis ZrO 2 fi lms processed at 450 °C. [ 6,15 ]

Grazing incidence X-ray diffraction (GIXRD) confi rms that the present SCS ZrO 2 and Al 2 O 3 fi lms (Figure S3, Supporting Information) are amorphous, even when grown at 350 °C. This result is in agreement with the low leakage current densities and high dielectric strength, since extensive grain boundaries compromise insulating properties. [ 18 ] AFM images of the pre-sent SCS ZrO 2 and Al 2 O 3 fi lms on Si substrates (Figure S4, Supporting Information) further support the amorphous nature, exhibiting featureless surfaces and low RMS roughness (<0.3 nm). Furthermore, as shown in Figure S5 (Supporting Information), these MO dielectric fi lms on fused quartz substrates exhibit ≈90% optical transmittance in the visible region (400–760 nm). The inset graph in Figure S5 (Supporting Information) is a Tauc plot, and extrapolation of the linear region yields optical band gaps of ≈5.6 eV for the SCS Al 2 O 3 and ZrO 2 fi lms. [ 19 ]



Table 1. Electrical properties of the indicated spray (SCS) or spin-coated (spin-CS) combustion oxide fi lms.

Entry Dielectric material

M:Acac molar ratio

Metal Conc. [ M ]

T [°C]

Thickness [nm] a)

J @2 MV cm −1 [A cm −2 ] c)

Breakdown fi eld [MV cm −1 ] c)

Capacitance [nF cm −2 ]

Dielectric constant

Mass density [g cm −3 ]

1 1.0:1.2 0.03 300 9.7 b) 2.1 × 10 −7 9.0 606 11.8 4.45

2 1.0:2.0 0.03 300 9.8 1.7 × 10 −7 8.9 612 11.9 4.81

3 1.0:3.25 0.03 300 25.8 4.6 × 10 −6 6.8 – – 4.63

4 SCS ZrO 2 1.0:2.0 0.05 300 25 3.2 × 10 −7 7.6 – –

5 1.0:2.0 0.075 300 30 2.0 × 10 −6 7.2 – –

6 1.0:2.0 0.03 250 7.0 2.0 × 10 −7 7.4 690 10.9 4.38

7 1.0:2.0 0.03 350 25 1.2 × 10 −7 9.5 370 14.3 5.13

8 Spin-CS ZrO 2 1.0:2.0 0.05 300 11 1.2 × 10 −6 4.5 510 10.0 4.66

9 1.0:2.0 0.03 250 25 2.4 × 10 −7 7.5 210 6.98 2.75

10 SCS Al 2 O 3 1.0:2.0 0.03 300 42 2.2 × 10 −7 7.8 134 7.03 3.08

11 1.0:2.0 0.03 350 85 9.4 × 10 −8 8.2 70 7.07 3.32

12 Spin-CS Al 2 O 3 1.0:2.0 0.05 300 11 1.3 × 10 −6 3.2 450 8.3 2.84

a) Total coating time = 32 min; b) Total coating time = 60 min; c) J , breakdown fi eld and mass density are measured on 10 nm ZrO 2 and 25 nm Al 2 O 3 fi lms.

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Finally, impedance spectroscopy measurements were carried out to further assess SCS fi lm dielectric characteristics. The capacitance–frequency ( C – F ) plots of Figure S6 (Supporting Information) show that Al 2 O 3 and ZrO 2 dielectric fi lms pro-cessed at 300 °C and 350 °C exhibit stable frequency-dependent characteristics from 10 3 to 4 × 10 4 Hz, suggesting good dielec-tric behavior. [ 9c ] Figure 1 d shows that the dielectric constants measured at 10 4 Hz for SCS Al 2 O 3 ( k ≈ 7) and ZrO 2 ( k = 10–14) increase slightly with processing temperature. Importantly, the dielectric constants for both materials are consistent with those in other reports. [2d,4a,5c]

For TFT fabrication, IZO (In:Zn = 7:3) and IGZO (In:Ga:Zn = 3:1:1) semiconductor layers were grown by SCS on selected dielectrics, including 300 nm thick thermal SiO 2 on Si (as a control) and on SCS-derived Al 2 O 3 and ZrO 2 on standard Si(gate)/SiO 2 substrates. Previously, we reported SCS IZO and IGZO TFTs with SiO 2 dielectrics having electron mobili-ties of 8.05 cm 2 V −1 s −1 and 1.80–6.34 cm 2 V −1 s −1 (depending on metal composition), respectively, using a simple airbrush for fi lm growth. Here, a new spray instrument with automatic feeder and ultrasonic nozzle is utilized, which enable accurate amounts of vaporized solution to be reproducibly and uniformly deposited over selected substrate areas. Thus, IZO and IGZO deposition was fi rst optimized to ensure fi lm quality by varying the precursor concentration (0.03 –0.1 M ), nozzle-to-substrate height (2.5–7.5 cm), and pump speed (0.5–2.0 mL min −1 ). AFM images shown in Figure 2 and Figure S7 (Supporting Informa-tion) indicate that optimal ≈25 nm thick SCS IZO and IGZO fi lms, grown using a total metal concentration of 0.05 M , are smooth and featureless with RMS roughnesses of 0.3–0.6 nm. IZO and IGZO TFTs were next fabricated on Si(gate)/SiO 2 sub-strates using the aforementioned conditions and completed

with thermally evaporated Al S/D electrodes (≈50 nm thick, W / L = 1000/50 µm). Representative transfer and output plots are shown in Figure S8 (Supporting Information). IZO and IGZO fi lms processed at 300 °C and 350 °C exhibit average mobilities of 4.5 ± 0.41 cm 2 V −1 s −1 and 3.2 ± 0.28 cm 2 V −1 s −1 , respectively, which are slightly lower than the best performance measured previously but signifi cantly greater than those of the corresponding spin-coated CS devices. [ 7 , 13a ]

Next the performance of SCS-derived ZrO 2 and Al 2 O 3 dielec-tric fi lms as acceptable TFT gate insulators was investigated. SCS IZO and IGZO TFTs were fabricated both on standard Si/SiO 2 gate substrates and on SCS ZrO 2 and Al 2 O 3 , with Al source/drain contacts. Note from Figure 2 , Figures S9 and S10 (Supporting Information), and Table 2 , that these devices exhibit excellent TFT characteristics with negligible hysteresis, low voltage operation, and good current on/off ratios. Thus, IZO TFTs processed at 250 °C exhibit µ max = 8.5 cm 2 V −1 s −1 (Al 2 O 3 ) and 12.1 cm 2 V −1 s −1 (ZrO 2 ) whereas at 300 °C the max-imum mobilities increase to µ max = 33.2 cm 2 V −1 s −1 (Al 2 O 3 ) and 45.5 cm 2 V −1 s −1 (ZrO 2 ). For low-voltage IGZO TFTs, the maximum mobilities on Al 2 O 3 and ZrO 2 dielectrics are 20.8 and 32.5 cm 2 V −1 s −1 , respectively. These mobilities are 7–10× larger than those of the corresponding TFTs on SiO 2 /Si sub-strates. We and others have shown that well-patterned/defi ned gate/semiconductor layers yield greatly enhanced performance (turn-on characteristics, I on / I off ratios, better bias stress sta-bility) than the crudely patterned/unpatterned TFTs based on the same materials stack. [ 7 ]

Encouraged by the promising TFT performance using com-bined SCS-derived dielectric and semiconducting layers, con-ducting ZITO-coated AryLite substrates were next utilized to replace the rigid Si wafers, [ 20 ] and to realize fl exible IZO TFTs



Figure 2. AFM images (top, scale bar = 2 µm) and TFT transfer characteristics (bottom) for the indicated SCS processed dielectric/semiconductor metal oxide materials. a) Processing temperature for both layers is 300 °C. b) Processing temperature for both layers is 350 °C.

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with the architecture AryLite/ZITO/(Al 2 O 3 or ZrO 2 )/IZO/Al. As shown in Figure S11 (Supporting Information), these devices with SCS-derived Al 2 O 3 or ZrO 2 dielectrics processed at 275 °C exhibit TFT characteristics with operating voltages below 3 V and an average mobilities of 3.9 ± 2.2 cm 2 V −1 s −1 and 6.2 ± 3.2 cm 2 V −1 s −1 for Al 2 O 3 /IZO and ZrO 2 /IZO devices, respec-tively. In addition, only slight decreases in mobilities for both devices were observed after bending for 10 cycles at radius of 15 mm. Moreover, the average visible region transmittance of the AryLite/ZITO/Al 2 O 3 or ZrO 2 /IZO devices is ≈72.5% or ≈80.0%, respectively (Figure S12, Supporting Information). These results clearly demonstrate that SCS enables deposition of high-quality MO dielectrics for fl exible and transparent TFT applications.

The next question is whether SCS can fabricate all TFT mate-rials components, including the electrical contacts, and whether this approach in any way compromises the performance of any of the functional layers. Thus, 50 nm thick ITO (In: Sn = 9: 1) fi lms were grown on Si substrates at 350 °C using both SCS and, as a comparison, conventional multi-step spin-coated CS. GIXRD patterns ( Figure 3 a) indicate that the SCS ITO fi lm crystallinity is more pronounced than that of the corresponding spin-coated CS fi lms. The weak Bragg peaks at 21.5°, 37.7°, 41.8°, 45.6°, and 49.2° of the simulated ITO powders are very weak for the spin-coated CS ITO fi lms whereas those for SCS ITO are clearly visible. Furthermore, the X-ray photoelectron spectroscopy (XPS) O 1s data in Figure 3 b indicate that the M-O-M lattice content (529.9 eV) of SCS ITO is ≈63.3%, much higher than that of spin-coated CS ITO (≈54.5%), further con-fi rming better fi lm quality. Four-probe conductivity measure-ments shown in Figure 3 c indicate that the conductivity of the SCS ITO (265 S cm −1 ) is far greater than that of the spin-coated CS (7 S cm −1 ) and 10 4 × greater than that of the IGZO semicon-ductor used to fabricate the TFTs (vide infra).

Next, All SCS MO TFTs were fabricated on Corning 1737F glass through pre-mounted masks. Here, SCS ITO processed

at 350 °C was deposited as the gate electrodes followed by SCS Al 2 O 3 (85 nm) or ZrO 2 (20 nm) dielectrics. The IGZO (In:Ga:Zn = 3:1:1, ≈26 nm thick) semiconductor was then grown by SCS at 350 °C. Finally, 50 nm thick ITO source and drain electrodes were deposited at the same temperature to defi ne a W / L = 1000/150 (µm). As can be seen in Figure 3 d, these TFT stacks have excellent optical transparency, with an average transmittance in the visible of ≈80% for the 2.5 cm × 1.5 cm TFT arrays.

Cross-sectional transmission electron microscopy (TEM) was next performed to assess the TFT stack structural charac-teristics. Figure 4 a,b shows the well-defi ned porosity-free layers with uniform thickness across the samples. The high-quality contacts between the gate electrode and dielectric layer, dielec-tric layer, and semiconductor layer, semiconductor layer and S/D electrode should ensure good gate modulation, low den-sities of electron trap sites, and low contact resistance, respec-tively, while this layer thickness and interfacial quality should enable low-voltage operation with good mobility and excellent reliability. Note that the different TEM gray levels for the gate ITO versus the source/drain ITO probably refl ects different annealing times and/or fi lm growth modes. Energy-dispersive X-ray spectroscopy (EDX) scans of In, Ga, and Al (or Zr) ele-mental distributions indicate continuous layer-by-layer struc-tures without detectable interpenetration. Nano-beam elec-tron diffraction (NBED) of each layer was also carried out to evaluate the crystallinity of all functional (Al 2 O 3 , ZrO 2 , IGZO, ITO) layers (Figure 4 c). [ 21 ] The Al 2 O 3 , ZrO 2 , and IGZO layers exhibit typical diffuse rings, indicating their amorphous char-acter. Interestingly, the halo ring of the IGZO fi lms evidences distinct diffraction spots, indicating nanocrystal formation. Also, EF-NBED analysis of the ITO gate (Figure 4 c) and source/drain (Figure S13, Supporting Information) indicate that both fi lms are crystalline, with the former exhibiting clear diffraction spots. This result agrees with the different gray scale levels in the TEM images of these ITO layers.



Table 2. Performance metrics of SCS IZO and IGZO TFTs on the indicated dielectric layers and substrates at different processing temperatures.

Substrate Semiconductor Dielectric [ d , nm] a)

G Contact S / D Contact T [°C] b)

Mobility [cm 2 V −1 s −1 ]

V TH [V]

V ON [V]

I on / I off

Si IZO SiO 2 (300) Si Al 250 1.3 ± 0.24 −2.3 ± 3.5 −7.2 ± 4.2 ≈10 6

Si IZO SiO 2 (300) Si Al 300 4.5 ± 0.41 15.2 ± 3.1 −14.7 ± 3.8 ≈10 6

Si IGZO SiO 2 (300) Si Al 350 3.2 ± 0.28 13.3 ± 2.1 −21.2 ± 4.8 ≈10 6

Si IZO Al 2 O 3 (25) Si Al 250 6.5 ± 1.8 −0.5 ± 0.2 −0.9 ± 0.2 10 3 –10 4

Si IZO Al 2 O 3 (42) Si Al 300 28.2 ± 2.7 −0.5 ± 0.2 −0.7 ± 0.2 ≈10 4

Si IZO ZrO 2 (7.0) Si Al 250 9.3 ± 2.3 0.2 ± 0.1 −0.2 ± 0.1 10 3 –10 4

Si IZO ZrO 2 (9.8) Si Al 300 35.5 ± 3.8 0.3 ± 0.1 −0.1 ± 0.1 ≈10 4

Si IGZO Al 2 O 3 (85) Si Al 350 19.8 ± 2.4 −1.9 ± 0.5 −0.9 ± 0.3 ≈10 5

Si IGZO ZrO 2 (25) Si Al 350 28.5 ± 3.6 0.7 ± 0.3 0.3 ± 0.2 ≈10 5

AryLite IZO Al 2 O 3 (30) ZITO Al 275 3.9 ± 2.2 −0.6 ± 0.3 −0.9 ± 0.4 10 3 –10 4

AryLite IZO ZrO 2 (8.5) ZITO Al 275 6.2 ± 3.2 0.3 ± 0.3 −0.2 ± 0.2 10 3 –10 4

Glass IGZO Al 2 O 3 (85) ITO ITO 350 3.5 ± 1.5 −0.8 ± 0.2 −1.6 ± 0.3 10 4 –10 5

Glass IGZO ZrO 2 (25) ITO ITO 350 5.3 ± 2.2 −0.2 ± 0.2 −0.6 ± 0.2 10 4 –10 5

a) Average of at least 15 devices; b) The indicated temperatures are identical for processing both the semiconductor and the dielectric layers.

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Figure 3. a) GIXRD pattern of spin-coated CS- and SCS-derived ITO fi lms processed at 350 °C; the bottom black plot is the simulated ITO spectrum. b) XPS scans of spin-coated CS-derived and SCS-derived ITO fi lms processed at 350 °C. c) Electrical conductivities of spin-coated CS ITO, SCS ITO, and IGZO (3:1:1 composition) fi lms at processed at 350 °C. d) Optical transmittance spectra of the entire SCS-derived TFT stacks at 350 °C on glass; the insets show optical images of two TFT arrays.



Figure 4. a) Cross-sectional TEM image of a TFT having the structure: Glass/ITO/Al 2 O 3 /IGZO/ITO/Pt, and energy-dispersive X-ray spectroscopy scans of In, Ga, and Al elements. b) Cross-sectional TEM image of a TFT having the structure: Glass/ITO/ ZrO 2 /IGZO/ITO/Pt, and energy-dispersive X-ray spectroscopy scans of In, Ga, and Zr regions. c) NBED patterns of the Al 2 O 3 , ZrO 2 , IGZO, and bottom ITO layers, respectively.

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The transfer and output characteristics of the present all-SCS IGZO devices are presented in Figure 5 . Sweeping the gate bias backward and forward evidences negligible hysteresis for either the Al 2 O 3 or ZrO 2 devices, indicating no major trapped charges in the IGZO fi lms and at the metal–semiconductor–dielectric interfaces. [ 22 ] The fully SCS TFTs using the Al 2 O 3 gate dielectric exhibit an average mobility of 3.5 cm 2 V −1 s −1 (max = 5.5 cm 2 V −1 s −1 ), current on/off ratio ≈10 5 , and a threshold voltage of −0.8 V, whereas the devices using the higher capaci-tance ZrO 2 dielectric show an impressive average mobility of 5.3 cm 2 V −1 s −1 (max = 7.8 cm 2 V −1 s −1 ), current on/off ratio ≈10 5 , and a threshold voltage of −0.2 V. These mobility values are slightly lower than those measured on Si substrates with Al contacts, possibly refl ecting higher ITO–IGZO contact resist-ance, evident in the output plots of Figure 5 . [ 23 ] Positive gate-bias stress tests were next conducted to examine the operational stability of the all-oxide TFTs in air. Without device packaging, the SCS IGZO TFTs fabricated on glass substrates exhibit small threshold voltage shifts of 0.33 V for Al 2 O 3 dielectric and 0.23 V for ZrO 2 dielectric after a gate-bias stress (+1 V) time of 1000 s.

In conclusion, spray combustion synthesis was successfully utilized for the fi rst time to grow all the functional materials required for TFT fabrication, enabling transparent, low-voltage, high-mobility MO thin-fi lm transistors. High capacitance ZrO 2 and Al 2 O 3 dielectric layers, high conductivity ITO contacts, and

semiconducting IZO and IGZO channel layers with thicknesses as low as 7–85 nm are fabricated at 250–350 °C. High-quality porosity-free, well-defi ned layers with uniform thickness across the TFT stacks ensure good gate modulation, high carrier mobil-ities, and excellent reliability. Lower fabrication temperatures for use with low T g fl exible plastics may be achieved by combining spray combustion synthesis with use of UV-light or a plasma assist. By integrating combustion processing and spray coating, this work demonstrates solution-processing of high-quality amorphous and crystalline MOs, representing a signifi cant advance towards low-cost and large-area oxide electronics.

Experimental Section Materials and Precursor Preparation : All combustion precursor

materials (99.999% trace metals basis) were purchased from Sigma–Aldrich and used without further purifi cation. For dielectric precursors, appropriate amounts of ZrO(NO 3 ) 2 ·2H 2 O and Al(NO 3 ) 3 ·9H 2 O were dissolved with ultrasonication in 40 mL of 2-methoxyethanol to prepare 0.03, 0.05, or 0.075 M solutions. Next, acetylacetone and 14.5 M NH 3 (aq.) in quantities to achieve the desired molar ratios with the metal salts were added by micropipet in sequence and allowed to stir for 12 h before fi lm deposition. Due to the poor solubility of ZrO(NO 3 ) 2 ·2H 2 O, the solution was stirred at 50 °C for 2 d. Details of materials used are summarized in Table S1 (Supporting Information).

Figure 5. Transfer ( V DS = 80 V) and output characteristics, bias stress data with threshold voltage shifts of SCS-derived IGZO TFTs fabricated on a) Al 2 O 3 and b) ZrO 2 gate dielectrics on glass substrates with SCS-derived ITO as the gate and S/D electrodes. The processing temperature is 350 °C for all metal oxide layers.



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For the precursors used for semiconducting and conducting layers, each metal salt (709.6 mg of In(NO 3 ) 3 ·3H 2 O; 594.8 mg of Zn(NO 3 ) 2 ·6H 2 O; 547.5 mg of Ga(NO 3 ) 3 ·H 2 O; 379.2 mg of SnCl 2 ) was dissolved in 40 mL of 2-methoxyethanol before the addition of 400 μL of acetylacetone and 180 μL of 14.5 M NH 3 (aq.) and allowed to stir for 12 h (3 d for Ga(NO 3 ) 3 ·H 2 O). Before fi lm preparation, the combustion precursor solutions were combined in the desired molar ratios and stirred for 2 h; concentration was 0.05 M for all solutions. The mole ratios for IZO, IGZO, and ITO were 7:3, 3:1:1, and 9:1, respectively.

Thin Film Fabrication and Electrical Characterization : All the solutions were fi ltered through 0.2 μm syringe fi lters before fabrication. n ++ silicon wafers (WRS Materials), glass (Corning 1737) and AryLite (Ferrania Technologies) used as substrates were solvent cleaned and then cleaned with an O 2 plasma for 5 min before use. For spin-coated CS, Al(NO 3 ) 3 ·9H 2 O solution, ZrO(NO 3 ) 2 ·2H 2 O solution, and ITO solution were spin-coated on silicon wafers at 3500 rpm for 30 s in a dry air glovebox (humidity ≈22%) and subsequently annealed for 20 min at 350 °C for each layer. This process was repeated three times to obtain the desired fi lm thickness. For SCS, substrates were fi rst maintained at 250 °C –350 °C on a hot plate in ambient with humidity of ≈40%. Then solutions were sprayed portion-wise through an ultrasonic nozzle with a power of 0.5 W, employing a pneumatic airbrush with 3.5 kPa pressure, through fi xed masks held at an optimized vertical distance of 7.5 cm (2.5–7.5 cm). The solution fl ow rate was optimized at 0.5 mL min −1 (0.5–2.0 mL min −1 ) and the spray route is shown in Figure S14 (Supporting Information). After eight cycles, the spraying process was interrupted for 3 min. This sequence was then repeated several times to obtain the desired fi lm thicknesses, and the resultant fi lms were then post-annealed for ≈20 min. For 50–150 nm ITO electrodes, mild post-annealing in a reducing H 2 atmosphere was used to further increase the conductivity. The channel width and length for IZO and IGZO TFTs with Al electrodes were 1000 and 50 μm, respectively, while for SCS ITO electrodes, the channel width and length were 1000 and 150 μm, respectively. For optical and XRD measurements, no mask was used. Current density, capacitance, sheet resistance (conductivity), and TFT characterization were performed under ambient on a custom probe station using an Agilent 4155C semiconductor parameter analyzer. The current densities of the dielectrics were obtained by scanning from 0.0 to positive voltages, then from 0.0 to negative voltages. The dielectric can be modeled as two capacitors in series, 1/ 1/ 1/i diel SiO2

= +C C C . [ 24 ] The areal capacitance of the native oxide on the Si bottom electrode is 1382 nF cm −2 assuming a 2.5 nm thick SiO 2 layer with a dielectric constant of 3.9. The saturated carrier mobility (μ) was evaluated in the saturation region with the conventional metal–oxide–semiconductor fi eld-effect transistor model using the equation, [ 25,26 ]

2( )DS

2μ= −IC W

LV Vi

GS T

where I DS is the drain–source current, C i is the dielectric capacitance per unit area, W and L are the channel width and length, respectively, V GS is the gate-source voltage, and V T is the threshold voltage. Gate-bias stress measurements were conducted on unpassivated TFTs with a positive gate voltage of +1.0 V.

Oxide Film Structural Characterization : Surface roughness was measured with a Bruker Dimensional Icon AFM system in the tapping mode. Film thickness was measured by spectroscopic ellipsometer. Optical spectra were recorded with a Perkin Elmer UV/Vis Lambda 2 spectrophotometer. XRR and GIXRD data were acquired with a Rigaku Smartlab thin-fi lm diffraction workstation using CuKα (1.54 Å) radiation. XPS was performed on a Thermo Scientifi c ESCALAB 250 Xi spectrometer. Oxygen 1s spectra were fi tted using three Gaussian−Lorentzian convolution functions after subtracting a linear baseline. The peak amplitude, width, and shape coeffi cient were used as fi tting parameters while the peak positions were fi xed within a certain range, depending on the particular binding energy. Areas were then calculated for each of the deconvoluted peaks. Cross-sectional STEM, TEM, EDS, and NBED measurements were performed using a JEOL JEM-2100F

transmission electron microscope. The diameter of the electron beam used in nanobeam diffraction is ≈20 nm. Samples were prepared directly from actual TFT devices with standard focused ion beam (FIB) milling technique (FEI Helios NanoLab 600). A 2 μm thick platinum layer was deposited prior to the ion milling to protect samples from ion beam damage.

Supporting Information Supporting Information is available from the Wiley Online Library or from the author.

Acknowledgements The authors thank ONR (MURI N00014-11-1-0690), the Northwestern University MRSEC (NSF DMR-1121262), and Polyera Corp. for support of this research. This work made use of the J. B. Cohen X-Ray Diffraction Facility, EPIC facility, Keck-II facility, and SPID facility of the NUANCE Center at Northwestern University, which received support from the MRSEC program (NSF DMR-1121262); the International Institute for Nanotechnology (IIN); the Keck Foundation; and the State of Illinois. B.H.W. and W.H. thank the joint-PhD program supported by China Scholarship Council for fellowships.

Received: December 7, 2015 Revised: December 23, 2015

Published online: January 28, 2016

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