sercos iii slave for am437x — communication development platform

Sitara AM437x

PRU-ICSSSercos III

Slave MAC

PHY

PHY

ARM Cortex-A9 processorapplication/profile/stack

TI DesignsSercos III Slave For AM437x — CommunicationDevelopment Platform

TI Designs Design FeaturesIndustrial Ethernet for Industrial Automation exists in • Sercos III Slave Firmware for PRU-ICSS Withmore than 20 industrial standards. Some of the well- Sercos MAC-Compliant Register Interfaceestablished real-time Ethernet protocols like EtherCAT, • Board Support Package and Industrial SoftwareEtherNet/IP, PROFINET, Sercos III, and PowerLink Development Kit Available From TI and Third-Partyrequire dedicated MAC hardware support in terms of Stack ProviderFPGA or ASICs. The Programmable Real-Time Unit

• Development Platform Includes Schematics, BOM,inside the Industrial Communication Subsystem (PRU-User’s Guide, Application Notes, White Paper,ICSS), which exists as a hardware block inside theSoftware, Demo, and MoreSitara processors family, replaces FPGA or ASICS

• PRU-ICSS Supports Other Industrialwith a single chip solution. This TI design describesCommunication Standards (For Example,the Sercos III slave solution firmware for PRU-ICSS.EtherCAT, PROFINET, EtherNet/IP, Ethernet

Design Resources POWERLINK, Profibus)• PRU-ICSS Firmware is Sercos III Conformance

Design FolderTIDEP0039 TestedTMDXIDK437X Tools Folder

Featured ApplicationsAM4379 Product FolderTIDEP0001 Tools Folder • Factory Automation and Process ControlTIDEP0003 Tools Folder

• Motor DrivesTIDEP0008 Tools Folder• Digital and Analog I/O ModulesTIDEP0010 Tools Folder

TIDEP0028 Tools Folder • Industrial Communication Gateways• Sensors, Actuators, and Field Transmitters

ASK Our E2E ExpertsWEBENCH® Calculator Tools

An IMPORTANT NOTICE at the end of this TI reference design addresses authorized use, intellectual property matters and otherimportant disclaimers and information.

1TIDUAD6–August 2015 Sercos III Slave For AM437x — Communication Development PlatformSubmit Documentation Feedback

Copyright © 2015, Texas Instruments Incorporated

http://www.ti.com/tool/TIDEP0039

http://www.ti.com/tool/TMDXIDK437X

http://www.ti.com/product/AM4379






http://e2e.ti.com/

http://e2e.ti.com/support/development_tools/webench_design_center/default.aspx

http://e2e.ti.com

http://www.go-dsp.com/forms/techdoc/doc_feedback.htm?litnum=TIDUAD6

Key System Specifications www.ti.com

1 Key System SpecificationsFor 25 years, Sercos has been one of the leading bus systems in factory automation applications such asmechanical engineering and construction. Sercos III is the third-generation Sercos interface and wasestablished in 2003. The efficient and deterministic communication protocol, based on real-timetechnology, merges the hard real-time aspect of the Sercos interface with Ethernet. The Sercos IIItechnology integration requires dedicated hardware to support "on-the-fly" Ethernet frame processing,which up until now was implemented in field-programmable gate arrays (FPGAs) and application specificintegrated circuits (ASICs).

This design guide provides an overview of the Sercos III fieldbus technology and the implementation ofthe Sercos III protocol into the Sitara™ AM437x processors.

The TIDEP0039 Sercos III For AM437x — Communication Development Platform combines the Sitaraprocessor family from Texas Instruments (TI) and the Sercos III media access control (MAC) layer into asingle system-on-chip (SoC) solution.

2 Sercos III Slave For AM437x — Communication Development Platform TIDUAD6–August 2015Submit Documentation Feedback


http://www.ti.com


MST

Pay-load

MDT0HDR

Pay-load

MDT1HDR

Pay-load

AT0HDR

Pay-load

AT0MST

Pay-load

MDT0ETH telegrams

One Sercos III communication cycle

Sercos real-time channel (RT) Unified communication channel (UCC)

P-Channel

S-ChannelSercos III

Master

DriveAnalog I/ODigital I/O

Sensor

www.ti.com System Description

2 System Description

2.1 Technology IntroductionIn a Sercos III Industrial Ethernet network, one Sercos III master controls multiple Sercos III slave devices.Slaves are network devices such as drives, sensors, and analog and digital I/O devices (see Figure 1). Ina Sercos III network, one master can control up to 511 slaves.

Figure 1. Example Sercos III Network in Ring Topology With P- and S-Channel

Both master and slave devices have two real-time Ethernet ports, and wiring between devices can berealized either in line or ring topology. Other wiring topologies like star or stub are not supported. Tosimplify wiring and to reduce installation errors, the Ethernet cable can be connected to any port on amaster or slave device.

Network redundancy is only supported with ring topology. The master sends out each frame twice, oneover the primary channel (P-channel) and one over the secondary channel (S-channel). The transmissionof Sercos III frames by the master takes place on both channels simultaneously. This mechanism is alsoused to synchronize timing across all slaves (see Section 2.3).

Sercos III combines a deterministic real-time-Ethernet channel (RT) and a best-effort-Ethernet channel(unified communication channel (UCC)) on the same Ethernet cable using time multiplexing (seeFigure 2). During the time slot of the Sercos III real-time channel, only the master is allowed to start thetransmission of a Sercos III Ethernet frame. The frame is received by all slaves and is being processedon-the-fly, meaning each slave that receives the Sercos III Ethernet frame processes the bytes from thebyte-stream without changing the overall frame length. At the end of the frame, the slave recalculates andreplaces the frame check sequence (FCS) in case the content has been modified.

The overall processing delay in a slave from incoming port to outgoing port is constant and approximately1 μs. Therefore, the frame round-trip delay in a network with 10 slaves is 10 μs in ring topology and 20 μsin line topology.

Figure 2. Sercos III Communication Cycle

During the time slot of the RT channel, only the master transmits master data telegram (MDT) and axistelegram (AT) Sercos III frames, which contain the cyclic process data and asynchronous communicationdata. The UCC channel is used by the master and slaves to transmit Ethernet frames using the best-effortstandard Ethernet approach.

Slaves are not allowed to transmit Ethernet frames in the RT channel, and they have to buffer any UCCframes in the local memory. In line topology, it is common practice to add a service computer to the lastslave to check or configure the slaves while the Sercos III network is operational. The last slave buffersUCC frames that are received during the RT channel and starts transmitting them after the UCC channelis opened.



http://www.ti.com


PreambleSFD

DestinationAddress

SourceAddress

EthernetType

MST Data Field FCS

Telegram timing reference (TTref)

Start of CON_CLK, t6/t7...

PreambleSFD

DestinationAddress

SourceAddress

EthernetType

7+1 Bytes 6 Bytes 6 Bytes 2 Bytes 46 to 1500 Bytes 4 Bytes

MST Data Field FCS

System Description www.ti.com

Sercos III supports bus cycle times of down to 31.25 μs, which are used in dedicated drive applicationswhere the programmable logic controller (PLC) handles the motor control loop. In less demandingapplications, bus cycle times in the millisecond range are used.

After startup, the Sercos III network goes through different communication phases before it reaches theoperational state when real-time process data is exchanged. These are called communication phases(CP0, CP1, CP2, CP3, and CP4); it starts from CP0 (detecting of slaves) to CP4 (operational state, cyclic,and acyclic data communication).

2.2 Sercos III FrameOnly the master can generate Sercos III MDT and AT Ethernet frames. The MDT frame transfers datafrom the master to the slave while the AT frame transfers data from the slaves to the master. Figure 3shows the generic Sercos III frame structure. Sercos III frames are broadcast frames. Each slaveprocesses the frame by taking or placing data from the data field while forwarding the modified orunmodified content to the secondary port. The master receives back the modified frame; hence, in linetopology, the last slave loops back the frame, and in ring topology, the frame is received on the master’ssecondary port.

Figure 3. General Sercos III Frame Structure

The data field contains the cyclic and acyclic data for each slave. Each slave has a descriptor list thatdescribes the location in the frame where it can read or write data. The slave validates the received FCSat the end of the frame. If the FCS is invalid, the frame content is not processed by the slave. If the slavehas modified the content of the frame, it has to update the FCS; otherwise, the frame is corrupted and willbe ignored by the next slaves or the master.

Because a Sercos III frame is based on standard Ethernet, it has a minimum and maximum frame length.The minimum frame is 72 bytes, which takes 5.8 μs to transmit at 100 Mb/s. The longest frame is 1526bytes, which takes 122 μs to transmit. The frame length as well as the number of MTD and AT frames areset by the master and are configured in the slaves during CP2.

2.3 SynchronizationThe master sync telegram (MST) field in the MDT0 frame is used by the master for slave synchronization.The MST field has its own FCS. Each slave validates the MST FCS and uses the MST time reference asan internal synchronization event.

Figure 4. MDT0 Frame Synchronization Method

In CP2, the master measures the port-to-port delay of each slave, calculates the frame round-trip time andprograms a different port delay time into each slave’s ports. Finally, all slaves are synchronized in CP4 tothe master’s reference clock. The slave uses the MST synchronization events to internally synchronize theRT and UCC channel time slot as well as to generate a hardware synchronization signal calledCON_CLK.

The CON_CLK hardware signal is used to synchronize a coprocessor or application to the Sercos IIIcommunication cycle.



http://www.ti.com


Sercos IIIMaster

DriveAnalog I/ODigital I/O

Sensor

P-Channel

www.ti.com System Description

2.4 Service Channel (SVC)The MDT and AT frames embed an asynchronous communication channel that is used by the master totransfer communication, parameter and diagnostic data. The master issues SVC read and write requeststo defined data structure (identification number [IDN]) in each slave. For example, the IDNs are used toconfigure Sercos III network parameters and UCC channel parameters.

2.5 TopologyA Sercos III network is configured as line or ring topology. When using line topology, a daisy-chain cablingis used and only one port of the master is connected to the first slave. The last slave in the chain loops-back the MDT/AT frames, so they are received back by the master (see Figure 5).

Figure 5. Line Topology With Last Device in Loopback Mode

To support network redundancy, use ring topology (see Figure 1). The primary port of the master isconnected to the first slave and the secondary port is connected to the last slave. The master transmitsSercos III frames simultaneously on both ports. In case of an Ethernet cable break (called ring break), theslave that detects the break immediately starts the loopback mode. The slave sends the MDT/AT framesback on the same port where the frames were received. The master detects the ring break scenario in thestatus information of the AT frames. After the ring-break is physically resolved, the master issues a ringheal command to the slaves to restore the ring topology connection. Ring break and ring heal can occuranytime, but the master continues to operate the network in CP4.



http://www.ti.com


Sitara AM437x

PRU-ICSSSercos III

Slave MAC

PHY

PHY

ARM Cortex-A9 processorapplication/profile/stack

Processorapplication/profile/stack

Hostinterface

FPGASercos III

MAC

PHY

PHY

Power management subsystem

Sercos III Slave Solution With Sitara Processors From TI www.ti.com

3 Sercos III Slave Solution With Sitara Processors From TI

3.1 Components of Sercos III SlaveMany existing Sercos III slave solutions consists of an application processor, a FPGA, two industrialEthernet physical layer devices (PHYs), and power management (see Figure 6). The applicationprocessor executes the customer’s application, the Sercos III user profile and slave stack. The FPGAimplements the Sercos III real-time Ethernet MAC that handles the real-time critical functions of theSercos III standard. The MAC in the FPGA is connected to two industrial Ethernet PHYs that provide theSercos III network ports. The devices need to be powered by a dedicated power management solution.

Figure 6. Sercos III Slave Solution With Processor and FPGA

The AM437x Sitara TI design (TIDEP0039) combines the Sercos III MAC function blocks of an FPGA withthe application processor. This leads to an integrated solution combining the customer application, theprofile, and stack with the Sercos III MAC on a single SoC (see Figure 7). The powerful ARM® Cortex®-A8 application processor handles the application, the Sercos profile, and stack. The Sercos III real-timecritical functions are handled by the PRU-ICSS, which is integrated on the AM335x Sitara family of MPUs.A dedicated power management unit (PMU) device supplies the Sitara device enabling a simplified powermanagement solution.

The fast internal interconnect between the ARM Cortex-A8, the PRU-ICSS, internal memory, and otherperipherals allow fast exchange of real-time process data.

Figure 7. Integrated Sitara Sercos III Slave Solution



http://www.ti.com


ARM

Cortex -A9

®

®

Up to 1 GHz

Graphics

Acceleration

SGX530

Quad-Core

PRU-ICSS

System Services

Connectivity and I/Os

Security

AccelerationPac

Display

Subsystem32K/32K L1

Industrial

45 nm

Communication

Subsystem

EtherCAT ,

PROFINET ,EtherNet/IP™ +Motor feedback

protocols +Sigma Delta

®

®

24-Bit LCD

ProcessingOverlay,Resizing,

Color SpaceConversion, etc.

Touch ScreenController

256K L2/L3

64K RAM

EDMA WDT RTC

NAND/

NOR

(16-Bit ECC)

3 MMC/

SD/SDIO

McASP

×2

GPIO

UART ×6

PWM ×6CAN ×2CameraI/F (2×

Parallel)

EMAC2-PortSwitch

10/100/1Gw/ 1588 USB2

Dual-RolePHY ×2 HDQQSPI

eCAP/eQEP ×3 SPI ×5

I C ×32

2 12-Bit ADCsDebug 12 Timers SyncTimer 32KSimple Pwr Seq

256KB L3 Shared RAM

32-Bit

LPDDR2/DDR3/DDR3L Crypto, Secure Boot

www.ti.com Sercos III Slave Solution With Sitara Processors From TI

3.2 Sitara AM437x Peripheral Block DiagramThe Sitara AM437x device family is a low-power application processor with an ARM Cortex-A9 RISC coreand a broad range of integrated industrial peripherals (see Figure 8). The ARM Cortex-A9 supports clockfrequency ranges from 300 MHz for simple I/O applications up to 1 GHz for complex control applicationsthat require more CPU performance.

Figure 8. AM437x Family Block Diagram



http://www.ti.com


PRU-ICSSFPGA compatible interface

P1 / Ethernet PHY

Ethernet

IP

TCP/UDPSercos III stack

Function specific profile (drive, IO, and so on)

IP applications (web-server, TFTP, and

so on)

Application

S/IP

Hardware 100Mbit/s

Sercos communication profile

Generic device profile

Device application

P2 / Ethernet PHY

Sercos register i/f

Sercos III Slave Solution With Sitara Processors From TI www.ti.com

3.3 Sercos III Slave System and Software ArchitectureThe hardware layer of Sercos III requires 100 Mb/s Ethernet for the physical layer (PHY). In theTIDEP0039, this is implemented with two TLK105L Ethernet PHYs from TI. The PHY’s MII connects to thePRU-ICSS that handles the real-time functions of the Sercos III standard. The PRU-ICSS exchanges real-time data, Ethernet frames, control, and status information through the internal shared memory interfacewith the Sercos and Ethernet stack. The Sercos III stack and the function-specific profile (drive, I/O, andso on) provides an application programming interface (API) to the customer’s application. The standardEthernet frames are placed by PRU-ICSS in a dedicated shared memory area. Ethernet applications likeweb server and trivial file transfer protocol (TFTP) can access the Ethernet frames through a dedicatedframe queue.

Figure 9. Sitara Sercos III Slave System and Software Architecture

3.4 Sercos III Stack Integration and Solution ValidationThe TIDEP0039 solution has been validated with the Sercos III stack from third-party stack providerCannon-Automata, using the Sercos III Conformizer validation tool. All required communication testscases have been tested and confirmed. Customers can leverage this integrated solution by contacting thethird-party stack provider, who gives them access to the validated Sercos III solution to jump start productdevelopment. The Sercos III firmware for PRU-ICSS has been implemented with a register interfaceequivalent to the Sercos III FPGA to allow customers to reuse existing stack solutions.



http://www.ti.com


www.ti.com Sercos III Slave Solution With Sitara Processors From TI

3.5 Development ToolsThe TIDEP0039 solution can be evaluated with the AM437x industrial development kit (IDK) board (seeFigure 10). The board is intended for developing industrial Ethernet protocols for master and slavesdevices, for example, I/O modules, sensors, actuators, motor controls, and PLCs. The two real-timeEthernet ports of the PRU-ICSS are accessible by two RJ45 connectors. Additionally, the board isequipped with digital inputs and outputs through onboard connectors.

Figure 10. AM437x IDK Board

Further software development can be done using the industrial software development kit (SDK), whichcombines SYS/BIOS (real-time operating system (RTOS) from TI) and example projects using industrialEthernet protocols.

One key advantage of the Sitara AM437x family is that it allows for a flexible and dynamic exchange of theindustrial Ethernet protocol within the PRU-ICSS (see Figure 11). The application processor loads newfieldbus firmware in the PRU-ICSS during device initialization, making external fieldbus ASICs or FPGAsredundant. This enables customers to support various industrial Ethernet protocols, including EtherCAT,PROFINET, Sercos III, EtherNet/IP, and Ethernet POWERLINK, with one single hardware platform.



http://www.ti.com


AM437x Sitara ARM MPU

Connectivity

USBLCDMMC

CPGSW

SPII2C

UARTCAN

ICSS v3

PRU0 PRU1 PRU2 PRU3

MDRV83133x PWM

OPA365/2350to ADCs (3x I, 3x VBus)

General PurposeProcessor

ARMCortex

A9

TXB0106PWeQEP

SN65HVD78EnDAT

M12 / ENDAT 2.2

J 1x5

µSDI2C

EEPROMQSPIFlash

DDR3

GBit PHY

TLK105L

TLK105LRJ45

RJ45

RT_MII

RT_MII

1xCPGSWRJ45

RX/TX/TX_enpin-header

DCAN_RX/TXpin-header

Expansion Connector

Power

HVS882

TPIC2810

8x digital I/O

SPI

I2C

LEDs

tripzone

Industrial LEDsGPIO

Real-Time EthernetEtherCAT

Profinet RT/IRTSercos 3

Ethernet/IPPower-Link

FieldbusCAN

Profibus slave

Block Diagram www.ti.com

4 Block Diagram

Figure 11. AM437x IDK (TMDXIDK437X) Board System Block Diagram



http://www.ti.com


www.ti.com Block Diagram

4.1 Highlighted Products

4.1.1 AM4379 ProcessorUp to 1-GHz Sitara™ ARM Cortex-A9 32‑bit RISC processor• NEON™ SIMD coprocessor and vector floating point (VFPv3) coprocessor• 32KB of L1 instruction and 32KB of data cache• 256KB of L2 cache or L3 RAM• 256KB of on-chip boot ROM• 64KB of dedicated RAM• Emulation and debug — JTAG• Interrupt controller

PRU-ICSS• Supports protocols such as EtherCAT®, PROFIBUS, PROFINET, EtherNet/IP™, EnDat 2.2, and more• Two PRUs subsystems with two PRU cores each• 32-bit load/store RISC processor capable of running at 200 MHz• 12KB (PRU-ICSS1), 4KB (PRU-ICSS0) of instruction RAM with single-error detection (parity)• 8KB (PRU-ICSS1), 4KB (PRU-ICSS0) of data RAM with single-error detection (parity)• Single-cycle 32-bit multiplier with 64-bit accumulator• Enhanced GPIO module provides shift-in/out support and parallel latch on external signal• 12KB (PRU-ICSS1 only) of shared RAM with single-error detection (parity)• Three 120-byte register banks accessible by each PRU• Interrupt controller module (INTC) for handling system input events• Local interconnect bus for connecting internal and external masters to resources inside PRU-ICSS• Peripherals inside PRU-ICSS:

– One UART port with flow control pins, supports up to 12 Mb/s– One enhanced capture (eCAP) module– Two MII Ethernet ports that support industrial Ethernet, such as EtherCAT– One MDIO port

On-chip memory (shared L3 RAM)• 256KB of general-purpose on-chip memory controller (OCMC) RAM• Accessible to all masters

External memory interfaces (EMIF)• DDR controllers:

– LPDDR2: 266-MHz clock (LPDDR2-533 data rate)– DDR3 and DDR3L: 400-MHz clock (DDR-800 data rate)– 32-bit data bus– 2GB of total addressable space– Supports one x32, two x16, or four x8 memory device configurations

• General-purpose memory controller (GPMC)– Flexible 8-bit and 16-bit asynchronous memory interface with up to seven chip selects (NAND,

NOR, Muxed-NOR, SRAM)– Uses BCH code to support 4-, 8-, or 16-bit ECC– Uses hamming code to support 1-bit ECC

See the AM4379 datasheet for a complete list of features [1].



http://www.ti.com


Block Diagram www.ti.com

4.1.2 AM437X Industrial Development Kit (IDK) EVM Hardware Specification• AM4379 ARM Cortex-A9• 1GB DDR3, QSPI-NOR Flash• Discrete power solution• EnDat connectivity for motor feedback control• 24-V power supply• USB cable for JTAG interface and serial console

Software and Tools• SYS/BIOS real-time OS• StarterWare base port• Code Composer Studio™ (CCS) integrated development environment (IDE)• Application stack for industrial communication protocols• Sample industrial applications

Connectivity• PROFIBUS interface• CANOpen• EtherCAT• EtherNet/IP• PROFINET• Sercos III• IEC61850• PWM• Motor axis position feedback• Up to 3-phase motor drive connector• Sigma Delta decimation filter• Digital inputs and outputs (I/O)• SPI• UART• JTAG

See the AM437x IDK website for a complete list of features and design resources(http://www.ti.com/tool/TMDXIDK437X).



http://www.ti.com

http://www.ti.com/tool/TMDXIDK437X


www.ti.com Test Data

5 Test Data

Figure 12. Sercos Conformizer Test Report Extract



http://www.ti.com


Summary and Conclusion www.ti.com

6 Summary and ConclusionThe TIDEP0039 Sercos III slave communication development platform combines the Sercos III firmwarefor the PRU-ICSS and an equivalent Sercos III register interface with the TMDXIDK437X board. Third-party service provider Cannon-Automata offers customers a Sercos III reference stack and exampleapplication. Alternatively, customers can use an existing stack and interface it to the TIDEP0039 Sercos IIIslave solution.

With the TIDEP0039 Sercos III slave communication development platform, customers can jump start theirdevelopment of Sercos III-based industrial applications like industrial I/Os, drives, sensors, and actuators.The solution saves development efforts and production cost by integrating the industrial Ethernet protocolinto the microprocessor (MPU) and shortens time to market.

It also demonstrates that customers can remove the external FPGA or fieldbus ASIC withoutcompromising the functional or operational requirements.



http://www.ti.com


Warm Reset Switch

AM437X_OSC0_OUTAM437X_OSC0_IN

GND_OSC0

OSC0_IN

PORZn

SYS_WARMRESETn

OSC0_OUT

GND_OSC0

DGNDDGND

V3_3D

V3_3D

V3_3D

DGND

DGND

V3_3DREG

DGND

SYS_RESETn <5,7,8,11,17,19>

SYS_WARMRESETn<18>

PORZn<7,20> PORZ_RELEASE <4>

U54SN74LVC1G07

24

53 1

R860

R6910K

R499

100

C2871uF

R4870

R566 0

R870

TP2TP

R7510K

SW2 B3SL

1 23 4

C3624pF

R92 0

R900

C3524pF

R821M

R91 0

C2810.01uF

Y1

24MHz 13

24

AM

43

7x

Ma

inO

sc/C

trl

In

du

str

ial

EV

M

U11-2

AM437X_ZDN

OSC0_INC25

OSC0_OUTB25

NMInG25

PORZnY23

RESETIN_OUTnG22

CLKREQH20

VSS_OSCB24

R498

100

www.ti.com Design Files

7 Design Files

7.1 Physical TMDXIDK437X EVMTo purchase the TMDXIDK437X the TI shop, see its product page at http://www.ti.com/tool/tmdxidk437x.

7.2 SchematicsTo download the schematics, see the design files at TIDEP0039.

Figure 13. Processor System Schematic



http://www.ti.com

http://www.ti.com/tool/tmdxidk437x



VD

DS

_C

TM

VD

DA

3P

3_

PM

LD

O

VD

DA

1P

8_P

MLD

O

CAP_VDD_RTC

VD

DS

_T

AM

PE

RV

DD

_T

AM

PE

R

VDDA_ADCVDDA_MC_ADC

AM437X_VDDS

VDD_CORE

DGND

DGND

VDD_CORE

DGND

VDD_MPU

V3_3D_AM437XDGND

AM437X_VDDS

DGND

VDD_CORE

VDD_MPU

DGND

V3_3D_AM437X

V1_5D

VAM437X_DDR

DGND

DGND

DGNDDGND

V1_8D_AM437X

V3_3D_AM437X

V1_8D_AM437X

V1_8D_AM437X

DGND

DGND

DGND DGND

DGND

V1_8D_AM437X

DGND

DGND

V1_8D_AM437X

V1_8D_AM437X

DGND

V3_3DV1_8D_PMLDO

DGND

V1_8D_AM437X

DGNDDGND

VDD_CORE

V1_8D_AM437X

DGND

VDDA_MC_ADC

VDDA_ADC

GNDA_ADC

DGND

V1_8D_PMLDO

V3_3D_AM437X

V3_3D_AM437X

V3_3D_AM437X

V3_3D_AM437X

V3_3D_AM437X

V3_3D_AM437X

V3_3D_AM437X

V3_3D_AM437X

V3_3D_AM437X

V3_3D_AM437X

DGND

V1_8D_AM437X

V3_3D_AM437X V3_3D

V1_8D_AM437X V1_8DDGND

V1_8D_AM437X

TP19TP1mm

C207

0.01uF

C1920.01uF

C200

0.01uF

C241

0.01uF

C2181uF

C159

0.01uF

R463

0

C210

0.01uF

C230

0.01uF

C195

0.01uF

C60

0.01uF

R149 0

C40

0.01uF

FB7

150OHM800mA

1 2

C180

0.01uF

C25710uF

R1390

C233

0.01uF

C217

0.01uF

C59

0.01uF

C17210uF

C66

0.01uF

FB9150OHM800mA1 2

C1911uF

FB8150OHM800mA1 2

C224

0.01uF

C211

0.01uF

FB1

150OHM800mA

1 2

C205

0.01uF

C29

0.01uF

C201

0.01uF

C252

0.01uF

C280

10uF

R142

0

AM437x

17x17

Socket

SCKT1

DNI

MCH1 MCH2

MCH3 MCH4

C231

0.01uF

C2420.01uF

C47

0.01uF

TP21 TP1mm

TP20

TP1mm

C220

0.01uF

R444 DNI

C711uF

C39

0.01uF

FB10150OHM800mA1 2

C52

0.01uF

C48

0.01uF

C184

0.01uF

C240

0.01uF

C53

0.01uF

C30

0.01uF

C213

0.01uF

C22910uF

C1980.01uF

C197

0.01uF

C206

0.01uF

C204

0.01uF

C223

0.01uF

C236

0.01uF

C1730.01uF

C181

0.01uF

C3110uF

C219

0.01uF

C202

0.01uF

C32

0.01uF

C199

0.01uF

C18910uF

C193

0.01uF

FB11150OHM800mA

1 2

R456

0

C2121uF

C256

0.01uF

C234

0.01uF

C1790.01uF

C160

0.01uF

C21410uF

C221

0.01uF

AM437x Power

Industrial EVM

U11-20

AM437X_ZDN

VDDSHV1J7

VDDSHV1J8

VDDSHV2V16

VDDSHV2V17

VDDSHV2W16

VDDSHV3J18

VDDSHV3K17

VDDSHV3K18

VDDSHV3N18

VDDSHV3N19

VDDSHV3P18

VDDSHV3W18

VDD_COREJ10

VDD_COREJ11

VDD_COREL12

VDD_COREL14

VDD_COREM9

VDD_COREM12

VDD_COREM14

VDD_COREN9

VDD_COREN16

VDD_COREN17

VDD_COREP16

VDD_COREP17

VDD_CORER9

VDD_CORER11

VDD_CORER14

VDD_CORET9

VDD_CORET11

VDD_CORET14

VDD_CORET18

VDD_CORET19

VDD_COREU15

VDD_COREV15

VDD_COREW12

VDD_COREW13

VDD_MPUH13

VDD_MPUH14

VDD_MPUH16

VDD_MPUJ13

VDD_MPUJ14

VDD_MPUJ16

VDD_MPUK19

VDD_MPUK20

VDD_MPUL19

VDD_MPUL20

VDD_MPUM17

VDD_MPUM18

VDD_MPU_MOND20

VDDS_CLKOUTE23

VDDS_OSCC23

CAP_VBB_MPUF19

CAP_VDD_SRAM_COREE13

CAP_VDD_SRAM_MPUE14

VDDS_SRAM_CORE_BGF13

VDDS_SRAM_MPU_BBF14

VDDS_PLL_CORE_LCDN21

VDDS_PLL_DDRG5

VDDS_PLL_MPUE17

VDDA1P8V_USB0W21

VDDA1P8V_USB1U21

VDDA_3P3V_USB0W20

VDDA_3P3V_USB1U20

VSSA_USBW23

VDD_DDRK7

VDD_DDRK8

VDD_DDRM7

VDD_DDRM8

VDD_DDRN7

VDD_DDRN8

VDD_DDRR6

VDD_DDRR7

VDD_DDRR8

VDD_DDRT7

VDD_DDRT8

VDD_DDRV7

VDD_DDRV8

GN

DA

1

GN

DA

25

GN

DH

15

GN

DH

18

GN

DJ9

GN

DJ1

2

GN

DJ1

5

GN

DJ1

7

GN

DK

9

GN

DK

11

GN

DK

12

GN

DK

14

GN

DK

15

GN

DL

8

GN

DL

9

GN

DL

11

GN

DL

15

GN

DL

17

GN

DL

18

GN

DM

10

GN

DM

11

GN

DM

13

GN

DM

15

GN

DM

16

GN

DN

10

GN

DN

11

GN

DN

12

GN

DN

13

GN

DN

14

GN

DN

15

GN

DP

8

GN

DP

9

GN

DP

10

GN

DP

11

GN

DP

12

GN

DP

13

GN

DP

14

GN

DP

15

GN

DR

12

GN

DR

15

GN

DR

17

GN

DR

18

GN

DT

12

GN

DT

15

GN

DT

17

GN

DU

8

GN

DU

9

GN

DU

10

GN

DU

11

GN

DU

12

GN

DU

13

GN

DU

14

GN

DU

16

GN

DU

17

GN

DU

18

GN

DU

19

GN

DV

9

GN

DV

10

GN

DV

11

GN

DV

12

GN

DV

13

GN

DV

14

GN

DV

18

GN

DA

E1

GN

DA

E2

5

VDDSHV5F22

VDDSHV6G16

VDDSHV6G17

VDDSHV6H17

VDDSHV7F16

VDDSHV8G13

VDDSHV8G14

VDDSHV9G11

VDDSHV9H11

VDDSHV10G10

VDDSHV10H10

VDDSHV11H8

VDDSHV11H9

VD

DS

_C

TM

AD

12

VDDSG6

VDDSH12

VDDSP19

VDDSW15

VDDSY19

VD

DA

1P

8_

PM

LD

OD

6

VD

DA

3P

3_

PM

LD

OF

8

VDDSF20

VDDA_MC_ADCY16

VDDA_TS_ADCAB12

VSSA_ADCAC15

VD

D_

TP

MA

D9

VD

DS

_T

PM

AD

8

CA

P_V

DD

_R

TC

AD

3

VD

DS

_R

TC

AD

5

VP

PP

21

TESTOUTH21

TEST_ENAA23

FB14150OHM800mA

1 2

C62

0.01uF

FB6

150OHM800mA

12

C203

0.01uF

C158

0.01uF

C216

0.01uF

Design Files www.ti.com

Figure 14. Processor Power Schematic



http://www.ti.com


SPIMEM_CLK

SPIMEM_D0SPIMEM_D1SPIMEM_D2

AM437X_QSPI_D2

SPIMEM_D3

AM437X_QSPI_D3

SPIMEM_CS

AM437X_QSPI_CLK

AM437X_QSPI_D0AM437X_QSPI_D1

AM437X_QSPI_CSn

DGND

V3_3D

V3_3D

SYS_RESETn<2,7,8,11,17,19>R152 0

R144 0

C630.01uF

U46

MX66L51235FMI

SCLK16

SI/SIO015

SO/SIO18

WP/SIO29

VCC2

GND10

CS7

DNU/SIO31

RESET3

NC44

NC55

NC66

NC1111

NC1212

NC1313

NC1414

R128 0

R4570

R1370R4490

AM

43

7x

QS

PI

NO

RM

em

ory

In

du

str

ial

EV

M

U11-5

AM437X_ZDN

GPMC_CSN0/QSPI_CSnA8

GPMC_WEN/QSPI_D2D10

GPMC_BE0N_CLE/QSPI_D3C10

GPMC_OEN_REN/QSPI_D1E10GPMC_ADVN_ALE/QSPI_D0A9

GPMC_CSN3/QSPI_CLKB12

R4530

R45810K

Main 24VDC Power Input

VPWRIN_PREFUSE VPWRIN_FUSEDVPWRIN_JCK

AM437X_I2C0_SCLAM437X_I2C0_SDA

VDD_MPU_OUT VDD_MPU_SENSE

V1_8DEN

VDD_CORE_ENVDD_MPU_EN

PORZ_RELEASE

VDD_MPU_SENSEP

DGND

DGNDDGND

DGND

V24_0D

DGND

DGND DGND

DGND

DGND DGNDDGND

V3_3D

DGND

VDD_MPUV3_3D V3_3D

DGND DGND

DGND

DGND DGND

DGNDDGND

V3_3DREG

DGND

V24_0D

V1_8DREG

DGND

V24_0D

DGND DGND

DGND

DGNDDGND

DGNDDGND

V1_5DREG

DGND

V24_0D

DGND DGND

DGND

DGNDDGND

DGNDDGND

VDD_COREREG

DGND

V24_0D

DGND DGND

DGND

DGND DGND

DGNDDGND

V1_5D

DGND

VDD_CORE

DGND

V1_8D

DGND

V3_3DREG

DGND

DGND

V3_3DREG

DGND

DGND

DGND

V3_3DREG

DGND

DGND

V3_3D

V3_3D

VDD_MPU

V1_8D

VDD_CORE

V5_0D

DGND

V24_0D

DGND DGND

DGND

DGND DGND

DGNDDGND

V3_3D

DGND

DGND

DGND

DGND

GP_I2C_SDA<11,12,17>GP_I2C_SCL<11,12,17>

PORZ_RELEASE <2>

C981uF

R356 0

R2

35

60

.4K

R938.06K

U35

TPS62362

VINA4

AVINA1 SW

B4

SWB3

ENB2

VDDD1

SCLD3

SDAD2

VSEL0C2

VSEL1A3

SENSEPB1

SENSEMC1

AGNDA2

PGNDD4PGNDC4PGNDC3

D1MBR0530T1

R3550

C1480.1uF

TP9TP

R299 0

R18140.2K

C2731uF

C770.01uF

C322100uF

R1851K

R5

56

10

K

C27220uF

R18251K

U52

TPS22922B

VINA2

VINB2 VOUT

A1

VOUTB1

GNDC1ON

C2

R2730

R4190

D16MBR0530T1

U15

TPS5402D

VIN2

COMP6

SS4

ROSC3

GND7

VSNS5

BOOT1

LX8

C131220uF

R354 0

D2Green LED

C88

0.1uF

C16810uF

C1711uF

TP11TP

R40910K, 1%

R3250

D21SMCJ26CA

L5

1uH1 2

C752200pF

C346

0.01uF

R15651K

R2

30

14

K

C7410uF

C12422uF

C170.01uF

R5

51

10

K

R165

16K

R1434K

R29815K,1%

R20

33

R4242.2K

R23410K

TP1TP

C27222uF

R17349.9K

R296

0

C1181uF

R486 0

R16449.9

L6100uH

1 2

R5

50

10

K

R15949.9K

C343

0.01uF

U3

TPS5402D

VIN2

COMP6

SS4

ROSC3

GND7

VSNS5

BOOT1

LX8

U40

TPS22922B

VINA2

VINB2 VOUT

A1

VOUTB1

GNDC1ON

C2

R4182.2K

L7

100uH1 2

R9451K

D14MBR0530T1

R379 0

D11MBR0530T1

R22410K

C9510uF

L4

47uH1 2

C960.1uF

C790.01uF

C970.1uF

R3590

C722200pF

C271220uF

C51

0.1uF

C7010uF

U17

TPS5402D

VIN2

COMP6

SS4

ROSC3

GND7

VSNS5

BOOT1

LX8 R492

49.9

R1663.01K

R22810K

R194.75K, 1%

L9

47uH1 2

C14410uF

C112200pF

R358 0

C26610uF

C1210uF

C822200pF

U26

TPS386000

MR1

CT15

CT24

CT33

CT42

SENSE110

SENSE29

SENSE38

SENSE4L7

SENSE4H6

VCC14

GND12

TP

AD

TP

AD

VREF13

WDI20

NC11

RESET115

RESET216

RESET317

RESET418

WDO19

C1

0.1uF

R18422K

R23710K

J13

DNI

1

2

U29

TPS22922B

VINA2

VINB2 VOUT

A1

VOUTB1

GNDC1ON

C2

C17522uF

U14

TPS5402D

VIN2

COMP6

SS4

ROSC3

GND7

VSNS5

BOOT1

LX8

TP14TP

R17551K

C344

0.01uF

R360DNI

R2

29

24

K,

1%

D13MBR0530T1

J12Power Jack RAPC722X

1

23

C16510uFR324

0

R48118K

R30249.9

C67

0.1uF

R48049.9

U53

TPS22922B

VINA2

VINB2 VOUT

A1

VOUTB1

GNDC1ON

C2

F1

Fuse 4A

1 2

C253 0.1uF

R4900

R17620.5K

R52 0

R9560.4K

R4820

C27610uF

C440.01uF

R41549.9

C4510uF

R49115K,1%

C25422uF

C2681uF

TP7

TP

C1570.1uF

U10

TPS5402D

VIN2

COMP6

SS4

ROSC3

GND7

VSNS5

BOOT1

LX8

D19MBRS140T

C114

0.01uF

TP16TP

AM

43

7x

I2

C0

In

du

str

ial

EV

M

U11-11

AM437X_ZDN

I2C_SCL0Y22

I2C_SDA0AB24

C26922uF

C690.01uF

R5

57

10

K

C13410uF

C345

0.01uF

R4250

L8

82uH1 2

R488

0

C462200pF

C8110uF

R2

27

14

K


Figure 15. Power Schematic

Figure 16. QSPI NOR Flash Memory Schematic



http://www.ti.com


DDR_CLKnDDR_CKE0

DDR_CLK

DDR_RESETn

DDR_A3

DDR_A8DDR_A9

DDR_A4

DDR_A0DDR_A1

DDR_A14

DDR_A10

DDR_A5DDR_A6

DDR_A2

DDR_A11DDR_A12

DDR_A7

DDR_A13

DDR_RASn

DDR_WEnDDR_CASn

DDR_CLKnDDR_CKEDDR_CS0n

DDR_CLK

DDR_WEnDDR_CASn

DDR_CLKnDDR_CKEDDR_CS0n

DDR_CLK

DDR_RASn

DDR_BA0

DDR_BA2

DDR_A0

DDR_A4

DDR_A9DDR_A8

DDR_A3

DDR_BA1

DDR_A6DDR_A5

DDR_A10

DDR_A14

DDR_A1

DDR_A13

DDR_A7

DDR_A12DDR_A11

DDR_A2

DDR_ODT

DDR_A8

DDR_A3DDR_A4

DDR_A9

DDR_A14

DDR_A1DDR_A0

DDR_A6DDR_A5

DDR_A10

DDR_A2

DDR_A7

DDR_A12DDR_A11

DDR_A13

DDR_WEn

DDR_RASn

DDR_CKEDDR_CLKn

DDR_CASn

DDR_CLK

DDR_CS0n

VAM437x_DDR_VREF

DDR_ODT

DDR_DQSN1DDR_DQS1

DDR_DQS0DDR_DQSN0

DDR_DQSN3DDR_DQS3

DDR_DQS2DDR_DQSN2

DDR_DQM1DDR_DQM0

DDR_DQM3DDR_DQM2

DDR_D11

DDR_D9DDR_D10

DDR_D14

DDR_D8

DDR_D15

DDR_D13DDR_D12

DDR_D3DDR_D2

DDR_D0DDR_D1

DDR_D7DDR_D6DDR_D5DDR_D4

DDR_D16DDR_D17

DDR_D19DDR_D18

DDR_D21DDR_D20

DDR_D22DDR_D23

DDR_D25DDR_D24

DDR_D26DDR_D27

DDR_D30

DDR_D28DDR_D29

DDR_D31

DDR_BA0

DDR_BA2DDR_BA1

DDR_A1

DDR_A3

DDR_A8

DDR_A2

DDR_A6

DDR_A4

DDR_A9

DDR_A13

DDR_A7

DDR_A0

DDR_A5

DDR_A10

DDR_A14

DDR_A12DDR_A11

DDR_CS0n

DDR_WEn

DDR_CASNDDR_RASN

DDR_DQS0DDR_DQSn0

DDR_D3

DDR_D1DDR_D0

DDR_D6DDR_D7

DDR_D4DDR_D5

DDR_D2

DDR_D9

DDR_D11

DDR_D14

DDR_D8

DDR_D13DDR_D12

DDR_D15

DDR_D10

DDR_DQS1DDR_DQSn1

DDR_DQM0DDR_DQM1

DDR_BA2

DDR_BA0DDR_BA1

DDR_ODT

DDR_RESETn

DDR_BA2

DDR_BA0DDR_BA1

DDR_ODT

DDR_DQM3DDR_DQM2

DDR_DQS3DDR_DQSn3

DDR_DQS2DDR_DQSn2

DDR_D16DDR_D17DDR_D18DDR_D19DDR_D20DDR_D21

DDR_D23DDR_D22

DDR_D24DDR_D25

DDR_D27DDR_D26

DDR_D28

DDR_D30DDR_D31

DDR_D29

DDR_RESETn

DDR_CKE

DGND

VDDS_DDR

DGND

VDDS_DDR

VDDR_VTT

DGND

DGND

VDDS_DDR

V3_3D

DGND

V3_3D

DGNDDGNDDGND

VDDR_VREF

DGND

DGND

DGND DGND DGND

DGND

DGND DGNDDGND

VDDS_DDR

DGNDDGND

DGND

VDDS_DDR

VDDR_VTT

VDDS_DDR

DGND

DGND

VDDS_DDR

VDDS_DDR

DGND

VDDS_DDR

DGND

VDDS_DDR

VDDS_DDR

DGND

DGND

VDDS_DDR

VDDS_DDR

DGND

DGND

DGND

DGND DGND

VDDR_VREF

VDDS_DDR

DGND

DGND

DGNDDGND

VDDR_VREF

DGND

VDDS_DDR

V1_5D

VDDS_DDR

DGND

V1_5D

R494 0

C10410uF

R2320

R517 47

C11310uF

R199 47

R216 47

C3040.01uF

C1060.1uF

C2900.01uF

R533 47

R4702.2K, 1/8W

R218 47

C3070.1uF

C2890.01uF

C2960.01uF

C34110uF

R4742.2K, 1/8W

R531 47

C3140.01uF

R521 47

C3120.1uF

C10810pF

R198240

R534 47

C2380.01uF

C2880.01uF

C2940.01uF

C33510uF

R520 47

R507 49.9

C3160.01uF

C2970.01uF

C1110.001uF

C1120.1uF

R503 47

C2820.01uF

R516 47

R205 47

C2770.01uF

C3300.1uF

C1030.1uF

C2950.01uF

R535 47

C10222uF

C329

0.01uF

R508 49.9

C1090.001uF

C2780.01uF

R22510

U25

TPS51200

REFIN1

VLDOIN2

VO3

PGND4

VOSNS5

REFOUT6

EN7

GND8

PGOOD9

VIN10

PW

RP

D11

R532 47

C279

0.01uF

C2850.01uF

R217 47

AM

43

7x

DD

RS

DR

AM

U11-19

AM437X_ZDN

DDR_RESETnT1

DDR_CKM2

DDR_CKnM1

DDR_CKE0M3

DDR_CKE1N6

DDR_CSN0M5

DDR_CSN1M4

DDR_CASnN3

DDR_RASnN2

DDR_WEnN4

DDR_BA0K1

DDR_BA1K2

DDR_BA2K3

DDR_A0N1

DDR_A1L1

DDR_A2L2

DDR_A3P2

DDR_A4P1

DDR_A5R5

DDR_A6R4

DDR_A7R3

DDR_A8R2

DDR_A9R1

DDR_A10M6

DDR_A11T5

DDR_A12T4

DDR_A13N5

DDR_A14T3

DDR_A15T2

DDR_D0E3

DDR_D1E2

DDR_D2E1

DDR_D3F3

DDR_D4G4

DDR_D5G3

DDR_D6G2

DDR_D7G1

DDR_D8H1

DDR_D9J6

DDR_D10J5

DDR_D11J4

DDR_D12J3

DDR_D13K6

DDR_D14K5

DDR_D15K4

DDR_D16V5

DDR_D17V4

DDR_D18V3

DDR_D19V2

DDR_D20V1

DDR_D21W4

DDR_D22W5

DDR_D23W6

DDR_D24Y2

DDR_D25Y3

DDR_D26Y4

DDR_D27AA3

DDR_D28AB2

DDR_D29AB1

DDR_D30AC1

DDR_D31AC2

DDR_DQM0F4

DDR_DQM1H2

DDR_DQM2V6

DDR_DQM3Y1

DDR_DQS0F2

DDR_DQS0nF1

DDR_DQS1J2

DDR_DQS1nJ1

DDR_DQS2W1

DDR_DQS2nW2

DDR_DQS3AA1

DDR_DQS3nAA2

DDR_ODT0U1

DDR_ODT1U2

DDR_VREFT6

DDR_VTPAC3

R527 47

C301

0.01uF

C3380.1uF

C2920.01uF

C2470.01uF

R16249.9

R484 0

R54910K

R529 47

C2910.01uF

C323

0.01uF

C3170.1uF

R221 47

R206 47

R219 47

C3150.01uF

C2990.01uF

R504240

U21

MT41K256M16HA

CKJ7

CKnK7

CKEK9

CSnL2

RASnJ3

CASnK3

WEnL3

A0N3

A1P7

A2P3

A3N2

A4P8

A5P2

A6R8

A7R2

A8T8

A9R3

A10/APL7

A11R7

A12/BCN7

A13T3

A14T7

BA0M2

BA1N8

BA2M3

DQ0E3

DQ1F7

DQ2F2

DQ3F8

DQ4H3

DQ5H8

DQ6G2

DQ7H7

ODTK1

VSSA9

VSSB3

VSSE1

VSSG8

VSSQB9

VSSQD1

VSSQD8

VSSQE2

VSSQB1

VDDQA1

VDDQA8

VDDQC1

VDDQC9

VREFDQH1

VDDD9

VDDG7

VDDK2

VDDK8

LDQSnG3

NU0J1

LDQSF3

VSSJ2

VSSJ8

VSSM1

VSSM9

VSSP1

VSSP9

VSST1

VSST9

VDDN1

VDDN9

VDDR1

VDDR9

RESETnT2

UDMD3 LDME7

NU1J9

NU2L1

NU3L9

NU4M7

ZQL8

VREFCAM8

DQ8D7

DQ9C3

DQ10C8

DQ11C2

DQ12A7

DQ13A2

DQ14B8

DQ15A3

VDDQD2

VDDQE9

VDDQF1

VDDQH2

VDDQH9

VSSQE8

VSSQF9

VSSQG1

VSSQG9

UDQSC7

UDQSnB7

VDDB2

C3060.1uF

C34210uF

C2840.01uF

C8022uF

C1070.1uF

R22610K

R528 47

U20

MT41K256M16HA

CKJ7

CKnK7

CKEK9

CSnL2

RASnJ3

CASnK3

WEnL3

A0N3

A1P7

A2P3

A3N2

A4P8

A5P2

A6R8

A7R2

A8T8

A9R3

A10/APL7

A11R7

A12/BCN7

A13T3

A14T7

BA0M2

BA1N8

BA2M3

DQ0E3

DQ1F7

DQ2F2

DQ3F8

DQ4H3

DQ5H8

DQ6G2

DQ7H7

ODTK1

VSSA9

VSSB3

VSSE1

VSSG8

VSSQB9

VSSQD1

VSSQD8

VSSQE2

VSSQB1

VDDQA1

VDDQA8

VDDQC1

VDDQC9

VREFDQH1

VDDD9

VDDG7

VDDK2

VDDK8

LDQSnG3

NU0J1

LDQSF3

VSSJ2

VSSJ8

VSSM1

VSSM9

VSSP1

VSSP9

VSST1

VSST9

VDDN1

VDDN9

VDDR1

VDDR9

RESETnT2

UDMD3 LDME7

NU1J9

NU2L1

NU3L9

NU4M7

ZQL8

VREFCAM8

DQ8D7

DQ9C3

DQ10C8

DQ11C2

DQ12A7

DQ13A2

DQ14B8

DQ15A3

VDDQD2

VDDQE9

VDDQF1

VDDQH2

VDDQH9

VSSQE8

VSSQF9

VSSQG1

VSSQG9

UDQSC7

UDQSnB7

VDDB2

C3180.01uF

C3020.01uF

R233100K

R522 47

R220 47

C3130.1uF

C10510uF

C2830.01uF

C3240.01uF

C3280.01uF

C3110.1uF

R530 47


Figure 17. DDR3 SDRAM Memory Schematic



http://www.ti.com


Note: MDIO Address = 0x01

PRUETH1_LINKLED

VADD33_PRUETH1

PRUETHER1_TDP

V3_3D_PRUETH1JCK

PRUETH1_INT

PRUETHER1_TDN

PRUETHER1_RDN

PRUETH1_RESETn

PRUETH1_RXD0PRUETH1_RXD1

PRUETH1_TXD2


PRUETH1_TXCLK

PRUETH1_TXD3

PRUETH1_TXEN

PRUETH1_RXCLK

PRUETH1_RXERR

PRUETH1_TXD1PRUETH1_TXD0

PRUETH1_RXDV

PRUETH1_MDIOPRUETH1_MDC

PRUETH1_RXD3


PRUETH1_RXD0PRUETH1_COL

AM437X_PRUETH1_TXD2AM437X_PRUETH1_TXD3

AM437X_PRUETH1_RXD1AM437X_PRUETH1_RXD0


AM437X_PRUETH1_RXER

PRUETH1_RESETn

PRUETH1_CRS

PRUETH1_COL

AM437X_PRUETH1_MRCLK


AM437X_PRUETH1_TXCLK

PRUETHER1_RDP

AM437X_PRUETH1_TXEN

AM437X_PRUETH1_RXDV

DGNDDGND

V3_3D

DGND

V3_3D

V3_3D

DGND

AGNDFRAME_PRUETH1DGNDDGNDDGND

DGND

DGND

V3_3D

V3_3D

DGND

V3_3D

DGND

V3_3D

V3_3D

DGND

V3_3D

V3_3D

DGND

V3_3D

V3_3D

DGND

DGND

DGND

SYS_RESETn<2,5,7,11,17,19>

AM437X_PRUETH_MDCLK<7>AM437X_PRUETH_MDDATA<7>

AM437X_CAM1_DATA6<7,19>

PRUETH1_25MHzCLK<11>

AM437X_PRUETH1_MRCLK <19>AM437X_PRUETH1_TXCLK <19>AM437X_PRUETH1_TXD0 <19>AM437X_PRUETH1_TXD1 <19>

AM437X_PRUETH1_TXEN <7>

AM437X_PRUETH1_RXDV <7>

TLK

10

5L

U12

TLK105L

TX_CLK2

TX_EN3

TXD_04

TXD_15

TXD_26

TXD_37

RX_CLK25

RX_DV26

RX_ERR28

RXD_030

RXD_131

RXD_232

RXD_31

CRS27

COL29

TD+12

TD-11

RD+10

RD-9

RESET_N18

PWRDNn/INTn8

LED_LINK17

XI23

XO22

MDC20

MDIO19

TP

AD

TP

AD

PFBOUT15

PFBIN113

PFBIN224

RBIAS16

VDD33_IO21

AVDD3314 C215

0.1uF

R445 0

R431 0

R146 0 R13149.9

R1452.2K

R151 0

R475 0

AM

43

7x

PR

U#

1E

th

ern

et

In

du

stria

lE

VM

U11-8

AM437X_ZDN

GPMC_A0/PR1_MII1_TXENC3

GPMC_A4/PR1_MII1_TXD1D7GPMC_A5/PR1_MII1_TXD0E7

GPMC_WPn/PR1_MII1_RXERB3GPMC_A1/PR1_MII1_RXDVC5

GPMC_A2/PR1_MII1_TXD3C6GPMC_A3/PR1_MII1_TXD2A4

GPMC_BE1n/PR1_MII1_COLA3

GPMC_A8/MCASP0_ACLKXF7GPMC_A9/MCASP0_FSXB4GPMC_A10/MCASP0_D0G8GPMC_A11/MCASP0_D1D8

GPMC_A6/PR1_MII1_MT1_CLKE8

GPMC_A7/PR1_MII1_MR1_CLKF6

GPMC_CLK/PR1_MDCLKA12

XDMA_EVENT_INTR0/PR1_MDIOD24

PRINT_MB/PR1_MII1_CRSF23

PRINT_ON/PR1_MII1_RXLINKE24

R4622.2K

C2320.1uF

R134 0

R438 0

C650.1uF

C2080.1uF

C1884700pF

R446 0R147 0

R441 0

C24410uF

YEL

GRN

J9

RJ-45 10_100Mb

12345678

910

1112

SH

LD

1S

HL

D2

R1

27

2.2

K

R473 DNIR140 0

R447 0

R155 0

R461 0

R85 0

C640.01uF

R448 0

TP8 TP1mm

R153 0

R4200

R150 0

R4552.2K

R136 0

R141 0

C2370.1uF

C580.01uF

R4644.87K

C1940.1uF

C1850.01uF

R469 0

R443 0

R1

22

2.2

K

C222

0.1uFR10149.9

U44

SN74LVC1G08

1

24

35

R466 0

R10649.9

R1

30

2.2

K

R125

49.9

R1

08

2.2

K

R452DNI

Note: MDIO Address = 0x00

PRUETHER0_TDP

V3_3D_PRUETH0JCK

PRUETHER0_TDN

PRUETHER0_RDNPRUETHER0_RDP

PRUETH0_RESETn


PRUETH0_TXD3

PRUETH0_TXCLK


PRUETH0_TXD2

PRUETH0_TXD0PRUETH0_TXD1

PRUETH0_RXERR

PRUETH0_RXCLK

PRUETH0_TXEN

PRUETH0_MDC

PRUETH0_RXDV

PRUETH0_MDIO

PRUETH0_RXD3


PRUETH0_RXD0

AM437X_PRUETH0_COL

PRUETH0_LINKLED

AM437X_PRUETH0_TXCLKAM437X_PRUETH0_TXEN

AM437X_PRUETH0_TXD0AM437X_PRUETH0_TXD1AM437X_PRUETH0_TXD2AM437X_PRUETH0_TXD3



AM437X_PRUETH0_MRCLK

AM437X_PRUETH0_RXERAM437X_PRUETH0_RXDV

PRUETH0_INT

PRUETH0_RESETn

VADD33_PRUETH0

PRUETH0_CRSAM437X_PRUETH0_CRS

AM437X_PRUETH0_RXDVAM437X_PRUETH0_MRCLK

AM437X_PRUETH0_TXENAM437X_PRUETH0_RXDV

RT_MII0_TXENRT_MII0_RXDV

RT_MII_EDIO_DATA0RT_MII_EDIO_DATA1

AM437X_PRUETH0_RXLINK

AM437X_PRUETH0_RXER

AM437X_PRUETH0_TXD2AM437X_PRUETH0_TXD3AM437X_PRUETH0_TXENAM437X_PRUETH0_TXCLK

SYSBOOT3SYSBOOT2SYSBOOT1SYSBOOT0

SYSBOOT4SYSBOOT5


SYSBOOT11

SYSBOOT9SYSBOOT8

SYSBOOT10

AM437X_PRUETH0_RXD0


AM437X_PRUETH0_RXD1

SYSBOOT15SYSBOOT14SYSBOOT13SYSBOOT12 AM437X_PRUETH0_RXLINK

SYSBOOT6SYSBOOT7

SY

SB

OO

T[1

5..

0]

AM437X_LCD_DATA6AM437X_LCD_DATA7

PRUETH0_COL

RT_MII1_TXENRT_MII1_RXDVPR1_EDIO_DATA6PR1_EDIO_DATA7

V3_3D V3_3D

DGND

V3_3D

DGND AGNDFRAME_PRUETH0

DGND

DGND DGND

DGND

V3_3D

DGND

V3_3D

DGND

V3_3D

V3_3D

DGND

DGND

V3_3D

V3_3D

DGND

V3_3D

V3_3D

DGND

DGNDDGND

DGND

DGND

DGND

V3_3D

V3_3D

DGND

V3_3D

DGNDDGND

V3_3D

DGND

SYS_RESETn<2,5,8,11,17,19>

AM437X_PRUETH_MDCLK<8>

AM437X_PRUETH_MDDATA<8>

PORZn<2,20>

AM437X_SPI0_D1<19>AM437X_SPI0_CS0n<19>


SYSBOOT[15..0]<17>

AM437X_LCD_DATA6 <19>AM437X_LCD_DATA7 <19>

PRUETH0_25MHzCLK<11>

AM437X_PRUETH1_RXDV <8>AM437X_PRUETH1_TXEN <8>

PR1_EDIO_DATA6 <19>PR1_EDIO_DATA7 <19>

R3100

AM

43

7x

PR

U#

0E

th

ern

et

In

du

stria

lE

VM

U11-10

AM437X_ZDN

LCD_D0/PR1_MII0_MT_CLKB22

LCD_D1/PR1_MII0_TXENA21

LCD_D2/PR1_MII0_TXD3B21LCD_D3/PR1_MII0_TXD2C21LCD_D4/PR1_MII0_TXD1A20LCD_D5/PR1_MII0_TXD0B20

LCD_D8/PR1_MII0_RXD3A19LCD_D9/PR1_MII0_RXD2B19LCD_D10/PR1_MII0_RXD1A18LCD_D11/PR1_MII0_RXD0B18

LCD_D12/PR1_MII0_RXLINKC19

LCD_D13/PR1_MII0_RXERD19

LCD_D14/PR1_MII0_MR_CLKC17

LCD_D15/PR1_MII0_RXDVD17

PRINT_NSTROBE/PR1_MII0_COLD25PRINT_MNA/PR1_MII0_CRSG20

U43

SN74LVC1G08

1

24

35

R377 0

74

LV

24

4A

U9

SN74LV244A

1A12

1A24

1A36

1A48

1OE#1

2A111

2OE#19

2Y19

2Y27

2Y35

2Y43

GN

D1

0V

CC

20

1Y118

1Y216

1Y314

1Y412

2A213

2A315

2A417

C1640.1uF

C1470.1uF

R78 0

C1374700pF

YEL

GRN

J6

RJ-45 10_100Mb

12345678

910

1112

SH

LD

1S

HL

D2

R410 0

R67 0

R344 0

C1630.1uF

C1530.1uF

R378 0

R349 0

C1780.01uF

R4

62

.2K

R408 0

C16710uF

R337 0

R65 0

R416 0

R348 0

R63 0

R5

52

.2K

R406 0

R351 DNI

R59 0

C330.01uF

R4349.9

R5

12

.2K

TLK

10

5L

U7

TLK105L

TX_CLK2

TX_EN3

TXD_04

TXD_15

TXD_26

TXD_37

RX_CLK25

RX_DV26

RX_ERR28

RXD_030

RXD_131

RXD_232

RXD_31

CRS27

COL29

TD+12

TD-11

RD+10

RD-9

RESET_N18

PWRDNn/INTn8

LED_LINK17

XI23

XO22

MDC20

MDIO19

TP

AD

TP

AD

PFBOUT15

PFBIN113

PFBIN224

RBIAS16

VDD33_IO21

AVDD3314

C1500.1uF

R772.2K

R411 0

R417 0

R391 0

R382 0

R380 0

74

LV

24

4A

U39

SN74LV244A

1A12

1A24

1A36

1A48

1OE#1

2A111

2OE#19

2Y19

2Y27

2Y35

2Y43

GN

D1

0V

CC

20

1Y118

1Y216

1Y314

1Y412

2A213

2A315

2A417

R4

42

.2K

R459 0

C340.01uF

C1830.01uF

R5049.9

R157 0

R384 0

J3

HEADER 5x2

135

24687

9 10

R390 0

R405 0

R76 0

R5649.9

R3149.9

R3624.87K

R41210K

R434 0

C380.1uF

R346 0R79 0 C1550.1uF

R572.2K

C370.01uF

R352 0

R339 0

R404 0

TP3 TP1mm


Figure 18. ICSS #0 Ethernet Schematic

Figure 19. ICSS #1 Ethernet Schematic



http://www.ti.com


SD/MMC0 Connector

MMC_CD

MMC_D2MMC_D3

AM437X_MMC0_CLKAM437X_MMC0_CMD

AM437X_MMC0_DAT0AM437X_MMC0_DAT1AM437X_MMC0_DAT2AM437X_MMC0_DAT3

AM437X_MMC0_SDCD

MMC_D1MMC_D0

MMC_CLK

MMC_CMD

DGND

DGND

DGND

V3_3D

DGND

V3_3D

DGND

V3_3D

V3_3DV3_3D

AM437X_MMC0_DAT1<19>

AM437X_MMC0_DAT3 <19>

AM437X_MMC0_DAT0 <19>

AM437X_MMC0_DAT2 <16,19>

R161 0

C1154.7uF

R23610K

R84 0

U27TPD6E001 IO

11

IO2

2

IO3

3

IO4

6

IO5

7

IO6

8N

C1

4

NC

29

GN

D5

VC

C1

0

C1160.1uF

R174 0

R26610K

U59TPD2E001V

CC

1

GN

D4

IO1

3

IO2

5

NC

2

R158 0

R548470K

AM

43

7x

MM

C/S

DC

ard

0In

du

str

ial

EV

M

U11-6

AM437X_ZDN

MMC0_CLK/MMC0_CLKD1

MMC0_CMD/MMC0_CMDD2

MMC0_DAT0/MMC0_DAT0C1

MMC0_DAT1/MMC0_DAT1C2

MMC0_DAT2/MMC0_DAT2B2

MMC0_DAT3/MMC0_DAT3B1

SPI0_CS1/MMC0_SDCDR25

R167 0

R23110K

R177 0

R24410K

mic

ro

SD

J19

SCHA5B0200

DAT21

CD/DAT32

CMD3

VDD4

CLOCK5

VSS6

DAT07

DAT18

GND9

CD10

GND311

GND412

GND513

GND614

GND715

GND816

R26710K

R179 0

LED0 LED1

DGND

DGND

DGND

DGND

DGND

DGND

V3_3D

DGND

DGND

DGND

DGND

DGND

DGND

V3_3D

AM437X_LCD_VSYNC<17,19>

AM437X_LCD_AC_BIAS_EN<17,19>

AM437X_LCD_PCLK<19>

AM437X_CAM1_DATA2<19>

AM437X_CAM1_WEN<19>

AM437X_LCD_HSYNC<17,19>

R276100K

R279

0

R268150

R7100K

R80

R274100K

Q7

BSS138

GS

D

R2750

Q8

BSS138

GS

D

R12

0

R272150

R11100K

R278100K

R277

0

R9100K

Q4

BSS138

GS

D

R271150

R10

0

Q3

BSS138

GS

D

R6150

Q5

BSS138

GS

D

U1

Red_Green_Yellow_LEDA1

R2

G3

Y4

R4150

U2

Red_Green_Yellow_LEDA1

R2

G3

Y4

R5150

Q6

BSS138

GS

D


Figure 20. EtherCAT Schematic

Figure 21. SDMMC #0 Interface Schematic



http://www.ti.com


ETH1_RESETn

ETH1_TXD0ETH1_TXD1ETH1_TXD2ETH1_TXD3

AM437X_RGMII1_TD0

AM437X_RGMII1_TXCTLAM437X_RGMII1_TXCLK

AM437X_RGMII1_TD3AM437X_RGMII1_TD2AM437X_RGMII1_TD1

ETH1_TXCLKETH1_TXEN

ETH1_RESETn

AM437X_RGMII1_RXCTLAM437X_RGMII1_RXCLK

AM437X_RGMII1_RD3AM437X_RGMII1_RD2AM437X_RGMII1_RD1AM437X_RGMII1_RD0

ETH1_RXDV

ETH1_RXD0

ETH1_RXCLK

ETH1_RXD2ETH1_RXD1

ETH1_RXD3

ETH_MDIO_CLK

ETHER1_D3P

ETHER1_D2N

PHY1_LED_ACTn

ETHER1_D0NETHER1_D0P

ETHER1_D3N

ETHER1_D1NETHER1_D1P

ETHER1_D2P

ETH1_MDCETH1_MDIO

PHY1_LED_LINKn

ETH1_LDO_O

ETH1_RXD3

ETH1_RXD2

ETH1_RXD1

ETH1_RXD0

ETH1_RXDV

PHY1_LED_ACTn

PHY1_LED_LINKn

ETH1_RXCLK

ETH_MDIO_DATA

ETH1GB_25MHzCLKDGND

DGND

DGND DGND

GND_ETH1DGND

DGND DGND

DGND

DGND

VETH1_DVDDH

VETH1_DVDDH

V3_3D VETH1_DVDDH

VETH1_AVDDL_PLL

DGND

VETH1_AVDDL_PLLVETH1_AVDDL_PMOS

DGND

VETH1_DVDDL

DGND

DGND

VETH1_AVDDH VETH1_AVDDL_PMOS

DGND

V3_3D

DGNDDGND

VETH1_AVDDH

DGND

VETH1_AVDDL

DGNDDGND

VETH1_AVDDL

VETH1_DVDDL

VETH1_DVDDH

DGND

VETH1_DVDDH

VETH1_DVDDH

VETH1_DVDDH

DGND

VETH1_DVDDH

DGND

DGND

V1_8D

V3_3DDGND

V1_8D

DGND

V3_3D

SYS_RESETn<2,5,7,8,17,19>

GP_I2C_SDA<4,12,17>GP_I2C_SCL<4,12,17>

PRUETH0_25MHzCLK <7>PRUETH1_25MHzCLK <8>

C16110uF

AM

43

7x

RG

MII

#1

In

du

stria

lE

VM

U11-4

AM437X_ZDN

MII1_TXCLK/RGMII1_TXCLKD14

MII1_TXEN/RGMII1_TXCTLA13

MII1_TXD0/RGMII1_TD0B15

MII1_TXD1/RGMII1_TD1A14

MII1_TXD2/RGMII1_TD2C13

MII1_TXD3/RGMII1_TD3C16

MII1_RXCLK/RGMII1_RCLKD13

MII1_RXDV/RGMII1_RXCTLA15

MII1_RXD0/RGMII1_RD0F17

MII1_RXD1/RGMII1_RD1B16

MII1_RXD2/RGMII1_RD2E16

MII1_RXD3/RGMII1_RD3C14

MDIO_CLK/MDIO_CLKB17

MDIO_DATA/MDIO_DATAA17

C2810uF

C1390.01uF

R21 0

U33

CDCE913

Xin/CLK1

S02

VDD3

Vctr4

GND15

VDDOUT16

VDDOUT27

Y38Y29

GND210

Y111

S2/SCL12 S1/SDA13

XOUT14

FB2

600mAFB10ohm

1 2

FB5600mAFB10ohm

1 2

FB4

600mAFB10ohm

1 2

R10722

R44222

C1870.01uF

J8

HEADER 212

R357 0

R37322

R45 1K

R308 0

R3534.7K

C1420.1uF

R269 220

R4010

C1210.1uF

R12122

R361100K

C129 18pF

R345DNI

R399DNI

R394 DNI

R6

61

.5K

C1430.1uF

R37022

R3071M

C18210uF

R311 33

C1220.1uF

R397 DNI

R53 1K

Y2

25MHz

12

R312 33

R39510K

R36522

R336DNI

C26

0.1uF

R39610K

R323 33

C2110uF

U37

KSZ9031RN

VS

S_

PS

13

LED215

DVDDH16

LED1 / PME_N117

DVDDL14

TXD019

TXD120

TXD221

TXD322

DVDDL18

DVDDL23

GTX_CLK24

TX_EN25

DVDDL26

RXD327

VS

S2

9

DVDDL30

RXD131 RXD032

RX_DV33

DVDDH34

RX_CLK35

MDC36

MDIO37

INT_N / PME_N238

DVDDL39

DVDDH40

CLK125_NDO41

RESET_N42

LD

O_

O4

3

XO45

XI46

AVDDH47

ISET48

AVDDH1

TXRXP_A2

TXRXM_A3

TXRXP_B5

TXRXM_B6

TXRXP_C7

TXRXM_C8

TXRXP_D10

TXRXM_D11

AVDDH12

RXD228

AV

DD

L_

PL

L4

4

P_

GN

D4

9

AVDDL4

AVDDL9

R270 220

R39310K

R10222

D20MMSD103T1

21

R36722

C5047uF

R39210K

C2210uF

TP18 TP1mm

C4947uF

C1490.1uF

GRN

YEL

J4

RJ-45 Gigabit

123456789

10

1112

1314

SH

LD

1S

HL

D2

R366 DNI

C1520.01uF

R43922

R36822

C4310uF

C130 18pF

Q9FDT434PG

S D2D1

R400DNI

R3212.1K, 1%

R369 DNI

C1620.1uF

R398 1K

R374 0

R22 0

R12322

R372 1K

U42

SN74LVC1G07

2 4

531

C1410.01uF

R37122

FB3600mAFB10ohm

1 2


Figure 22. Gigabit Ethernet #1 Schematic



http://www.ti.com


AM437X_CAM0_PCLKAM437X_CAM0_VSYNCAM437X_CAM0_HSYNC

AM437X_CAM0_DATA0

AM437X_CAM0_DATA2AM437X_CAM0_DATA3


SENSOR_XCLKSENSOR_RESETCAM0_GIO0

SENSOR_SIO_D

SENSOR_SIO_C

SENSOR_VSYNC

SENSOR_HREF

SENSOR_XCLKSENSOR_PWRDN

SENSOR_Y2SENSOR_Y3SENSOR_Y4SENSOR_Y5


SENSOR_PCLK

SENSOR_RESET

SENSOR_VSYNCSENSOR_HREF

AM437X_CAM0_VSYNCAM437X_CAM0_HSYNC

AM437X_CAM0_PCLK SENSOR_PCLK

CAM_SRCCLK

V2_8D_ENV2_8D_FB

V2_8D_OUT

GP_I2C_SCLGP_I2C_SDA

SENSOR_SIO_CSENSOR_SIO_D

CAM_SRCCLKAM437x_GPIO_CAM





SENSOR_Y8SENSOR_Y9


SENSOR_Y7SENSOR_Y6

V3_3D

DGND

DGND

DGND

V3_3D V2_8D

DGND DGND

AGND

AGND DGND

V2_8A V2_8D

V2_8A

AGND

V1_5D

DGND

V2_8D

DGND

V2_8D

V2_8DV3_3D

DGND DGND

DGND

DGND

DGND

DGND DGND

DGND DGND

DGND DGND

V3_3D

V3_3D

V3_3D V2_8D

V2_8D

V2_8D

V2_8D

V3_3D

DGND

DGNDDGND

DGND

V2_8D

DGND

V1_8D

DGND

V3_3DV2_8D DGND

V3_3D

DGND

V2_8D V3_3D

V3_3D V2_8D

V3_3D

GP_I2C_SDA <4,11,17>GP_I2C_SCL <4,11,17>

AM437X_CAM0_DATA0 <19>


AM437X_CAM0_DATA4<14>AM437X_CAM0_DATA5<14>AM437X_CAM0_DATA6<19>

CAM_MTR_EN<19>

C250.01uF

R154.7K

C1250.1uF

R29710K

U38

SN74AVC4T245

VCCA1

VCCB16

1A14

1B113

GND8

1DIR2

GND9

1A25

1B212

2A16

2A27 2B1

11

2B210

2DIR3 1OE

15

2OE14

C1322.2uF

A1

OV2659_Module

C130.01uF

C1260.01uF

C1560.01uF

R350 0

C1511uF

R30130.1K

R130

C13610uF

J5

AXK7L24223G

123456789

101112

242322212019181716151413

C12310uF

C13515pF

U30

TPS79301

IN1

EN3

NR4

OUT6

FB5

GND2

C1460.01uF

R3040

R343DNI

C150.01uF

R327 0

U31

TXS0102

VCCA3

VCCB7

A15

B18

GND2

OE6

A24

B21TP17

TP1mm

C1400.01uF

U34

SN74AVC1T45

VCCA1

VCCB6

A3

B4

GND2 DIR

5

R30510K

R303 0

R3090

AM

43

7x

Ca

me

ra

0

In

du

stria

lE

VM

U11-16

AM437X_ZDN

CAM0_PCLKAC20

CAM0_VSYNCAD18

CAM0_HSYNCAE17

CAM0_DATA0AE18

CAM0_DATA2Y18

CAM0_DATA3AA18

CAM0_DATA6AE20

CAM0_DATA7AD20

XDMA_EVENT_INTR1/CLKOUT2C24CAM0_WEN/GPIOAD17

R17 0

C200.01uF

C210uF

C1660.01uF

R313 0

C1332.2uF

R34710K

R164.7K

C1450.01uF

R30639K

U6

SN74LVC8T245

VCCA1

VCCB24

GND11

DIR2

GND13

OE22

GND12

A13

A24

A35

A46

A57

A68

A79

A810

B121

B220

B319

B418

B517

B616

B715

B814

VCCB23

R326 0

C140.01uF


Figure 23. Camera #0 Schematic



http://www.ti.com


Industrial INPUTS

Digital OUTPUTS

I/O Expansion Header

INDUS_INPUTCLK

INDUS_INPUTLDn

INDUS_INPUTSO

INDUS_INPUTCSn

DRAIN4DRAIN3

DRAIN0

DRAIN6

DRAIN1DRAIN2

DRAIN5

DRAIN7

INDUS_INPUT0INDUS_INPUT1INDUS_INPUT2INDUS_INPUT3INDUS_INPUT4INDUS_INPUT5

INDUS_INPUT7INDUS_INPUT6

INDUS_INPUT0INDUS_INPUT1INDUS_INPUT2INDUS_INPUT3INDUS_INPUT4INDUS_INPUT5INDUS_INPUT6INDUS_INPUT7

DRAIN1DRAIN0DRAIN2DRAIN4DRAIN6

DRAIN3DRAIN5DRAIN7

AM437X_SPI1_SCLK

AM437X_SPI1_D1

AM437X_SPI1_CS0

AM437X_GPIO_IND_LDn

AM437X_I2C2_SCLAM437X_I2C2_SDA

V5_0VOP

V24_0D

V3_3D

DGND

V5_0D

DGND

V5_0D

DGND

DGND

DGNDDGND DGND DGND DGNDDGND

DGND

DGND

V24_0D

V5_0D

DGND

V5_0D

DGND

GNDA_ADC GNDA_ADC

DGND

V24_0D

DGND

V3_3D

V3_3D

DGND

V5_0VOP

V5_0VOP

DGND

IND_I2C_SDA<19>IND_I2C_SCL<19>

AM437X_AIN7 <15>

AM437X_AIN5 <15>AM437X_AIN6 <15>

AM437X_AIN4 <15>AM437X_AIN1<15>AM437X_AIN2<15>AM437X_AIN3<15>

AM437X_AIN0<15>

D10 Green LED

AM

43

7x

I2

C2

Ind

ustr

ial

EV

M

U11-17

AM437X_ZDN

CAM1_DATA0/I2C2_DTAAB20CAM1_DATA1/I2C2_SCLAC21

C3

0.0

22

uF

C1540.001uF

D6 Green LED

C1382.2uF

R292 1.2K, MELF

R3

30

R111 0

C5

0.0

22

uF

D9 Green LED

R286 150

R4320

R281 150

C6

0.0

22

uF

D4 Green LED

R288 1.2K, MELF

R295 1.2K, MELF

D8 Green LED

R5410K

C7

0.0

22

uF

C191uF

R280 150

R3

40

R98 0

C2310uF

U5

TPIC2810

DRAIN03

DRAIN14

DRAIN25

DRAIN36

DRAIN411

DRAIN512

DRAIN613

DRAIN714

VCC1

GND16

A09

A110

A27

G8

SCL15

SDA2

C180.01uF

U36

SN74LVC1G07

24

53 1

D3 Green LED

C8

0.0

22

uF

R1002.2K

R99 0

AM

43

7x

SP

I1

Ind

ustr

ial

EV

M

U11-22

AM437X_ZDN

MII1_CRS/SPI1_GPIOB14

MII1_RXERR/SPI1_D1B13

RMII1_REFCLK/SPI1_CS0nA16

MII1_COL/SPI1_SCLKD16

R285 150

R32225K

C9

0.0

22

uF

R289 1.2K, MELF

C1282.2uF

J1

Header 20x2 Female

13579

1113151719

2468101214161820

2123252729

2224262830

3133353739 40

38363432

R962.2K

R284 150

C240.01uF

R437 0

D5 Green LED

C1

00

.02

2u

F

C160.01uF

R287 150

R291 1.2K, MELF

R105 0

R338 49.9

R294 1.2K, MELF

R282 150

R293 1.2K, MELF

U4

SN65HVS882

CLK25

CE24

LD26

SIP27

SOP23

IP03

IP15

IP27

IP39

IP411

IP518

IP620

IP722

DB01

DB12

RE04

RE16

RE28

RE310

RE412

RE517

RE619

RE721

VCC14

GND28

5VOP15

RLIM13

TOK16

TH

RM

TH

_P

D

R97 0

R283 150

R290 1.2K, MELF

C4

0.0

22

uF

D7 Green LED

R4300


Figure 24. Industrial I/O Schematic



http://www.ti.com


Motor 24VDC Power Input

Motor Drive

MOT_PGND2

MOT_PGND1

MOT_OUT1

MOT_OUT3

MOT_OUT2MOT1_LEVEL

MOT2_LEVEL

MOTOR_OUT2

MOT3_LEVEL

MOTOR_OUT3

MOT_PGND3

MTR_FAULT

AM437X_eHRPWM5A

MOTOR_OUT1MTR_FAULT

VMTR_PWRIN

MOT_PGND1

MOT_PGND2

MOT_PGND3

AM437X_eHRPWM5B

AM437X_eHRPWM4BAM437X_eHRPWM4A

AM437X_eHRPWM3_SYNCO

AM437X_EXT_HW_TRIG

V3_3MTRB

AM437X_eHRPWM3AAM437X_eHRPWM3B

V24_0MTR

DGND

DGND

DGND

V3_3MTR

DGND

V3_3MTR

DGND DGND

DGND DGND

DGND DGND

DGND

V3_3D

V24_0MTRV24_0D

DGND

DGND

V24_0MTR

DGND

DGND

V24_0MTR

DGND

AM437X_eHRPWM0B<19>

AM437X_eHRPWM1B<19>

MOT1_ADC <15>

MOT2_ADC <15>

MOT3_ADC <15>

MOT_PGND1 <15>

MOT_PGND2 <15>

MOT_PGND3 <15>

MOT_PGNDTOTAL <15>

AM437x_HDQ<19>


AM437X_CAM0_DATA1<12,19>AM437X_CAM0_DATA4<12>AM437X_CAM0_DATA5<12>

MTR_FAULT<19>

R563 0

C34947nF

R190 0

R83 0

R215 0

D22

MBRS140T

TP15TP

D17MBRS140T

R5534.99K

R2134.99K

Q10

BSS84

G

SD

R80 0

C1000.47uF

C940.01uF

D15Red LED

R61 0

C30310uF

R55995.3K

C3270.1uF

R561 0

R138 0

C340100uF

R183

220

R60 0

R214402K

R5430

R5370.02

R558 0

R5554.99K

R56495.3K

J14

Connector_Screwdown

1

2

L24.7uH

1 2

R187 0

J11

HEADER 2

1 2

C35047nF

J17

Connector_Screwdown

1

2

3

C99 0.1uF

R56295.3K

R132 0

D18SMCJ26CA

L14.7uH

1 2

C870.47uF

R363 0R364 0

R70 0

C33910uF

R186 0

C3370.1uF M17

Shunt0.1in

R375 0

R8110K

R62 0

R5544.99K

AM

43

7x

Mo

tor

Co

ntr

ol

In

du

str

ial

EV

M

U11-3

AM437X_ZDN

CAM1_VSYNC/eHRPWM0BAC23

CAM1_FIELD/EXT_HW_TRIGAC25

GPMC_AD10/GPIOF11

UART3_TXD/eHRPWM4BH24UART3_RXD/eHRPWM4AH25

CAM0_DATA4/eHRPWM3AAE19

CAM0_DATA5/eHRPWM3BAD19

CAM0_DATA1/eHRPWM3_SYNCOAB18

CAM1_DATA8/GPIOAD24

UART3_RTSn/eHRPWM5BK24UART3_CTSn/eHRPWM5AH22

SPI2_SCLK/eHRPWM4_TRIPZONEN20

SPI2_D0/eHRPWM5_TRIPZONEP22

SPI4_CS0/eHRPWM3_TRIPZONEN25

U23

DRV8313

FAULT18

RESETn16

CP11

CP22

TP

AD

TP

AD

OUT39

PGND310

OUT15

OUT28

V3P3OUT15

EN322

IN127

IN225

COMPP12

COMPN13

VCP3

EN126

VM11

SLEEPn17

COMPOn19

GN

D1

4

GN

D2

0

GN

D2

8

PGND16

PGND27

VM4

EN224

NC

21

IN323 R5360.02

C3260.1uF

R496 4.99K

R4954.99K

L34.7uH

1 2

C34847nF

R5380.02


Figure 25. Motor Control Schematic



http://www.ti.com


2.5V Motor Reference

1.8V Motor ADC Reference

Motor Winding #1

Motor Winding #2

Motor Winding #3

ADC0_VREFP

MOTVM_ADC

IS_IHB1

IS_IHB3

IS_IHB2

IS_IHB1

IS_MIHB2

IS_MIHB3

IS_MIHB1

ADC1_VREFPADC1_VREFN

IS_IHB2

IS_MIHB2

IS_MIHB1

IS_IHB3

IS_MIHB3

IDC_SENSE

ADC0_VREFN

DGND

V3_3MTR

DGND

DGND

DGND

GNDA_ADC

DGND

V24_0MTR

DGND

DGND

V3_3MTR

DGND

DGND

DGND

DGND

V3_3MTR

DGND

DGND

DGND

V3_3MTR

DGND

DGND

GNDA_ADCDGND

V3_3MTR

DGND

DGND

V2_5MTR

V2_5MTR

V2_5MTR

V2_5MTR

V2_5MTR

V1_8DADC

GNDA_ADC

GNDA_ADC

V1_8DADC

DGND

DGND

DGND

DGND

DGND

DGND

DGND

V1_8DADC

V5_0D

DGND

DGND

V1_8D

DGND

DGND

DGND

GNDA_ADC

AM437X_AIN0<13>AM437X_AIN1<13>AM437X_AIN2<13>AM437X_AIN3<13>AM437X_AIN4<13>

AM437X_AIN7<13>AM437X_AIN6<13>AM437X_AIN5<13>

MOT1_ADC<14>MOT2_ADC<14>MOT3_ADC<14>

MOT_PGND1<14>

MOT_PGND2<14>

MOT_PGND3<14>

MOT_PGNDTOTAL<14,15>




C54

0.001uF

C2930.47uF

C331

100pF25V10%

U56

REF3025

IN1

OUT2

GN

D3

R440 DNI

C1204.7uF

C91100pF25V10%

R19628.7K

R50033

R52422K

R49722K

R506 19.1K

R505

33

R104 DNI

R193

1K

R310K

R195

1K

R68 4.02K

C890.01uF

R1100K

R19428.7K

R454 0

R19149.9K

C56

0.001uF

R510 19.1K

C6847nF

R211

1K

C84

180pF

R64 4.02K

R129 DNI

R201

33

R124 DNI

R204

33

C3210.001uF

C309

180pF

U28

LM4132

VIN4

VREF5

GND2EN

3

NC

1

C334

180pF

C3080.001uF

C3000.001uF

R197

1K

C570.1uF

R58 4.02K

R223

33

C85100pF25V10%

C86100pF25V10%

R18922K

R209

1K

R21028.7K

C3320.001uF

R18522K

R19249.9K

U19OPA365

3

41

52 C286

180pF

R21249.9K

U18OPA365

3

41

52

R525 19.1K

AM

43

7x

AD

C0

Inp

uts

Ind

ustr

ial

EV

M

U11-7

AM437X_ZDN

ADC0_VREFPAD14

ADC0_VREFNAE14

ADC0_AIN0AA12

ADC0_AIN1Y12

ADC0_AIN2Y13

ADC0_AIN3AA13

ADC0_AIN4AB13

ADC0_AIN5AC13

ADC0_AIN6AD13

ADC0_AIN7AE13

R436 DNI

C119

0.01uF

R50122K

C93100pF25V10%

R20722K

R103 DNI

R50922K

R109 0

R435 DNI

R1260

R51822K

R18822K

C333

180pF

U24OPA365

3

41

52

C920.01uF

C900.01uF

Q2

BSS138

GS

D

C310

100pF25V10%

R210K

R51149.9K

R450 DNI

R502 19.1K

R200

1K

R203

1K

R202 DNI

R1100

Q1

BSS138

GS

D

U22OPA365

3

41

52

R20828.7K

R52322K

C325

180pF

C1010.01uF

R4764.99K

C298

100pF25V10%

C305

100pF25V10%

AM

43

7x

AD

C1

Inp

uts

Ind

ustr

ial

EV

M

U11-25

AM437X_ZDN

ADC1_VREFPAE15

ADC1_VREFNAD15

ADC1_AIN0AC16

ADC1_AIN1AB16

ADC1_AIN2AA16

ADC1_AIN3AB15

ADC1_AIN4AA15

ADC1_AIN5Y15

ADC1_AIN6AE16

ADC1_AIN7AD16

C550.1uF

C11710uF

J2

HEADER 3

123

R53922K

C83

180pF

R222

1K

R15495.3K


Figure 26. Motor Sense Schematic



http://www.ti.com


EQEP0_INDEX

EQEP0A_INEQEP0B_IN

EQEP0_STROBE

AM437X_PRU0_ENDAT0_OUTEN

VENDAT

AM437X_PRU0_ENDAT0_CLK

AM437X_PRU0_ENDAT0_OUT

MTRA_GNDDGND

V3_3D

DGND

MTRA_GND

V3_3D

DGND

V5_0DENCODV5_0D

V5_0DENCOD

MTRA_GND

V3_3D

V5_0D

V5_0D

DGND

DGND

V5_0DV5_0D

DGND

V5_0D

V5_0D

DGNDDGND

V3_3D

DGNDDGND

V3_3D

DGNDDGND

V3_3D

V3_3D

V24_0MTR

PRU0_ENDAT0_CLK <19>

PRU0_ENDAT0_OUT <19>

AM437X_PRU0_ENDAT0_OUTEN <19>AM437X_PRU0_ENDAT0_IN <10,19>

AM437X_MCASP0_ACLKR <19>AM437X_MCASP0_FSR <19>

AM437X_MCASP0_AHCLKX <19>AM437X_MCASP0_AXR1 <19>

AM437X_MMC0_DAT2<10,19>

ENDAT_EN<19>

J10

43-01028

12345678

R422 DNI

C1100.001uF

C270

0.1uF

R423 0

C3520.001uF

R5464.7KU58

SN74LVC8T245

VCCA1

VCCB24

GND11

DIR2

GND13

OE22

GND12

A13

A24

A35

A46

A57

A68

A79

A810

B121

B220

B319

B418

B517

B616

B715

B814

VCCB23

C2670.01uF

U55

SN65HVD78D

A6

B7

D4

R1

DE3

RE2

VCC8

GND5

C3470.001uF

U57

SN65HVD78D

A6

B7

D4

R1

DE3

RE2

VCC8

GND5

C3360.01uF

R512120

R54210K

R514 0

R5474.7K

C3190.01uF

R428 0

R5604.99K

AM

43

7x

eQ

EP

0In

du

str

ial

EV

M

U11-24

AM437X_ZDN

MCASP0_AHCLKX/eQEP0_STROBEL24

MCASP0_ACLKR/eQEP0A_INL23

MCASP0_FSR/eQEP0B_INK23

MCASP0_AXR1/eQEP0_INDEXM25

FB17

150OHM800mA1 2

C3200.01uF

AM

43

7x

En

DA

TIn

du

str

ial

EV

M

U11-15

AM437X_ZDN

MCASP0_ACLKX/PRU0_ENDAT0_CLKN24

MCASP0_FSX/PRU0_ENDAT0_OUTN22

MCASP0_AXR0/PRU0_ENDAT0_OUTENH23

R515 0

R427 DNI

R526 0

C3510.001uF

TP12 TP

R483

0

R5524.99K

R513 0

R540 0

R493 0R485

DNI

R5444.7K

R51910K

R5654.99K

R541 0

R5454.7K

J15

HEADER 6

123456


Figure 27. Motor Encoders QEP and EnDAT



http://www.ti.com


ID Memory

Boot Configuration

JTAG Pod Connector

SYSBOOT0 SYSBOOT7SYSBOOT1SYSBOOT2SYSBOOT3 SYSBOOT4

SYSBOOT5SYSBOOT6

SYSBOOT[15..0]

SYSBOOT8 SYSBOOT15SYSBOOT9SYSBOOT10SYSBOOT11 SYSBOOT12

SYSBOOT13SYSBOOT14 SYSBOOT16

SYSBOOT17SYSBOOT18

JTAG_TCKRTCKTCK

JTAG_TDO

JTAG_TMS

EMU4EMU2

EMU_RSTn

JTAG_TDI

JTAG_EMU0

TRSTn

EMU3

JTAG_TRSTn

JTAG_EMU1

SYSBOOT0SYSBOOT1SYSBOOT2SYSBOOT3SYSBOOT4SYSBOOT5SYSBOOT6SYSBOOT7SYSBOOT8SYSBOOT9SYSBOOT10SYSBOOT11SYSBOOT12SYSBOOT13SYSBOOT14SYSBOOT15

DGND

V3_3D

DGNDDGND

V3_3D

DGND

V3_3D

V3_3DV3_3D

DGND

DGND

DGND

DGND

DGND

DGND

V3_3DV3_3D V3_3D

V3_3D

DGNDDGND

V3_3D

V3_3D

DGND

GP_I2C_SDA<4,11,12>GP_I2C_SCL<4,11,12>

SYSBOOT[15..0]<7>

AM437X_LCD_VSYNC<9,19>AM437X_LCD_HSYNC<9,19>

AM437X_LCD_AC_BIAS_EN<9,19>

SYS_RESETn<2,5,7,8,11,19>

JTAG_TMS <18>

JTAG_TRSTn <18>

JTAG_EMU0 <18>

JTAG_TCK <18>

JTAG_TDO <18>

JTAG_TDI <18>

JTAG_EMU1 <18>

JTAGPOD_DET <18>

R300DNI

R4070

R3

41

10

K

R317

10K

AM

43

7x

JT

AG

In

du

str

ial

EV

M

U11-18

AM437X_ZDN

JTAG_TCKAA25

JTAG_TRSTnY25

JTAG_TDOAA24

JTAG_TDIY20

JTAG_TMSY24

JTAG_EMU0N23

JTAG_EMU1T24

R3

01

00

K

R2

8D

NI

R3

42

10

K

J7

CTI JTAG

TMS1

TDI3

TVDD5

TDO7

TCKRTN9

TCK11

EMU013

SRST15

EMU217

EMU419

TRSTn2

TDIS4

NC6

GND8

GND10

GND12

EMU114

GND16

EMU318

GND20

R3

20

10

K

R3

14

DN

I

C1740.1uF

R3

40

10

K

R2

6D

NI

R4

8D

NI

R3

71

00K

R3

35

10

K

R4290

R4

7D

NI

R3

30

10

KR

329

10K

R332

10K

R4034.7K

R2

9D

NI

R4

1D

NI

R2

31

00K

R3

33

DN

I

R2

5D

NI

R3

16

10

K

R2

4D

NI

C410.01uF

R3

9D

NI

C1900.01uF

C1861uF

R4

9D

NI

R389 100

C1270.01uF

R3

19

10

K

R3

6D

NI

R414 100

TP4 TP1mm

R2

7D

NI

R4334.7K

R4

0D

NI

R3

18

10

K

TP5 TP1mm

R3

5D

NI

U32

CAT24C256W

A01

A12

A23

SCL6

SDA5 VCC

8

VSS4

WP7

R42610K

R3

28

10

K

R3

8D

NI

U8

SN74LVC1G04

2 4

531

R3

21

DN

ITP6TP1mm

R4

2D

NI

R4130

R3

31

10

K

R4024.7K

R3

15

10

K

R334

10K


Figure 28. Debug and Configuration Schematic



http://www.ti.com


USB JTAG

EEDATA

F_ADBUS7

F_ADBUS5 FT_SRESET

XTIN

EESK

XTOUT

EECS

FTDI_VPLL

F_ADBUS0F_ADBUS1F_ADBUS2

F_ADBUS4F_ADBUS3

F_ADBUS6

FTDI_REF

EMU_USB_DPEMU_USB_DM

FTDI_VPHY

FT_VBUSFT_SRESETBFT_SRESETn

VUSB_JTAG

UARTx_RXDUARTx_TXD

AM437X_UART0_TXDAM437X_UART0_RXD

AM437X_UART0_RTSnAM437X_UART0_CTSn

USBJTAG_ENn

USBJTAG_ENn

USBJTAG_ENn

DGND

DGNDGNDUSBJ

DGND

V1_8FTDI

VUSB_FTDI

V3_3D

V3_3D

DGND

DGND

DGND

DGNDDGND

DGND

DGND DGND

DGNDDGND

DGND

DGND

DGND

DGND

DGND

DGND

DGND

DGND

DGND

DGND

DGND

DGND

V3_3FTDI

V3_3FTDI

V3_3FTDI

V3_3FTDI

GNDUSBJ

VUSB_FTDI

DGND DGND

V3_3FTDI

V3_3D

DGND

V3_3FTDI

DGND

V3_3D

V3_3D

DGND

V3_3FTDI

DGND V3_3DV3_3FTDI

DGND

V3_3D

V3_3D

DGND

V3_3FTDI

DGNDV3_3FTDI V3_3D

DGND

V3_3D

DGND

SYS_WARMRESETn <2>

AM437X_UART0_TXD <19>

JTAGPOD_DET <17>

PR1_EDC_SYNC1_OUT<19>PR1_EDC_SYNC0_OUT<19>

JTAG_TCK <17>JTAG_TDI <17>

JTAG_TMS <17>JTAG_TRSTn <17>

JTAG_TDO <17>

JTAG_EMU0 <17>JTAG_EMU1 <17>

C25518pF

R1190

C61 0.01uF

C275

0.01uF

R1684.7K

AM

43

7x

UA

RT

0

GP

EV

M

U11-13

AM437X_ZDN

UART0_TXDJ24

UART0_RXDK25

UART0_RTSnJ25

UART0_CTSnL25

FB13220OHM2A1 2

U49

SN74AVC2T244

VCCA1

VCCB8

A12

A23B1

7

B26

GND5

OE4

C1690.01uF

C2350.01uF

R178 10K

C251 4.7uF

U13

FT2232HL

XTOUT3

RESET#14

EECS63

EESK62

EEDATA61

AG

ND

10

GN

D.1

1

GN

D.2

5

TEST13

VREGOUT49

VP

HY

4

VC

OR

E.2

37

VC

OR

E.1

12

DM7

DP8

XTIN2

GN

D.3

11

GN

D.4

15

VC

CIO

.12

0

VC

CIO

.23

1

ADBUS016

ADBUS117

ADBUS218

ADBUS319

ADBUS421

ADBUS522

ADBUS623

ADBUS724

ACBUS026

ACBUS127

ACBUS228

ACBUS329

ACBUS430

ACBUS532

ACBUS633

ACBUS734

BCBUS048

BCBUS152

BCBUS253

BCBUS354

BCBUS455

BCBUS557

BCBUS658

BCBUS759

PWREN#60

SUSPEND#36

GN

D.5

25

GN

D.6

35

GN

D.7

47

GN

D.8

51

VREGIN50

REF6

VP

LL

9

VC

OR

E.3

64

VC

CIO

.34

2

VC

CIO

.45

6

BDBUS038

BDBUS139

BDBUS240

BDBUS341

BDBUS443

BDBUS544

BDBUS645

BDBUS746

C2282.2uF

FB12150OHM800mA1 2

Y4

12MHz

12

R1180

C73 0.01uF

R13510K

R16910K

R71 0

FB16

220OHM2A

12

C1700.01uF

R1130

R421 0

C2640.01uF

U51

SN74LVC1G07

2 4

531

R46012K, 1%

C780.1uF

C245 4.7uF

U45

SN74AVC4T245

VCCA1

VCCB16

1A14

1B113

GND8

1DIR2

GND9

1A25

1B212

2A16

2A27 2B1

11

2B210

2DIR3 1OE

15

2OE14

C249 0.01uF

C260 0.01uF

R72 0

C2650.01uF

R1150

C2250.01uF

R1170

FB15

220OHM2A

12

R4890

D12Green LED

R376 0

C259 0.01uF

R1604.7K

C2584.7uF

R88 0

R451

0

R114 0

C2260.01uF

R1160

U16

93LC56B

CS1

CLK2

DI3

DO4

VCC8

NC17

NC26

VSS5

U50

SN74LVC1G00DCK

1

2

3

4

5

R171 220

R381 0

C209 0.01uF

R133 0

C239 0.01uF

C2500.01uF

R1120

U47

TPD2E001

VCC1

GND4

IO13

IO25

NC2

R89 0

C26118pF

R180 2.2K

C227 0.01uF

R170 0

R1200

C76 0.01uF

J18

USB_MicroAB

VBUS1

DM2

DP3

ID4

GND5

S1S1 S2S2

S3S3 S4S4

C274

0.01uF

TP10TP1mm

U41

SN74AVC2T244

VCCA1

VCCB8

A12

A23 B1

7

B26

GND5

OE4

C246 0.01uF

C1960.01uF


Figure 29. USB JTAG Schematic



http://www.ti.com


PORZn

GND_OSC1

DGND

DGND

V1_8D

DGND

V3_3D

V3_3D

PORZn <2,7>R1480R1630

C243

15pF

R47910K

C248

15pF

Y3

32.768KHz MC-306

1 42 3

C2630.01uF

U48

SN74LVC1G07

24

53 1

TP13TP

R1430

AM

43

7x

RT

C

In

du

stria

lE

VM

U11-1

AM437X_ZDN

OSC1_INAE5

OSC1_OUTAE4

RTC_PORZAE6

EXT_WAKEUP0AE3

PMIC_POWER_EN0AD6

ENZ_KALDO_1P8VAE2

VSS_RTCAD4

R4670

R17210K

Expansion Connector

User Switch

AM437X_SPI0_SCLK

SPI0_DINSPI0_DOUT

SPI0_CS0n

eQEP2_STROBE

eQEP2_INDEX

eQEP2A_INeQEP2B_IN

AM437X_PROFI_TXDAM437X_PROFI_RXD

CAN0_TXDF

CAN0_RXDFAM437X_DCAN0_TXAM437X_DCAN0_RX

SD0_CLKINSD_CLKIN

SD_DATA_IN0_SD_CLKOUTSD_DATA_IN1SD_DATA_IN2SD_DATA_IN3SD_DATA_IN4

SD_DATA_IN5_PR1_EDC_LATCH0_INSD_DATA_IN6SD_DATA_IN7eHRPWM3_SYNCO

PRU0_ENDAT1_CLKPRU0_ENDAT1_OUT

PRU0_ENDAT1_INPRU0_ENDAT1_OUTEN

AM437X_SD_CLKOUTAM437X_SD_DATA_IN1

AM437X_CAM1_DATA3AM437X_CAM1_DATA5AM437X_CAM1_DATA7

AM437X_LCD_AC_BIAS_ENAM437X_LCD_HSYNC

AM437X_MCASP0_AHCLKR

CAN0_TXDFCAN0_RXDF

AM437X_PROFI_TXDAM437X_PROFI_RXD

SPI0_SCLKeHRPWM0ASPI0_DINSPI0_DOUTSPI0_CS0n

eQEP2B_INeQEP2A_IN

AM437X_eHRPWM0BAM437X_eHRPWM0_SYNCIAM437X_eHRPWM012_TRPZONEAM437X_eHRPWM0_SYNCO

AM437X_eHRPWM2AAM437X_eHRPWM2B

AM437X_eHRPWM1B

eQEP1B_INeQEP1A_IN

AM437X_LCD_DATA6 PROF_TXENABLE

PRU0_ENDAT2_OUTEN

HDQ

PR1_EDC_SYNC0_OUTPR1_EDC_SYNC1_OUT

PRU0_ENDAT2_IN

AM437X_SD_CLKOUTAM437X_SD_DATA_IN1AM437X_eHRPWM0_SYNCI

AM437X_eHRPWM0_SYNCO

AM437X_eHRPWM2BAM437X_eHRPWM2A

AM437X_CAM1_DATA6

AM437X_CAM1_DATA3

AM437X_CAM1_DATA5

AM437X_CAM1_DATA7

SYNCI

eHRPWM3_SYNCI

AM437X_MCASP0_AHCLKR

AM437X_LCD_AC_BIAS_ENAM437X_LCD_HSYNC

AM437X_LCD_DATA6AM437X_LCD_DATA7

AM437X_LCD_VSYNC

CAN0_RXDF_PR1_EDC_LATCH0_IN

CAM_MTR_EN

PRU0_ENDAT2_OUTPRU0_ENDAT2_CLKeQEP1_INDEX

eQEP1_STROBE

eQEP2_INDEXeQEP2_STROBECAN0_TXDF_PR1_EDC_LATCH1_IN

DGNDDGND

DGND DGND

V3_3D V5_0D

DGND

V3_3D

DGND

AM437X_SPI0_D1<7>

AM437X_SPI0_CS0n<7>

PRU0_ENDAT0_CLK<16>PRU0_ENDAT0_OUT<16>

AM437X_PRU0_ENDAT0_OUTEN<16>AM437X_PRU0_ENDAT0_IN<10,16>

SYS_RESETn<2,5,7,8,11,17>

AM437X_UART0_TXD<18>



AM437X_MCASP0_ACLKR <16>AM437X_MCASP0_FSR <16>AM437X_MMC0_DAT1 <10>

IND_I2C_SCL<13>IND_I2C_SDA<13>

AM437X_eHRPWM0B <14>

AM437X_eHRPWM1B <14>

AM437X_PRUETH1_TXD0<8>AM437X_PRUETH1_TXD1<8>

PR1_EDC_SYNC1_OUT <18>PR1_EDC_SYNC0_OUT <18>

AM437X_MMC0_DAT3 <10>AM437X_MMC0_DAT0 <10>

AM437x_HDQ <14>

AM437X_CAM1_DATA6 <7,8>

AM437X_CAM1_WEN <9>AM437X_CAM1_DATA2 <9>

ENDAT_EN <16>

AM437X_LCD_PCLK <9>

AM437X_LCD_AC_BIAS_EN <9,17>AM437X_LCD_HSYNC <9,17>

AM437X_LCD_DATA6 <7>AM437X_LCD_DATA7 <7>

AM437X_LCD_VSYNC <9,17>

PR1_EDIO_DATA6 <7>PR1_EDIO_DATA7 <7>



CAM_MTR_EN <12>

MTR_FAULT<14>

AM437X_MCASP0_AHCLKX <16>AM437X_MCASP0_AXR1 <16>AM437X_PRUETH1_TXCLK<8>

AM437X_PRUETH1_MRCLK<8>

R3880

AM

43

7x

Pro

fiB

us

In

du

str

ial

EV

M

U11-9

AM437X_ZDN

UART1_RXDK21UART1_TXDL21

R471 0

R248 DNI

R730

R241 0

R265 0

R256 0

R468 0

SW1

B3SL

1234

R263 0

R238 0

R240 0

R252 0

C2621uF

R264 0

R465 0

R247 0

R250 0

R261 0

AM

43

7x

eQ

EP

2In

du

str

ial

EV

M

U11-21

AM437X_ZDN

GPMC_AD15/eQEP2_STROBEA11

GPMC_AD14/eQEP2_INDEXB11

GPMC_AD13/eQEP2B_INC11 GPMC_AD12/eQEP2A_INE11

C177100pF25V10%

R257 DNI

AM

43

7x

SP

I0In

du

str

ial

EV

M

U11-12

AM437X_ZDN

SPI0_D1T21

SPI0_CS0T20

SPI0_SCLKP23

SPI0_D0T22

R251 0

R242 0

R246 DNI

R262 0

C176100pF25V10%

R478 0

R3830

R259 0

R386 33

R477 0

R249 0

R260 0

R387 33

R245 0

R740

R47210K

R255 0

AM

43

7x

GP

IO

&U

nu

se

dP

ins

In

du

str

ial

EV

M

U11-23

AM437X_ZDN

RSV_AC12AC12

RSV_AC10AC10

RSV_AB10AB10

RSV_AA10AA10

RSV_AA9AA9

RSV_Y10Y10

RSV_AC9AC9

RSV_Y7Y7

RSV_AA7AA7

RSV_AC5AC5

RSV_AE9AE9

RSV_H19H19

RSV_AD10AD10

RSV_AD11AD11

XI_32KAE11

XO_32KAE12

PMU_PORZAE10

EXT_WAKEUP1AE7

PMIC_POWER_EN1AD7

PMU_HIBZAE8

TEMP_DIODE_PAD1

USB1_DPV24

USB1_DMV25

USB1_CEU22

USB1_IDU25

USB1_VBUST25

USB1_DRVVBUSF25

USB0_DPW25

USB0_DMW24

USB0_CEW22

USB0_IDU24

USB0_VBUSU23

USB0_DRVVBUSG21

CAM1_WENAB25

CAM1_DATA3AE22

CAM1_DATA4AD22

CAM1_DATA5AE23

CAM1_DATA6AD23

CAM1_DATA7AE24

CAM1_DATA9AC24

LCD_D7E19LCD_D6C20

LCD_AC_BIAS_ENA24LCD_HSYNCA23LCD_VSYNCB23LCD_PCLKA22

ECAP0_IN_PWM0_OUTG24

GPMC_AD0B5

GPMC_AD1A5

GPMC_AD2B6

GPMC_AD3A6

GPMC_AD4B7

GPMC_AD5A7

GPMC_AD6C8

GPMC_AD7B8

GPMC_WAIT0A2

GPMC_CSN1/PR1_EDIO_DATA6B9

RSV_AB7AB7

CAM0_FIELDAC18

TEMP_DIODE_NAD2

GPIO5_12E25GPIO5_9F24

CAM1_DATA2AD21

RSV_AC6AC6

SPI4_D0R24

MCASP0_AHCLKRM24

RSV_Y6Y6

TAMPER_EVENTAB6

RSV_AC7AC7

RSV_AB9AB9

RSV_W10W10

SPI2_D1P20

SPI2_CS0T23

GPMC_AD8/eHRPWM2AB10

GPMC_AD9/eHRPWM2BA10

GPMC_CSN2/PR1_EDIO_DATA7F10

CAM1_HSYNC/SD_DATA_IN0AD25

CAM1_PCLK/SD_DATA_IN1AE21

SPI4_SCLK/eHRPWM0_SYNCIP25

SPI4_D1/eHRPWM0_TRIPZONE_IP24

GPMC_AD11/eHRPWM0_SYNCOD11

CAM0_DATA8AB19

CAM0_DATA9AA19

R243 0

R385 0

AM

43

7x

DC

AN

0In

du

str

ial

EV

M

U11-14

AM437X_ZDN

UART1_CTSN/DCAN0_TXK22

UART1_RTSN/DCAN0_RXL22

R258 0

R239 0

J16

Header_30x2_Female

13579

111315171921232527293133353739

246810121416182022242628303234363840

41434547

42444648

495153555759

505254565860

R253 0R254 0


Figure 30. Expansion Schematic

Figure 31. RTC Schematic



http://www.ti.com



7.3 Bill of MaterialsTo download the bill of materials (BOM), see the design files at TIDEP0039.

7.4 PCB LayoutTo download the layer plots, see the design files at TIDEP0039.

7.5 Gerber FilesTo download the Gerber files, see the design files at TIDEP0039.



http://www.ti.com





www.ti.com Software Files

8 Software FilesTo download the software files, see the design files at TIDEP0039.

9 References

1. Texas Instruments, AM437x Sitara™ Processors, AM4379 Datasheet (SPRS851)2. Texas Instruments, AM437x ARM® Cortex™-A9 Processors, AM4379 Technical Reference Manual

(SPRUHL7)3. Texas Instruments, TLK10xL Industrial Temp, Single Port 10/100Mbps Ethernet Physical Layer

Transceiver, TLK105L Datasheet (SLLSEE3)

10 TerminologyICSS— Industrial Communication Subsystem

MII— Media Independent Interface

PLC— Programmable Logic Controller

PRU— Programmable Real-time Unit

RTOS— Real-time Operating System

SoC— System-on-chip

TRM— Technical Reference Manual

11 About the AuthorTHOMAS MAUER is a System Applications Engineer in the Factory Automation and Control Team atTexas Instruments Freising, where he is responsible for developing reference design solutions for theindustrial segment. Thomas brings to this role his extensive experience in industrial communications likeIndustrial Ethernet, fieldbuses, and industrial applications. Thomas earned his electrical engineeringdegree (Dipl. Ing. (FH)) at the University of Applied Sciences in Wiesbaden, Germany.



http://www.ti.com


http://www.ti.com/lit/pdf/SPRS851

http://www.ti.com/lit/pdf/SPRUHL7

http://www.ti.com/lit/pdf/SLLSEE3


IMPORTANT NOTICE FOR TI REFERENCE DESIGNS

Texas Instruments Incorporated ("TI") reference designs are solely intended to assist designers (“Buyers”) who are developing systems thatincorporate TI semiconductor products (also referred to herein as “components”). Buyer understands and agrees that Buyer remainsresponsible for using its independent analysis, evaluation and judgment in designing Buyer’s systems and products.TI reference designs have been created using standard laboratory conditions and engineering practices. TI has not conducted anytesting other than that specifically described in the published documentation for a particular reference design. TI may makecorrections, enhancements, improvements and other changes to its reference designs.Buyers are authorized to use TI reference designs with the TI component(s) identified in each particular reference design and to modify thereference design in the development of their end products. HOWEVER, NO OTHER LICENSE, EXPRESS OR IMPLIED, BY ESTOPPELOR OTHERWISE TO ANY OTHER TI INTELLECTUAL PROPERTY RIGHT, AND NO LICENSE TO ANY THIRD PARTY TECHNOLOGYOR INTELLECTUAL PROPERTY RIGHT, IS GRANTED HEREIN, including but not limited to any patent right, copyright, mask work right,or other intellectual property right relating to any combination, machine, or process in which TI components or services are used.Information published by TI regarding third-party products or services does not constitute a license to use such products or services, or awarranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectualproperty of the third party, or a license from TI under the patents or other intellectual property of TI.TI REFERENCE DESIGNS ARE PROVIDED "AS IS". TI MAKES NO WARRANTIES OR REPRESENTATIONS WITH REGARD TO THEREFERENCE DESIGNS OR USE OF THE REFERENCE DESIGNS, EXPRESS, IMPLIED OR STATUTORY, INCLUDING ACCURACY ORCOMPLETENESS. TI DISCLAIMS ANY WARRANTY OF TITLE AND ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESSFOR A PARTICULAR PURPOSE, QUIET ENJOYMENT, QUIET POSSESSION, AND NON-INFRINGEMENT OF ANY THIRD PARTYINTELLECTUAL PROPERTY RIGHTS WITH REGARD TO TI REFERENCE DESIGNS OR USE THEREOF. TI SHALL NOT BE LIABLEFOR AND SHALL NOT DEFEND OR INDEMNIFY BUYERS AGAINST ANY THIRD PARTY INFRINGEMENT CLAIM THAT RELATES TOOR IS BASED ON A COMBINATION OF COMPONENTS PROVIDED IN A TI REFERENCE DESIGN. IN NO EVENT SHALL TI BELIABLE FOR ANY ACTUAL, SPECIAL, INCIDENTAL, CONSEQUENTIAL OR INDIRECT DAMAGES, HOWEVER CAUSED, ON ANYTHEORY OF LIABILITY AND WHETHER OR NOT TI HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES, ARISING INANY WAY OUT OF TI REFERENCE DESIGNS OR BUYER’S USE OF TI REFERENCE DESIGNS.TI reserves the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services perJESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevantinformation before placing orders and should verify that such information is current and complete. All semiconductor products are soldsubject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s termsand conditions of sale of semiconductor products. Testing and other quality control techniques for TI components are used to the extent TIdeems necessary to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is notnecessarily performed.TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products andapplications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provideadequate design and operating safeguards.Reproduction of significant portions of TI information in TI data books, data sheets or reference designs is permissible only if reproduction iswithout alteration and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable forsuch altered documentation. Information of third parties may be subject to additional restrictions.Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirementsconcerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or supportthat may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards thatanticipate dangerous failures, monitor failures and their consequences, lessen the likelihood of dangerous failures and take appropriateremedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use of any TI components inBuyer’s safety-critical applications.In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is tohelp enable customers to design and create their own end-product solutions that meet applicable functional safety standards andrequirements. Nonetheless, such components are subject to these terms.No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the partieshave executed an agreement specifically governing such use.Only those TI components that TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use inmilitary/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components thathave not been so designated is solely at Buyer's risk, and Buyer is solely responsible for compliance with all legal and regulatoryrequirements in connection with such use.TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use ofnon-designated products, TI will not be responsible for any failure to meet ISO/TS16949.IMPORTANT NOTICE

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265Copyright © 2015, Texas Instruments Incorporated

sercos iii slave for am437x — communication development platform

Documents