Intel’s Microarchitecture History

Intel’s Microarchitecture History

Models and stepping's

Code Name Die size Transistors Cores GPU EUs L3 Cache

Sandy Bridge-HE-4 216 mm² 1.16 billion 4 12 8 MB

Sandy Bridge-H-2 149 mm² 624 million 2 12 4 MB

Sandy Bridge-M-2 131 mm² 504 million 2 6 3 MB

Sandy Bridge-EP-8 435 mm² 2.27 billion 8 NA 20 MB

Sandy Bridge-EP-4 294 mm² 1.27 billion 4NA

10 MB

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