scheme for iii year v semester b.e. electronics and ... · 1. linear convolution of two given...

Scheme for III Year

V SEMESTER B.E. ELECTRONICS AND COMMUNICATION ENGINEERING (Courses Under the Autonomous Scheme)

Sl.

No.

Subject

Code Subject Category

Contact

Hrs/Week No. of

Credits L T P

1 EC0406 Control Systems FCE 4 0 0 4

2 EC0510 Digital Signal Processing* FCS 3 2 2 5

3 EC0410 Operating Systems FCM 4 0 0 4

4 EC0433 Microprocessors Systems* FCM 3 0 2 4

5 EC0438 Antennas and Wave Propagation FCC 4 0 0 4

6 EC0439 Analog and Digital Communications FCC 4 0 0 4

7 EC0109 Communication Laboratory FCC 0 0 3 1.5

Total 22 2 7 26.5

Total Contact Hrs/Week – 30 Hrs

VI SEMESTER B.E. ELECTRONICS AND COMMUNICATION ENGINEERING (Courses Under the Autonomous Scheme)

Sl.

No.

Subject

Code Subject Category

Contact

Hrs/Week No. of

Credits L T P

1 EC0440 Advanced Communication & Coding

Theory FCC 4 0 0 4

2 EC0417 Embedded Systems FCM 3 0 2 4

3 EC0315 Digital Switching Systems FCC 3 0 0 3

5 EC0508 Digital Design using Verilog HDL* FCM 4 0 2 5

6 EC0412 Data Structures using C++* FCP 3 0 2 4

7 EC0201 Mini Project GC 0 0 4 2

8 EC Elective-1 3 0 0 3

9 EC0110 Advanced Communication

Laboratory FCC 0 0 3 1.5

Total 20 0 13 26.5

Total Contact Hrs/Week – 33 Hrs

ELECTIVES OFFERED

1 EC0309 Advanced Signal Processing FES 3 0 0 3

2 EC0313 Neural Networks FES 3 0 0 3

2 EC0307 Image Processing FES 3 0 0 3

4 EC0310 ARM Processors FEM 2 0 2 3

* 5 credit course (Theory integrated with Laboratory)

** 4 credit course (Theory integrated with Laboratory)

CONTROL SYSTEMS (4:0:0)

Sub. Code: EC0406 CIE: 50% Marks

Hrs. /Week: 4 SEE: 50% Marks

SEE Hrs: 3 Hrs Max. Marks: 100

Course Outcome:

On successful completion of the course, the students will be able to

1. Apply the concept of mathematics to model a physical system. Represent a control

system using state space techniques. Compare open loop and closed loop control

systems.

2. Analyze the transient and steady-state behaviour of dynamic systems.

3. Analyze closed loop system performance in the time and frequency domain.

4. Analyze the stability of closed loop control systems.

Unit 1: Mathematical Models of Physical Systems:

Introduction to control systems – Historical development of control systems – open loop and

closed loop control system – Definitions – Examples of control systems – Comparison of

OLCS and CLCS – overview of engineering control problems.

Differential equation for physical systems – Transfer function analysis – Mechanical

translational and rotational systems – Electrical systems – Electromechanical systems –

Analogous Systems – F-V and F-I analogy 10Hrs

SLE: Control System components.

Unit 2: Block Diagram and Signal Flow Graphs:

Block diagram representation of control system – Block diagram algebra and reduction –

Examples to illustrate the above. Signal flow graph representation – SFG reduction using

Mason’s gain formula. 7 Hrs.

SLE: Multi input – Multi output control systems

Unit 3: Time Domain Analysis of Control Systems:

Introduction – Standard test signals – Type and order of the system – Time response of first

and second order systems – Time domain specifications – Steady state error and error

constants (both dynamic and static) 8 Hrs.

SLE: Time domain response withP, PI and PID controllers

Unit 4: Stability Analysis of Control Systems:

Introduction – Necessary conditions for stability – BIBO stability – Zero input and

asymptotic stability – Methods of determining stability – Routh – Hurwitz criterion –

Difficulties and remedies – Relative stability.Basic properties of root locus – Construction of

root loci – Some typical root locus plots – Application of root locus techniques. 10 Hrs.

SLE: Additions of poles and zeros to the transfer functions and their effect on root locus

Unit 5: Frequency Domain Analysis of Control Systems:

Introduction – Frequency domain specifications – Estimation of specifications for a second

order system – Bode plots – Gain and phase margins - Stability analysis using Bode plots.

9 Hrs.

SLE: Magnitude v/s Phase angle plots

Unit 6: Stability Analysis:

Polar plots and Nyquist stability criterion and stability analysis using Polar plots and Nyquist

plots. 8Hrs

SLE: State space models for control systems and its applications. Using SCI LAB.

Text Book:

1. “Control Systems engineering” J. Nagareth and M. Gopal, New age international,

4th edition

Reference Books:

1. “Modern control engineering”,K. Ogata, –Pearson education Asia / PHI 4th edition,

2002

2. “Automatic Control System”, Benjamin C. Kuo, PHI, 8th edition, 2002.

DIGITAL SIGNAL PROCESSING (3:2:2)


Hrs /Week: 3 SEE: 50% Marks

SEE Hrs: 3 Hrs Max. Marks: 100

Pre-requisite: Signals and Systems (EC0404)

Course Outcome:


1. Representation of analog signals by their discrete time samples and apply DFT and its

properties to sample and reconstruct discrete time signals.

2. Apply an efficient DFT in linear filtering methods.

3. Design IIR and FIR filters relative to specific performance parameters.

4. Realization of IIR and FIR filters.

5. Understand different DSP based architecture - TMS32067x processor.

Unit 1: Discrete Fourier Transform (DFT) & Properties of DFT:

Frequency domain sampling and reconstruction of discrete-time signals, Discrete Fourier

Transform (DFT), DFT as a linear transformation, relationship of the DFT to other

transforms. Properties of the DFT: linearity, periodicity, multiplication of two DFTs,

circular convolution, and symmetry properties, frequency analysis of signals using the DFT.

9Hrs

SLE: Additional DFT Properties.

Unit 2: Fast Fourier Transform Algorithms:

Direct Computation of the DFT, Efficient Computation of the DFT, Radix-2 FFT algorithms-

decimation- in-time FFT algorithm, decimation- in-frequency FFT algorithm, IDFT-

decimation- in-time, decimation- in-frequency, Goertezel algorithm. 7Hrs

SLE: Chirp Z-Transform.

Unit 3: Design of FIR Filters:

Properties of FIR digital filters, different types of windows - rectangular, bartlett, hanning,

hamming, design of FIR filters using above windows. 7 Hrs

SLE: Design of Blackmann& Kaiser windows, MATLAB programming for above windows

Unit 4: Design of IIR Filters:

Frequency transformations in the analog domain, characteristics of commonly used analog

filters, IIR filter design by approximation of derivatives, impulse invariance method, bilinear

transformation, application of above technique to the design of Butterworth & Chebyshev

filters. 9Hrs

SLE: Comparison of IIR & FIR digital filters, matched—transformation

Unit 5: Digital Filter Structures:

Basic IIR Filter Structures: Direct forms (I & II), cascade and parallel realizations, Basic FIR

filter structures- Direct form structure, Linear phase FIR structure, Frequency sampling

structure. 5Hrs

SLE: FIR Lattice structure structures.

Unit 6:Digital Signal Processors: Architectural features of a Digital Signal Processor, fixed

point and floating point processors, different generations of DSPs, TMS 320C67X

processors. (Text2) 5 Hrs

SLE: Fixed point arithmetic.

Text Books:

1. “Digital Signal Processing – Principles algorithm and application”, Proakis and

Manolakis, Pearson Education 4th Edition, 2007.

2. Monson H Hayes, “Digital signal processing”, Tata McGraw-Hill, New Delhi, 3rd

edition, 2008.

3. “Discrete Time Signal Processing”, Oppenheim And Schaffer,PHI,2003

Reference Book:

1. “Digital Signal Processing”, Sanjit K. Mitra, TMH, 2004

DIGITAL SIGNAL PROCESSING LABORATORY (0:0:2)

I LIST OF EXPERIMENTS USING MATLAB / SCILAB / OCTAVE / WAB

1. Verification of sampling theorem.

2. Impulse response of a given system

3. Linear convolution of two given sequences.

4. Circular convolution of two given sequences

5. Solving a given difference equation.

6. Computation of N point DFT of a given sequence and to plot magnitude and phase

spectrum.

7. Design and implementation of FIR filter to meet given specifications.

8. Design and implementation of IIR filter to meet given specifications.

II LIST OF EXPERIMENTS USING DSP PROCESSOR

1. Linear convolution of two given sequences.

2. Circular convolution of two given sequences.

3. Computation of N- Point DFT of a given sequence

4. Realization of an FIR filter (any type) to meet given specifications. The input can be a

signal from function generator

5. Realization of an IIR filter (any type) to meet given specifications. The input can be a

signal from function generator

OPERATING SYSTEMS (4:0:0)

Sub. Code: EC0410 CIE: 50% Mark

Hrs./week: 4 SEE: 50% Marks

SEEHrs: 3 Max Marks: 100

Course Outcome:


1. Explain the concept of operating systems, its structure and its types.

2. Understand structure of an OS and a Kernel

3. Differentiate between thread and process

4. Analyze Virtual Memory, Paging memory allocation, and select page table map

5. Use interrupts for process synchronization (through experimentation/assignment)

6. Understand different scheduling mechanisms

Unit 1: Introduction and Overview of Operating Systems:

Operating system, Goals of an O.S, Operation of an O.S, Resource allocation and related

functions, User interface related functions, Classes of operating systems, Multi programming

systems, Time sharing systems, Real and distributed operating systems 8 Hrs.

SLE: Batch processing system, Modern Operating systems

Unit 2: Structure of the Operating Systems:

Operation of an O.S, Structure of the supervisor, Operating system with monolithic structure,

layered design, Virtual machine operating systems, Kernel based operating systems, and

Microkernel based operating systems. 8 Hrs.

SLE: Configuring and installing of Kernel, Kernel of Linux

Unit 3: Process Management:

Process concept, Programmer view of processes, OS view of processes, Interacting processes,

Threads. Threads in Solaris 9 Hrs.

SLE: Processes in UNIX

Unit 4: Memory Management:

Memory allocation to programs, Memory allocation preliminaries, Contiguous and non-

contiguous allocation to programs,Memory allocation for program-controlled data, kernel

memory. 8 Hrs.

SLE: Segmentation, Segmentation with paging

Unit 5: Virtual Memory:

Virtual memory basics, Virtual memory using paging, Demand paging, Page replacement,

Page replacement policies, Memory allocation to programs, Page sharing, 9 Hrs.

SLE: UNIX virtual memory.

Unit 6: Scheduling:

Fundamentals of scheduling, Long-term scheduling, Medium and short term scheduling, Real

time scheduling.

Message Passing: Implementing message passing, Mailboxes, 10 Hrs.

SLE: Message passing in Unix

Text book:

1. “Operating Systems, A Concept based Approach”, ‘D.M. Dhamdhare’, TMH, 2nd

Ed.2006.

Reference books:

1. ‘Operating Systems Concepts’, ‘Silberschatz and Galvin’, John Wiley, 5th Edition,

2001.

2. ‘Operating System – Internals and Design Systems’, ‘Willaim Stalling’, Pearson

Education, 4th Ed, 2006.

MICROPROCESSORS SYSTEMS (3:0:2)


Hrs. /Week: 3 SEE: 50% Marks

SEE Hrs: 3 Hrs. Max. Marks: 100

Pre-requisite:Computer Organization and Architecture (EC0403)

Course Outcome:


1. Explain the fundamentals of the micro computing environment such as hardware

functions and processor architecture.

2. Design and analyse various types of memory systems and their decoding.

3. Explain the hardware and software components of a microprocessor-based system.

4. Develop assembly language program for the microprocessors and NDP.

5. Design and develop a microprocessor based system with peripheral interface.

6. Develop and build assembly language program for the microprocessors andNDP in

laboratory.

Unit 1: Intel Architecture:

CPU architecture, programming model, Memory address space and data organization. Data

types, segmented memory and register organization. I/O address space. Addressing modes

and instruction format. Instruction execution timing. 8 Hrs

SLE: A brief overview about the evolution of microprocessors. A general awareness about

present day microprocessors (Intel Pentium based processors or AMD processors).

Unit 2: Assembly Language and Instruction Set:

assembler instruction format. Assembler directives. Using assembler options. Simplified

segment definitions. Labels and variables. Structure and records. Multiple program modules.

Macros, repeat pre-fixes and equates. 7 Hrs

SLE:Assembly software programs implementing some very common algorithms to better

understand the semantics of the 8086 assembly language.

Unit 3: Memory Interfacing:

Pin assignments and control signals. Minimum and maximum modes. System clock, Bus

Cycle and 3-bus system. Address space. Memory control signals. Read and write bus cycles.

Memory Interface design and related hardware. 6 Hrs.

SLE: Interfacing ROMs with corresponding timing diagrams.

Unit 4: Interrupt Structure and Interface:

Types of interrupts. Interrupt vector table and interrupt instructions. External hardware

interrupt interface and interrupt sequence. Interrupt interface circuits using 8259 interrupt

controller. Software interrupts, NMI, Internal Interrupt functions. 7 Hrs.

SLE: Areas where microprocessors are used in everyday life (Examples are, in our very own

Personal Computers, Smart Phones, Laptops etc.)

Unit 5: Common Peripheral Controllers:

Basic concepts of Parallel, Serial, Programmed and Interrupt driven I/O, Designing Parallel

communication ports using 8255 PPI, Serial communication protocol RS232 and 8251

USART. 8 Hrs.

SLE: DMA Controller

Unit 6: Numeric Data Processor:

Multiprocessor configuration and interfacing 8087, NDP data types, overview of instruction

set and programming. 4 Hrs.

SLE: Interfacing of a coprocessor to an 8086 microprocessor and perform the required

computation using the coprocessor resources. Future of microprocessor

Text Book:

1. “Microcomputer systems”, Gibson and Liu, PHI, 1st Edition

Reference Books:

1. “The 8086/8088 family design, programming and Interfacing”, John Uffenbeck, PHI,

1st Edition

2. “The 8088 and 8086 Microprocessors”, Walter A Triebel and Avtar Singh, PHI, 1 st

Edition

MICROPROCESSORS SYSTEMS LABORATORY

LIST OF EXPERIMENTS

1. Simple programs to learn using of assembler and debug

2. Programs to illustrate usage of screen oriented debugger like TD, using breakpoints

and inspecting variables.

3. Data Transfer and addressing mode illustration

4. Simple programs to illustrate arithmetic instruction involving Binary, BCD and

ASCII data.

5. Interactive programs using DOS and BIOS interrupts.

6. Interactive programs to illustrate string manipulation instructions.

7. Hardware interfacing exercises using 8255 add on card.

8. Programs using NDP.

Note: As far as possible all the programs should use modular programming units like

Macros, Procedures and Libraries.

ANTENNAS AND WAVEPROPAGATION (4:0:0)

Sub Code: EC0438 CIE: 50% Marks

Hours /Week: 4 SEE: 50% Marks

SEE Hours: 3 Max. Marks: 100

Pre-requisite: Electro Magnetic Field Theory (EC0302)

Course Outcome:


1. Describe how an antenna radiates and capture radio wave energy from the concepts of

radiation by dynamic currents and TL theory. Solve problems on Antenna parameters.

2. Compute field patterns of arrays of Isotropic and NI sources. Computation of received

signal strength.

3. Design an antenna system, including the shape of the antenna, feed property, the

requirement on the arrangement of the radiating elements in an array, given the

radiation parameters such as radiation pattern, gain, operating frequency.

4. Summarise the concepts of working of different antenna types from the propagation

point of view and their specialities.

5. Identify the mechanism of radio wave propagation and its effects on EM waves.

Unit 1: Antenna Basics:

Physical concept of radiation, near-and far- field regions, basic antenna parameters: radiation

patterns, beam area, radiation Intensity, beam efficiency,reciprocity, directivity and gain,

antenna apertures, effective height, bandwidth, radiation efficiency, radio communication

Link, antenna temperature and antenna field zones, Fris trans formula. 9 Hrs.

SLE: Application of Network theorems to Antennas

Unit 2: Point Sources and Arrays:

Introduction point sources, power patterns, power theorem, radiation Intensity, field patterns,

phase patterns. Array of two isotropic point Sources, non- isotropic but similar point sources,

principles of pattern Multiplication, broad side versus end fire array, direction of maxima fire

arrays of n isotropic point sources of equal amplitude and spacing. 9 Hrs.

SLE: Array of dissimilar NI sources.

Unit 3: Electric Dipoles and Thin Linear Antenna:

Introduction, short electric dipole , fields of a short dipole, field and radiation resistance of

dipole , ,2 4λ λλ , folded dipole, Design of various types of dipoles. 9 Hrs.

SLE: Criteria for antenna design hup\874

Unit 4: Loop, Helix, Yagi-uda and Parabolic:

Introduction, field components, directivity, gain, radiation resistance, radiation pattern of

small loop, large loop, helical antenna, yagi-uda and parabolic antennas, fields of small loop,

far field patterns of circular Loop, radiation resistance, directivity. Design of loop, helix,

yagi-uda and parabolic antenna for a given application, simulation of radiation pattern in

Matlabfor the above types of antennas. Simulation of radiation pattern in Matlab for the

above types. 10 Hrs.

SLE: Log Periodic antennas

Unit 5: Antenna Types:

Slot antenna, Babinet principle, Horn antenna, Reflector antenna, Antenna for satellite,

Ground Penetration, Radar applications. Embedded antenna, Plasma antenna, Antenna

measurement techniques. 6 Hrs.

SLE: Intelligent Antenna System

Unit 6: Radio Wave Propagation:

Ground wave propagation, wave propagation Troposcopic scatter, ionosphere propagation,

electrical properties of the ionosphere, effects of earth’s magnetic field, understanding of

GWP, sky wave, space wave propagation. Application of such propagation types effect of

electric and magnetic field on propagation. 9 Hrs.

SLE: Faradays rotation, whislers

Text Books: 1. “Antennas & Wave Propagation “John D Krauss, McGraw -Hill

international3rdedition, 2006.

2. “Electromagnetic waves and radiating systems”, Jordan &Balmain, PHI.,

2ndEdition,1994

Reference Books:

1 “Antennas and Propagation for wireless communication system”, Simon R

Saunders: John Wiley Publications, 3rd Edition, 2001

2. “Antennas and propagation”, Harish and Sachidananda, Oxford press,1st

Edition,2007

3. “Antennas and wave propagation”, G S N Raju: Pearson Education.,3rd Edition

2009

ANALOG & DIGITAL COMMUNICATIONS (4:0:0)



SEE Hrs: 3 Max. Marks: 100

Course Outcome:


1. Describe and analyze the working of amplitude and frequency modulated systems and

analyze in time and frequency domain using Fourier and Hilbert transform.

2. Describe different types of noise and evaluate noise figure and figure of merit for

various communication circuits.

3. Distinguish between Analog and Digital Communication system and analyze

various sampling methods and its reconstruction.

4. Analyze and solve problems on various waveform coding and base band

shaping technique.

Unit 1: Amplitude Modulation

Introduction to analog communication, Need for modulation, AM: Description, Generation of

AM Wave: square law modulator. Detection of AM waves: square law detector, envelope

detector. Double side band suppressed carrier modulation (DSB-SC): Generation of DSB-SC

waves: balanced modulator. Coherent detection of DSBSC modulated waves. Costas

loop.Quadrature carrier multiplexing, SSB: Description in Time domain using Hilbert

transform Generation of SSB wave: Phase discrimination method, Detection of SSB wave.

10 Hrs.

SLE: Vestigial Side-Band Modulation

Unit 2: Angle Modulation (FM):

FM: Description, Narrow band FM, wide band FM, Generation of FM waves: indirect

method, direct method. Demodulation of FM waves: Frequency discriminator, Phase- locked

loop (PLL) 9 Hrs.

SLE: FM Broadcast receivers.

Unit 3: Noise & Noise in Continuous wave modulation systems:

Introduction, shot noise, thermal noise, white noise, Noise equivalent bandwidth, Noise

Figure, Equivalent noise temperature, noise effect in two-port networks. Noise performance

in AM and FM receivers, Pre-emphasis and De-emphasis. 9 Hrs.

SLE: Noise Reduction Techniques

Unit 4: Sampling Process:

Introduction, Basic signal processing operations in digital communication, communication

Channels Sampling and Sampling Theorem: Ideal, natural and flat top sampling, Quadrature

sampling of Band pass signal, TDM 9 Hrs.

SLE: Design of flattop sampling circuit.

Unit 5: Waveform Coding Techniques:

PCM, Quantization, Quantization noise and SNR, robust quantization, DPCM, DM, T1

carrier system. 8 Hrs.

SLE: ADPCM and its applications.

Unit 6: Base-Band Shaping for Data Transmission:

Discrete PAM signals, ISI, Nyquist’s criterion for distortion less base-band binary

transmission, correlative coding, eye pattern, base-band M-ary PAM systems, equalization.

7 Hrs

SLE: Adaptive equalization

Text Book:

“An Introduction to Analog and Digital Communications”, Simon Haykin, second

edition, John Wiley, 2012

Reference Books:

1. “Communication Systems”, Simon Haykin, fourth edition, John Willey, 2006

“Digital and Analog Communication Systems”, K. Sam Shanmugam, John Wiley, 2001.

COMMUNICATION LABORATORY (0:0:3)

Sub. Code: EC0109 Hrs. /Week: 3

Course Outcome:

1. Performance analysis of AM, FM, TDM and radiation pattern of antennas.

2. Simulate and experimentally verify sampling theorem.

3. Design, Simulate and Implement various Analog communication circuits.

LIST OF EXPERIMENTS

1. Test tuned amplifier, find centre frequency, bandwidth and quality factor.

2. Performance analysis of AM modulation and detection.

3. Performance analysis of FM modulation and detection.

4. Generate PAM for different modulating signals and demodulate using suitable filters.

5. Plotting of radiation pattern and calculation of 3-dB bandwidth of folded dipole, slot,

helix and Microstrip antennas

6. Design and test a T,π , bridge & Lattice type Attenuators for a given characteristic

resistance and attenuation factor.

7. Verification of sampling theorem using natural and flat top samples.

8. Performance analysis of TDM.

ADVANCED COMMUNICATION AND CODING THEROY (4:0:0)



SEE Hrs: 3 Max. Marks: 100

Course Outcome:


1. Describe and analyze various modulation schemes in digital communication

system and solve problems on probability of error.

2. Analyze and solve problems on spread spectrum and advanced modulation

techniques.

3. Analyze of information theory, source and channel coding techniques.

4. Describe and analyse advanced coding schemes.

Unit 1: Digital Carrier Modulation Schemes:

Introduction, Binary ASK, PSK, DPSK, FSK, and QPSK modulation schemes, Probability of

error, Matched filter and its transfer function, correlator. Comparison of digital modulation

schemes 10 Hrs.

SLE: SDR

Unit 2: Spread Spectrum Modulation

Pseudo noise sequences, notion of spread spectrum, direct sequence spread spectrum with

coherent binary PSK, frequency hopped spread spectrum, applications. 8 Hrs

SLE: CDMA

Unit 3: Advanced Modulation Techniques

Mary – FSK, Advanced QAM (16, 32), MSK, GMSK, TCM. 9 Hrs

SLE: 64 -QAM

Unit 4: Measure of Information, Source Coding and Channel Capacity:

Introduction, Measure of information, concept of Entropy for memory less sources,

Shannon’s and Shannon- Fano encoding algorithm, Huffman coding, discrete memory less

Channels, Mutual information, Channel Capacity, Introduction to continuous channels and

Shannon Hartley theorem. 9 Hrs.

SLE: Source coding using modern coding techniques,

Unit 5: Error Control Coding:

Introduction, properties of optimum code, linear block codes, Convolution codes (time

domain approach only), Cyclic codes. 8 Hrs.

SLE: Channel coding using modern coding techniques.

Unit 6: Advanced Coding Techniques:

Reed Solomon Codes, Viterbi codes, Trellis codes, Irregular codes 8 Hrs

SLE: LDPC codes.

Text Books:

1. “Communication Systems”, Simon Haykin, fourth edition, John Willey, 2006.

2. Blahut R. E, Theory and Practise of Error Control Codes, Addisson Wesley, 1983

References:

1. “An Introduction to Analog and Digital Communications”, Simon Haykin, second

edition, John Wiley, 2012

2. Shu Lin and Danicl J. Costello Jr., Error Control Coding: Fundamentals and

Applications, Prentice Hall, 2003.

EMBEDDED SYSTEMS(3:0:2)


Hrs. /week: 3 SEE: 50% Marks

SEE Hrs: 3 Hrs. Max Marks: 100

Course Outcome:


1. Describe characteristics of embedded systems and Common peripherals of an

embedded target board

2. Describe Booting sequence, memory layout, Boot loader installation and application

development

3. Compile and configure Linux kernel and Root file system

4. Use Make; describe different methods of debugging and Real time concepts

Unit 1: Embedded systems and Embedded Linux System:

Introduction. Embedded Linux Development. Target Hardware. Booting Linux. Development

Environment. System Design. Boot Loader, Kernel, Root File System, Application, Cross-

Compiler. 4Hrs

SLE: Basics of Linux OS and commands

Unit 2: Configuring the Software Environment:

Target Emulation Virtual Machines Host Environment .Linux. Host Services TFTP

DHCP.NFS PXE. Cabling: Serial (for40Consoles), Network. Why Target Emulation?

Emulation via QEMU Compiling QEMU. Using QEMU to Emulate a Target Using QEMU

to Compile under Emulation 7 Hrs

SLE: Windows host environment

Unit 3: Configuring the Target Board:

Booting the board, Assessing the Kernel, Understanding the RFS. Cross-Compiler The Boot

Loader, Kernel-Land vs. User land, Boot Loaders, Flash Memory. Kernel Startup, The Kernel

Entry Point, User land Startup, Busy BoxInit Hardware Constraints, Performance and

Profling Tools. 8 Hrs

SLE: Non-Traditional Embedded Languages: Python, TCL

Unit 4: Application Development:

Coding for Portability, System Differences, Tools required. Using Make, .Running the code

on target. Getting Started on Application, .Types of Debugging: Remote

DebuggingOverview, Debugging C, Compiling for Debugging

7 Hrs

SLE: Using GDB for debugging

Unit 5: Kernel Configuration and Development:

Kernel Project Layout, .Building the Kernel, How Kernel Configuration Works, Default

Configurations, Editing .confgByHand.Building the Kernel, Building Modules. Cleaning

Up.Configuring the Boot Loader and Kernel, U-Boot, Other Boot loaders, Execution in

Place, selecting a Root File System, Block-Based File Systems., RAM Buffer–Based File

Systems, Assembling a Root File System. Creating the Staging Area,creating a Directory

Skeleton, Libraries and Required Files. Creating Initialization Scripts, Setting Ownership and

Permissions. 7 Hrs

SLE: MTD File Systems

Unit 6: Real Time Concepts and System Tuning:

Real-Time Core Concepts. The Linux Scheduler Real-Time Scheduler .Real-Time

Implementation in Linux, Real-Time Programming Practices. The One Real-Time Process,

Lock Memory, Avoiding the Heap, Asking for Priority Inheritance Mutexes I/O Is

Nondeterministic. Using Thread Pools.Three or Fewer Megabytes, 16–32 Megabytes, More

than a Gigabyte. Reducing the Size of the Root File System, Compiling to Save Space,

Reducing the Size of the Kernel, Removing Unneeded Features and Drivers, Minimizing

Boot Time 7Hrs

SLE: Reducing kernel bootup times, reducing root file systems startup time

Text Book:

1. ‘Professional Linux Embedded Systems’, ‘GeneSally’, Academic Press 2010

DIGITAL SWITCHING SYSTEMS (3:0:0)



SEE Hrs.: 3 Hrs. Max Marks: 100

Course Outcome:


1. Implement the Building blocks of Digital switching system and analyze the concept of

switching system control and transmission.

2. Analyze the Mathematical modelling of telephone systems and designing of switching

networks, link systems, space and time division switching systems, and

synchronization.

3. Discuss the switching system software required for typical digital switching system,

software architecture, call models, feature flow diagrams.

4. Discuss reliability, analysis, maintenance of Digital Switching System, a generic

Digital Switching System model.

Unit 1: Evolution of Switching Systems:

Developments of telecommunications, network structure, network services, terminology,

standards, message switching, circuit switching, functions of switching systems, electronic

switching systems. TDM, PDH, and SDH transmission.

Digital Switching Systems: Basic central office linkages, switching system hierarchy, stored

program control switching systems, digital switching system fundamentals, building blocks

of digital switching systems. 7 Hrs

SLE: Basic Call Processing.

Unit 2: Telecommunication Traffic:

Call processing, unit of traffic, congestion, mathematical model, lost call systems, queuing

systems. 7Hrs.

SLE: Traffic Performance

Unit 3: Switching Networks:

Introduction, single stage networks, gradings, link systems, GOS of link systems.

Time division switching: Introduction, space and time switching, time switching networks,

synchronization. 7Hrs.

SLE: ISDN.

Unit 4: Switching System Software:

Introduction, basic software architecture, operating systems, data base management, concept

of generic program, software architecture for level 1 control, software architecture for level 2

control, software architecture for level 3 control Digital Switching System Software

Classification. Software Linkage During a call 6Hrs.

SLE: Call models.

Unit 5: Maintenance of Digital Switching Systems:

Introduction, software maintenance, interface of typical digital switching system central

office, system outage and its impact on digital switching system reliability, impact of

software patches on digital switching system reliability. A strategy improving software

quality, program for software process improvement, software process, metrics. 7 Hrs.

SLE: - Generic Program Upgrade

Unit 6: A Generic Digital Switching System Model:

Introduction, scope, hardware architecture, software architecture, recovery strategy, common

characteristics of digital switching systems, analysis report, reliability analysis. 6Hrs.

SLE: Simple call through a digital system.

Text Books:

1. ‘Telecommunication switching traffic and networks’, ‘J.E. Flood’, Pearson

education, 2002.

2. ‘Digital switching systems’, ‘Syed R.Ali’, TMH Ed 2002.

Reference book:

1. ‘Digital telephony’, ‘John.C Bellamy’, Wiley India 3rd Edition 2000.

DIGITAL DESIGN USING VERILOG HDL(4:0:2)

Sub Code: EC0508 CIE: 50% Marks

Hours /Week: 4 SEE: 50% Marks

SEE Hrs.: 3 Max. Marks: 100

Pre-requisite:Digital Electronics Circuits (EC0502)

Course Outcome:


1. Explain advanced topics in digital logic design.

2. Describe modelling and Verilog language syntax and semantics.

3. Design, test and implement combinational and sequential circuits using Verilog

simulator

4. Design, test and implement finite state machines using FSMD and ASMD charts

using Verilog simulator

5. Implement typical combinational and sequential systems on Altera DE2 board.

6. Demonstrate the use of a soft processor in designing digital systems and importance

of IP cores.

Unit 1: Introduction to Verilog:

Module concept, data types, primitives, attributes, modelling styles, Basics of simulation

6Hrs

SLE: Need for modelling and meaning of concurrency

Unit 2: Structural Modelling:

Gate primitives, Delay models, Hazards, Switch level Modelling, Hierarchical structural

modelling: Module, generate Statement 8Hrs

SLE: Tristate devises and their use

Unit 3: Data FlowModelling:

Continuous assignment, expressions, operands, operators, Behaviouralmodelling, Procedural

constructs, Procedural assignments, Timing control, Selection statements 10Hrs

SLE: Different looping constructs in Verilog

Unit 4: Advanced Constructs:

Tasks, Functions, System tasks and functions and UDPs: Sequential UDP. 9Hrs

SLE: Combinational UDP

Unit 5: Advanced Modelling techniques: Sequential logic modules: Flip-Flops, Shift

Registers, Counters, Sequence Generators 10Hrs

SLE: Test bench design and simulation

Unit 6: System Design Methodology:

Design Flow of ASICs and FPGA- Based Systems: The General Design Flow, Logic

Synthesis, Language Structure Synthesis, Finite-State Machine, RTL design: ASM chart,

Data path and Control Path Design. 10Hrs

SLE: Architecture of a typical FPGA.

Text book:

1. “Advanced Digital Design using Verilog HDL”, Ming Bo Lin, Published, TMH.

Reference Books:

1. “Advanced Digital Design using Verilog HDL”, Celleti Published, PHI 2003

2. “Verilog HDL”, Samir Palnitkar Published, Pearson Education 2003

DIGITAL DESIGN USING VERILOG HDL

LIST OF EXPERIMENTS

PART A: Simulation Synthesis and Implementation using Xilinx ISE 14.7

1. Lab Session 1 - Logic gates in Structural, Dataflow and Behavioral

2. Lab Session 2 - Combinational Circuits 1


4. Lab Session 4 - Sequential Circuits 1


PART B : Synthesis and implementation for ASIC flow ( Cadence)





10. Lab Session 10 - Implementation of FSM

Text book:

1. “Design through VERILOG HDL” By T R. Padmanabhan. Published by IEEE

Press and John Wiley and Sons.2004.

DATA STRUCTURES USING C++ (3:0:2)


Hrs./Week: 3 SEE: 50% Marks

SEE Hrs.: 3 Hrs Max. Marks: 100

Course Outcome:

On successful completion of the course, the students will be able to:

1. Explain the concept of object oriented programming and their significance in real

world.

2. Demonstrate knowledge of OOPS features needed for solving problems and

programming.

3. Analyse and implement programs for various data structure such as: Linked list,

stacks, queues, trees, searching and sorting related algorithms.

4. Interpret, analyse and implement object modelling for given practical problems using

C++ programming development environment.

Unit 1: Object Oriented Programming:

Introduction to procedure oriented and object oriented programming, Features of Object

oriented programming, Classes and objects, access specifiers, Constructor and Destructors.

9 Hrs.

SLE:Structures and Unions.

Unit 2:Inheritance and Polymorphism:

Polymorphism: Function overloading, pass by value, pass by reference and pass by pointers,

Operator overloading, Friend function, Inheritance, Types of Inheritance, virtual function and

virtual classes, Function templates. 9 Hrs.

SLE: Static variables and functions.

Unit 3:Linked List:

Dynamic memory allocation, pointers, new and delete operator, Linked List Types: Single,

Double, and Circular. Stacks, and Queues. 8 Hrs.

SLE:DeQueue, Circular Queue.

Unit 4: Trees and Graphs:

Introduction, Binary search Tree: Traversals orders (Inorder, postorder and preorder),

Introduction to Graphs, DFS and BFS. 8 Hrs.

SLE:Dijikstra’s Algorithm.

Unit 5: Searching:

Searching: Linear and Binary search, Hashing principles, Hash functions, Collision resolution

Techniques using open and closed addressing. 6 Hrs.

SLE: Big O notation

Unit 6. Sorting:

Sorting: Insertion sort, Selection sort, Bubble sort, Insertion sort, Merge sort, Quick sort.

7 Hrs.

SLE:External sorting.

Text Books:

1. Herbert Schmidt, “The Complete Reference C++”, Tata McGraw-Hill., 4th Edition.

2. A.M. Tenenbaum, Data Structures Using C, Pearson Education.

3. Y. Langsam, M. Augenstein and A.M. Tenenbaum, “Data Structures using C and

C++”,Prentice Hall India.

Reference Books:

1. Stanley B.Lippmann, Josee Lajore, Sartaj Sahni, “Data Structures using C++”, Tata

McGraw Hill.

2. “C++Primer”, Addison Wesley, 4th Edition, 2005. 3. Owen L. Astrachan, “Programming with C++ - A Computer Science Tapestry”, Tata

McGraw-Hill., Special Indian Edition 2007.

4. E. Horowitz, and Sartaj Sahni, “Fundamentals of Data Structures”, Galgoti

Publications.

DATA STRUCTURES USING C++

The following programs must be implemented using C++

1. Basic object oriented programming using operators, arrays and statements

2. Constructors and destructors programs.

3. Inheritance, friend functions

4. Polymorphism, virtual functions

5. Singly linked list, doubly linked list, circular linked list programs.

6. Stack, queue implementation using linked list

7. Trees and Graphs programs

8. Searching and sorting programs.

ADVANCED COMMUNICATION LABORATORY (0:0:3)

Sub. Code: EC0110 Hrs. /Week: 3

Course Outcome:

1. Performance analysis of various digital modulation techniques.

2. Experimentally find the performance parameters of filter circuits, Couplers, Power

dividers using Microwave Striplines.

3. Performance analysis of various CODECs

4. Design, simulate and implement various Digital Communication circuits.

LIST OF EXPERIMENTS

1. Performance analysis of Fiber Optic link

2. Performance analysis of ASK and FSK.

3. Performance analysis of PSK and DPSK.

4. Implementation of CODECs using Hamming, cyclic and convolution codes.

5. Measurement of transmission loss and reflection loss of a 50-ohm microstrip

transmission line.

6. Measurement of power division, isolation and return loss characteristics of a 3dB

power divider.

7. Measurement of characteristics of a branch line and backward wave directional

coupler.

8. Measurement of filter characteristics of lowpass and bandpass filter

ELECTIVES OFFERED

ADVANCED SIGNAL PROCESSING (3:0:0)


Hrs./week: 3 SEE:50% Marks

SEE Hrs.: 3 Max Marks: 100

Pre-requisite: Digital Signal Processing (EC0510)

Course Outcome:

On successful completion of the course, the students will be able to:

1. Compare different Vector Spaces and study Linear independence

2. Apply methods for reconstruction and interpolation signals, based on signal

modelling and advanced filtering techniques.

3. Analyze Biomedical Signals like ECG, EEG etc. and compare parametric/non-

parametric methods for power spectral estimations.

4. Resolve a signal in both time and frequency domains.

Unit 1: Linear Algebra:

Vector spaces, Subspaces, Inner product, Linear independence, Basic Functions 6 hrs

SLE: Expectation operation

Unit 2: Multirate DSP:

Decimation, Interpolation, Sampling rate conversion, Applications, Filer banks, QMF filter

banks 7 hrs

SLE: M Channel QMF Bank.

Unit3: Biomedical Signal Processing

Brain and its potentials, EEG Signal and its characteristics, EEG Analysis, Linear Prediction

Theory.ECG Data Acquisition, ECG Lead System, ECG Parameters and their estimation.

7 hrs

SLE: Arrhythmia Analysis Monitoring

Unit 4: Adaptive Filters:

Applications, LMS and RLS algorithms, Adaptive lattice filter. 6 hrs

SLE: Adaptive recursive filters, recursive least squares.

Unit 5: Linear Prediction:

Random Signals, Correlation Function and Power Spectra, Innovations Representation of a

Stationary Random Process 7 hrs

SLE: Forward and Backward Linear Prediction

Unit6: Wavelets:

Introduction, CWT, DWT, Signal spaces and multiresolution analysis, Scaling function,

wavelet-DWT functions, Wavelet expansion 7 hrs

SLE: Different wavelets like Haar and Daubechies.

Text Books:

1. John G Proakis and Dimitris G Manolakis, Digital Signal Processing 4thEdn.,

Pearson Education, Noida, India, 2009

2. Biomedical Signal Processing, Principles and Techniques, DC Reddy

Reference Books:

1. Discrete Time Signal Processing, Alan V Oppenheim and Ronald W Schafer

2. Emmanuel Ifeachor and Barrie W Jervis, Digital Signal Processing, 2ndEdn., Pearson

Education, Noida, India, 2011

3. Paulo SR, et.al, Digital Signal Processing, Cambridge, UK, 2002

4. P P Vaidyanathan, Multirate signal processing, Pearson Education, Noida, 1993

5. Raghuveer Rao and AjitBopardikar “Wavelets”, Pearson Education, Noida, 2000

6. Schaum Series “Linear Algebra”

NEURAL NETWORKS (3:0:0)



SEE Hrs.: 3 Hrs. Max Marks: 100

Course Outcome:


1. Design single and multilayer feed-forward neural networks and the differences

between networks for supervised and unsupervised learning.

2. Analyze the behaviour of radial-basis function networks.

3. Illustrate unsupervised learning using Kohonen networks and training of recurrent

Hopfield networks.

4. Perform algorithmic training of various neural networks and Analyze the performance

of neural networks.

Unit 1:

Introduction, history, structure and function of single neuron, neural net architectures, neural

learning, use of neural networks. 5 Hrs.

SLE: Neural network Architecture.

Unit 2:

Supervised learning, single layer networks, perceptions, linear separability, perceptions

training algorithm, guarantees of success, modifications. 8 Hrs.

SLE: Neural networks used for predictions.

Unit 3:

Multiclass Networks-I, multilevel discrimination, preliminaries, back propagation, setting

parameter values, theoretical results. Accelerating learning process, application, mandaline,

adaptive multilayer networks. 7Hrs.

SLE: Resilient back propagation.

Unit 4:

Prediction networks, radial basis functions, polynomial networks, regularization,

unsupervised learning, winner take all networks, counter propagation networks. 7Hrs.

SLE: Kohonen self-organizing network

Unit 5:

Adaptive resonance theorem, topologically organized networks, distance based learning, neo-

cognition. Associative models, hop field networks, brain state networks, Boltzmann

machines, hetero associations. 8 Hrs.

SLE: Continuous Hopfield networks.

Unit 6:

Optimization using hop filed networks, simulated annealing, random search, evolutionary

computation. 5 Hrs.

SLE: Boltzmann machine

Text book:

1. ‘Elements of Artificial Neural Networks’, ‘KishanMehrotra, C. K. Mohan, Sanjay

Ranka’, Penram, 1997.

Reference Books:

1. ‘Artificial Neural Networks’, ‘R. Schalkoff’, MGH, 1997.

2. ‘Introduction to Artificial Neural Systems’, ‘J. Zurada’, Jaico, 2003.

3. ‘Neural Networks’, ‘Haykins’, Pearson Edu., 1999.

IMAGE PROCESSING (3:0:0)



SEE Hrs.: 3 Max Marks: 100

Pre-requisite: Digital Signal Processing (EC0407)

Course Outcome:


1. Understand basic principles of digital images, image data structures, and image

processing techniques.

2. Understand transform domain of an image and operations in transform domain

3. Understand image processing filtering techniques in both the spatial and frequency

(Fourier) domains

4. Understand the processes involved in enhancement and restoration techniques.

Unit 1: Introduction to Image Processing System:

Introduction, Image, Sampling, Quantization, Resolution, Classification of Digital Image,

Image types, Elements of an image processing system, Applications of Digital Image

Processing. 6 Hrs.

SLE: Image file formats.

Unit 2:2D Signals and Systems:

Introduction, 2D signals, Separable sequence, periodic sequence, 2D systems, classification

of 2D systems, 2D construction, 2D Ztransform. 6 Hrs.

SLE: 2D Digital filter .

Unit 3: Image Transforms:

Introduction, Need for transform, Image transforms, Fourier Transform, 2D DFT, properties

of 2D-DFT, Walsh Transform, Hadamnd transform, Haar Transform, Slant Transform, DCT,

K-L transform, Comparison of Different Image Transform. 6Hrs.

SLE: Wavelet transform.

Unit 4: Image Enhancement:

Introduction, Image Enhancement in spatrate Domain, Enhancement through point operation,

Types of point operation. Histogram Manipulation, Linear gray- level transformation, Local or

Neighbourhood operation, Median filter, Spatial domain high-pass filtering or image

sharpening. Bit-place sliching, image enhancement in the frequency domain, homomorphic

filter, Zooming operation, Image arithmetic. 10 Hrs.

SLE: Morphological operations.

Unit 5: Image Restoration

Introduction, Image Degradation, Types of image Blur, Classification of image – restoration

techniques, image-restoration model, linear image restoration techniques, non- linear image-

restoration techniques. Blind Deconvolution, classification of Blind-deconvotion techniques

6 Hrs.

SLE: Image restoration in satellite images

Unit6: Image Denoising

Image Denoising, classification of noise in image, median filtering, Trained Average filter,

Performance Metrics in Image restoration, Applications of Digital Image Restoration

6 Hrs.

SLE: Image Denoising in medical images.

Text Book:

1. ‘Digital Image Processing’, ‘S. Jayaraman, S. Esakkirajan, T. Veerakumara’, Tata

McGraw Hill Education Pvt. Ltd., 2009

Reference Book:

1. ‘Image Processing’, ‘Gonzalez’, Gatesmark Publishing, 2nd Edition, 2009

2. ‘Digital Image Processing’, ‘Anil K Jain’, Prentice Hall, 1998

ARM PROCESSOR (2:0:2)



SEE Hrs.: 3 Max Marks:100

Pre-requisite:Microprocessors Systems (EC0433)

Course Outcome:


1. Describe the ARM programmer’s model, its architecture and analyze ARM and

thumb instruction set for ARM processor.

2. Describe the architectural support of ARM for operating system and explain the 3-

Stages pipeline organization.

3. Analyze advanced microcontroller bus architecture and JTAG boundary scan test

architecture.

4. Illustrate different ARM processor cores and analyze the function of memory

management unit of ARM.

5. Write and implement programme in assembly language using Keil micro tool.

Unit 1: The ARM Architecture and Instruction Set:

The Acorn RISC Machine,Architecturalinheritance,The ARM programmer's model ARM

development tools,Introduction Exceptions Conditional execution, Branch and Branch with

Link (B, BL), Branch with Link and exchange (BX, BLX) Software Interrupt (SWI), Data

processing instructions Multiply instructions, Single word and unsigned byte data transfer

instructions Half-word and signed byte data transfer instructions, Multiple register transfer

instructions, Swap memory and register instructions (SWP), Status register to general register

transfer instructions, General register to status register transfer instructions, Coprocessor

instructions, Coprocessor data operations, Coprocessor data transfers, Coprocessor register

transfers, Unused instruction space, (Most of the topics will be cover in LAB sessions)

5Hrs.

SLE: Memory faults, ARM architecture variants.

Unit2: The Thumb Instruction Set:

The Thumb bit in the CPSR, the Thumb programmer's model, Thumb branch instructions,

Thumb software interrupt instruction, Thumb data processing instructions, Thumb breakpoint

instruction, Thumb implementation, Thumb applications. 2Hrs

SLE: Thumb single register and multiple register data transfer instructions

Unit 3: Architectural Support for Operating Systems:

An introduction to operating systems, the ARM system control coprocessor, CP15 protection

unit registers, ARM protection unit. 5 Hrs.

SLE: ARM MMU architecture, Synchronization, Contextswitching, Input/Output

Unit 4: ARM Organization and Implementation:

3-stage pipeline ARM organization, 5-stage pipeline ARM organization, ARM instruction

execution, The ARM coprocessor interface. 3Hrs

SLE: ARM implementation

Unit 5: The ARM Memory Interface:

The Advanced Microcontroller Bus Architecture (AMBA), The ARM reference peripheral

specification,Hardware system prototyping tools, The ARMULATOR, The JTAG boundary

scan test architecture. 5 Hrs

SLE:The ARM debug architecture, Embedded Trace. Signal processing support

Unit 6: ARM Processor Cores and Memory Hierarchy:

ARM7 TDMI, ARM8, ARM9, TDMI. Memory size and speed, On-chip memory, Caches,

Memory management. 6 Hrs

SLE: ARM10TDMI , Cache design - an example

Text book:

1. ‘Arm System on chip Architecture’, ‘Fuber’, Addison Wesley Longman 2000.

Reference Book:

1. “ARM Architecture Reference manual publications”, ARM Limited, 2000.

ARM PROCESSOR LABORATORY (0:0:2)

LIST OF EXPERIMENTS

1. Write an assembly language program to perform data processing operation.

2. Write an assembly language program to perform load and store operation.

3. Write an assembly language program to perform data transfer operation.

4. Write an assembly language program to perform logical shift operation.

5. Swapping register contents.

6. Factorial calculation.

7. Pre-index addressing and post-index addressing.

8. Branch instruction

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