scheduling semiconductor wafer fabrication

IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, VOL. I , NO. 3, AUGUST 1988 I I5

Scheduling Semiconductor Wafer Fabrication LAWRENCE M. WEIN

Abstract-This paper is concerned with assessing the impact that scheduling can have on the performance of semiconductor wafer fabrication facilities. The performance measure considered here is the mean throughput time (sometimes called cycle time, turnaround time or manufacturing interval) for a lot of wafers. A variety of input control and sequencing rules are evaluated using a simulation model of a representative but fictitious semiconductor wafer fab. Certain of these scheduling rules are derived by restricting attention to the subset of stations that are heavily utilized, and using a Brownian network model, which approximates a multiclass queueing network model with dynamic control capability. Three versions of the wafer fab model are studied, which differ only by the number of servers present at particular stations. The three versions have one, two and four stations, respectively, which are heavily utilized (near 90-percent utilization). The simulation results indicate that scheduling has a significant impact on average throughput time, with larger improvements coming from discretionary input control than from lot sequencing. The effects that specific sequencing rules have are highly dependent upon both the type of input control used and the number of bottleneck stations in the fab.

I . INTRODUCTION HIS PAPER is concerned with assessing the impact T that scheduling can have on the performance of semi-

conductor wafer fabrication facilities. The performance measure considered here is the mean throughput time (sometimes called cycle time, turnaround time, or manufacturing interval) for a lot of wafers. A variety of input control and lot sequencing rules are evaluated using a simulation model of a representative but fictitious semiconductor wafer fab. The fab uses a single process technology, which requires 172 total operations at 24 different single or multiserver stations. Three versions of the model, which differ only by the number of servers present at particular stations, are used. The three models have one, two, and four stations, respectively, that are heavily utilized (near 90-percent utilization).

Four different types of input mechanisms are considered and different sequencing rules are evaluated for each. The four types are Poisson input, deterministic input (in- teramval times are constant), closed loop input (the number of lots in the system is held constant), and a policy we call workload regulating input, which releases a lot of wafers into the system whenever the total amount of remaining work in the system for any bottleneck station falls

Manuscript received April 11, 1987; revised March 15, 1988. This work was supported in part by the Semiconductor Research Corporation under Grant 84-01-046 (Manufacturing Science for VLSI, Center for Integrated Systems, Stanford University).

The author is with the Sloan School of Management, M.I.T., Cam- bridge, MA 02139.

IEEE Log Number 8821558.

below a prescribed level. The lot sequencing decisions consist of dynamically choosing which of the lots queued at a particular station should be processed next.

The workload regulating input policy and certain sequencing rules are derived or suggested by restricting attention to the subset of stations that are heavily utilized, and using a Brownian network model, which approximates a multiclass queueing network with dynamic control capability. By superimposing an objective function on the Brownian network model, various control problems can be formulated. The solutions to these problems yield effective input control and sequencing rules for the heavily utilized subnetwork, and these rules are then tested in the simulation model of the entire fab. Interested readers are referred to [8] for a development of the Brownian network model, and to [20], [9] for solutions to various Brownian network control problems that led to some of the scheduling rules tested in this paper.

The simulation results indicate that scheduling has L

significant impact on the performance of semiconductor wafer fabrication, with larger improvements coming from discretionary input control than from lot sequencing. In particular, deterministic, closed loop and workload regulating input provided improved performance over Pois- son input, by substantially reducing both the mean and variability of throughput times. Queueing theory results (see [2], [21], and [ 2 3 ] ) predict that reducing the variability in the input will improve performance. However, it is very encouraging to observe the size of the impact on overall performance (35-45 percent reduction in average total queueing time) that can be gained by properly regulating the input.

However, the improvements resulting from lot sequencing rules were quite modest (less than 10-percent reduction in average total queueing time). Moreover, the effects that specific sequencing rules have are highly dependent upon both the type of input control used and the number of bottleneck stations in the fab.

The remainder of this paper is organized as follows. Section I1 summarizes the relevant literature on both wafer fabrication and job shop scheduling. Section I11 describes the simulation model that was developed to examine different scheduling rules in the wafer fab environment, and the structure of the simulation study is laid out in Section IV. In Section V, the results of the simulation study are presented and discussed, and the conclusions of the study are contained in Section VI. The Appendix contains a brief description of the theoretical origins of cer ain scheduling rules that are considered in this study.

0894-6507/88/0800-0115$01 .OO 0 1988 IEEE

~

116

11. RELEVANT LITERATURE

IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING. VOL. I . NO. 3 . AUGUST 1988

111. THE WAFER FABRICATION MODEL

Recently there has been some interest in the modeling and analysis of semiconductor wafer fabrication. Dayhoff and Atherton [6] describe in broad terms the potential relevance of simulation methodology for analysis of wafer fab operations, and they present some comparisons of different dispatch rules at the photolithography area. Wafer fabrication simulation studies are reported by Lohras- bpour and Sathaye [13], Burman et al. [3], and Glassey and Resende [7]. The first paper observes, as we do, the improvement in performance that is achieved by reducing the variability in the input mechanism. All three papers compare several heuristic input strategies that are similar in spirit to the workload regulating input policy presented here. Glassey and Resende’s rule performs particularly well, but is only appropriate for fabs with one heavily utilized work station. The third paper also discusses the use of queueing network models and deterministic capacity models to analyze the performance of wafer fab operations. In an empirical study, Chen et al. [4], using several years’ worth of operating data from a particular facility, describe in detail how queueing network models can be used to predict certain key system performance measures of a wafer fab. Motivated by wafer fabrication, Bitran and Tirupati [2] have recently improved the methodology that has been used to predict the performance of multiproduct queueing networks with deterministic routing. The influence of lot size on cycle time in wafer fabrication is the subject of a recent study by Spence and Welter [ 161.

Dynamic control of queues is important in the context of both manufacturing and computer systems, and useful results on dynamic sequencing have been obtained for single station systems, culminating in Klimov [ 111. He shows that the shortest expected remaining processing time rule (SRPT), which gives priority to the job that is closest to exiting the system, minimizes the long run average queue length for a multiclass queue with feedback, under the assumption of Poisson inputs and certain mild conditions on the feedback probabilities. A good deal of attention has also been given to dynamic sequencing in a network setting, but a satisfactory general theory has not been attained, and simulation (see [5] for a classic study on this topic) is still the primary tool of analysis. There also exists research related to input control of queueing networks, but these models consider the decision of whether to accept or reject Poisson arrivals; Stidham [ 171 provides a thorough survey of work in this area. These models are not applicable to the scheduling problem considered here, since the relevant issue in our setting is when to release a lot into the fab, not whether or not to accept the lot. In view of the difficulty in obtaining sequencing and input rules for conventional multiclass queueing networks, the best hope for further progress appears to be in the analysis of cruder, more tractable models, such as the Brownian network used here.

Wafer fabrication is conducted in a wafer fab , which can be viewed as a job shop containing a number of single-server and/or multiserver stations. Wafers are grouped in lots, and each lot entering the fab has a specific process pow, which dictates the sequence in which the various stations are visited. Wafer fabrication involves the creation of multiple, lithographically patterned layers on a semiconductor wafer, and the operations involved in the creation of each successive layer are essentially the same, so lots can and typically do return to at least some pieces of equipment repeatedly. In particular, the exposure step, generally referred to as photo expose, is performed during the creation of each layer, giving the resulting process flow a cyclic character. Photo expose is the most complex and delicate operation in wafer fabrication, and it involves the most expensive equipment found in the fab. We refer readers to [ 181 for a detailed description of semiconductor wafer fabrication, and to [3] or [4] for a more concise description.

A simulation model, written in the SIMAN simulation language (see [14]), is used to examine different scheduling rules in the semiconductor wafer fabrication environment. Although the simulation model describes a fictitious wafer fab, most of the parameters of the model are derived from data gathered at an actual facility, as we will discuss in a moment. This facility is the Hewlett-Packard Technology Research Center Silicon fab (hereafter referred to as the TRC fab), which is a relatively large development laboratory in Palo Alto, California.

There are two types of wafer fabs, production facilities and development laboratories, which use essentially the same type of equipment for execution of essentially the same operations. From a scheduling standpoint, the two main differences between these fabs are that development fabs have a much greater diversity in the lots that they process, and lots in a development laboratory incur a substantial amount of engineering hold time, which occurs when an engineer wishes to take a lot aside after a particular operation and inspect it before further operations are performed.

Because our data was collected at a development laboratory and our interest was in analyzing the environment of a production facility, the simulation model differs from the operations of the TRC fab in two major ways. In our model, we assume that no engineering hold time is incurred and we consider a fab that uses a single process technology (i.e., all lots have the same process flow). The scheduling rules derived from the Brownian network model are applicable to a multiprocess fab. However, a single-process fab is analyzed here because the process (see Fig. 1) offered a sufficiently complex scheduling problem.

The simulation model consists of 24 single-server and multiserver stations, with all multiserver stations consisting of identical pieces of equipment. The basic parame-

WElN: SCHEDULING SEMICONDUCTOR WAFER FABRICATION 117

TABLE I EQUIPMENT DESCRIPTION

# OF MACHINES

1 I I I I I I I I

% UTILIZATION

56.4 56.4 92.2

26.7 26.7 52.4

29.6 29.6 59.2

55.3 91.8 91.8

NV/L = Number of visits per lot MPT = Mean Processing time

MTBF = Mean time between failures MTTR = Mean time to repair

% UTILIZATION = [((.0236) (NV/L) (MPT) / ( # MACHINES)) + (MTTR)/(MTBF + MTTR)] x 100%

118 IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, VOL. 1, NO. 3, AUGUST 1988

ENTER- 1- 2- 13- 14- 23 - 15- 20- 22 - 23 - 22- 17- 13- 14- 15-

23 - 16 - 24- 23 - 22- 17- 1 - 8- 4 - 22- 22- 1 - 2- 8- 13- 14-

23 - 22- 17- 1 - 2 - 8- 9 - 21 - 22 - 1 - 4 - 22- 22 - 1 - 2- 13 - 14-

23 - 15 - 16- 24- 24- 23 - 22 4 17 - 24- 1 - 2 - 7 - 1 - 3- 22- 13 -.

15 - 23 - 22- 22 - 22- 17 + 13 14 4 18 - 23 + 15 - 16- 20- 23- 1 - 17 - 1 - 1 - 3 - 13 - 14- 16- 24 - 23 - 22 - 17 - 9 - 21 - 1 - 3 - 13-

14 - 15- 23- 15- 16- 24- 23 4 22- 17- 1 + 3 4 13- 14- 23- 15-

16 - 23 - 15- 16 24- 23 - 22- 17 1 - 3 - 10- 22 - 12- 6 - 22- 6 -

1 - 1 - 4 - lo -* 19- 23- 1- 10- 13- 14- 16- 21-* 12- 13- 14- 18-

23 - 15 - 15- 15- 16- 19- 23- 22- 17- 11 4 13- 1 4 - * 15- 21-23-

5- EXIT Fig. 1. Process flow

ters describing the simulation model are displayed in Ta- ble I and Fig. l . The operating data from the TRC fab was used to derive first and second moment information (means and coefficients of variations, hereafter abbreviated CV’s) for the processing time for a lot of wafers, time between failures, and time to repair for each piece of equipment in the fab. The process flow, which will be described shortly, was based on an actual process that was under development in the TRC fab.

The processing times for a lot of wafers in our simulation study (and in the TRC fabls database) include set- ups, operator unavailability, and rework. It is assumed that all visits by all lots to a specific station have the same processing time distribution. The lot size is assumed given (there were 24 wafers per lot) and is held constant throughout the study. Machine failures include unsched- uled breakdown, scheduled maintenance, and ‘‘process tuning,” which are tests conducted at regular intervals to see whether a piece of equipment is performing to speci- fication. Machine failures are modeled as high-priority nonpreemptive customers from a finite source (see [19]). Failures are assumed nonpreemptive because most types of failures that are being modeled are, in fact, nonpreemptive (e.g., process tuning and scheduled maintenance).

The three distributions describing the equipment were

fitted to gamma distributions, based upon the CV’s ex- tracted from the TRC fab’s database. Although the processing time CV’s observed at the TRC fab were all close to one, we assumed for our model a gamma distribution with shape parameter equal to two (CV = 0.707), since we thought that a production fab would have a lower variability in processing times than a development fab, due to the greater diversity of lots in a development fab. The CV’s for all the time-between-failure distributions and time-to-repair distributions were close to 1.4, and a gamma distribution with shape parameter equal to one half (CV = 1.414) was used for both. The means of the three distributions describing the various pieces of equipment can be found in Table I, which also contains the type of operation performed at each station. We refer readers to [3] and [4] for brief descriptions of the five generic types of operations found in wafer fabrication.

In our simulation model, each lot entering the fab has a process flow that consists of 172 total operations at the 24 different stations. The sequence of stations to be visited in the process flow is listed in Fig. 1, where the numbers refer to the station numbers in the first column of Table I. Fig. 1 exhibits the cyclic character of the flow alluded to earlier, where each lot flows through the pho- tolithographic expose station (station 14) 12 times. In semiconductor terminology, this process flow is referred

WEIN: SCHEDULING SEMICONDUCTOR WAFER FABRICATION

WRl(C)

119

Workload regulating input is used for a one-bottleneck system. When the expected amount of work in the fab for station 14 drops to C hours, then release a new lot into the fab.

TABLE I1 DESCRIPTION OF INPUT CONTROL RULES

WR2(A,B)

SYMBOL 1 DESCRl PTlO N

Workload regulating input is used for a two-bottleneck system. When the expected amount of work in the fab for station 14 (respectively, 24) drops toA (respectively, E) hours, then release a new lot into the fab.

POlSS I Lots enter the facility according to a Poisson process.

WR3(C)

DETERMlN I Interarrival times of lots are constant.

An input mechanism based on the workload process is used for a four-bottleneck system. When the sum of the expected amount of work in the fab for stations 14, 19, 21 and 24 drops to C hdurs, then release a new lot into the fab.

Closed loop input is used. When the number of lots in the fab drops to N-1, release a new lot into the fab.

to as a 12-mask process. From this process flow, the number of times each station is visited by each lot can be de- termined and is exhibited in Table I.

By choosing a mean arrival rate (0.0236 lots per hour was chosen), one determines the percentage utilization for each station in the model. This value, which is calculated in Table I, should be interpreted as the long run average fraction of time that each machine at the station will be either processing lots or broken down. Readers should note that our inclusion of machine breakdown time in the utilization is not standard.

r referred to as fab 1, fab 2, and fab 3, are used. The only difference between fab 1 and fab 2 is that there are two ion implanters (station 24) in fab 1 and one in fab 2. When there are two ion implanters, station 14, consisting of GCA steppers, is the overwhelming bottleneck, being utilized much more than any other station. When there is only one ion implanter, station 24 also becomes a bottleneck. Thus, fab 1 is a one-bottleneck system and fab 2 is a two-bottleneck system. In fab 3, the number of servers at several other stations have been reduced (see Table I). It has four stations that are heavily utilized (near 90-percent utilization) and several other stations that are mod- erately utilized (utilization between 60 and 77 percent). Table I lists, for each of the three fabs, the number of machines at each station and the percentage utilization for each machine.

Three versions of the simulation model, h

IV. STRUCTURE OF THE SIMULATION STUDY In order to explain the different flow control policies

that were evaluated in our simulation study, it is easiest

to simply refer readers to Tables IV-VI, which contain the simulation results for fabs 1, 2, and 3, respectively. Since all three tables have a similar format, let us examine Table IV. Each row of Table IV gives statistics for a particular flow control policy, which is specified by a particular input control rule paired with a specific lot sequencing rule. The first two coluqns of Table IV state the flow control policy, and Tables I1 and I11 describe the various input control rules and lot sequencing rules, respectively. The last two columns of Table IV give percentage improvements in a particular performance measure, as will be explained in detail in Section VI. For fab 1, seven different sequencing rules were run with Poisson input, using an average input rate of 0.0236 lots per hour. The same seven sequencing rules were also run with deterministic input (with the same average input rate as for Poisson input), and one can see from the last column of Table IV that all seven sequencing rules performed better with deterministic input than with Poisson input. Those familiar with queueing theory (e.g., [21], [22]) will not be sur- prised by this, since the amount of variability in the fab is being reduced by switching from Poisson to deterministic input.

Referring again to Table IV, nine rules are tested with closed loop input, where the number of lots in the fab is held constant by inserting a new lot of wafers into the fab whenever a lot exits the fab. The number of lots in the fab for the closed loop input models was chosen so that the average throughout rate with the FIFO rule would correspond as closely as possible to the average throughput rates of the Poisson and deterministic input cases with the FIFO rule. The resulting number of lots that was deter-

120 IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, VOL. 1 , NO. 3, AUGUST 1988

SYMBOL

FIFO

SRPT

FGCA

LWNQ/M

FIFO +

SRPT +

CYCLIC

LTNV

STNV

FGCAAMP

M1-M2

TABLE 111 DESCRIPTION OF LOT SEQUENCING RULES

DESCRIPTION

Select the lot which arrived in the queue at the earliest time.

Select the lot which has the shortest expected remaining processing .time until i t exist the fab.

If any lots in the queue are going next to station 14 within the next two visits on its route, select among these using FIFO. If not, use FIFO.

Select the lot whose queue at the next station i t will visit has the least amount of expected work per machine.

If any lots in the queue are going next t o a station which has a queue of size four or smaller, select among these using FIFO. If not, use FIFO.

If any lots in the queue are going next to a station which has a queue of size four or smaller, select among these using SRPT. If not, use FIFO.

At station 14, if the most recently served lot was on i t s nth visit (n = 1, ,12), then i f there are any lots which are on their n + l(mod 12)th visit, select among these using FIFO. If not, then select a lot which is on its n + 2(mod 12)th visit, etc. Use FIFO at all other stations.

At station 14, select the lot which has the longest expected processing time until its next visi t to staiton 14. Use FIFO a t all other stations.

At station 14, select the lot which has the shortest expected processing time until its next v is i t tostation 14. Use FIFO a t all other stations.

If any lots in the queue are going to station 14 within its next two visits or tostaiton 24 on its next visit, select among these using FIFO. If not, use FIFO.

Index lots by M( 14)-M(24), where M( 1) equals the expected remaining processing time a t station I until the lot e x i t s the fab At station 14 (respectively, 241, select the lot which has the smallest (respectively, largest) value of this index Use FIFO a t all other stations.

If W(l)AA/(2) > a (respectively, <b), give priority to the lot which has the smallest (respectively, largest) value of the index M(14)/M(24) at station 14 (respectively, 24) If not, use SRPT a t stations 14and 24 Use FIFO a t all other stations M(i) equals the expected remaining processing time a t station I until the lot exits the fab and W(i) equals the expected amobnt of work in the system for station i

971 ( 2 6 6 9 )

1031 ( 2 8 0 9 )

~

191 02281 422 13 2

255 02270 482 0 8

1016 (2873)

1024 ( 2 9 5 8 )

410 .02265

31 1 .02268

957 (2574)

1003 (2640)

217 02275 408 160

253 02266 454 6 6

DETERM

DETERM

FIFO 832 ( 2 9 0 ) 89 5 02274 283 - 41 8

SRPT 845 ( 2 9 7 ) 97 3 02272 296 - 4 6 299

FGCA

LWNQIM

FIFO +

833 ( 2 1 0 7 ) 90 8 02274 284 - 0 4 41 1

831 ( 2 7 2 ) 113 02275 282 0 4 3 9 6

831 ( 2 9 8 ) 92 8 02277 282 0 4 4 0 6

DETERM

DETERM

SRPT+ 850 ( 2 8 7 ) 100 02274 301 - 6 4 262

CYCLIC 830 ( 2 7 3) 90.4 02276 281 0 7 38 1

FIFO

SRPT

FGCA

860 ( 2 4 6 ) 94 8 02242 3 1 1

852 ( 2 4 2 ) 97 6 02260 303 2 6

850 ( 2 3 8 ) 90 7 02262 301 3 2

LTNV

STNV

864 (24.6) 105 .02232

893 (26.7) 116 .02161 344 - 1 0 6 -

WRl(798) FIFO

WRl(876) SRPT

817 (t4.4) 7 9.0 a02284 2 68

830 (Ca.2) 85.7 ,02280 281

WEIN: SCHEDULING SEMICONDUCTOR WAFER FABRICATION

TABLE IV FAB 1 RESULTS

STANDARD IN MEAN TQT MEAN

TH ROUGH PUT RATE TQT

MEAN THROUGHPUT TIME DEVIATION OF (95% CONF. INTERVAL) THROUGHPUT

TIMES

LOT SEQUENCING

RULE

INPUT RULE

FIFO 1035 (2961) I 258 I 02263 I 486 I - I - POlSS

POlSS SRPT

FGCA

LWNQ/M

FIFO +

POlSS

POlSS

POlSS

SRPT + POlSS

POlSS CYCLIC

DETERM

DETERM

DETERM

CL(20)

CL(20)

CL(20)

CL(20) LWNQIM I 857 ( t 5 6 ) I 122 I 02250

306 1 6

~

CL(20) FIFO + I 863 (25.3) I 987 [ 02235

CL(20) SRPT+ I 856 (24.5) I 10.1 I 02254

CL(20) CYCLK I 855 (t4.5) I 100 I 02251

CL(20)

CL(20)

~

122 IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, VOL. 1, NO. 3, AUGUST 1988

mined in this way was used for all the closed loop input cases, thus facilitating comparisons among different sequencing rules under this input rule. However, by Little’s formula (see (2) in the Appendix), the throughput rate in the closed loop input cases varies for different lot sequencing rules, since the number of lots in the system is held fixed.

Whereas Poisson input reflects a situation of exoge- nously generated arrivals, both deterministic and closed loop input can be viewed as manifestations of managerial policy intended to give better performance with regard to input control. Closed loop input control is quite prevalent in manufacturing environments (see [15] and [ 2 3 ] ) , and it is worth noting that the TRC fab was implementing this policy.

A fourth type of input mechanism, called workload regulating input, is tested in this study. It has a theoretical basis (see [20]) in the situation where a fab produces com- modity items and is obliged to maintain a certain average throughput rate, but can regulate its input. This policy contains one parameter when used in fab 1 (see Table I1 for a description) and this parameter was chosen so that the average throughput rate would correspond as closely as possible to the average throughput rates under the other input control rules.

In thinking about closed loop and workload regulating input policies, it is easiest to imagine a make-to-stock manufacturer, whose orders are met from finished goods inventory. In such a situation, a fab would be assigned a certain average throughput rate that it was expected to maintain. The most obvious way to generate the required throughput rate is to use open loop input at this specified rate. By using a more complicated input mechanism, such as closed loop or workload regulating, it may be possible to achieve better throughput time performance (by reducing both the mean and variability of throughput time), while still maintaining the same average throughput rate. However, new experimentation will be required to generate the appropriate parameters for the closed loop and workload regulating input policies that achieve the de- sired average throughput rate.

Moreover, in a make-to-order environment, input to the fab can also be regulated by closed loop or workload regulating input policies, but then customer orders will sometimes queue outside the fab waiting for lot release. Is there any motivation for doing this? The answer is yes and is due to the benefits that can be gained by a reduction in both the throughput time of lots in the fab and the number of lots in the fab. In the case of standardized products that can be made to stock, long throughput times cause trouble because production must be based on forecasts of market demand many months in the future, and major demand shifts are commonplace. Moreover, product life cycles are short in the semiconductor industry, so the risk of obsolescence for finished goods inventory is ever present. There is a generally accepted correlation in the semiconductor industry between the throughput time of lots in a fab and the yield, since lots are so easily contaminated

while in the fab. Also, large queues in the fab can result in slower detection of quality problems.

Notice that an implicit assumption has been made with regard to input control; we assume that a new lot of wafers is always available to be released into the fab. Since a significant lag occurs in practice between the time an order is received and the time the corresponding lot is released into the fab, this assumption is not a serious re- striction.

The simulation model is structured so that at the time of lot sequencing decisions, the exact processing times of lots yet to complete processing are unknown. The information available to the scheduler at any point in time is assumed to be the expected processing time of each lot at each stage, the current number of lots at each station, along with the current stage along its route that each lot is at. In particular, no sequencing rules were tested that use the knowledge of whether individual machines are broken down or available for processing. However, the LWNQ/M, FIFO+ and SRPT+ rules (see Table I11 for description) can be thought of as surrogate rules for policies that explicitly avoid long machine breakdown. For most of the stations in the simulation model, the only time they will have sizeable queues (e.g., greater than or equal to five) is when there is a significantly long machine breakdown. Thus, these rules effectively cause lots to avoid machines that are experiencing lengthy breakdowns.

Several desirable sequencing rules needed to be altered, due to the difficulties of implementation of these rules in our simulation model. Specifically, the LWNQ /M, FIFO+ and SRPT+ rules do not calculate their appropriate system status (e.g., the number of jobs in the next queues) at. the time of the sequencing decisions. Rather, each lot is assigned its appropriate value (e.g., the amount of work in its next queue) at the time of its arrival to the queue. Finally, it should be noted that since all visits by all lots to a specific station have the same expected processing time and the exact processing times of lots yet to complete processing are unknown, the shortest expected processing time (SPT) rule has no relevance in this study. The SPT rule gives priority to the lot that has the least expected processing time for its upcoming operation.

There are several other issues that we are ignoring in our study. We are assuming that there are no due dates on individual lots, so performance measures based on meet- ing due dates will not be considered. Many wafer fabs process “hot” lots, which are important lots that get priority over all other lots at every station. Hot lots will not be incorporated into this study. Also, we are ignoring any consideration of the quality of the completed wafers. Process yield may be the most important determinant of economic success for an IC manufacturer. However, this analysis will focus on quantity control, not quality control. There are several scheduling issues not considered here which may also result in improved performance of wafer fab operations, such as the lot sizing issue (the number of wafers which should be contained in a lot).

WEIN: SCHEDULING SEMICONDUCTOR WAFER FABRICATION 123

For each rule tested, 20 independent runs were made, each representing about three and one half years of fab operation. Each run had no initialization period, and all runs began with the fab empty. For closed loop input runs, the lots arrived according to deterministic input (at the same rate as the corresponding open models) until the fab had reached its population limit, and then closed loop input was used.

V. RESULTS The simulation results for fabs I , 2, and 3, are con-

tained in Tables IV-VI, respectively. Although the performance'measure of interest is mean throughput time (average of 20 numbers, one per run), the percentage improvements are calculated with respect to mean total queueing time (hereafter abbreviated TQT), since this is the portion of the throughput time that can be improved upon by scheduling. Note that the percentage improvements in mean throughput time will be less than the percentage improvements in mean total queueing time. Two types of improvements are tabulated. One is the percentage improvement of the sequencing rules over the FIFO rule, with the type of input control held fixed. The other is the percentage improvement of deterministic input over Poisson input (both have the same average lot start rate), with the sequencing rule held fixed. It is difficult to state percentage improvements between ' open models and models with closed loop or work regulating input, since the throughput rates of the latter two models cannot always be set equal to the throughput rates of the corresponding open models. However, as explained in the last section, the appropriate parameters of the closed models and models with work regulating input were chosen so that the average throughput rates would correspond as nearly as possible with those of the corresponding open models.

Two other values are exhibited in Tables IV-VI. One is the standard deviation of throughput times for individual lots (average of the 20 standard deviation values, one for each of the 20 runs). Although we have stated mean throughput time as our main performance measure, the variability of throughput times is also important, espe- cially in make-to-order situations, where it is desirable to be able to state the order lead times with confidence! The other value reported is the average throughput rate (average of the 20 throughput rates, one per run). It is in- cluded in order to facilitate comparisons between models that use different types of input control.

In the semiconductor industry, it is common to describe the magnitude of queueing effects by calculating the actual-to-theoretical ratio, which divides the actual mean throughput time by the average total processing time for a lot of wafers. Values of this ratio in the industry range from about two and one-half for fairly lightly-loaded fabs on up to ten for heavily congested fabs, with values in the four to five range being quite common.

For the Poisson input cases under the FIFO d e , fabs 1, 2; and 3, have actual-to-theoretical ratios of.1.9, 2.6,

and 3.8, respectively. Although fab 1's ratio is somewhat lower than the industry norm, we feel this is still an important model because it has the photo expose step as its one ovenvhelming.hottleneck. Since this is the most delicate operation in wafer fabrication and the equipment involved can cost over one million dollars, it is very desirable to keep these machines heavily utilized. In the simulation models of [ 11 and 171, the photo expose station is also the most heavily utilized station by far.

A . Fab I For the Poisson input case, the SRPT and SRPT+ rules

reduced the mean TQT by 13.2 and 16.0 percent compared to FIFO, respectively. However, the biggest sequencing improvements over FIFO for the deterministic input and closed loop input models were only 0.7 and 3.2 percent, respectively. Referring to the confidence intervals, it is not clear that the improvements from sequencing observed in the Poisson and deterministic input cases are statistically significant.

The biggest improvements by far were achieved using different input control policies. Under the FIFO rule, a 41 .&percent improvement was achieved by changing the input from Poisson to deterministic. The best closed model had the same throughput rate as the case with Pois- son input and FIFO sequencing, and had a 38-percent smaller average TQT. The workload regulating input policy suggested by the Brownian network model achieved the best performance for fab 1. Under the FIFO rule, the workload regulating input reduced the mean TQT by 44.8 percent over Poisson input, 5.3 percent over deterministic input, and 13.8 percent over closed loop input, while achieving a higher average throughput rate in all three cases, thus making these numbers lower bounds on the improvement.

Besides having a dramatic effect on mean TQT, the input control rules also drastically reduced the variability of the throughput time for individual lots. Under the FIFO rule, the standard deviation of throughput times was cut by about a factor of three by using one of the other three types of input rather than Poisson input, with the workload regulating input achieving the lowest variability.

B. Fab 2 For the Poisson input case, five different rules (SRPT,

FIFO+, LWNQ/M, W(a,b), and S R P T + ) achieved substantial improvements in performance over the FIFO rule, reducing mean TQT from 13.0 to 20.3 percent. Par- ticularly impressive was the W(a,b) rule, which achieved a 19.1-percent improvement while using FIFO at 22 of the 24 stations. Again, readers should he wary of the large confidence intervals in the Poisson input cases. The bigl gest improvements in the deterministic input case were achieved by the LWNQ/M and FIFO+ rules, .with 8.5- and 9.6-pement reduction in mean TQT, respectively. In the closed loop input case, the biggest improvement was achieved by the LWNQ/M rule, with a 6.0-percent reduction in mean TQT.

124

STANDARD DEVIATION OF

THROUGH PUT TIMES

I E E E TRANSACTIONS O N SEMICONDUCTOR MANUFACTURING, VOL I . NO 3 . AUGUST 19XX

IN MEAN TQT

TQT MEAN

MEAN

THROUGHPUT RATE

397

297

.02223 890

02233 774 13 0

40 1

528

~~

919 - 3 3 .0222s

,02244 727 18.3

313 ,02247 709 20.3

FGCNIMP

LWNQlM

1090 ( 2 3 1 8) 163

1044 (226.7) 230

FIFO +

SRPT +

143 1038 (227.0)

1096 ( 2 26 8) 178

CL(28) FIFO

CL(28) SRPT

CL(28) I FGCNIMP

1185 ( t 8 6 ) 167 02245 636

1172 ( 2 1 0 7 ) 158 02265 623 2.0

1192 ( 2 1 2 4 ) 1 7 1 02229 643 - 1 1

CL(28)

CL(28)

CL(28)

CL(28)

LWNQIM 1147 (29.1) 256 0221 2 598 6 0

FIFO + 1160 ( t 7.2) 156 02287 611 3 9

SRPT + 1159 ( 2 11.3) 172 02293 610 4 1

M1 - M 2 1170 ( t7 .5 ) 166 02268 621 2 4

WR2(A, E) M1 - M2 1019 ( t8 .7 ) 116 02262 470

ABLE V 2 RESULTS

1 FA

LOT

SEQUENCING RULE

MEAN THROUGHPUT TIME

(95% CONF. INTERVAL) INPUT

RULE

I I FIFO I POISSON

POlSS 1439 (2135)

1323 (2103) POlSS

POlSS FGCNIMP

POlSS

361 I ,02248 I 753 1 1 5 4 1 - FIFO + 1302 (2105)

SRPT + 1258 (2133)

POlSS

POlSS

POlSS W(1.3, .8) I 1269 (282.0)

DETERM I FIFO I 1090 ( 2 3 3 6) I 163 I .02244 I 541 I - I 39.2

DETERM SRPT I 1154 (232.7) I 174 ,02231 I 605 I -11.8 21.8

.02245 I 541 -r .o 41.1 DETERM

DETERM 31.9 .02252

,02252 35.1 DETERM

DETERM 02241

,02243

22.8

16.0 DETERM W(1.1,.9) I 1154 (234.3) I 200

MEAN THROUGHPUT TIME (95% CONF INTERVAL)

STANDARD

DEVIATION OF THROUGHPUT

TIMES

MEAN

THROUGHPUT

RATE

2082 ( k 2 0 5 )

2048 ( 2 147)

2094 ( 2 2 0 4 )

2000 ( 2 173)

1947 ( 2 1 4 4 )

496 ,02141

482 02 130

832 02 145

592 021 54

534 02144

DETERM

DETERM

DETERM

DETERM

SRPT 1861 ( 2 4 3 1) 350 .02 148

LWNQ/M 1705 ( 2 4 6 9 ) 51 7 02 177

FIFO + 1674 (249.7) 31 2 02177

SRPT+ 1764 (252.4) 352 02 1 58

1312

1156

- 5 . 9 12.5

4.3 25 2

CL(45)

CL(45)

CL(45)

CL(45)

FIFO 1919 (211.4) 300 .02 158

SRPT 1917 ( 2 12.7) 290 -02 156

LWNQ/M 1907 ( 2 12.8) 61 4 Q2157

FIFO + 1886 ( 2 9 . 7 ) 364 -02 188

~~

WR3(C) FIFO 1545 ( 2 11.4) 165 .02 144 996


% IMPROVEMENT

IN MEAN TQT LOT

SEQUENCING

RULE

INPUT

RULE

MEAN

TQT

- 1533

1499

1545

1451

1398 -

OVER

FIFO

OVER

POISSON - POlSS FIFO

POlSS 2.2

- 0.8

SRPT

LWNQ/M POlSS

POlSS FIFO + 5 . 3

POlSS SRPT + 8.8

OETERMI- FIFO I 1757 (247.7) I 272 1 ,02165 1208 I - I 21.2

1125 I 6 9 I 22.5

1215 1 -0 .6 1 13.1

1370 - ! -

1368 1 ::: I : 1358

1337 2.4

C ~ ( 4 5 ) I SRPT+ I 1880 ( 2 1 5 . 0 ) I 350 I ,02193 I 1331 I 2 8 I -

(All times are expressed in hours. TQT is the total queueing time. For W R 3 ( C ) input mechanism, C = 2975 h

Once again, the use of deterministic, closed loop, or work regulating input, rather than Poisson input, drastically reduced the mean and variability of throughput time for individual lots. Under the FIFO rule, deterministic input achieved a 39.2-percent smaller mean TQT than Pois- son input and the closed loop input achieved a 28.5-percent reduction while maintaining a higher average throughput rate.

The optimal policy from the two station Brownian network model with controllable input, which used the M1- M2 queueing discipline and the workload regulating input, achieved the best overall performance in fab 2. It had a 3.9-percent lower mean TQT than the best deterministic input case (FIFO+ rule), while maintaining a higher average throughput rate. Compared to the closed loop input case with the same M 1-M2 rule, the workload regulating

126 IEEE TRANSACTIONS ON SEMIC0Nl)LICTOR MANIIFA("TlIRIN(i. V o l . I. N O .3. AIJGIIST I988

input reduced the mean TQT by 24.3 percent, while achieving almost as high an average throughput rate.

C. Fub 3 The best sequencing rule i n the Poisson input case was

SRPT +, which achieved only an 8.8-percent reduction in mean TQT. This improvement is much smaller than the improvements experienced i n the Poisson input cases of fabs 1 and 2, and is not statistically significant. The best sequencing rule with deterministic input was FIFO +- (6.9- percent improvement) and the best rule with closed loop input was SRPT + (2. %percent improvement).

Under the FIFO rule, deterministic input reduced niean TQT by 21.2 percent compared to Poisson input. Al- though this is a substantial improvement, it is much smaller than the corresponding improvements in fabs 1 and 2. Detenninistic input again outperformed closed loop input, reducing mean TQT by 8.4 percent under FIFO, while maintaining a higher average throughput rate.

No sequencing rules based on the Brownian network model were tested for fab 3. However, the heuristic input mechanism based on the workload process performed ex- tremely well when used with FIFO, reducing the mean TQT by 35.0 percent compared to Poisson input, but maintaining a higher average throughput rate.

VI. CONCLUSIONS

This paper has presented simulation results for a number of different input control and lot sequencing rules for several different models of a wafer fah. The results show that scheduling has a significant impact on wafer fab operations, with larger improvements coming from discretionary input control than from lot sequencing rules. In particular, deterministic, closed loop, and workload regulating input provided improved performance over Pois- son input, by reducing both the mean and variability of throughput times. In all three fabs, workload regulating input performed better than deterministic input, which in turn performed better than closed loop input. Although lot sequencing rules provided significant percentage reduc- tions in mean throughput time in the Poisson input cases, it is difficult to draw conclusions due to the large confidence intervals. The improvements from using sequencing with other input control mechanisms were quite modest (less than 10-percent reduction in mean TQT).

Thus, in an environment where control over inputs can be exercised, the biggest improvements can be achieved through input control. In fabs that process "hot lots," the use of the sequencing rules discussed here would be difficult. However, these fabs should still be able to achieve a significant improvement in performance by using an improved form of input control.

The results show that the improvement that the deterministic input rule provides over the Poisson input rule decreases as the fab becomes more congested. This can be explained at least partially by the approximate formula that is used by Whitt (1983A) and others in the para-

nietric-decomposition approach to performance analysis of queueing networks

c,/ = ( 1 -- pL ) c,, t pz c.:.

Here, C,!, C , , and c',, are the squared coetficients of variation for the interdeparture times, interarrival times and service times, respectively, and p is the trafic inten- sity at a particular node. As a fab becomes more congested, the p values at various stations increase and the impact that deterministic input will have is decreased. Thus, in a more heavily loaded fah (actual-to-theoretical ratio in the five-to-ten range), one should not expect to see the large improvement in performance provided by deterministic input over Poisson input that was observed here.

The effect that specific sequencing rules have is highly dependent on both the type of input control used and the number of bottleneck stations in the fab. For example, the SRPT rule performed better than FIFO when used with Poisson input, performed about the same as FIFO when used with closed loop input, and performed worse than FIFO when used with detenninistic input. IJnder Poisson input, SRPT's perforniance relativ: to FIFO decreased as the number of bottleneck stations i n the system was in- creased. Another example is the L,WNQ/M rule, which consistently feeds work to the lightest loaded stations. It performed well in some cases, such as fab 2 with deterministic and closed loop input, but can cause too much starvation at the bottleneck stations and perform worse than FIFO, as in the fab 3, Poisson input case. It should be noted that the LWNQ/M rule consistently had much larger variability in the throughput times than any other sequencing rule.

Fab 3, which was the heaviest loaded of the three fabs, exhibited snialler percentage improvements in scheduling than the other two fabs. Fah 3 had an actual-to-theoretical ratio of 3.8, which is smaller than some fabs currently in operation. This study does not assess the impact that scheduling can have on much more heavily loaded fabs (e.g., actual-to-theoretical ratio of 10.0). However, the heuristic input rule based on the workload process performed much better than any other input rule in fab 3, suggesting that it would provide the largest improvements (among the rules considered) in more heavily loaded fabs.

The sequencing rules derived from the Brownian network performed better than FIFO in the Poisson input and closed loop input cases, although they did not achieve the best performance among the scheduling rules tested for any of the cases. The main reason for this is that the Brownian network model effectively ignores all non-bottleneck stations (and thus FIFO is used at these stations), which in these models is a huge portion of the entire fab. Furthermore, due to the large amount of variation in the effective processing time ( recall that the processing time distributions has CV = 1 and the time to repair and time between failure distributions have CV = 1.4), some stations that are fairly lightly loaded still occasionally form


significant queues. Thus, rules such as LWNQ/M, FIFO+ and SRPT + , which avoid the lightly loaded stations when a long breakdown occurs, will tend to perform better at the lightly loaded stations than the rules derived from the Brownian network model.

This can be seen in Table VII, which shows how the mean TQT under several different sequencing rules for the fab 2, closed loop input case was distributed among the two bottleneck stations and the non-bottleneck stations. Under the FIFO rule, the non-bottleneck stations accounted for 77.3 percent of the total processing time and 30.2 percent of the total queueing time. Although the Ml-M2 rule, which was derived from the Brownian network model and uses FIFO at 22 of the 24 stations, re- duces the mean TQT compared to FIFO at the two bottleneck stations, it performs much worse than the LWNQ/M rule at the non-bottleneck stations.

This might lead one to test a policy that uses the M1- M2 rule at the two bottleneck stations, but uses a different queueing discipline (such as LWNQ/M) at the non-bottleneck stations. Although numerical results are not reported here, the sequencing rules derived from the two- station Brownian network models achieved higher overall performance with FIFO at the non-bottleneck stations than with FIFO+, SRPT+, or LWNQ/M.

Even though the sequencing rules from the Brownian network model did not exhibit dramatic results in this study, there is reason to believe that Brownian network theory can have a big impact on the scheduling of wafer fabs that do not have such a large amount of their processing done at non-bottleneck stations. A preliminary simplified simulation model of an idealized wafer fab, which is not described here, was built which condensed the basic model into a 12-station system (rather than 24) with 2 bottleneck stations, and in this model the rules derived from the Brownian network model easily outperformed all other sequencing rules. Also, when these rules

are simulated on the actual bottleneck subnetwork, the results are quite impressive.

Although we can safely conclude that input control can significantly improve performance of wafer fab operations, care must be taken when trying to make inferences from this study about other wafer fabs. The amount of improvement that input control and lot sequencing can have on a particular fab will depend upon many factors, some of which are the amount of variability in the effective processing times, the actual-to-theoretical ratio, the number of bottleneck and non-bottleneck stations in the fab, the amount of rework required, the amount of “hot lots” processed, and whether the fab is a production fab or a research fab. In order to develop definitive statements or “rules of thumb” about scheduling semiconductor wafer fabrication, more studies similar to this (using models based on real operating data) need to be done and a comprehensive comparison of all these studies would have to be undertaken to determine to what extent each of the above factors influence the impact that scheduling can have.

APPENDIX: THEORETICAL ORIGINS OF CERTAIN SCHEDULING RULES

As stated earlier, the performance measure we will focus on is the average throughput time for a lot of wafers. Our objective of minimizing the average throughput time can take different forms, depending on the type of system under consideration. A fundamental result for stable queueing systems is Little’s formula (see [12])

L = XW (2) where

L

X

is the long-run average number of customers in the

is the long-run average arrival (or throughput) rate system,

of customers in the system, and

128 IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING. VOL. I , NO. 3. AUGUST 19x8

W is the long-run average throughput time of customers in the system.

In an open system X is specified, and our objective of minimizing W is equivalent to minimizing L. In a system using closed loop input, L is specified and minimizing W is equivalent to maximizing the throughput rate A .

A few of the sequencing rules and one of the input rules are derived or suggested by the use of Brownian network models. A detailed description of the Brownian network model may be found in [8] and the analysis necessary to calculate asymptotically optimal scheduling rules will not be exhibited here. However, the basic assumptions of the Brownian network model and some of its qualitative im- plications will be presented in order to motivate the scheduling rules that are tested.

The Brownian network model is a crude but relatively tractable stochastic system model that approximates a multiclass queueing network with dynamic control capability, under the assumption that the total load imposed on each station is approximately equal to its capacity. The data of the approximating Brownian model are calculated in terms of the queueing system’s parameters, including the routing information and both the first and second mo- ments of the interarrival time, service time, time between failures, and time to repair distributions. Since the Brownian approximation is insensitive to specific distn- butional forms, server breakdowns can be accommodated by suitable modification of the service time distributions, if one assumes exponential distribution of server busy time between failures. The model can approximate open networks, closed networks, and networks with controllable inputs.

In forming the approximating Brownian network one simply eliminates all but the heavily loaded stations (we chose 90-percent utilization as a cutoff point), reducing the original system to what might be called a bottleneck subnetwork, which will have balanced heavy loading. In our study, the Brownian network models for fab 1, fab 2, and fab 3 will be one, two, and four station models, respectively.

The crucial information required to make scheduling decisions in a Brownian network is different from the information that is commonly used in the job shop scheduling literature. Let the Brownian network consist of I stations in the bottleneck subnetwork and have K customer classes. Each customer class refers to a specific customer type at a specific stage along its route (see [lo]). In our study, since all lots have the same process flow, each customer class corresponds to a specific stage along the route in the process flow.

The system status at any given time t is described by the expected total amount of work for each bottleneck station that is embodied in those customers present unywhere in the network at time t . We will denote this I-dimensional vector by W ( t ) and call it the workload process for the Brownian network.

The information needed for each customer class in the

system is the expected remaining processing time that a customer of that class requires at each bottleneck station before it exits the system. Let M be an I x K matrix with entries being the expected remaining processing time at station i for a class k customer. We call M the workload pro$le matrix, Note that if we define the K-dimensional process Z ( t ) to equal the number of class k customers in the system at time t , then

w ( t ) = MZ( t ) . ( 3 )

One-Station Open System The Brownian network representation of fab 1 has one

station (station 14 in Table I) and 12 different customer classes, since the process flow contains 12 different visits to station 14. Thus, the Brownian approximation is a single queue with feedback. For the special case of Poisson inputs to a single queue with feedback, Klimov [ 113 has shown that serving the customers according to the expected shortest remaining processing time (SRPT) rule minimizes the long run average number of customers in the system under mild conditions on the feedback probabilities. The Brownian network analysis of this system (see [8]) yields the same solution, but allows any renewal input streams.

One-Station Closed System Now consider fab 1 with a closed loop input. As stated

earlier, in a closed network, maximizing the average throughput rate will minimize the average throughput time. However, if we restrict our analysis to the bottleneck subnetwork, then by maximizing the utilization (or, equivalently, minimizing the idleness) of the heavily loaded stations, we maximize the throughput rate of the bottleneck subnetwork. Thus, when analyzing a Brown- ian network with closed loop input, our objective will be to minimize the long run average amount of idleness at the bottleneck stations.

For a closed network with only one station and at least one customer, there will always be work for the server to do, and any sequencing policy that does not allow the servers to sit idle while there is work for it to do will attain zero idleness. Thus, the Brownian network model offers no insight into scheduling a one-station closed network.

One-Station System With Controllable Inputs If one were to be able to control the input into a one-

station system, then, in order to minimize the number of lots in the system while still maintaining full utilization, one would only release a lot when the amount of work at the bottleneck station dropped to zero. Of course, if one used this policy in our fab 1 model, a large amount of idleness would result at the bottleneck station, since the first visit to station 14 occurs in the fourth stage of the process flow, not the first (see Fig. 1). However, this policy does suggest that a workload regulating policy might work well in the 24-station model of fab 1. This policy would release a lot of wafers to the system whenever the


total work in the system for station 14 dropped to a prescribed limit (the best threshold value is found via simulation). This policy can be thought of as a more refined version of the closed loop input policy. Rather than regulating the number of jobs in the system, we are regulating the amount of work for the bottleneck subnetwork.

Two-Station Open System In a two-station open system, there is a tradeoff present

between the short-term reward of immediately- reducing the number of jobs that are currently in the system and the possible long-term future idleness at a bottleneck station that may be incurred by doing this. The SRPT rule helps to achieve the short-term reward of immediately reducing the number of jobs that are currently in the system. A policy that minimizes the long run average idleness in a two-station, open Brownian network ranks each customer class by the index M ( 1 ) /M (2 ), where M( 1 ) and M (2 ) equal the expected remaining processing time re- q&red before exiting the system at station 1 and station 2, /respectively, and gives highest priority to the minimum (r spectively, maximum) value of the index at station 1 ( ?l spectively, 2).

The Brownian approximation also suggests that the ap- /propriate measure of system imbalance is the process W ( 1 ) /W ( 2 ), which is the ratio of the two workload pro- cesses, one for each station. When this value gets too high (respectively, low), there is danger of future idleness at station 2 (respectively, I), and lot sequencing should be used to correct the imbalance. This suggests that a simple (not optimal) policy that addresses the tradeoff present in the two station open system is to use SRPT except under the following two conditions. When W ( 1 ) / W (2 ) gets too large (respectively, small), give priority to the smallest (respectively, largest) value of M ( 1 ) /M (2) at station one (respectively, two). The best threshold values for the W ( 1 ) /W (2 ) process are found via simulation.

Two-Station Closed System A policy that minimizes the long run average idleness

in a two-station balanced closed Brownian network ranks all customer classes by the index M ( 1 )-M (2 ), and gives priority to the minimum (respectively, maximum) value of this index at station one (respectively, two). See [9] for details.

This rule tends to retain jobs at each station (by giving them lower priority) that have relatively more work to be done at that station, either now or later, dispatching more quickly (by giving them higher priority) jobs that have relatively more work to be done at the other station.

(respectively, maximum) value of this index at station one (respectively, two). The input rule is again a workload regulating policy, which releases a lot into the system whenever the amount of work in the system drops to a critical level. Instead of using the rule derived in Wein [20], a surrogate rule is tested here that is easier to im- plement; the rule releases a lot into the system whenever the amount of work for either of the bottleneck stations drops to a critical level. For purposes of this study, the two control levels were found using simulation.

No attempt was made to analyze the four-station Brownian network model which would be the approximating model corresponding to fab 3. However, a heuristic input mechanism based on the workload process W was tested with the FIFO sequencing rule (see Table I1 for a description).

Since the Brownian network model effectively analyzes only the bottleneck stations, these rules do not make any recommendation as to what lot sequencing decisions to make at the non-bottleneck stations in the original system. When these rules are tested on the entire fab (see Table 111), the FIFO rule was used at all non-bottleneck stations.

ACKNOWLEDGMENT This research was performed while I was a graduate

student at Stanford University. I am deeply indebted to Professor J. M. Harrison for his many helpful suggestions pertaining to the content and presentation of this study. I am grateful to the Hewlett-Packard Corporation for par- ticipating in this research project, and to T. Harms, E. Middlesworth, and S. Okada of the Hewlett-Packard Technology Research Center for all their help and coop- eration. I would also like to thank fellow students H. Chen and A. van Ackere for sharing in the huge task of gath- ering the necessary data, J,. Schott of the Center for In- tegrated Systems for his technical assistance, and E. Berg and J. Wright of Stanford University’s Graduate School of Business Computing Facility for teaching me how to make the simulation runs.

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[5] R. W. Conway, W. L. Maxwell, and L. W. Miller, Theory ofSched- _ _ d i n g . Reading, MA: Addison-Wesley, 1986.

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queueing network in heavy traffic.” submitted for publication.

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*

Lawrence M. Wein was born in North A d a ” MA on August 7, 1957 He received the B S degree in operations research and industrial engineering from Cornell University in 1979 He received M S degrees in operations re\earch and statistics from Stanford Univerrity in 1980 and 1985, respectively, and the Ph D degree in operations re5earch from Stanford University in 1988

He is now an Assistant Profeswr of Manage- ment Science at the Sloan School of Management

at MIT. Cambridge. MA Hi\ rewarch intere\t\ are in queueing network\. stochastic control, and de\ign and control of manufacturing system\

scheduling semiconductor wafer fabrication

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