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Content Fundamental Concepts of Interrupts HCS12 Exceptions Interrupt programming in C Language Clock and Reset Generation Block Computer Operating Properly Low-Power Modes Stop Mode, Resets HCS12 Operation Modes

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Razvan Bogdan Embedded Systems
Interrupts and resets Razvan BogdanEmbedded Systems Content Fundamental Concepts of Interrupts HCS12 Exceptions
Interrupt programming in C Language Clock and Reset Generation Block Computer Operating Properly Low-Power Modes Stop Mode, Resets HCS12 Operation Modes Fundamental Concepts of Interrupts
What is an interrupt? A special event that requires the CPU to stop normal programexecution and perform some service related to the event Examples of interrupts include I/O completion, timer time-out; illegal opcodes, arithmetic overflow, divide-by-0, underflow(software interrupts, also known as traps, exceptions) Functions of Interrupts Coordinating I/O activities and preventing CPU from beingtied up Providing a graceful way to exit from errors Reminding the CPU to perform routine tasks Coordinating I/O activities and preventing the CPU from being tied up during the data transfer process. The CPU needs to know if the I/O device is ready before it can proceed. Without the interrupt capability, the CPU will need to check the status of the I/O device continuously or periodically. The interrupt mechanism is often used by the I/O device to inform the CPU that it is ready for data transfer. CPU time can thus be utilized more efficiently because of the interrupt mechanism. Performing time-critical applications. Many emergent events, such as power failure and process control, require the CPU to take action immediately. The interrupt mechanism provides a way to force the CPU to divert from normal program execution and take immediate actions. Providing a graceful way to exit from an application when a software error occurs. The service routine for a software interrupt may also output useful information about the error so that it can be corrected. Reminding the CPU to perform routine tasks. There are many microprocessor applications that require the CPU to perform routine work, such as the following: 1. Keeping track of time of day. Without the timer interrupt, the CPU will need to use program loops in order to update the current time. The CPU cannot do anything else without a timer interrupt in this application. The periodic timer interrupts prevent the CPU from being tied up. 2. Periodic data acquisition. Some applications are designed to acquire data periodically. 3. Task switching in a multitasking operating system. In a modern computer system, multiple application programs are resident in the main memory, and the CPU time is divided into many short slots (one slot may be from 10 to 20 ms). A multitasking operating system assigns a program to be executed for one time slot. At the end of a time slot or when a program is waiting for the completion of an I/O operation, the operating system takes over and assigns another program for execution. This technique is called multitasking. Multitasking can dramatically improve the CPU utilization and is implemented by using periodic timer interrupts. Fundamental Concepts of Interrupts
Interrupt Maskability Interrupts that can be ignored by the CPU are calledmaskable interrupts. A maskable interrupt must be enabled before it can interruptthe CPU. An interrupt is enabled by setting an enable flag. Interrupts that cant be ignored by the CPU are called non- maskable interrupts. Fundamental Concepts of Interrupts
Interrupt priority Allow multiple pending interrupt requests Resolve the order of service for multiple pending interrupts Interrupt Service CPU executes a program called the interrupt service routine A complete interrupt service cycle includes Saving the program counter value in the stack Saving the CPU status (including the CPU status register and someother registers) in the stack Identifying the cause of interrupt Resolving the starting address of the corresponding interrupt serviceroutine Executing the interrupt service routine Restoring the CPU status and the program counter from the stack Restarting the interrupted program Fundamental Concepts of Interrupts
Interrupt Vector Starting address of the interrupt service routine; Interrupt Vector Table A table where all interrupt vectors are stored. Methods of Determining Interrupt Vectors Predefined locations (Microchip PIC18, 8051 variants) Fetching the vector from a predefined memory location(HCS12, Atmel avr) Executing an interrupt acknowledge cycle to fetch a vectornumber in order to locate the interrupt vector (68000 andx86 families) 1. Predefined. In this method, the starting address of the service routine is predefined when the microcontroller is designed. The processor uses a table to store all the interrupt service routines. The Intel 8051 microcontrollers use this approach. Each interrupt is allocated the same number of bytes to hold its service routine. The Intel 8051 allocates eight words to each interrupt service routine. When the service routine requires more than eight words, the solution is to place a jump instruction in the predefined location to jump to the actual service routine. 2. Fetch the vector from a predefined memory location. In this approach, the interrupt vector of each interrupt source is stored at a predefined location in the interrupt vector table, where the microprocessor can get it directly. The Freescale HCS12 and most other Freescale microcontrollers use this approach. 3. Execute an interrupt acknowledge cycle to fetch a vector number in order to locate the interrupt vector. During the interrupt acknowledge cycle, the microprocessor performs a read bus cycle, and the external I/O device that requested the interrupt places a number on the data bus to identify itself. This number is called the interruptvector number. The CPU can figure out the starting address of the interrupt service routine by using this number. The CPU needs to perform a read cycle in order to obtain it. The Freescale and Intel x86 family microprocessors support this method. The Freescale family of microprocessors also uses the second method. This method is not used by microcontrollers because of the incurred latency. Fundamental Concepts of Interrupts
Steps of Interrupt Programming how to provide service to the interrupt Step 1. Initializing the interrupt vector table Step 2. Writing the interrupt service routine: A service routine is similar to a subroutinethe only difference isthe last instruction. An interrupt service routine uses the return-from- interrupt (or return-from-exception) instruction instead of return- from-subroutine instruction to return to the interrupted program Step 3. Enabling the interrupt: an interrupt can be enabled by clearing the global interrupt maskand setting the local interrupt enable bit in the I/O control register Dont forget to enable interrupts when writing the code Fundamental Concepts of Interrupts
The Overhead of Interrupts Saving and restoring of CPU status and other registers. (HCS12 needs tosave all CPU registers). Execution time of instructions of the interrupt service routine. The execution of the RTI instruction that will restore all the CPU registers. Exercise: try to calculate it Resets The initial values of some CPU registers, flip-flops, and the control registers inI/O interface chips must be established in order for the computer to functionproperly. The reset mechanism establishes these initial conditions for the computersystem. There are at least two types of resets: power-on reset and manual reset. The power-on reset establishes the initial values of registers and I/O controlregisters. The manual reset without power-down allows the computer to get out of mosterror conditions if hardware doesnt fail. A reset is non-maskable. Saving the CPU registers, including accumulators (A:B), index registers X and Y, and the condition code register (CCR), and fetching the interrupt vector. This takes at least 9 E-clock cycles. 2. The execution time of the RTI instruction. This instruction restores all the CPU registers that have been stored in the stack by the CPU during the interrupt and takes from 8 to 11 E-clock cycles to complete for the HCS12. 3. Execution time of instructions of the interrupt service routine. This depends on the type and the number of instructions in the service routine. The total overhead is thus at least 17 to 20 E-clock cycles, which amounts to almost 1 s for a 24-MHz E-clock. We need to be aware of the overhead HCS12 Exceptions Maskable interrupts: including IRQ pin and allperipheral function interrupts. Nonmaskable interrupts: including XIRQ pin, SWIinterrupt, and unimplemented opcode trap. Resets: including the power-on reset, RESET pin manualreset, the COP reset (computer operate properly), andclock monitor reset. For other microcontrollers, the COPreset is also called the watchdog reset. HCS12 Exceptions. Maskable interrupts
Different HCS12 members implement different number andtypes of peripheral functions, and hence may have differentnumber of maskable interrupts. One of the maskable interrupts can be raised to the highestpriority among the maskable interrupt group and receivequicker service. This is achieved by programming the HPRIOregister. Since different HCS12 members implement a different number of peripheral functions, they have a different number of maskable interrupts. The I flag in the CCR register is the global mask of all maskable interrupts. Whenever the I flag is 1, all maskable interrupts are disabled. All maskable interrupts have a local enable bit that allows them to be selectively enabled. They are disabled (I flag is set to 1) when the HCS12 gets out of the reset state. HCS12 Exceptions. Maskable interrupts
The priority and vector addresses of all HCS12 exceptions are listed inTable 6.1. To raise a maskable interrupt source to the highest priority, write the lowbyte of the vector address of this interrupt to the HPRIO register. For example, to raise the capture timer channel 6 interrupt to the highest priority,write the value of $E2 to the HPRIO regi