External Use

TM

QorIQ Qonverge SoC Solutions in

Heterogeneous Network

(HetNet)

EUF-NET-T0975

J A N . 2 0 1 5

Barry Stern | Macro/Micro/Metro Basestation SoC Solutions, Sr. Marketing Manager

TM

External Use 1

Agenda

• Explosion in Demand for Wireless Data Traffic and

Operators’ Challenges

• Trends in Wireless Networks

• Wireless Base Station Sites and Types

• Silicon Vendors’ Challenges

• Complete SoC Portfolio for Base Stations

• SoC Portfolio Architectures

• Complete Portfolio for HetNet from Freescale

• Freescale Software Solution & Rich Ecosystem

TM

External Use 2

Explosion of Traffic on Wireless Networks

• Global mobile penetration is at 92% and growing at >100 M subs per quarter

• EMEA, LAMEX, NAM & APAC* all > 100% penetration (*excluding China)

• Mobile broadband subscribers will grow 4x to reach 9.3 B by 2019, 5.6 B Smart Phone, 2.6 B LTE

• Smart phone traffic will grow 10x driven by an average user monthly data traffic growth from 600 MB to 2.2 GB

• LTE global population coverage will be 65% by 2019, North America will be 95%

Source: Ericsson (2013)

TM

External Use 3

Addressing the Mobile Data Tsunami

• Multiple parallel approaches required…

• New network topologies Cloud-RAN, small cells, DAS, HetNet…

• More efficient use of spectrum: LTE/OFDM, massive/high-order MiMO

• New technologies: wireless backhaul (relay), carrier Wi-Fi® offload

• Regulatory innovation with new spectrum (e.g. 5G), white spaces, spectrum re-farming (e.g 2G/3G reuse)

TM

External Use 4

Pico and RRH

Dedicated Backhauls

Relay RF Backhaul

Core

Network

Femto

Internet Backhaul

Internet

Wi-Fi®

Femto

Wi-Fi Offload

Metro/Pico RRH

Relay

Macro

Wireless Access Market Dynamics

Two major wireless infrastructure trends are dominant:

• Rapid growth in small cells as Heterogeneous Networks (HetNet)

deployments leveraged to address coverage and capacity issues

• Macro Cells driving for higher density and more centralization

TM

External Use 5

Heterogeneous Networks

• Combination of different cell types (Femto, Pico, Metro, Macro)

− With a large deployment of a network small cells

• Offers increased bandwidth & QoS to both end user and service

provider

TM

External Use 6

Macro RAN Solution Trends

• Higher density solutions

− Doubling in throughputs/capacity and

greater…

• Centralized base stations with

large resource pools − Layer 1, MAC scheduler, Layer 2,

transport and control

• Cloud-RAN with virtualized,

pooled resources − Specialized Layer 1, virtualized GPP for

higher level functions

RRH - Remote Radio Heads

CPRI Fiber

Connections

BBU Pool/Hotel

TM

External Use 7

High bandwidth optical transport

network: Adaptable for dynamic network load

Cloud-RAN Trend

• Reduced OPEX: Fewer sites, easier maintenance

• Baseband pooling/load balancing: Maximize equipment loading, reduced redundancy

• Centralized baseband: Collaborative multipoint, inter-cell interference coordination

Baseband Pool

BB Pool BB Pool

PHY/MAC PHY/MAC PHY/MAC PHY/MAC

Optical Transport Network

CPRI switch

Real-time Cloud for centralized

baseband processing: Reduce BS sites, lower power

consumption and CAPEX/OPEX cost

High bandwidth optical transport

network: Adaptable for dynamic network load

Distributed RRU: Cooperative multi-point processing,

improve SE

RRU

RRU

RRU

RRU

RRU

RRU

RRU

Virtualized Control & Transport

Network load balancing. Server Pool

TM

External Use 8

Wireless Base Station Deployments and Types

Indoor Outdoor

Home Femtocell

SOHO Femtocell

Public Venue Picocell Enterprise Pico/Metrocell

Macrocell

Urban Area Metrocells

Cloud RAN

TM

External Use 9

Silicon Vendors’ Challenges

TM

External Use 10

Challenges for Semiconductor Solutions

• Complex mix of IP: DSP, CPU, Acceleration

• High levels of integration: Balanced resources for use case, power consumption and efficiency

• Complete solutions including entire processing chain, hardware and software

• Multiple target price/performance points driving need for scalable architecture, software compatibility/ease of use and reuse

• Relentless focus on reduction in total cost of ownership

TM

External Use 11

Silicon Vendor Software Requirements

• Closely coupled software

and hardware

− Hardware specific Layer 1,

performance optimized

• Intelligent software partitioning

− Balanced resources for use case

• System integration and testing

− End to end testing of complete stack

• Intelligent design

− Scalable architecture + software

compatibility and reuse

Additional Services

Operation & Maintenance

LTE & WCDMA

Layer 1 PY

Operator/OEM

HW Independent

HW Dependent

Payload

RRC

Signali

ng/ST

CP PCDP RTP/GTP

UDP

RLC

MAC

L1 Control

IPv4/v6

IPSEC

Ethernet Control

TM

External Use 12

Freescale’s Base Station Solutions Portfolio

TM

External Use 13

NEW

Femto

BSC9131/0 (45 nm)

8-16 users

Pico

BSC9132 (45 nm)

32-100 users

Metro

B3421 (28 nm)

100-256 users

Macro/CRAN

B4860 (28 nm)

1000+ users

• Broad portfolio from femtocell to macrocell with on-time, on-specification release track record

• Common architecture and software tool sets including CodeWarrior Development Suite and operating systems

• Software and tools ecosystem catering for Tier-1 wireless OEMs and broad market customers

• Rich third-party ecosystem for tools, operating system and application software

Freescale’s Complete SoC Portfolio for Wireless Base Stations Addressing All Market Trends

• QorIQ Qonverge Base Station-on-Chip SoC Series

• Advanced core and acceleration technologies, highly-balanced architectures for baseband processing integration, advanced process technologies

• Freescale delivers industry’s first complete SoC portfolio from home femto to multi-sector macro base stations

• Software compatibility across different devices

• Layer 1 and transport software stacks for small cell solutions to further expedite time to market

• Adopted by industry-leading base station OEMs

TM

External Use 14

QorIQ Qonverge B4860 SoC for Macrocell

and Cloud-RAN

TM

External Use 15

New Level of Performance in Mobile Wireless Infrastructure

• Three 20 MHz sectors 8T/8R LTE in a single SoC, supporting multiple standards and multimode operation for macrocell base stations

• Future proof, provides full support and scalability for LTE-Advanced R.11 and HSPA R.10 standards

• Complete baseband solution, integrates L1, L2, control and transport baseband processing from backhaul network to antenna Interface

• Competitive system cost, helps OEMs to meet operators’ demand for lower CAPEX/OPEX

• Freescale’s R&D scale and unique ownership of fundamental IP, combined with systems knowledge drives competitive differentiation

• World-class silicon, 28 nm process execution and beyond

QorIQ Qonverge B4860 SoC

Solution for Macrocell and C-RAN

TM

External Use 16

QorIQ Qonverge B4860: Block Diagram and Benefits

• Includes 64-bit e6500 dual-threaded cores, built on Power Architecture® technology, offering industry-leading DMIP/MHz performance with AltiVec technology for dramatic L2 scheduling acceleration

• Includes SC3900FP fixed/floating-point StarCore DSP cores providing 2x DSP performance compared to competitive offerings

• 20 GHz of programmable performance

• Smart hardware acceleration for Layer 1, 2, control and transport allows for best in class performance, power and cost

• Large-scale SoC integration allows for simpler programming models and easier load balancing

• Rich I/O mix including backhaul and antenna interfaces provide flexibility, interoperability and reduces overall system cost

TM

External Use 17

Smart Acceleration for Optimal Performance

MAPLE-B

Innovative Layer-1

Acceleration Work distribution between cores

and accelerators

MAPLE-B Layer-1 Hardware Accelerators

Standards support LTE, WCDMA, WiMAX, GSM and

LTE-Advanced

Throughputs Very high throughputs enabling low

processing latencies

Programming Simple API

Multimode operations LTE, LTE-A, WCDMA

Advanced MiMO

Innovative MiMO Equalizer for

improved spectral efficiency and

reduce processing latencies compared

to conventional techniques

Streaming Direct streaming to/from antenna

without core intervention

Internal Embedded

Flows

Internal embedded flows for

PUSCH/PDSCH Uplink/Downlink

processing without core intervention

Completely offloads extensive Baseband algorithms

Security acceleration for offload of

Transport functionality

Integrated vector processing unit for

accelerating L2 scheduling DPAA Control/Transport Hardware Accelerators

FMAN

Frame Manager

>20 Gbps aggregate throughput,

Parse, Classify, Distribute

BMAN

Buffer Manager

Manages buffer pools for accelerators

and network interfaces

QMAN

Queue Manager

Simplified sharing of network

interfaces and hardware accelerators

by multiple cores

RMAN

Rapid IO Manager Seamless mapping sRIO to DPAA

SEC

Security

SNOW-3G, Kasumi, ZUC, IPSec,

AES, DES, MD5, SHA-1/2….

Saving CPU Cycles for higher value work

TM

External Use 18

Advanced Interfaces for Macro Deployments

sRIO & PCIe for multichip

connectivity

Advance I/O –

Glueless Interfaces to Antenna

& Backhaul

2x 10 GbE XFI/KR Classify-Parse-Distribute

Timing Synchronization 4x 1 GbE/2.5 GbE

iEEE1588v2

8x CPRI v4.2 High-speed, industry-

standard Antenna

Interfaces at 9.8G

2x sRIO V2.1 2 controllers with 8 lanes

5G

PCIe v2.0 Quad lanes at 5G

IFC Modern NOR/NAND flash

controller & Legacy ASIC

connectivity

Other Peripherals SPI, I2C, USB, UART,

MMC, etc

Advanced

Debug/Tracing

JTAG, Aurora

(debug/trace)

Advanced Real-time

Tracing and Monitoring

Standard, High Speed

Antenna Interfaces

Backhaul networking,

delivering line-rate at

smallest packet sizes

TM

External Use 19

Traditional Approach

3-sector 20 MHz LTE Macrocell

with 5 major components

New Approach

3-sector 20 MHz LTE Macrocell

using Single SoC

Benefit of Intelligent Integration vs. Traditional Discrete

Solution

Multicore

MPU sRIO

Switch

Layer-1

Layer-2/3

Transport

& Control

DSP

CP

RI

I2C

UART

SPI

GE

sRIO

CPRI

Flas

h DDR2 DDR1

Flas

h

Antenna

10 Gbps

1Gbps

DDR

3 DDR3

Back Haul

Maint.

PHY

PHY Antenna

DSP

DSP

CPRI

B4860

POWER

4x Cost Reduction

3x Power Reduction

B4860 SoC

TM

External Use 20

Cloud-RAN with BBU Pooling and Control Pooling

• Expense to deploy fiber creates a practical limit on number

and distance of connections to BBU pool

• QorIQ Qonverge (B4860) processor addresses needs unique

to BBU

− More efficient (silicon size and power) for L1 processing

compared to a GPP

− Hardware-based accelerators for standard and repetitive

algorithms

− Low latency and deterministic behavior with L1 and L2

processed on same device

− 10 GbE connections for BBU balancing within the pool

• The base station-on-a-chip approach provides scalable

solution to suit varying capacity needs

• 10G backhaul connectivity is required

• QorIQ (T4240) ideal for Cloud-RAN, data-centric servers

− Lower power than competitor’s GPP

− SoC mimics cloud compute system architecture

− Strong processing assist technology for security,

compression and packet processing

• Ideal for virtualization of core, RNC, gateway, etc.

− Power Architecture® technology leads wireless market

share

− Ecosystem and virtualization solutions exist

Remote Radio Heads

CPRI Fiber

Connections

B4860-Based BBU Pool/Hotel

Mobile Core Infrastructure QorIQ T4240-based Servers

10Gb 10Gb

TM

External Use 21

• Based on advanced Power Architecture, StarCore, CoreNet and MAPLE technologies

• First SoC in 28 nm technology node for wireless infrastructure

• Supports the most advanced mobile wireless standards

High-Density Baseband Solution

LTE-Advanced SOLUTION

60 MHz sector on a chip

1.8 Gbps Aggregated Throughput

LTE/LTE-A SOLUTION

Base station on a chip

3-sector, 20 MHz, 8T8R Ant.

1.4 Gbps Aggregated Throughput

LTE, LTE-A,

WCDMA, TD-

SCDMA, GSM

Simultaneous

Multi-mode

LTE+WCDMA

Supports

Macrocells

Supports

Multi-RAT:

WCDMA SOLUTION

Base station on a chip

up to 6 cells, 5 MHz, 2T2R ant.

318 Mbps Aggregated Throughput

QorIQ Qonverge B4860 SoC - Industry Leading

Throughputs/Capacity

TD-SCDMA SOLUTION

Base station on a chip

30 carriers with a single device

TM

External Use 22

QorIQ Qonverge B3421 Solution for

Metrocell and Large Enterprises

TM

External Use 23

Freescale B342x Value Proposition Provides superior throughputs and users capacity with greater power efficiency

• LTE/LTE-Advanced

• SoC Capacity:

− 1x 20MHz, 4T4R

− 2x 20MHz, 2T2R

− 40MHz, 2x2

− 4x 10MHz 2T2R

− Carrier aggregation for multiple configurations

− Up to 256 active users

• Advanced MiMO receivers support

• LTE/LTE-A Rel. 11 support

• Wi-Fi Hosting

• Ultra high performance CPU, DSP Cores & Baseband Accelerators

• Integrated DFE for RF linearization - CFR, DPD, DUC/DDC

• Supports 802.11 ac/n hosting through powerful CPU cores and security acceleration

• Variety of interfaces for backhaul and antenna : JES204B, JESD207, CPRI, 1G/2.5G Ethernet, PCIe

• GPS, 1588v2 timing sync. Support

• Low power system solution

TM

External Use 24

QorIQ Qonverge B3421: Block Diagram & Features

CoreNet - Cache Coherent Switch Fabric

8-Lanes 10G SERDES

Banked L2 Cache

StarCore

SC3900FP DSP

Banked L2 Cache

512KB

CoreNet

Platform

Cache

64-bit

DDR3/3L

Memory

Controller

USB 2.0

IFC

USIM

9x SPI

SD/MMC

Security Monitor

GPIOs

Timers

5x I2C

2x P

CIe

5

G

2x C

PR

I 9

.8G

4x J

ES

D20

4A

/B

SA

TA

5x J

ES

D20

7

DF

E

Watchpoints

Perf.

Monitor

Trace

Aurora

Power™

e6501

vCPU vCPU

Power™

e6501

StarCore

SC3900FP DSP

32 KB

D-Cache

32 KB

I-Cache

32 KB

D-Cache

32 KB

I-Cache

32 KB

D-Cache

32 KB

I-Cache

32 KB

D-Cache

32 KB

I-Cache

MAPLE-B FMAN/DPAA

Turbo/

Viterbi

Dec.

FFT/

DFT

MiMO

Equaliz

er

Turbo

Enc.

PDSCH

RISCs

PUSCH

MAPLE-B3

Security

Engine

Queue

Mgr.

Buffer

Mgr.

Parse, Classify,

Distribute

iEEE®1588v2

2.5

G/1

G

1G

1G

2.5

G/1

G

Single Chip - Metrocell Base Station • Standards support: LTE/LTE-A (Rel. 10/11)

• Dual 20 MHz 2x2 or 40 MHz 2x2

• Active users - 256

• Aggregated throughputs - 450 Mbps

• Wi-Fi® offload - 802.11ac/n hosting (IPSec-CAPWAP/DTLS)

• Processing layers: Transport-PDCP-RLC/MAC-PHY-DFE

Architecture and Features • Dual e6501 64bit dual-thread (4 vCPU) cores 1.2GHz, built

on Power Architecture® (16,000 DMIPs)

• Dual SC3900FP StarCore 1.2GHz, Fixed & Floating-point

DSP

• MAPLE-B3 Baseband Accelerator Platform

• FEC - Turbo Decode & Encode, Viterbi

• Fourier Transforms (FFT/DFT)

• MMSE MiMO equalization (IRC/SIC/PIC), Matrix

Inversion

• CRC

• LTE PDSCH & PUSCH embedded data path flows

• Integrated DFE (Digital Front End) – CFR, DPD, DUC/DDC

• DPAA enabled - Fman, Qman, Bman

• Crypto engine – IPSec, Snow-3G, ZUC, AES, DES, SHA

• L3-cache/shared memory 512 KB

• Layer-1 SRAM memory

• DDR3/3L Controller 64-bit up 1.867 GHz (w/ ECC)

• CoreNet – full cache coherent fabric

• 2G/3G/LTE sniffing support

• USB 2.0

• 8x 10GG SerDes lanes , combining:

• 4x Ethernet SGMII + MACSec + IEEE 1588

• 4x JESD204B RFIC interfaces

• 2x CPRI v4.2 antenna interfaces

• 2x PCIe @ 5G, x2 lanes

• 1x SATA

• 2x Aurora

• Trust architecture/secured boot support

• 5x JESD207 RFIC interfaces

• IFC, 4x I2C, DUART, 9x SPI, eSDHC, USIM

• Package - 35mmx35mm, FCPBGA, 1mm pitch, Pb-free

L1 SRAM

vCPU vCPU

TM

External Use 25

Performance with Industry-Leading Cores

e6501 High-Performance CPU • 64-bit Power Architecture® core with

Altivec 128-bit SIMD engine

• Dual threads provide x1.8 times the

performance of a single e6501 thread

• Hardware support for cache coherency

• Tightly-coupled, low-latency clustered

level-2 cache allowing full sharing or

strict allocation

SC3900 High-Performance DSP • *Step function in DSP performance

over competition

• Fixed/Floating-point support

• State-of-the-art support for high-

performance control code with branch

prediction

• MMU and address translation support

• Tightly-coupled, low-latency clustered

level-2 cache allowing full sharing or

strict allocation

• Hardware support for cache coherency

• High-throughput Memory Accesses

BDTI

Highest

Speed Score

Texas

Instruments

C66x

1.5 GHz

Freescale

SC3900

1.2 GHz

BDTIsimMark2000™ BDTImark2000™

Core Performance: CoreMark

e500 core

processor

e6500

processor

(2 thread)

BDTi Speed Score

CoreNet Coherency Fabric CoreNet Coherency Fabric

CoreNet Interface 256-bit Rd & Wr Data Busses

DSP Core Cluster CPU Core Cluster

High Speed

Baseband

Accelerators

Interface

SC3900

FVP Core SC3900

FVP Core

32K 32K 32K 32K

16-way Shared L2 Cache 16-way Shared L2 Cache,

PM

C

PM

C

AltiVec AltiVec

32K 32K 32K 32K

T T T T

e6501 e6501

CoreNet Interface 256-bit Rd & Wr Data Busses

* In benchmarking performed by independent analysis firm BDTI, the 1.2

GHz SC3900 achieved the highest fixed-point BDTIsimMark2000™ score

ever recorded. See www.BDTI.com for details. BDTI has not evaluated

the floating-point performance of the SC3900.

TM

External Use 26

CoreNet Cache Coherency Switch Fabric

8-Lanes 10G SERDES

Banked L2 Cache

StarCore

SC3900FP DSP

Banked L2 Cache

512KB

CoreNet

Platform

Cache

64-bit

DDR3/3L

Memory

Controller

USB 2.0

IFC

USIM

6x SPI

SD/MMC

Security Monitor

GPIOs

Timers

4x I2C

2x P

CIe

5

G

2x C

PR

I 9

.8G

4x J

ES

D20

4A

/B

SA

TA

5x J

ES

D20

7

2.5

G/1

G

1G

1G

2.5

G/1

G

Parse, Classify,

Distribute

iEEE®1588v2

Security

Engine

Queue

Mgr.

Buffer

Mgr.

Turbo

Dec.

FFT/

DFT

MiMO

EQ.

Turbo

Enc.

PUSCH

RISCs

DF

E

Watchpoints

Perf.

Monitor

Trace

Aurora

T1 T2

Power™

e6501

T1 T2

Power™

e6501

StarCore

SC3900FP DSP

32 KB

D-Cache

32 KB

I-Cache

32 KB

D-Cache

32 KB

I-Cache

32 KB

D-Cache

32 KB

I-Cache

32 KB

D-Cache

32 KB

I-Cache

MAPLE-B FMAN

PUSCH

Security Monitor

USB 2.0

IFC

2x DUART

4x I2C

eSPI

GPIOs

512KB

CoreNet

Platform

Cache

64-bit

DDR3

Memory

Controller

SD/MMC

Smart Acceleration for Optimal Performance Integrated SIMD vector processing unit

for Layer 2 scheduler acceleration IP packet acceleration Layer 2 Hardware Accelerators

FMAN

Frame Manager

7 Gbps aggregate throughput, parse,

classify, distribute at smallest packet

sizes

BMAN

Buffer Manager

Manages buffer pools for cores,

accelerators and network interfaces

QMAN

Queue Manager

Simplified sharing of network

interfaces and hardware accelerators

by multiple cores

Security algorithms SNOW-3G, Kasumi, ZUC, AES, DES,

MD5, SHA-1/2….

Security Protocols Autonomous IPsec, DTLS/CAPWAP

Saving CPU cycles for higher value work

Sharing data between

cores, accelerators, I/Os CFR, DPD, DUC/DDC, IQ

acceleration

IPSec, DTLS, Kasumi,

ZUC, SNOW-3G

L1 Baseband acceleration

Layer 1 & DFE Hardware Accelerators

Standards support LTE, LTE-Advanced

Throughputs Very high throughputs enabling low

processing latencies

Programming Simple API under SDOS

Advanced MiMO

Innovative MMSE based MiMO

equalizer for improved spectral

efficiency and reduce processing

latencies compared to conventional

techniques

Streaming Direct streaming to/from antenna

interfaces, without core intervention

Internal Embedded

Flows

Internal embedded processing for

PUSCH/PDSCH uplink/downlink

processing without core intervention

DFE Programmable to adapt for different

choices of PA and for OEMs to

leverage their IP

Completely offloads extensive baseband & linearization

algorithms

TM

External Use 27

Benefits from Digital Front End (DFE)

By applying DFE (CFR and DPD), PA efficiency increases to 40%

Transmit

Power at the

antenna

Loss at

Duplexer

Average PA

Power

PA Efficiency

with DFE

PA Power

Consumption

with DFE

Savings with

DFE

250 mW 4 dB 28 dBm 40% 1.6 W 4.7 W

1 W 4 dB 34 dBm 40% 6.3 W 18.7 W

5 W 3 dB 40 dBm 40% 25 W 75 W

Transmit

Power

2x2 MIMO

with DFE

2x2 MIMO

Savings

with DFE

4x4 MIMO or

Dual Carrier

2x2 MIMO

4 Antenna

Savings

with DFE

250 mW 3.2 W 9.4 W 6.4 W 18.8

1 W 12.6 W 37.4 W 100 W 74.8 W

5 W 50W 150 W 100 W 300 W

TM

External Use 28

Metro/Large-Enterprise Small Cell LTE, Wi-Fi & Content Caching

• FDD/TDD-LTE

− Dual cell 20 MHz 2T2R, or

Single cell 20 MHz 4T4R, or

Single cell 40MHz 2T2R

• Wi-Fi Transport offloading

• Local content caching SSD

saving backhaul traffic

• Turnkey LTE L1 Software

• 3rd parties RF Transceivers and Wi-Fi chipset

B3421

LTE, LTE-A

SGMII

SGMII

PCIe

FLASH

O&M

SATA SSD

JESD204B/

JESD207

PMIC Power

Supply

DDR

SGMII

WiFi

3x3

GPS

RFIC

2T/2R

RFIC

2T/2R

UART

LTE

Backhaul

SGMII

JESD204B/

JESD207

TM

External Use 29

Freescale B3421 RDB –

Metro & Large-Enterprise Small Cell Reference Design

• Standalone operation or Pluggable into 5 Liter Box

• Backhaul connectivity

− Ethernet - 2x 1G + 1x 2.5G (SGMII)

• Fronthaul connectivity

− up to 2x RF 2T/2R cards JESD204B (*)

− up to 2x RF 2T/2R cards JESD207 (*)

− up to 1x RF card for Sniffing (*)

− up to 2x CPRI 9.8G - SFP+ (*)

• DDR3L – 4GByte 64bit @1.867GHz + ECC

• Flash Memories

− NOR – 128MByte, SPI – 128Mbit, I2C – 64KB

• miniPCIe connector for WiFi chipset

• microSATA connector for SSD card

• On-board GPS Module

• USIM connector forUSIM card

• eSDHC for SD card

• miniUSB, UART connectors

• Debug - JTAG & Aurora connectors

• eCWTAP USB – no need for JTAG probe

JESD207 based configuration JESD204B based configuration

Top

B3

RJ-45

RJ-45

GPS

SD

CO

P

DDR

DDR

DDR

DDR

DDR

DD

R

Su

pp

ly

NAND

USB

UART

PHY

RF1(ANT1)

SFP

SFP

eC

WT

AP

CPRI 1

CPRI 2

CPLD

Aurora

PS

SFPSGMII 2.5

CFG

SW

PAD

RF4

SSD

mSATA

WLAN

mPCIe

RF5

Power

Entry

US

IM

JESD204

ClocksRF2(ANT2)

RF3(ANT5)

RF1(ANT1)

B3421

RF

PA

JES

D20

7 R

F

Tra

nsc

eive

r

RF

PA

JES

D20

7 R

F

Tra

nsc

eive

r

Top View

Side View

Top

B3

RJ-45

RJ-45

GPS

SDC

OP

DDR

DDR

DDR

DDR

DDR

DD

R

Su

pp

ly

NAND

USB

UART

PHY

RF1(ANT1)

RF2(ANT2)

RF3(ANT5)

SFP

SFP

eC

WT

AP

CPRI 1

CPRI 2

CPLD

Aurora

PS

SFPSGMII 2.5

Top

CFG

SW

PAD

RF4

SSD

mSATA

WLAN

mPCIe

RF5

Power

Entry

US

IM

JESD204

Clocks

RF1(ANT1)

RF4

B3421

JESD204B

RF PA

JESD204B RF

Transceiver

Side View

Top View

TM

External Use 30

QorIQ Qonverge BSC9132 Picocell Solution

TM

External Use 31

QorIQ Qonverge: BSC9132 Block Diagram

Single Chip – Picocell Base Station

• Standards support: LTE (Rel. 8/9), WCDMA (Rel. 99/7/8/9), 802.16e

• Bandwidth: 20 MHz or 2x 10 MHz

• 100 LTE or 32 HSPA active users

• Multimode support

• LTE throughputs: 150 Mbps DL / 75 Mbps UL with 2x4 ant.

• HSPA+ throughputs: 84 MbpsDL /23 Mbps UL

• WiMAX 802.16e: up to 50 Mbps DL/13 Mbps UL

• 2G/3G Sniffing and GPS support

• Secured boot and trust architecture support

• Proc. layers: PHY-MAC-RLC-PDCP-Transport

Architecture

• Dual e500mc cores, built on Power Architecture® technology (1 GHz/1.2 GHz)

• Dual StarCore SC3850 DSPs (1 GHz/1.2 GHz)

• MAPLE-B2P Baseband Accelerators Platform

• Security engine - IPsec, Kasumi, Snow-3G

• Dual DDR3/3L, 32-bit,1.333 GHz, w/ ECC

• IEEE® 1588 v2, NTP

• USB 2.0

• 4 SerDes lanes, combining:

− 2x Ethernet 1G SGMII

− 2x CPRI v4.1 @ 6.144G antenna interface

− 1x PCIe @ 5G x2 lanes

• Quad JESD207 RF transceiver interfaces

• NAND/NOR Flash controller, eSDHC, USIM

• I2C, eSPI

• Package – FCPBGA, 23mmx23mm, 0.8mm

Multicore Fabric

4-Lanes SERDES

512KB Shared L2 Cache

StarCore

SC3850 DSP

512KB L2 Cache

USB 2.0

IFC

USIM

1x SPI

SD/MMC

GPIOs

Timers

2x I2C

2x P

CIe

5G

2x C

PR

I 6

.1G

4x J

ES

D20

7

Power™

e500mc

Power™

e500mc

StarCore

SC3850 DSP

32 KB

D-Cache

32 KB

I-Cache

32 KB

D-Cache

32 KB

I-Cache

32 KB

D-Cache

32 KB

I-Cache

32 KB

D-Cache

32 KB

I-Cache

Security

Engine

512KB L2 Cache

32-bit

DDR3

Memory

Controller

32-bit

DDR3

Memory

Controller

2x S

GM

II +

15

88

v2

MAPLE-B2P

LTE WCDMA

32 KB

Shared

Memory

TDM

TM

External Use 32

QorIQ Qonverge BSC9131 Femtocell

Solution

TM

External Use 33

QorIQ Qonverge: BSC9131 Block Diagram

Single Chip Femtocell Base Station

− SMB Femtocell up to 16 users – BSC9131

− Multimode

SoC Architecture

− e500 core, built on Power Architecture® technology (800 Mhz – 1 GHz)

− StarCore SC3850 core subsystem (800 MHz – 1 GHz)

− MAPLE-B2F Baseband Accelerators Platform

eTVPE – Turbo/Viterbi Decoder

DEPE – Turbo Encoder w/ rate match

CRCPE – CRC check & insertion

FTPE – FFT/DFT

PDPE, PUPE

UMTS Chiprate

− Security engine – IPsec, Kasumi, Snow-3G

− Secured boot

− Single DDR3 Controller 32-bit 800 MHz

− IEEE® 1588 v2, NTP

− USB 2.0

− 2x Ethernet RGMII and IEEE1588v2

− 3x JESD207/MAXPHY RF transceiver interfaces

Multicore Fabric

USB 2.0

IFC

USIM

1x SPI

SD/MMC

GPIOs

TDM

2x I2C

Power™

e500mc

256KB L2 Cache

StarCore

SC3850 DSP

512KB L2 Cache

Power™

e500mc

32 KB

D-Cache

32 KB

I-Cache

32 KB

D-Cache

32 KB

I-Cache

32-bit DDR3

Memory

Controller

3x J

ES

D207/M

AX

PH

Y

Security

Engine

2x

RG

MII +

1588v2

MAPLE-B2F

LTE WCDMA

Timers

Multi-standard Architecture

− Standards support: LTE (Rel. 9), WCDMA (Rel. 99/7/8)

− LTE – 20 MHz single sector -10 0Mbps / DL 50 Mbps UL

− HSPA – 5 MHz single sector 42 Mbps / DL 11 Mbps UL

− Processing Layers: PHY-MAC-RLC-PDCP-NTP

− Enabled with 2x2 MiMO

− 2G/3G sniffing and GPS support

TM

External Use 34

Freescale Provides Complete Portfolio for

HetNet

TM

External Use 35

Freescale Solutions for HetNet

Cloud-RAN Baseband processing centralization, reduced

number of cell sites, load balancing

Remote Radio Heads

CPRI Fiber

Links

GigE

Links

Picocells

Femtocells

Macrocells

Metrocells

Flexible Architecture Supports scalable solutions for all cell types

HetNet enabled solution for best user experience

SoC—Peerless levels of integration

provide best-in-class cost and power

VortiQa software solutions—e2e

solutions focus for rapid deployment

Solution is evolving to:

• HetNets underlay with small cells

• Low-cost, SoC-based software solution with SON

capability to effectively deploy and manage these

networks

• Multi RAT solutions, integration of 3G/4G with WiFi®

TM

External Use 36

Software Solutions from Freescale and

Partners

TM

External Use 37

Freescale Small Cell Software Solution

• Comprehensive, commercial grade

L1, L2, L3 and Transport Software

solution for small cells integrated and

tested

− LTE-FDD/TDD and LTE-Advanced L1

software stack (licensed by Freescale)

− L2/L3 software for LTE-FDD/TDD and

LTE-Advanced (licensed by partners)

− Transport software, including IPsec,

QoS backhaul, etc. (licensed by

Freescale and partners)

− Development tools and operating

system software (available through

Freescale and partners)

RRC

L1 Control

MAC

RLC

PDCP

Ethernet Control

IPSEC

IPv4/v6

UDP

GTP Signalin

g

/ STCP

Payload

Operation & Maintenance

LTE & LTE-A

Layer-1 PHY

Additional services

SD

OS

OS

L

inu

x O

S

Freescale OEM/Partners SP/OEM

TM

External Use 38

Comprehensive IDEs that provide

a visual, automated framework,

with optimizing compilers to

accelerate development of

complex applications

Leading providers for LTE

commercial Layer 2/3 and

Layer 1 software stacks as

well as system integration

services

Leading providers of

commercial operating systems,

middleware and development

tools

Operating systems with

optimized drivers for CPU, DSP,

accelerators, interfaces

Freescale provides complete

LTE & LTE-A software stacks

for Layer-1 PHY and

Transport

RF boards and test equipment

hardware partners

Platform developed by

Freescale, integrated with RF,

to enable end-to-end system,

introduced with silicon samples

Modular, cost-effective

development platform pertinent

to software and system

development

Reference

Design

Linux SDK

SmartDSP-OS

Complete Solution, Rich Ecosystem

TM

© 2015 Freescale Semiconductor, Inc. | External Use

www.Freescale.com