Progress With iBOBs at Jodrell Bits & Bytes Meeting, JBO, 17-18th Dec 2007

Jonathan HargreavesElectronic Engineer, Jodrell Bank Observatory

17-18th Sept 2007 Development of Real Time eVLBI at Jodrell Bank Observatory Slide #2

Introduction• Export – Jodrell to JIVE• Import – Onsala to Jodrell • iBOB introduction• iBOB configured as network testing device• iBOB configured as linux development board

17-18th Sept 2007 Development of Real Time eVLBI at Jodrell Bank Observatory Slide #3

Using CASPER tools with Xilinx v9.1• Simulation Models – Update gateways etc

• Use look under mask and change manually• Use xlUpdateModel(‘modelname')• Edit block_mask.m files

• Some Xilinx blocks have new names • Xilinx Gateway In/Out -> Xilinx Gateway In/Out Block• Scripts use this to find boundaries of user logic• Changes to gen_xps_files.m and xps_block.m

17-18th Sept 2007 Development of Real Time eVLBI at Jodrell Bank Observatory Slide #4

Infrastructure Blocks• Tengbe – the ten gigabit ports

• iBOB block adapted from the BEE2 version (xc2vp80)• Two ports instead of four• XAUI clock routing • Rocket I/O & reference clock pin locations• Edit system.mhs and system.ucf

• VSI – Interface to ZDOK connectors• Added ZDOK1 to parameter options• Pin locations added to BEE_hw_route.mat

• ADC – Interface to the ADC card• 8 to 2 bit conversion done inside the block

• Ethlite – 100M ethernet• Code slimmed down to fit in BRAM (UDP only)• Incorporate into base system

17-18th Sept 2007 Development of Real Time eVLBI at Jodrell Bank Observatory Slide #5

Tool Flow• Base System

• PPC, BRAM, UART• Software to run TinySH

• Generate system.mhs, system.mss and system.ucf files • XPS (EDK)

• Generate hardware bitmap • Compile software

• Create bitfile• Download via JTAG

17-18th Sept 2007 Development of Real Time eVLBI at Jodrell Bank Observatory Slide #6

iBOB = internet break-out board

17-18th Sept 2007 Development of Real Time eVLBI at Jodrell Bank Observatory Slide #7

iBOB

FPGA

Xilinx Virtex II Pro

2 PowerPCs

232 18x18 bit multipliers

17-18th Sept 2007 Development of Real Time eVLBI at Jodrell Bank Observatory Slide #8

iBOB

SRAM

512k x 36 bits x 2 chips

Double data rate

17-18th Sept 2007 Development of Real Time eVLBI at Jodrell Bank Observatory Slide #9

iBOB

CX4

2 x standard 10Gbps

connectors

15m on copper

17-18th Sept 2007 Development of Real Time eVLBI at Jodrell Bank Observatory Slide #10

iBOB Linux expansion card

2MB SRAM

Mini SD Card

17-18th Sept 2007 Development of Real Time eVLBI at Jodrell Bank Observatory Slide #11

Network testing device: Simulink design

17-18th Sept 2007 Development of Real Time eVLBI at Jodrell Bank Observatory Slide #12

Line Rate vs. Packet Spacing

17-18th Sept 2007 Development of Real Time eVLBI at Jodrell Bank Observatory Slide #13

iBOB configured for Linux development

RS232JTAG

10/100 EthernetiBOB

Configured to run Linux on one of its PowerPCs

PC configured as network file server

Interface to Mk Vb VLBI Receiver

Local PC

Update FPGA firmware over JTAG

Local login over RS232

Removed when firmware is stable

Memory Expansion

2MB RAM Mini SD Card

17-18th Sept 2007 Development of Real Time eVLBI at Jodrell Bank Observatory Slide #14

Conclusion

Questions/Answers• Contact information

Dr Jonathan HargreavesElectronic EngineerJodrell Bank Observatoryjh@jb.man.ac.uk

• Additional Informationhttp://expres-eu.org/ [note: only one “s”]http://www.jive.nl/

• EXPReS is made possible through the support of the European Commission (DG-INFSO), Sixth Framework Programme, Contract #026642

17-18th Sept 2007 Development of Real Time eVLBI at Jodrell Bank Observatory Slide #15

ImplementationFractional Delay Filter

17-18th Sept 2007 Development of Real Time eVLBI at Jodrell Bank Observatory Slide #16

Cross Correlation Results Fractional Delay Filter

17-18th Sept 2007 Development of Real Time eVLBI at Jodrell Bank Observatory Slide #17

Cross Correlation Results Fractional Delay Filter