powerbook g4 17" low-res
TRANSCRIPT
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ANGLES
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. APPCK
ECNZONEREV
DO NOT SCALE DRAWING
X.XXX
X.XX
XX
DIMENSIONS ARE IN MILLIMETERS
THIRD ANGLE PROJECTIOND
SIZE
APPLICABLENOTED AS
MATERIAL/FINISH
NONE
SCALE
DESIGNER
MFG APPD
DESIGN CK
RELEASE
QA APPD
ENG APPD
DRAFTER
METRIC
SHT
DRAWING NUMBER
TITLE
NOTICE OF PROPRIETARY PROP
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PII NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSTHE INFORMATION CONTAINED HEREIN IS THE P
Apple Computer
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DESCRIPTION OF CHANGE
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)BOM OPTION
TABLE_5_HEAD
QTY DESCRIPTIONPART#TABLE_5_ITEM
PMU (POWER MANAGEMENT UNIT)
12/21/2004
SCHEM,MLB,PB17"
SERIAL DEBUG (JOLLY ROGER, PWR/NMI/RESET)
LMU, LIGHT SENSOR, BOOTBANGER, SLEEP LEDSPIDEY - KBD,TPAD,HALL EFFECT,PWR BUTTON
DUAL-CHANNEL LVDS
GPU_SS
MARVELL GIGABIT ETHERNET PHY
STUFF
3.3V / 5V SYSTEM POWER SUPPLIES
CPU CORE VOLTAGE POWER SUPPLY
INTERNAL CONNECTORS - DVD,
SYSTEM BLOCK DIAGRAM 23
MPC7450 MAXBUS INTERFACE
200PIN DDR MEMORY SODIMM CONNECTORS
22
SCHEMATIC CREF AND NETLIST REPORTS
REVISION HISTORY (1 OF 1)
42-4541
FIREWIRE A/B CONNECTORS, PORT POWER LIMITER
SIGNAL CONSTRAINTS (1 OF 3) - DIGITAL/CLK 5V_HD_LOGIC
INT_CLK
9
MPC7450 DATA
CARDSLOT, HARD DRIVE, LEFT USB/BLUETOOTH
6
8
10
TITLE PAGE AND CONTENTS
24
28
NO_SSCG
SSCG
ATI_MEMIO_HI
BBANG
NEC_USB
EXT_TMDS
INT_TMDS
212019181716151413
11
7
543
1
INTREPID AGP 4X/PCI
26
2930313233
3435363738
2
CPU PLL AND CONFIGURATION STRAPS
INTREPID MAXBUS AND BOOT STRAPS
M11 ANALOG, POWER, GND
SIL178 DUAL TMDS TRANSMITTER
M11 LVDS/TMDS/VGA/GPIO & GPU VCORE
M11 AGP & CLOCKS
INTREPID POWER RAILS
INTREPID DECOUPLING
CARDBUS CONTROLLER (PCI1510) SIGNAL CONSTRAINTS (2 OF 3) - DIGITAL/DIFF
FIREWIRE A/B PHY
1.5V/ 1.8V / 2.5V SYSTEM POWER SUPPLIES
40SIGNAL CONSTRAINTS (3 OF 3) - POWER NETS
FUNCTIONAL TEST POINTS
39
INTREPID ENET/FW/UATA/EIDE INTERFACES
D3_HOT
D3_COLDUSB 2.027
POWER BLOCK DIAGRAM
VCORE_OFFSET
ATI_MEMIO_LO
1_8V_MAXBUS
3V_HD_LOGIC
MMM
GPU_SWITCH
DDR MEMORY MUXES
12
MMM, BATTERY CURRENT SENSE
PCB NOTES AND HOLES
PAGEPAGE CONTENTSCONTENTS
NO STUFFBOM OPTIONS25FAN CONTROLLER, MODEM, SOUND
VIDEO CONNECTORS - INVERTER, DVI, S-VIDEO
12.8V SYSTEM POWER SUPPLY / PMU POWER SUPPLY
BATTERY CHARGER AND CONNECTOR
NO_BBANG
INTREPID_USB
SERIAL_DEBUG
1_5V_MAXBUS
EXT_CLK
INTREPID GPIOS/SERIAL/USB INTERFACES/SSCG
INTREPID MEMORY INTERFACE / BOOT ROM
051-6694 1 SCH1SCHEM,MLB,PB17
820-1688 PCB11 PCBF,MLB,PB17
SCHEM,MLB,P
051-6694
B PRODUCTION RELEASED357142 12
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DSIZE
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PRO
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PA
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSTHE INFORMATION CONTAINED HEREIN IS THE P
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B
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APPLE COMPUTER INC.SCALE
NONE
SYSTEM BLOCK D
J16
P.22LVDS
(INTERNAL MEM)
COMPOSITE
S-VIDEO
EDID
(I2C)
U43
66MHZ32BITS
AGP BUS1.5V/3.3V
P.28
EIDEP.14
UATA 100
ULTRA ATA/100
J17J7
ConnectorLCD Panel S-Video
ConnectorDVI-I
Connector
InverterConnector
J20/J23
U11/U12/U13/U14
P.14
USB PORT AP.15
USB PORT BP.15
USB PORT CP.15
USB PORT DP.15
USB PORT EP.15
USB PORT FP.15
MAXBUSP.9
U42
PMU
64BIT DATA32BIT ADDRESS167MHZ1.8VMAXBUSI2C
INTRPEID
J9
J3 (SHARE WITH LEFT USB)
J12
J3 (SHARE WITH BLUETOOTH)ETHERNET
125MHZ8BIT RX8BIT TX
10/100/10003.3VG/MII
4 DATA PAIRS2 DATA PAIRS@ 200MHz
100MHZ8BIT TX/RX
3.3V
J13
Connector
P.14CARDSLOT
P.14
FIREWIRE
P.14800 MB/S10/100/1000
NOT USED
LMU
P.26
I2C
I2S I2C
P.26
P.26
U52
P.27CONTROLLERUSB 2.0
LIGHT SENSORKB LED
KeyboardConnectorConnector
TRACKPAD
J15
5VSERIAL
U39
3.3VSMBUS
J19
ConnectSUTRO (P
U263.3V/16/3233MHZ
3.3V33MHZ32BITSPCI B
TI PCI1510CardBus
Controller
U48/J2/J4
(DDC
TOO)
RGB
TMDS
2 DATA PAIRS@ 400MHZ
P.15P.14
(INTERNAL MEM)(INTERNAL MEM)
(INTERNAL MEM)
NOT USED
NOT USED
USB 2.0
P.26
J8
USB 2.0
MEMORYCH. A
MEMORYCH. C
MEMORYCH. D
MEMORYCH. B
P.15
SCCAP.15
I2S I2C
Serial Debug
Connector
J5
U17
BOOT ROM1M X 8
FanCircuit
ConnectorTUBA (SOUND)
J14ConnectorOPTICAL DRIVE
J11FireWire
PHY
U28
ConnectorFW - B
J22
ConnectorFW - A
J24
ConnectorEthernet
J18
U49
EthernetPHYP.28
P.30
P.29
P.30
1394 OHCI
P.25
EIDE
P.32ConnectorBattery
J25LED
SLEEP
Power Supply& ChargerP.32-36
LMU
U36
PMUP.31
P.24
I2C
P.32
CARDBUSConnectorP.18
J10
P.24
P.10 P.18
ConnectorAIRPOPT
J21
ATI M11
64MBP.18-21
P.22 P.22 P.22
4X AGPP.13
P.1333MHZ32BITSPCI
P.14BOOTROM
P.15VIA/PMU
MEMORY BUS2.5V167MHZ64BITS
2:1 DDR MUXES
P.10DDR MEMORY
P.11
DDR SDRAM DIMM 0
DDR SDRAM DIMM 1SO-DIMM Connector
P.12
P.7ConfigCPU PLLAPOLLO
CPU(MPC7457)
P.5-6
P.26ConnectorModem Board
P.25BlueTooth
P.33BACKUP BATTERY
RIGHT USB
P.25LEFT USB
U44
P.25
INTREPID
UIDE
P.25
051-669
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DSIZE
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PRO
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PA
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSTHE INFORMATION CONTAINED HEREIN IS THE P
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APPLE COMPUTER INC.SCALE
NONE
BACKLIGHT
TURNS ON OUTPUT @ 2.4V
DCDC_EN_L WILL PULL ON1/ON2
BECOMES 1; MUCH LESS THAN THE
SLEEP
D3_HOT
1_5V_2_5V_OK
D3_COLD
ACADAPTER
IN
PG 31
+BATT
MAIN 3V/5VDC/DC
RC AT 1M*0.1UF @ 24V
NO INRUSH PROTECTION
+PBUS
PG 31
FEED-IN PATH
BATTERY VOLTAGE
3S 3P PRISMATIC CELLS
+BATT
PG 31(MAX1772)CHARGER
BATTERY
PG 32& BOOST OUTPUT
BATTERYBACKUP
+PBUS
SEQUENCINGMAXBUS
DCDC_EN
EXT_VCC
+1.2V/+1.0VGPU_VCORE RUN: RUNNING
SLEEP: STOPPEDSHUTDOWN: STOPPED
VCC SHDN
DC/DC(MAX1717)
PG 34
CPU_VCORE(+1.4V/+1.5
SHUT-DOWNRUNRUNSHUT-DOWN
+1_8V_MAIN(D3COLD)
GPU_VCORE(D3HOT)
GPU_VCORE(AT LTC1778 RUN/SS)
1_5V_2_5V_OK1_5V_2_5V_OK(MAX1715 OUTPUT)
+1_5V_SLEEP+1_5V_MAIN+2_5V_SLEEP+2_5V_MAIN
3V_5V_OK+3V_SLEEP+3V_MAIN
+5V_SLEEP+5V_MAINDCDC_EN_LDCDC_EN
SLEEP_L_LS5SLEEP
+3.3V_MAINRUN/SS - 3V
INTERNAL ZENER CLAMP TO 6VRUN: RUNNING
SLEEP: RUNNINGSHUTDOWN: STOPPED
VCC
RUN/SS - 5VTURNS ON AT >1V1V~13.44V TURNS-ON
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DSIZE
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PRO
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PA
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSTHE INFORMATION CONTAINED HEREIN IS THE P
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A
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C
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APPLE COMPUTER INC.SCALE
NONE
BOARD INFORMA
PCB SPECSTHICKNESS : 1.2 MM / 0.047 IN1/2 OZ CU THICKNESS: 0.7 MILS1.0 OZ CU THICKNESS: 1.4 MILS
IMPEDANCE : 50 OHMS +/- 10%DIELECTRIC: FR-4
PREPREG (3MIL)
LAMINATE (4MIL)
PREPREG (3MIL)
LAMINATE (4MIL)
PREPREG (2MIL)
LAMINATE (3MIL)
PREPREG (2MIL)
LAMINATE (4MIL)
PREPREG (3MIL)
LAMINATE (4MIL)PREPREG (3MIL) SIGNAL (1/3 OZ + COPPER PLATING)
GROUND (1/2 OZ)
SIGNAL (1/2 OZ)
SIGNAL (1/2 OZ)
GROUND (1/2 OZ)
CUT POWER PLANE(1 OZ)
CUT POWER PLANE(1 OZ)
GROUND (1/2 OZ)
SIGNAL (1/2 OZ)
SIGNAL (1/2 OZ)
GROUND (1/2 OZ)
SIGNAL (1/3 OZ + COPPER PLATING)
BOARD STACK-UP AND CONSTRUCTION
SEE PCB CAD FILES FOR MORE SPECIFIC INFO.
PREPREG THICKNESS: 2-3 MILSSIGNAL TRACE SPACING: 4 MILSSIGNAL TRACE WIDTH: 4 MILSLAYER COUNT: 12
20R10 TH VIA OR VIA IN PAD
1211
910
87
65
432
1
GROUND VIAS
CONDUCTIVE MOUNTS
ASICS HEATSINK MOUNTSI/O AREA INVERTERCHASSIS MOUNTS
BOARD HOLES
SPEAKER CLIPS
ZT111255R158
OMIT
ZT751
HOLE-VIA-20R10
ZT611
HOLE-VIA-20R10
ZT631
HOLE-VIA-20R10
ZT511
HOLE-VIA-20R10
ZT541
HOLE-VIA-20R10
ZT421
HOLE-VIA-20R10
ZT641
HOLE-VIA-20R10
ZT761
HOLE-VIA-20R10
ZT591
HOLE-VIA-20R10
ZT621
HOLE-VIA-20R10
ZT221
HOLE-VIA-20R10
ZT31
HOLE-VIA-20R10
ZT251
HOLE-VIA-20R10
ZT321
HOLE-VIA-20R10
ZT311
HOLE-VIA-20R10
ZT261
HOLE-VIA-20R10
ZT231
HOLE-VIA-20R10
ZT191
HOLE-VIA-20R10
ZT151
HOLE-VIA-20R10
ZT171
HOLE-VIA-20R10
ZT131
HOLE-VIA-20R10
ZT121
HOLE-VIA-20R10
ZT211
HOLE-VIA-20R10
ZT141
HOLE-VIA-20R10
ZT181
HOLE-VIA-20R10
ZT201
HOLE-VIA-20R10
ZT41235R126
OMIT
ZT831146R126
OMIT
ZT51146R126
OMIT
SH11
2
3SHLD-SM
OG-503040
CHGND1
SP6
1
SPKR_CLIP_P84SP1
1
SPKR_CLIP_P84SP3
1
SPKR_CLIP_P84SP5
1
SPKR_CLIP_P84SP2
1
SPKR_CLIP_P84
BS11
STDOFF-217ODX150IDX35H-TH
SP4
1
SPKR_CLIP_P84
ZT61235R126
OMIT
ZT161235R126OMIT CHGND6
CHGND2
ZT101255R158
OMIT
CHGND5
ZT771
HOLE-VIA-20R10
ZT301
HOLE-VIA-20R10
ZT281
HOLE-VIA-20R10
ZT371
HOLE-VIA-20R10
ZT391
HOLE-VIA-20R10
ZT401
HOLE-VIA-20R10
ZT271
HOLE-VIA-20R10
ZT361
HOLE-VIA-20R10
ZT381
HOLE-VIA-20R10
ZT21255R158
OMIT
ZT241HOLE-VIA-20R10
ZT811
HOLE-VIA-20R10
ZT341
HOLE-VIA-20R10
ZT331
HOLE-VIA-20R10
ZT431
HOLE-VIA-20R10
ZT461
HOLE-VIA-20R10
ZT501
HOLE-VIA-20R10
ZT351
HOLE-VIA-20R10
ZT441HOLE-VIA-20R10
ZT661
HOLE-VIA-20R10
ZT671
HOLE-VIA-20R10
ZT531
HOLE-VIA-20R10
ZT521
HOLE-VIA-20R10
ZT701
HOLE-VIA-20R10
ZT711
HOLE-VIA-20R10
ZT781
HOLE-VIA-20R10
ZT691
HOLE-VIA-20R10
ZT651
HOLE-VIA-20R10
ZT451
HOLE-VIA-20R10
ZT471
HOLE-VIA-20R10
ZT491
HOLE-VIA-20R10
ZT561
HOLE-VIA-20R10
ZT481
HOLE-VIA-20R10
ZT721HOLE-VIA-20R10ZT551
HOLE-VIA-20R10
ZT291
HOLE-VIA-20R10
ZT821
HOLE-VIA-20R10
ZT741
HOLE-VIA-20R10
ZT791
HOLE-VIA-20R10
ZT681
HOLE-VIA-20R10
ZT601
HOLE-VIA-20R10
ZT581
HOLE-VIA-20R10
ZT411
HOLE-VIA-20R10
ZT71
HOLE-VIA-20R10
ZT91
HOLE-VIA-20R10
ZT81
HOLE-VIA-20R10
ZT11
HOLE-VIA-20R10
ZT571
HOLE-VIA-20R10
ZT801
HOLE-VIA-20R10
ZT731
HOLE-VIA-20R10
4
051-66
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QACK*
TEA*
A10
MCP*
A23
A28A29
TRST*
PMON_OUT*
A7
SHD1*HIT*
SHD0*ARTRY*AACK*CI*WT*GBL*
TBST*
TS*
BG*BR*
GND
VDD
A1A2
A11
A5A4A3
A6
A8A9
A12
A22A21A20A19A18A17A16A15A14A13
A32A31A30
A27
A24A25
AP1
AP4
AP2AP3
AP0
A35A34A33
TT0
TT4
TSIZ1TSIZ2
TSIZ0
TT1TT2TT3
DTI3DTI2
TDITDOTMSTCK
A26
BMODE0*
PMON_IN*
BMODE1*
DTI1
A0
DTI0
LSSD_MODE*
TA*
L2_TSTCLKL1_TSTCLK
EXT_QUAL
CHKS*
DX*
SRW0*
IARTRY0*
SRW1*
(1 OF 3)
HRESET*SRESET*
TBENQREQ*
CKSTP_IN*CKSTP_OUT*
SYSCLK
INT*SMI*
PLL_CFG1
CLK_OUT
OVDD
PLL_CFG0
PLL_CFG3
DRDY*DBG*
PLL_CFG2
PLL_CFG4
BVSEL
AVDDOVDDSENSE
PG
EN
VIN
ADJ
VOUT
GND
TABLE_5_ITEM
DSIZE
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PRO
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PA
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSTHE INFORMATION CONTAINED HEREIN IS THE P
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A
B
C
D
APPLE COMPUTER INC.SCALE
NONE
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)TABLE_5_ITEM
CPU_VCORE DECOUPLING NETWORK CPU_OVDD DECOUPLING NETWORK
MPC7447 MAX
R2
PLCAE SHORT CLOSE TO CENTER OF CPU
POWER SUPPLY PAGE (PG 33)MORE 0805 10UF CAPS ON VCORE
NC
NC
NC
NC
NC
NC
NC
PLACE BELOW CPUIN FORMER L3 AREA
MPC7447 P
R1
VOUT = 0.59*(1+R1/R2)PLACE RXXX AND RXXX CLOSETO UXX PIN 5 AND 6
470OHM FOR BOOT BANGER
470OHM FOR BOOT BANGER
1
R1391 210K
5%1/16WMF402
R1071 210K
5%1/16WMF402
R591 2470
5%1/16WMF402
R971 210K
5%1/16WMF402
R1
1
R581 210K
5%1/16WMF402
R1
1
C391
210V0.1uF20%CERM402
C2031
2
0.1uF
CERM402
10V20%
C731
210V
402
20%0.1uF
CERM
C741
2402CERM10V20%0.1uF
C1941
2
0.1uF20%CERM402
10V
C401
2CERM10V20%0.1uF
402
C1911
2402CERM10V20%0.1uF
C1521
2402CERM10V20%0.1uF
C1381
2
0.1uF20%10VCERM402
C1131
2
0.1uF20%10VCERM402
C1041
2
0.1uF20%10VCERM402
C1151
2402CERM10V20%0.1uF
C381
2
0.1uF20%10VCERM402
C2241
2CERM
0.1uF20%10V
402
C481
2 CERM40210V20%0.1uF
C901
210VCERM402
20%0.1uF
C721
2
0.1uF20%CERM40210V
C1071
2402CERM10V20%0.1uF
R2061
2
1/16W5%
MF402
470C1141
2402CERM10V20%0.1uF
C1541
2
0.1uF20%10VCERM402
C911
2
0.1uF20%10VCERM402
C1681
2402CERM10V20%0.1uF
C2231
2402CERM10V20%0.1uF
C1121
2
0.1uF20%10VCERM402
R2411
2
4705%
1/16WMF402
R1
1
R1
1
R1481 210K
5%1/16W
402MF
1
C2510uF20%6.3VCERM805
C3461
2
10uF20%6.3VCERM805
C342
805CERM6.3V20%10uF
C81
2805CERM6.3V20%10uF
R1
R1091 210K
5%1/16WMF402
R1061 2
402
NO STUFF
10
MF1/16W1%
C3401
2805
10V20%2.2uF
CERM
C121
2
2.2uF20%10VCERM805
R731 210K
5%1/16WMF402
R721 210K
5%1/16WMF402
R7021 2
5%1/16WMF603
1_5V_MAXBUS
0
R6931 2
1_8V_MAXBUS
5%1/16WMF603
0
+1_5V_SLEEP
+1_8V_SLEEP
R1
4
1
C1031
2402CERM20%0.1uF10V
C1491
2
0.1uF20%10VCERM402
C1511
2
0.1uF10VCERM402
20%
C2021
2402CERM10V20%0.1uF
C1111
2
0.1uF20%10VCERM402
C1101
2
0.1uF20%10VCERM402
C2751
210V402CERM20%0.1uF
C2571
2402CERM10V20%0.1uF
C2731
220%0.1uF10VCERM402
C411
2
0.1uF20%10VCERM402
C2721
220%
402
10VCERM
0.1uF
C461
2
0.1uF20%10VCERM402
R1 1
51/M4R130
1 210K
5%1/16WMF402
R791 210K
5%1/16WMF402
R1 1
1
C1901
2402CERM10V20%0.1uF
C1501
2 CERM10V
402
20%0.1uF
C2011
210V
402CERM20%0.1uFC193
1
2
0.1uF20%10VCERM402
C1531
2
0.1uF20%10VCERM402
C3441
220%6.3VCERM
10uF
805
C1891
2
0.1uF20%10V
402CERM
C1051
2402CERM10V20%0.1uF
C1921
2 CERM
0.1uF20%10V
402
C471
2402CERM10V20%0.1UF
C1881
2
0.1UF20%10VCERM402
C1691
2402CERM10V20%0.1UF
C1701
2
0.1UF20%10VCERM402
C1551
2402CERM10V20%0.1UF
C1391
2
0.1UF10V20%CERM402
C921
2402CERM10V
0.1UF20%
C1061
2
0.1UF
402CERM10V20%
C1951
2
10UF20%6.3VCERM805
C3471
2805CERM6.3V20%10UF
C2581
2
10UF20%6.3VCERM805
C3451
2805CERM6.3V20%10UF
C1561
2805CERM6.3V20%10UF
C3411
2
10UF20%6.3VCERM805
C2251
2805CERM6.3V20%10UF
C3431
2
10UF20%6.3VCERM805
XW311 2
OMIT
SM
U43
E11H1
D12L3G4T2F4V1J4R2K5W2
C11
J2
K4N4J3M5P5N3T1V2U1
G3
N5W1B12C4G10B11
F10L2D11D1C10G2
R1
C1E3H6F5G7
N2
A8
M1
G9F8
D2 B7
A12
J1
A3B1
H2
M2R3G1K1P1N1
D10
A11
E2
B5
H9
H11
H13J6J8
J10
J12K7K3K9
C3
K11
K13L6L8
L10
L12M4M7M9
M11
D6
M13N7P3P9
P12R5
R14
R17T7
T10
D13
U3
U13
U17V5V8
V11
V15
E17F3
G17H4H7
B2
D8
B6
D4
G8B3
E8
C9
B4
M3N6P2P8P11
R4R13
R16
T6T9
C2
U2U12
U16
V4V7V10
V14
C12
D5F2H3J5K2L5
E18
G18
B8C8C7D7A7
D9A9
G5P4
E4H5
F9
A2
B10E10
A10
K6
E1
F11
C6
B9A4
L1
F1
A5
L4
G6F7E7
E5E6F6E9C5
H8
K12
K14
L7L9L11
L13
M8M10
M12
H10
H12
J7J9J11
J13
K8K10
D3
BGA
OMIT
APOLL7_PM-R1.1
1.50GHZ-1.28V
CRITICAL
U6
53
2
4
1 6
CRITICAL
SOT23-6FAN2558
C2831
2
2.2UF
CERM1
20%6.3V
603
C9091
26.3VCERM402
10%1UF
R2801 2
402MF
1/16W1%
10
R2761
2
01/10W603
5%
MF
R2821
2
118K
1/16W1%
MF402
R2831
2
100K1%
MF402
1/16W
+3V_SLEEP
D3512
NO STUFF
MBR0530
SM
R2751 2
1/16W
MF
05%
402
C9451
2
NO STUFF
0.1UFCERM
20%10V
402
C9461
250V10%
CERM
0.001UF
402
C1371
2
0.1uF20%10V
402CERM
C1361
2CERM
6.3V20%4.7UF
805
U431 CRITICAL3 37S 30 29 I C, A7 PM ,R 1. 3, 1.6 7G HZ ,1 .2 8V N O S TUF F
5
051-669
CRITICAL1 U433 37S 29 55 I C, A7 PM ,R 1. 2. 3, 1. 67 GH Z, 1. 28 V ?
CPU_PULLDOWN
CPU_SMI_L
CPU_HRESET_L
CPU_DTI
JTAG_CPU_TCK
JTAG_CPU_TMS
CPU_VCORE_SLEEP
MPIC_CPU_INT_L
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MILCPU_AVDD_VIN
CPU_AVDD_SHDN_L
CPU_SRESET_L
CPU_L1TSTCLK
VCORE_SHDN_L
JTAG_CPU_TCK
CPU_L2TSTCLK
CPU_SRWX_L
CPU_CHKSTP_OUT_L
JTAG_CPU_TDI
CPU_SMI_L
CPU_HRESET_L
CPU_PULLDOWN
CPU_EDTI
CPU_PULLUP
CPU_PMONIN_L
CPU_LSSD_MODE
CPU_SHD0_L
CPU_TBEN
CPU_SHD1_L
CPU_CHKS_L
MAXBUS_SLEEP
CPU_EMODE1_L
CPU_MCP_L
ADT7467_VCORE_MON
CPU_ADDR
CPU_PLL_CFG
CPU_PLL_CFG
CPU_DBG_L
CPU_PLL_CFG
CPU_DRDY_L
CPU_EDTI
CPU_DTI
JTAG_CPU_TDI
JTAG_CPU_TMS
CPU_TBEN
CPU_MCP_L
CPU_CHKSTP_OUT_L
CPU_ADDR
CPU_PLL_CFG
CPU_ADDR
CPU_ADDR
CPU_CHKS_L
CPU_PULLDOWN
CPU_ADDR
CPU_ADDR
CPU_PMONIN_L
CPU_EMODE0_L
JTAG_CPU_TDO_TP
CPU_ARTRY_L
CPU_SHD0_L
CPU_HIT_L
CPU_SHD1_L
CPU_BR_L
CPU_BG_L
CPU_TS_L
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_TT
CPU_TT
CPU_TT
CPU_TT
CPU_TBST_L
CPU_TT
CPU_TSIZ
CPU_TSIZ
CPU_TSIZ
CPU_WT_LCPU_GBL_L
CPU_CI_L
CPU_AACK_L
CPU_ADDR
CPU_QACK_L
CPU_TA_L
SYSCLK_CPU
CPU_PULLDOWN
CPU_EMODE1_L
CPU_CLKOUT_SPN
CPU_LSSD_MODE
JTAG_CPU_TRST_L
CPU_L2TSTCLK
CPU_L1TSTCLK
CPU_PULLUP
CPU_SRWX_L
CPU_PULLUP
CPU_TEA_L
CPU_SRESET_L
CPU_AVDD
MPIC_CPU_INT_L
CPU_QREQ_L
CPU_PLL_CFG
CPU_BUS_VSEL
CPU_DTI
CPU_AVDD_ADJ
CPU_AVDD_VOUT
CPU_VCORE_SLEEPMAXBUS_SLEEP
39
39
35
35
16
16
40
15
15
40
39
40
8
8
7
40
40
35
40
40
7
7
40
40
7
31
6
37
6
6
6
14
40
6
40
6
31
6
8
6
37
37
37
37
6
6
8
40
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
40
37
40
14
37
37
6
5
5
5
8
5
5
5
5
5
5
35
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
26
8
7
7
8
7
8
5
8
5
5
5
5
5
8
7
8
8
5
5
8
8
5
7
40
8
5
8
5
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
5
5
5
6
5
5
5
5
5
8
5
39
5
8
7
7
8
5
-
7/22/2019 PowerBook G4 17" Low-Res
6/45
D22
D3D2D1
D4D5D6D7D8D9D10
D11D12D13D14D15D16D17D18D19D20D21
D28D27
D23D24D25D26
D29
D32D31D30
D33D34D35D36D37D38D39D40D41D42D43D44
D48D47
D45D46
D49
D51D50
D52D53D54D55
D58D57D56
D59
DP6DP5DP4DP3DP2DP1DP0
DP7
D63D62D61D60
D0
(2 OF 3)
VDD
N/C_1
N/C_4
N/C_8
N/C_13
N/C_17
N/C_20
N/C_22N/C_23
N/C_31
N/C_39
N/C_30
N/C_33
N/C_35N/C_36
N/C_38
N/C_29N/C_28N/C_27
N/C_25N/C_24
N/C_21
N/C_19N/C_18
N/C_16N/C_15N/C_14
N/C_12N/C_11N/C_10N/C_9
N/C_7N/C_6N/C_5
N/C_3N/C_2
(3 OF 3)
N/C_26
N/C_32
N/C_34
N/C_37
SENSEVDD
GND
TEMP_CATHODE
TEMP_ANODE
SENSEGND
HPR*
Y
B
A
Y
B
A
SYM_VER2
WC*
VCC
VSS
SDASCL
NC1NC2NC3
VCC
RESET*
XTAL1
XTAL2
PB0
PD6PD5PD4PD3PD2PD1PD0
GND
PB1PB2PB3PB4PB5PB6PB7
REFERENCE DESIGNATOR(S)BOM OPTION
TABLE_5_HEAD
QTY DESCRIPTIONPART#
TABLE_5_ITEM
TABLE_5_ITEM
DSIZE
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PRO
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PA
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSTHE INFORMATION CONTAINED HEREIN IS THE P
12345678
12345678
A
B
C
D
APPLE COMPUTER INC.SCALE
NONE
INPUTS ARE 3V TOLERANT
INPUTS ARE 3V TOLERANT
BOOT BANGER E2PROM
NC
WILL DISABLE THE CONTROLLER
UNSTUFFING RA AND STUFFING RB
MPC7447/BBA
NC
BOOT BANGER470OHM FOR BOOT BANGER
NC
RB
RA
NC
NC
NC
NC
NC
NC
NC
NCNC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
BOOT BANGING SIGNAL DEFINITION2/ PMU_HRESET_L (3V INPUT INTO LMU)
5/ JTAG_CPU_TDI (OPEN COLLECTOR OUTPUT - 470OHM PULLUP ON MLB)
6/ JTAG_CPU_TRST_L (OPEN COLLECTOR OUTPUT - 470OHM PULLUP ON MLB)
4/ JTAG_CPU_TMS (OPEN COLLECTOR OUTPUT - 470OHM PULLUP ON MLB)
1/ BBANG_HRESET_L (OPEN COLLECTOR OUTPUT - 10K PULLUP ON MLB)
3/ BBANG_JTAG_TCK (REGULAR OUTPUT)
NC
NC
NC
NC
NC
CRITICAL
1.50GHZ-1.28V
OMIT
BGA
APOLL7_
PM-R
1.1
U43R15W15
T13P13U14W14R12T12W12V12N11N10
T14
R11U11W11T11R10N9P10U10R9W10
V16
U9V9W5U6T5U5W7R6P7V6
W16
P17R19V18
R18V19T19U19W19U18W17
T15
W18T16T18T17W3V17U4U8U7R7
U15
P6R8W8T8
P14V13W13
T3W4T4W9M6V3N8W6
40210K1%
MF1/16W
BBANG
R884
1
2
+3V_MAIN
+3V_MAIN
CERM
20%10V
BBANG
0.1UF
402
C6381
2402
BBANG
10K5%1/16WMF
R5321
2
MF
BBANG
5%10K1/16W
402
R5331
2
CRITICALOMIT
APOLL7_PM-R1.1
BGA1.50GHZ-1.28V
U43
A17A19B13B16B18E12E19F13F16F18G19H18J14L14M15M17M19
N14N16P15P19
A6
A14
C15D15E15F15G15H15J15K15L15C16
B14
D16
C17D17C18D18C19D19H16J16K16
C14
L16J17K17L17J18K18L18J19K19L19
D14E14F14G14A15B15
N13G12
N12G13
N18
N19
A13A16A18B17B19C13E13E16F12F17F19G11
G16H14H17H19M14M16M18N15N17P16P18
SN74AUC1G08SC70-5
BBANGU4
1
2
3
5
4
SN74AUC1G08
BBANG
SC70-5
U21
2
3
5
4
BBANG
10K5%
MF1/16W
402
R621
2
NO_BBANG
0
5%1/16WMF402
R61 2
BBANG
10K5%
1/16WMF402
R401
2
+3V_MAIN
MF
BBANG
1/16W5%
10K
402
R391
2
OMIT
SOI32KX8_M24256B
U32
1
2
3
6
5
8
4
7
5%
MF402
1/16W
10K
BBANG
R9061
2
10K5%
402MF1/16W
BBANG
R9041
2
NO STUFF
1/16WMF
10K5%
402
R9031
2
NO STUFF
5%10K1/16WMF402
R9051
2
NO STUFF
1/16WMF
10K5%
402
R9071
2
OMIT
ATTINY2313SOI
U61
10
12
13
14
15
16
17
18
19
2
3
6
7
8
9
11
1
20
5
4
402MF1/16W5%470
BBANG
R861
2
200
NO_BBANG
5%
402
1/16WMF
R851
2
SM
1/32W25V
10K5%
BBANG
RP6
1
2
3
4
6
7
8
9
402CERM
0.1UFBBANG
20%10V
C93812402
5%
BBANG
10K1/16W
MF
R8851
2
10K
NO STUFF
402
1/16W
MF5%
R886
1
2
10K
MF
1%
BBANG
1/16W402
R8821
2
U32341S1661 BBANG1 I2C EEPROM,PROGRAMMED W/ BANGER
MCU,PROGRAMMED W/ BANGER341S1660 U61 BBANG1
051-669
6
CPU_DATA
CPU_DATA
CPU_DATA
BB_EEPR_ADDR2
BB_EEPR_ADDR1
BB_EEPR_ADDR0INT_I2C_CLK0INT_I2C_DATA0
JTAG_CPU_TCK
BBANG_JTAG_TCK
BBANG_TCK_EN
MAXBUS_SLEEP
BBANG_HRESET_L
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_THERM_DP
CPU_THERM_DM
EEPROM_WP_PD
BB_SCK
BB_MISO
BB_MOSI
INT_I2C_DATA0
INT_I2C_CLK0
BBANG_HRESET_L
PMU_CPU_HRESET_L
JTAG_CPU_TDI
JTAG_CPU_TRST_L
JTAG_CPU_TMS
ICT_TRST_L
ESP_EN_L
BFR_TDO
TP_BB_XTAL
CPU_VCORE_SLEEP BB_RESET_L
BB_SCK
BB_MISO
BB_MOSI
BBANG_JTAG_TCK
ESP_EN_L
BFR_TDO
ICT_TRST_L
MAXBUS_SLEEP
JTAG_CPU_TRST_L
CPU_DATA
CPU_DATA
BBANG_JTAG_TCK
RESET_VREF
CPU_HRESE
MAXBUS_SLEEP
PMU_CPU_HRESET_L
5
5
5
6
6
6
7
7
6
6
8
6
6
8
11
11
15
11
11
5
15
13
13
16
13
13
5
35
5
16
8
37
37
23
23
5
35
6
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
37
8
8
8
8
8
8
8
8
8
8
8
23
23
6
6
5
6
5
39
6
8
8
35
6
37
8
8
40
40
40
6
39
40
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
8
37
37
37
37
37
37
37
37
37
37
37
26
26
6
6
6
40
40
40
31
40
40
40
6
6
6
40
6
6
6
6
6
6
6
40
37
37
6
39
31
-
7/22/2019 PowerBook G4 17" Low-Res
7/45
G
D
S
G
D
S
04
G
D S
G
D
S
G
D
S
DSIZE
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PRO
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PA
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSTHE INFORMATION CONTAINED HEREIN IS THE P
12345678
12345678
A
B
C
D
APPLE COMPUTER INC.SCALE
NONE
12.5X
13.0X13.5X
CPU PLL CONFIG CIRCUITRY
R00ER10ER01ER10DR00DR01DR10CR00CR01CR10BR00BR01BR10AR00AR01A+5V_SLEEP NOW REQUIRED FOR PLL_STOP_LPULLUP TO ENSURE THAT Vgs OF PASS
STATE ENCODING CPU_PLL_STOP_OC CPU_VCORE_HI_OC
SIGNALCPU_EMODE0_L(PROCESSOR)
CPU_BUS_VSEL(PROCESSOR)
CPU_HRESET_INVLOW
CPU_HRESET_LCPU_HRESET_L
HIGHTIED APPLICATION
60X BUS MODEMAX BUS MODE2.5V INTERFACE1.8V INTERFACE1.5V INTERFACE
(AT BUS FREQUENCY)
(MHZ)PLL OFF
PLL BYPASS
267333
500 400
533667
833 667
733917
1000 800
8671083
1167 933
10001250
1333 1067
11331417
1500 1200
1583 1267
1667 1333
1750 1400
1833 1467
1917 1533
2000
2083
21672250
2333
2500
2667
2833
3000
3333
3500
4000
4667
1600
1667
17331800
1867
2000
2133
2267
2400
2667
2800
3200
3733 1 111
1 011
1 010
1 001
1 001
1 000
1 110
1 000
1 110
0 1111 010
1 111
1 101
0 000
1 100
1 100
1 101
0 011
1 011
0 011
0 110
0 000
0 001
0 010
0 110
0 100
0 101
0 101
0 100
0 010
0 001
0 111
E ABCD4 0123
CPU_PL
STUFF PASS TRANSISTOR ONLY IFR10E, R01E, OR PULLUP STUFFED
NEED TO CHARACTERIZEINVERTER TO INVERT HRESET_LDESKTOP HAD PROBLEM USING
INVERTED HRESET_L
MAXBUS VSEL
1.5V INTERFACE
1.8V INTERFACE
CPU CONFIGURATION
BUSTYPE SELECT
APOLLO ONLY SUPPORTS MAXBUS
(Bus-to-Core)
MULTIPLIER133MHZ167MHZ
CORE FREQUENCY
APOLLO 7
CPU FREQUENCY CONFIGURA
PLL DISABLE 1 XHIGH SPEED 0 1LOW SPEED 0 0
0.0X1.0X2.0X3.0X4.0X5.0X5.5X6.0X6.5X7.0X7.5X8.0X8.5X9.0X9.5X10.0X10.5X11.0X11.5X12.0X
14.0X15.0X16.0X17.0X
20.0X21.0X24.0X28.0X
18.0X
CPU CONFIGURA
TRANSISTOR ON CPU_PLL_CFG IS MET.
402MF1/16W5%0R231
2
05%1/16WMF402
NO STUFF
R161
2
10K5%1/16WMF402
R91
2
10K5%1/16WMF402
R101
2
10K5%1/16WMF402
R111
2
5%1/16WMF402
10KR121
2
47K5%
402
1/16WMF
R31
2
10K5%1/16WMF402
R481
2
82K5%
1/16WMF
402
R331
2
05%1/16WMF402
NO STUFF
R181
2
05%1/16W
402
NO STUFF
MF
R171
2
10K5%1/16WMF402
R21
2
2N7002DWSOT-363
Q23
5
4
SOT-3632N7002DWQ2
6
2
1
SC70-5
1_5V_MAXBUS
CRITICAL
SN74AUC1G04U1
2
3
5
4
402MF1/16W5%0
NO STUFFR271
2
2N7002DWSOT-363
Q1
6
2
1
2N7002DWSOT-363
Q13
5
4
+5V_SLEEP
1_5V_MAXBUS
22
5%1/16WMF402
R421
402MF
1/16W5%
22R149
21
1_8V_MAXBUS
105%
1/16WMF402
R51
2
2N7002SM
Q3
3
1
2
2N3904SM
Q413
2
249K
1%1/16WMF402
R471 2
05%1/16WMF402
NO STUFF
R191
2
+3V_SLEEP
402MF1/16W5%0
NO STUFF
R201
2
01/16W5%
MF402
NO STUFF
R211
2
05%1/16WMF402
NO STUFF
R221
2
05%1/16WMF402
NO STUFF
R241
2
05%1/16WMF402
NO STUFF
R251
2 402
MF1/16W5%0
NO STUFF
R261
2
05%1/16WMF402
NO STUFF
R141
2
01/16W5%
MF402
NO STUFF
R131
2 402
MF1/16W5%0R151
2
051-66
7
CPU_PLL_CFG
CPU_PLL_CFG
CPU_PLL_FS00
PLL_STOP_L
CPU_EMODE0_LCPU_HRESET_L
C PU _HR ES ET _L CP U_ HR ES ET _I NV
MAXBUS_SLEEP
CPU_BUS_VSEL
CPU_PLL_STOP_OC
CPU_PLL_STOP_OC
CPU_PLL_STOP_BASE
CPU_VCORE_HI_OC
PLL_STOP_L
CPU_PLL_CFG
MAXBUS_SLEEP
CPU_PLL_FS10
CPU_PLL_CFG
CPU_PLL_CFG
CPU_PLL_FS01
CPU_PLL_CFGEXT
5
5
6
6
7
7
8
8
5
5
15
15
6
6
16
16
7
7
35
7
7
31
35
5
5
7
540
40
39
5
31
31
35
7
5
39
5
5
-
7/22/2019 PowerBook G4 17" Low-Res
8/45
(PLL6)VSSA_7
(PLL6)VDD15A_7
D_42
D_41
D_40
D_39
D_38
D_44
D_43
D_45D_46
D_47
D_48
D_52
D_51
D_50
D_49
D_53
D_55
D_54
D_56
D_57
D_58
D_60
D_59
D_62
D_61
D_63
DBG
DRDY
DTI_0
TEA
TA
DTI_2
DTI_1
D_1
D_0
D_2
D_6
D_5
D_4
D_3
D_7
D_11
D_10
D_9
D_8
D_12
D_14
D_13
D_15
D_16
D_17
D_22
D_21
D_20
D_19
D_18
D_23
D_24
D_25
D_26
D_27
D_32
D_31
D_30
D_29
D_28
D_34
D_33
D_35
D_36
D_37
BR
(1 OF 9)
MAXBUS
INTERFACE
TS
BG
A_0
A_1
A_2
A_3
A_4
A_5
A_9
A_6
A_7A_8
A_10
A_14
A_13
A_12
A_11
A_20
A_16
A_17
A_18
A_19
A_15
A_27
A_22
A_21
A_30
A_29
A_28
A_26
A_25
A_24
A_23
TT_2
TT_1
TT_0
A_31
TBST
TSIZ_0
TSIZ_1
TSIZ_2
CI
GBL
TT_4
AACK
QREQ
ARTRY
TT_3
WT
HIT
ANALYZER_CLK
SUSPENDACK
SUSPENDREQ
QACK
STOPCPUCLK
CPU_FB_OUT
CPU_FB_IN
CPU_CLK
TBEN
ACS_REF
DSIZE
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PRO
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PA
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSTHE INFORMATION CONTAINED HEREIN IS THE P
12345678
12345678
A
B
C
D
APPLE COMPUTER INC.SCALE
NONE
IT CANNOT BE CHANGED BY SOFTWARE
Intrepid M
THE FOLLOWING STRAP BITS CAN BE
3/ D44 - PLL4MODESEL_NXT - SLEEP/WAKE CYCLE REQUIRED
011: 33.3 ohm
TI
1394b
workaround
0:
Normal
1394b
1:
TI
PHY
workaround
SelPLL4ExtSrc
0:
PLL5
1:
External
source
INTREPID OUTPUTS HIGH BY DEFAULT
0:
Max
Bus
(G4
)
Pr
ocessor
Bus
Mode
1:
60x
bus
(G3)
Fir
eWir
e
PHY
in
terf
ace
0:
Legacy
in
terf
ace
1:
B-m
ode
in
terf
ace
PCI1
_RE
Q0_L
/
PCI1
_GNT
0_L
0:
RE
Q/GNT
1:
GPI
Os
PCI1
_RE
Q2
_L
/
PCI1
_GNT2
_L
0:
RE
Q/GNT
1:
GPI
Os
1:
GPI
Os
PCI1_REQ1_L
/
PCI1_GNT1_
L
0:
RE
Q/GNT
Spare
Spare
Spare
BIT 56 TO 63
INTREPID BOOT STRAPS
MAXBUS PULL-UPSIF A STRAP IS NOT LISTED, THEN
6/ D33 - ANALYZERCLK_EN_H - IMMEDIATE EFFECT5/ D42 - PLL4MODESEL_NXT - SLEEP/WAKE CYCLE REQUIRED4/ D43 - PLL4MODESEL_NXT - SLEEP/WAKE CYCLE REQUIRED
2/ D46 - SELPCI1SPREADCLK - SLEEP/WAKE CYCLE REQUIRED1/ D47 - SELAGPSPREADCLK - SLEEP/WAKE CYCLE REQUIREDCHANGED BY SOFTWARE:
INPUT
NO BUS KEEPER
NO BUS KEEPER - PU
NO BUS KEEPER - PU
INPUT - PU
INPUT - PD
NO BUS KEEPER - ?
Vin = Intrepid Vcore (1.5V)Vout = MaxBus rail (1.8V)
NO BUS KEEPER - PU
INPUT - PU
NO BUS KEEPER - PU
NO BUS KEEPER - ?
NO BUS KEEPER - ?NO BUS KEEPER - ?
NO BUS KEEPER - PU
FB BUFFER HAS 50 OHM OUTPUT IMPEDANCE
NO BUS KEEPER - PU
SHORT = 1" SHORTER THAN MATCHED LENGTHBUF
_REF
_CLK
_OUTEn
abl
e_h
1:
Active
0:
Inactive
Spare
000: 200 ohm100: 200 ohm010: 100 ohm110: 66.6 ohm001: 50 ohm101: 40 ohm
111: 28.6 ohmMaxBus output impedance
BIT2 BIT1 BIT0Spare
BIT 48 TO 55
MODE C (2.0X) IS FOR CLOCK SLEW OPERATIONMODE A (2.5X) IS FOR STATIC OPERATION
PCI0
Source
Clock
1:
PLL4
0:
PLL5
(NO
SPREAD)
PCI1
Source
Clock
1:
PLL4
0:
PLL5
(NO
SPREAD)
InternalSpreadEn
0:
Inactive
1:
Active
Spare
Spare
100: 83.20MHZ011: 99.84MHZ (1.5X)010: 133.12MHZ (2.0X)001: 149.76MHZ000: 166.4MHZ (2.5X)PLL4MODESEL_NXT[2:0]
BIT0BIT2 BIT1
BIT 40 TO 47
Spare
Spare
Spare
Spare
Ex
tPLL
_SDwn
_P
ol
0:
Acti
ve
hi
gh
1:
Acti
ve
low
DDR
_TP
DEn
_P
ol
0:
Acti
ve
hi
gh
1:
Acti
ve
low
An
al
yz
er
Clk
_En
_h
0:
In
acti
ve
1:
Acti
ve
DDR
_TP
DM
odeEn
abl
e_h
0:
TDI
in
put
(JTA
G)
1:
TDI
output
INTREPID BOOT STRAPS
LONG = 1" LONGER THAN MATCHED LENGTH
BIT 32 TO 39
NO BUS KEEPER
R1371
2402MF
1/16W1%1K
C308 1
2CERM6.3V20%
0.22UF
402
R2271 2
5%
MF402
1/16W
4.7
R1441 2
0
5%1/16WMF402
RP242 7
SM11/16W5%
10K
R16712
4021/16WMF
5%
0
R1971
2402MF
1%1/16W
511
R1781
2
NO STUFF
402MF
1/16W
10K5%
R1791
2
NO STUFF
402MF
1/16W5%
10KR6511
2
NO STUFF
402MF
1/16W5%
10KR1661
2
NO STUFF
402MF
1/16W5%
10KR1531
2402MF
1/16W5%
10KR1231
2
NO STUFF
402MF
1/16W
10K5%
R1351
2
NO STUFF
402MF
1/16W5%
10K
R6741
2402MF1/16W
5%10K
R1431
2
10K5%
1/16WMF402
R6731
2MF402
1/16W5%
10KR6641
2
10K5%
1/16WMF402
R6571
2
NO STUFF
402MF1/16W
5%10K
R6391
2402
1/16WMF
5%10K
R6431
2
10K5%
1/16WMF402
R6421
2
NO STUFF
402MF
1/16W5%
10K
R1361
2402
1/16W
MF
5%10K
R1651
2
INT_CLK
402MF
1/16W5%
10KR1771
2
INT_CLK
402MF
5%1/16W
10KR1521
2
INT_CLK
402MF
1/16W5%
10KR1841
2
NO STUFF
402MF
1/16W5%
10KR1341
2
EXT_CLK
10K5%
1/16WMF402
R1641
2
NO STUFF
402MF
1/16W5%
10KR1421
2
NO STUFF
402MF
1/16W5%
10KR1221
2
NO STUFF
402MF
1/16W5%
10K
R6661
2
EXT_CLK
10K5%
1/16WMF
402
R6581
2
EXT_CLK
402
MF1/16W
5%10K
R6751
2
EXT_CLK
10K5%
1/16WMF
402
R6831
2402
MF1/16W
5%10K
R6441
2
INT_CLK
10K5%
1/16WMF
402
R6651
2402
MF1/16W
5%10K
R6521
2
10K5%
1/16WMF402
R6401
2402
MF
5%1/16W
10K
R1761
2
NO STUFF
402MF
1/16W5%
10KR1411
2
NO STUFF
402MF
1/16W5%
10KR1831
2
10K5%
1/16WMF402
R1621
2
NO STUFF
402MF
1/16W5%
10KR1511
2
NO STUFF
402MF
1/16W5%
10KR1631
2402MF
5%1/16W
10KR1211
2
EXT_CLK
402MF
1/16W5%
10K
R6761
2
10K5%1/16WMF402
R6841
2
NO STUFF
402MF
1/16W5%10K
R6531
2402MF
1/16W5%10K
R6671
2
10K5%1/16WMF402
R6591
2402
1/16WMF5%10K
R6681
2
NO STUFF
10K5%1/16WMF
402
R6411
2
INT_CLK
402MF
1/16W5%10K
R1331
2
EXT_CLK
MF402
1/16W5%
10K
R6451
2
INT_CLK
402MF
1/16W5%10K
R1821
2
NO STUFF
10K5%
1/16W
MF402
R1741
2402MF
5%1/16W
10KR1501
2
NO STUFF
402MF
5%1/16W
10KR1311
2
NO STUFF
10K5%
1/16W
MF402
R1321
2
NO STUFF
402MF
1/16W5%
10KR1751
2
NO STUFF
10K5%
1/16W
MF402
R1611
2
NO STUFF
402MF
1/16W5%
10KR1401
2
NO STUFF
402MF
1/16W5%
10K
R6851
2402MF
1/16W5%
10KR6601
2402MF
1/16W5%
10KR6781
2
NO STUFF
10K5%
1/16WMF402
R6471
2
1/16W
10K5%
MF402
R6461
2402MF
1/16W5%
10KR6771
2402MF
1/16W5%
10KR6691
2402MF
1/16W5%
10KR6541
2402MF
1/16W5%
10K
U45
B29
H13
G8
H23
D24D25
J22B25H22G22D22B24B23E22J21G21
A27
E21A24D21
A23H20B22H21
A22E20B21
E24
D20A21
G23B26
A26
D23A25E23
E26E29
G26
J15
J24H16 A30
G28
K25D29B30
D10G12
B10J13
A10D12
E13G13B11D13
A11G14
E11
H14E14B12G15B13H15D14B14
A12G16
H11
E15J16D15
A14A13D16E16G17B15H17
B9
A15B16E17
A16J18
H18D17G18
A17B17
B8
E18B18D18
A18A19H19B19J19
A20D19
A9
E19G19B20G20
A8E12D11
A29
B31
G27
A32
AH9
AM8AK9
E27
A31
A28
E28
B27
G24H24D26
E25G25B28D27J25
H26
H25
D28
CRITICAL
BGA
INTREPID-REV2.1
OMIT
R2251
2
05%
1/16WMF402
NO STUFF
R2151 2
402MF
1/16W5%
0
R2081
2
05%
1/16WMF402
R2071 2
402MF
1/16W5%
0
NO STUFF
R2261 2
402MF
1/16W5%
0 R196
1 2
402MF
1/16W5%
0
NO STUFF
RP243 6
SM11/16W5%
10K
RP231 8
SM11/16W5%
10K
RP234 5
SM11/16W5%
10K
RP232 7
SM1
5%1/16W
10K
RP212 7
SM11/16W5%
10K
RP211 8
SM11/16W5%
10K
RP213 6
SM11/16W5%
10K
RP214 5
SM11/16W5%
10K
RP244 5
SM11/16W5%
10K
RP233 6
SM11/16W5%
10K
8051-66
CPU_ADDR
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_ADDR
CPU_ADDR
CPU_DATA
CPU_DATA
MAXBUS_SLEEP
CPU_DATA
CPU_DATA
MAXBUS_SLEEP
CPU_CI_L
CPU_ADDR
CPU_ADDR
CPU_DATA
CPU_DATA
CPU_GBL_L
+1_5V_INTREPID_PLL7
INTREPID_ACS_REF
CPU_TBEN
CPU_CLK_EN
SYSCLK_LA_TP
INT_CPUFB_OUT
INT_SUSPEND_ACK_L
INT_SUSPEND_REQ_L
CPU_QACK_L
CPU_QREQ_L
CPU_ARTRY_L
CPU_HIT_L
CPU_AACK_L
CPU_WT_L
CPU_TT
CPU_TT
CPU_TT
CPU_TT
CPU_TT
CPU_TBST_L
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_TS_L
CPU_BG_L
CPU_BR_L CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATACPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DBG_L
CPU_DRDY_L
CPU_DTI
CPU_DTI
CPU_DTI
CPU_TA_L
CPU_TEA_L
+1_5V_INTREPID_PLL
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
CPU_DATA
INT_CPUFB_IN
INT_CPUFB_OUT_NORM
INT_CPUFB_IN_NORM
INT_CPUFB_LONG
CPU_DATA
CPU_DATA
CPU_DATA
MAXBUS_SLEEP
CPU_DATA
CPU_DATA
CPU_DATA
CPU_BR_L
CPU_ARTRY_L
CPU_DRDY_L
CPU_HIT_L
CPU_AACK_L
CPU_TEA_L
CPU_DBG_L
CPU_BG_L
MAXBUS_SLEEP
INT_CPUFB_IN
SYSCLK_CPU_UFSYSCLK_CPU
INT_CPUFB_OUT INT_CPUFB_OUT_SHORT
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_ADDR
CPU_TS_L
CPU_TA_L
CPU_QREQ_L
CPU_DATA
CPU_TSIZ
CPU_TSIZ
CPU_TSIZ
CPU_DATA
MAXBUS_SLEEP
CPU_DATA
CPU_DATA
CPU_DATACPU_DATA
CPU_DATACPU_DATACPU_DATA
CPU_ADDR
CPU_ADDR
39
39
39
39
35
35
35
35
16
16
16
16
15
15
15
15
8
8
8
8
37
37
37
37
37
37
7
37
37
7
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
39
37
37
37
37
37
37
37
37
37
37
37
7
37
37
37
37
37
37
37
37
37
37
37
7
37
37
37
37
37
7
37
37
37
37
37
37
37
37
8
8
8
37
37
8
37
37
8
8
6
8
8
6
37
37
37
8
8
37
37
37
8
8
8
8
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
8
8
837
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
37
37
37
8
8
14
8
8
8
8
8
8
8
8
37
8
8
8
6
8
8
8
8
8
8
8
8
8
8
8
6
37
37
37
37
37
37
37
8
8
8
8
37
37
37
8
6
8
8
8
8
8
8
8
37
37
5
6
6
6
6
6
6
5
5
6
6
5
6
6
5
5
5
5
6
6
5
39
5
31
8
31
31
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
56
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
5
5
5
5
5
5
5
12
6
6
6
6
6
6
6
6
8
37
37
37
6
6
6
5
6
6
6
5
5
5
5
5
5
5
5
5
8
375
8 37
5
5
5
5
5
5
5
6
5
5
5
6
5
6
6
6
6
6
6
6
5
5
-
7/22/2019 PowerBook G4 17" Low-Res
9/45
A0A1
A6
A2A3A4A5
A9A8A7
A10A11A12A13A14A15A16
A20
A17A18A19
CEOEWEWP
PWD GND
DQ0DQ1
DQ6DQ5
DQ2DQ3DQ4
DQ7
VPP VCC
FEPR-1MX8
(2 OF 9)
DDR_VREF_1
DDR_VREF_0
DDR_DATA_0
DDR_DATA_1
DDR_DATA_2
DDR_DATA_3
DDR_DATA_4
DDR_DATA_5
DDR_DATA_6
DDR_DATA_7
DDR_DATA_8
DDR_DATA_9
DDR_DATA_10
DDR_DATA_11
DDR_DATA_12
DDR_DATA_13
DDR_DATA_14
DDR_DATA_15DDR_DATA_16
DDR_DATA_17
DDR_DATA_18
DDR_DATA_19
DDR_DATA_20
DDR_DATA_21
DDR_DATA_25
DDR_DATA_26
DDR_DATA_27
DDR_DATA_28
DDR_DATA_29
DDR_DATA_30
DDR_DATA_33
DDR_DATA_34
DDR_DATA_35
DDR_DATA_36
DDR_DATA_37
DDR_DATA_38
DDR_DATA_39
DDR_DATA_40
DDR_DATA_41
DDR_DATA_42
DDR_DATA_43
DDR_DATA_44
DDR_DATA_45
DDR_DATA_46DDR_DATA_47
DDR_DATA_48
DDR_DATA_49
DDR_DATA_50
DDR_DATA_51
DDR_DATA_52
DDR_DATA_53
DDR_DATA_54
DDR_DATA_55
DDR_DATA_56
DDR_DATA_57
DDR_DATA_58
DDR_DATA_59
DDR_DATA_60
DDR_DATA_61
DDR_DATA_62
DDR_DATA_63
DDR_DATA_22
DDR_DATA_23
DDR_DATA_24
DDR_DATA_31
DDR_DATA_32
DDR_BA_0
DDR_BA_1
DDRCS_3
DDRCS_2
DDRCS_1DDRCS_0
DDR_DQS_7
DDR_DQS_6
DDR_DQS_5
DDR_DQS_4
DDR_DQS_3
DDR_DQS_2
DDR_DQS_1
DDR_DQS_0
DDR_DM_7
DDR_DM_6
DDR_DM_5
DDR_DM_4
DDR_DM_3
DDR_DM_2
DDR_DM_1
DDR_DM_0
DDRRAS
DDRCAS
DDRWE
DDRCKE0
DDRCKE1
DDRCKE2
DDRCKE3
DDR_MCLK_0_P
DDR_MCLK_0_N
DDR_MCLK_1_P
DDR_MCLK_1_N
DDR_MCLK_2_P
DDR_MCLK_2_N
DDR_MCLK_3_P
DDR_MCLK_3_N
DDR_MCLK_4_P
DDR_MCLK_4_N
DDR_MCLK_5_P
DDR_MCLK_5_N
DDR_REF
DDR_SELHI_0
DDR_SELHI_1
DDR_SELLO_0DDR_SELLO_1
MEMORYDDR
INTERFACE
DDR_A_10
DDR_A_11
DDR_A_12
DDR_A_9
DDR_A_8
DDR_A_7
DDR_A_6
DDR_A_5
DDR_A_4
DDR_A_3
DDR_A_2
DDR_A_1
DDR_A_0
TABLE_5_ITEM
CRITICAL BOM OPTION
TABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)
DSIZE
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PRO
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PA
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSTHE INFORMATION CONTAINED HEREIN IS THE P
12345678
12345678
A
B
C
D
APPLE COMPUTER INC.SCALE
NONE
SERIES RESISTORS FOR CLOCK/CONTROL SIGNALS
PINS ARE SWAPABLE FOR RPAKS
0 & 1 GO TO SLOT A
CKE
INT - DDR/B
INTERCEPTS ROM CHIP SELECT
MEM_VREF
CNTL
BA
ADDR
CS
CLOCKS
0 & 1 GO TO SLOT A
1MB BOOT ROM
2.5V I/O SHUTS OFF
PULL-DOWN RESISTORS TO ENSURECKE STAYS LOW AFTER INTREPID
2 & 3 GO TO SLOT B
1S ARE SAME POLARITY (ACTIVE-HI)0S ARE SAME POLARITY (ACTIVE-LO)
2 & 3 GO TO SLOT B
OVERRIDE ROM MODULE
R3871
2
10K5%
1/16WMF402
R2381 2
22
5%
402MF
1/16W
R1991
2402MF1/16W1%1K
R1981
2
10K1%1/16WMF402
C245 1
2402CERM10V20%
0.1UFR1911
2
10K1%
1/16WMF402
U17
21
20
36
6
5
4
3
2
1
40
13
37
19
38
18
17
16
15
14
8
7
22
25
26
27
28
32
33
34
35
23 39
24
10
30 3111
9
12
3.3VTSOP
OMIT
C4601
220%10VCERM805
2.2UFC4701
2402CERM10V20%0.1UF
C4791
2
0.1UF20%10VCERM402
R3861
2402MF
1/16W5%
10K
+3V_MAIN
U45
H32
AN35AM35AM36AL36
AN34AN36AL35AL33
L29
K30
H35G35
G33H33D35
G36F36F35E35E36G32D36H36
L30M29
AK32AK33
AH35AG36AH36AH32AG32
AG31AE32AF35AF36AE36
AK31
AE35AE33AD36AD35AA36AA35AA33AB36AB35AC36
AK35
AA32AB33V36U33U32V35T30U36U35T36
AK36
P33R30P35P36R36R35R33R32N35M36
AJ32
L35M35M33L36N33M30J32J33J35K32
AJ35
K33J36K36K35
AJ36AG33AG35
AJ33AH33AD33AC35T35T33N32L33
AJ31AH31AD32AB30V30P32N29L32
Y33Y32
Y36Y35
W30Y30
W33W32
V32V33
W36W35
AA22
AB32AE29N30T32
Y22T22
BGA
CRITICAL
INTREPID-REV2.1
OMIT
R3381
2
10K5%
1/16WMF402
R3571 2
1K
5%
402MF
1/16W
RP334 5
22
5%1/16WSM1
RP333 6
22
5%1/16WSM1
RP341 8
22
5%1/16WSM1
RP342 7
22
5%1/16WSM1 RP33
2 722
5%1/16WSM1
RP343 6
SM1
22
5%1/16W
R2501 2
22
5%1/16W
MF402
RP331 8
22
5%1/16WSM1
RP344 5
22
5%
1/16WSM1 RP361 8225%
1/16WSM1
RP354 5
22
5%
SM11/16W
RP363 6
22
5%1/16WSM1
RP362 7
22
5%1/16WSM1
RP364 5
22
5%1/16WSM1
RP352 7
22
5%1/16WSM1
RP351 8
22
5%1/16WSM1
RP353 6
22
5%1/16WSM1 RP31
1 822
5%1/16WSM1
RP251 8
22
5%1/16WSM1
RP252 7
22
5%1/16WSM1
RP253 6
22
5%1/16WSM1
RP254 5
22
5%1/16WSM1
RP301 8
5%1/16WSM1
22
RP302 7
22
5%1/16WSM1
RP313 6
22
5%1/16WSM1
RP304 5
22
5%1/16WSM1
RP314 5
22
5%1/16WSM1
RP312 7
22
5%
SM11/16W
RP264 5
22
5%1/16WSM1 RP30
3 622
5%
1/16WSM1
RP26
1 822
5%1/16WSM1
RP262 722
5%1/16WSM1
RP263 6
22
5%1/16WSM1
+3V_MAIN
R5001
2
10K5%
1/16WMF402
R4391
2
10K5%
1/16WMF402
R4091
2
10K5%
1/16WMF402
?341S1556 U17 CRITICALIC,BOOTROM,Q41B1
9
051-66
SYSCLK_DDRCLK_B1_L
SYSCLK_DDRCLK_A0_UF
PCI_AD
PCI_AD
PCI_AD
PCI_AD
PCI_AD
PCI_AD
PCI_AD
PCI_AD
PCI_AD
RAM_CKE
ROM_WP_L
ROM_ONBOARD_CS_LROM_CS_L
INT_RESET_L
ROM_RW_L
ROM_OE_L
PCI_AD
PCI_AD
PCI_AD
PCI_AD
PCI_AD
PCI_AD
PCI_AD
PCI_AD
PCI_AD
PCI_AD
PCI_AD
PCI_AD
PCI_AD
PCI_AD
PCI_AD
PCI_AD
PCI_AD
PCI_AD
PCI_AD
PCI_AD
INT_MEM_REF_H
INT_MEM_VREF
INT_DDRCLK2_N_TP
INT_DDRCLK2_P_TP
INT_DDRCLK5_P_TP
SYSCLK_DDRCLK_B0_UF
SYSCLK_DDRCLK_B0_L_UF
SYSCLK_DDRCLK_B1_UF
SYSCLK_DDRCLK_B1_L_UF
SYSCLK_DDRCLK_A0_L_UF
SYSCLK_DDRCLK_A0_UF
SYSCLK_DDRCLK_A1_UF
SYSCLK_DDRCLK_A1_L_UF
INT_DDRCLK5_N_TP
MEM_MUXSEL_L
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_BA
MEM_CS_L
MEM_CS_L
MEM_DQS
MEM_DQS
MEM_DQS
MEM_DQM
MEM_DQM
MEM_DQM
MEM_DQM
MEM_DQM
MEM_DQM
MEM_DQM
MEM_DQM
MEM_RAS_L
MEM_CAS_L
MEM_WE_L
MEM_CKE
MEM_CKE
MEM_CKE
MEM_CKE
MEM_MUXSEL_H
MEM_MUXSEL_H
MEM_MUXSEL_L
MEM_ADDR
MEM_ADDR
MEM_ADDR
MEM_ADDR
MEM_ADDR
MEM_ADDR
MEM_ADDR
MEM_ADDR
MEM_ADDR
MEM_ADDR
INT_MEM_VREF
SYSCLK_DDRCLK_A1
SYSCLK_DDRCLK_A0
SYSCLK_DDRCLK_A1_L_UF SYSCLK_DDRCLK_A1_L
SYSCLK_DDRCLK_B1
SYSCLK_DDRCLK_B0
RAM_CS_L
SYSCLK_DDRCLK_A0_L
SYSCLK_DDRCLK_B0_L_UF SYSCLK_DDRCLK_B0_L
MEM_CS_L RAM_CS_L
MEM_CS_L RAM_CS_L
MEM_CKE
MEM_CKE RAM_CKE
MEM_CS_L RAM_CS_L
MEM_CKE RAM_CKE
MEM_CKE RAM_CKE
MEM_ADDR RAM_ADDR
MEM_ADDR RAM_ADDR
MEM_ADDR RAM_ADDR
MEM_ADDR
MEM_ADDR RAM_ADDR
MEM_ADDR RAM_ADDR
MEM_ADDR RAM_ADDR
MEM_ADDR RAM_ADDR
MEM_ADDR RAM_ADDR
MEM_ADDR RAM_ADDR
MEM_ADDR RAM_ADDR
MEM_ADDR RAM_ADDR
MEM_ADDR RAM_ADDR
MEM_BA RAM_BA
MEM_BA RAM_BA
RAM_CAS_LMEM_CAS_L
MEM_WE_L RAM_WE_L
RAM_RAS_LMEM_RAS_L
+2_5V_INTREPID
RAM_CKE
RAM_CKE
RAM_CKE
SYSCLK_DDRCLK_B1_L_UF
SYSCLK_DDRCLK_B1_UF
SYSCLK_DDRCLK_A0_L_UFMEM_ADDR
MEM_CS_L
MEM_DQS
MEM_DQS
MEM_DQS
MEM_DQS
MEM_DQS
MEM_BA
MEM_ADDRMEM_DATA
MEM_DATA
MEM_ADDR
MEM_CS_L
SYSCLK_DDRCLK_B0_UF
RAM_ADDR
MEM_CS_L
SYSCLK_DDRCLK_A1_UF
RAM_CKE
MEM_DATA
MEM_DATA
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
39
25
25
25
25
25
25
25
25
25
37
40
40
40
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
37
37
37
16
37
37
37
37
37
37
17
17
17
17
17
17
17
17
17
11
4025
31
25
25
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
39
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
39
37
37
37 37
37
37
37
37
37 37
37 37
37 37
37
37 11
37 37
37 11
37 11
37 37
37 37
37 37
37
37 37
37 37
37 37
37 37
37 37
37 37
37 37
37 37
37 37
37 37
37 37
3737
37 37
3737
15
11
11
11
37
37
37
37
37
37
37
37
37
37
37
3737
37
37
37
37
37
37
37
11
37
37
11
9
12
12
12
12
12
12
12
12
12
9
2512
13
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
39
9
9
9
9
9
9
9
9
9
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
9
9
9
10
10
10
10
10
10
10
10
10
10
10
9
9
9
9
9
9
9
10
10
10
9
9
9
9
9
9
9
9
9
9
9
11
11
9 11
11
11
11
11
9 11
9 11
9 11
9
9 9
9 11
9 9
9 9
9 11
9 11
9 11
9
9 11
9 11
9 11
9 11
9 11
9 11
9 11
9 11
9 11
9 11
9 11
119
9 11
119
10
9
9
9
9
9
9
9
9
10
10
10
10
10
9
910
10
9
9
9
11
9
9
9
10
10
-
7/22/2019 PowerBook G4 17" Low-Res
10/45
GND
DA10 SEL
DH19
DH18
DH17
DH16
DH15
DH14
DH13
DH12
DH11
DH10
DH9
DH8
DH7
DH6
DH5
DH4
DH3
DH2
DH1
DH0
DA19
DA18
DA17
DA16
DA15
DA14
DA13
DA12
DA11DB0*
DA9
DA8
DA7
DA6
DA5
DA4
DA3
DA2
DA1
DA0
DB19*
DB18*
DB17*
DB16*
DB15*
DB14*
DB13*
DB12*
DB11*
DB10*
DB9*
DB8*
DB7*
DB6*
DB5*
DB4*
DB3*
DB2*
DB1*
VDD
GND
DA10 SEL
DH19
DH18
DH17
DH16
DH15
DH14
DH13
DH12
DH11
DH10
DH9
DH8
DH7
DH6
DH5
DH4
DH3
DH2
DH1
DH0
DA19
DA18
DA17
DA16
DA15
DA14DA13
DA12
DA11DB0*
DA9
DA8
DA7
DA6
DA5
DA4
DA3
DA2
DA1
DA0
DB19*
DB18*
DB17*
DB16*
DB15*
DB14*
DB13*
DB12*
DB11*
DB10*
DB9*
DB8*
DB7*
DB6*
DB5*
DB4*
DB3*DB2*
DB1*
VDD
GND
DA10 SEL
DH19
DH18
DH17
DH16
DH15
DH14
DH13
DH12
DH11
DH10
DH9
DH8
DH7
DH6
DH5
DH4
DH3
DH2
DH1
DH0
DA19
DA18
DA17
DA16
DA15
DA14
DA13
DA12
DA11DB0*
DA9
DA8
DA7
DA6
DA5
DA4
DA3
DA2
DA1
DA0
DB19*
DB18*
DB17*
DB16*
DB15*
DB14*
DB13*
DB12*
DB11*
DB10*
DB9*
DB8*
DB7*
DB6*
DB5*
DB4*
DB3*
DB2*
DB1*
VDD
GND
DA10 SEL
DH19
DH18
DH17
DH16
DH15
DH14
DH13
DH12
DH11
DH10
DH9
DH8
DH7
DH6
DH5
DH4
DH3
DH2
DH1
DH0
DA19
DA18
DA17
DA16
DA15
DA14
DA13
DA12
DA11DB0*
DA9
DA8
DA7
DA6
DA5
DA4
DA3
DA2
DA1
DA0
DB19*
DB18*
DB17*
DB16*
DB15*
DB14*
DB13*
DB12*
DB11*
DB10*
DB9*
DB8*
DB7*
DB6*
DB5*
DB4*
DB3*
DB2*
DB1*
VDD
DSIZE
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PRO
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PA
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSTHE INFORMATION CONTAINED HEREIN IS THE P
12345678
12345678
A
B
C
D
APPLE COMPUTER INC.SCALE
NONE
ADDED 0 OHM RESISTORS IN CASE POLARITY IS WRONG
MEM_MUXSEL_H AND MEM_MUXSEL_L ARE ACTIVE HIGHMEM_MUXSEL_H AND MEM_MUXSEL_L ARE ACTIVE LOW
SEL = HIGH; HOST = A PORT; B PORT = 100OHM TO GNDSEL = LOW; HOST = B PORT; A PORT = 100OHM TO GND
BIT 32..47BIT 16..31BIT 0..15 BIT 48..63
16BIT 2:1 DD
C7421
2
0.1UF20%10VCERM402
C7481
2
0.1UF20%10VCERM402
C7531
2
0.1UF20%10VCERM402
C7371
2
0.1UF20%10VCERM402
C7381
2402CERM10V20%0.1UF
C7361
2
0.1UF20%10VCERM402
C7521
2402CERM10V20%0.1UF
C7471
2
0.1UF20%10VCERM402
C7411
2
0.1UF20%10VCERM402
C7431
2
0.1UF20%10VCERM402
C7271
2402CERM10V20%0.1UF
C7351
2
0.1UF20%10VCERM402
U13
F1
H1
K1
K3
K4
K6
J7
K9
J10
G10
E10
C10
A10
A8A7
A5
B4
A2
B1
D1
G1
J1
K2J4
K5
K7
K8
K10
H10
F10
D10
B10
A9
B7
A6
A4
A3
A1
C1
E1
F2
H2
J2
J3
J5
J6
J8
J9
H9
F9
E9
C9
B9
B8
B6
B5
B3
B2
C2
E2
C5
C6
D2
D9
G2
G9
H5
H6
E3
E8
F3
F8 CRITICAL
CBTV4020BGA
U12
F1
H1
K1
K3
K4
K6
J7
K9
J10
G10
E10
C10
A10
A8
A7
A5
B4
A2
B1
D1
G1
J1
K2
J4
K5
K7
K8
K10
H10
F10
D10
B10
A9
B7
A6
A4
A3
A1
C1
E1
F2
H2
J2
J3
J5
J6
J8
J9
H9
F9
E9
C9
B9
B8
B6
B5
B3
B2
C2
E2
C5
C6
D2
D9
G2
G9
H5
H6
E3
E8
F3
F8 CRITICAL
CBTV4020BGA
U10
F1
H1
K1
K3
K4
K6
J7
K9
J10
G10
E10
C10
A10
A8
A7A5
B4
A2
B1
D1
G1
J1
K2
J4K5
K7
K8
K10
H10
F10
D10
B10
A9
B7
A6
A4
A3
A1
C1
E1
F2
H2
J2
J3
J5
J6
J8
J9
H9
F9
E9
C9
B9
B8
B6
B5
B3
B2
C2
E2
C5
C6
D2
D9
G2
G9
H5
H6
E3
E8
F3
F8 CRITICAL
CBTV4020BGA
U9
F1
H1
K1
K3
K4
K6
J7
K9
J10
G10
E10
C10
A10
A8
A7A5
B4
A2
B1
D1
G1
J1
K2
J4K5
K7
K8
K10
H10
F10
D10
B10
A9
B7
A6
A4
A3
A1
C1
E1
F2
H2
J2
J3
J5
J6
J8
J9
H9
F9
E9
C9
B9
B8
B6
B5
B3
B2
C2
E2
C5
C6
D2
D9
G2
G9
H5
H6
E3
E8
F3
F8 CRITICAL
BGACBTV4020
R2421 2
NO STUFF
05%
1/16WMF402
R2521 2
NO STUFF
05%MF
1/16W
402
R2431 20
5%1/16WMF402
R2391 2
0
5%1/16WMF402
051-66
10
RAM_DATA_B
MEM_DATA
MEM_DATA
MEM_DQS
MEM_DATA
RAM_DATA_B
MEM_DQM
RAM_DATA_B
RAM_DATA_B
RAM_DQS_B
+2_5V_INTREPID
MEM_DQM
RAM_DQM_B
RAM_DQS_B
RAM_DATA_B
RAM_DATA_A
+2_5V_INTREPID
RAM_DATA_A
MEM_DQM
RAM_DATA_A
RAM_DATA_A
RAM_DATA_A
RAM_DATA_A
RAM_DATA_A
RAM_DATA_A
RAM_DATA_A
RAM_DATA_A
RAM_DATA_A
RAM_DQS_A
RAM_DQM_A
RAM_MUXSEL_H
MEM_DATA
MEM_DQS
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DQM
MEM_DATA
MEM_DATA
MEM_DQS
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
RAM_DQM_A
MEM_DATA
RAM_DQS_A
RAM_DATA_A
RAM_DATA_A
RAM_DATA_ARAM_DATA_A
RAM_DATA_A
RAM_DATA_A
RAM_DATA_B
RAM_DATA_B
RAM_DATA_B
RAM_DATA_B
RAM_DATA_B
RAM_DATA_B
RAM_DATA_B
RAM_DATA_BRAM_DATA_B
RAM_DQS_B
RAM_DQM_B
RAM_DATA_B
RAM_DATA_B
RAM_DATA_B
RAM_DATA_B
RAM_DATA_B
RAM_DATA_BRAM_DATA_A
RAM_DATA_A
RAM_DATA_A
RAM_DATA_A
RAM_DATA_A
RAM_DATA_A
RAM_DATA_A
RAM_DATA_A
RAM_DATA_A
RAM_DATA_A
RAM_DQS_A
RAM_DQM_A
RAM_MUXSEL_H
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DQS
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
RAM_DQM_A
MEM_DATA
RAM_DQS_A
RAM_DATA_A
RAM_DATA_A
RAM_DATA_A
RAM_DATA_A
RAM_DATA_A
RAM_DATA_B
RAM_DATA_B
RAM_DATA_B
RAM_DATA_B
RAM_DQS_B
RAM_DQM_B
RAM_DATA_B
RAM_DATA_B
RAM_DATA_B
RAM_DATA_BRAM_DATA_B
RAM_DQS_B
RAM_DQM_B
RAM_DATA_B
RAM_DATA_B
RAM_DATA_B
RAM_DATA_B
RAM_DATA_B
RAM_DATA_BRAM_DATA_A
MEM_DQM
RAM_DATA_A
RAM_DATA_A
RAM_DATA_A
RAM_DATA_A
RAM_DATA_A
RAM_DATA_A
RAM_DATA_A
RAM_DATA_A
RAM_DATA_A
RAM_DQS_A
RAM_DQM_A
RAM_MUXSEL_L
MEM_DATA
MEM_DQS
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DQM
MEM_DATA
MEM_DATA
MEM_DQS
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
RAM_DQM_A
MEM_DATA
RAM_DQS_A
RAM_DATA_A
RAM_DATA_ARAM_DATA_A
RAM_DATA_A
RAM_DATA_B
RAM_DATA_B
RAM_DATA_B
RAM_DATA_B
RAM_DATA_B
RAM_DQS_B
RAM_DQM_B
RAM_DATA_B
RAM_DATA_B
RAM_DATA_B
RAM_DATA_B
RAM_DATA_B
RAM_DQS_B
RAM_DQM_B
RAM_DATA_B
RAM_DATA_B
RAM_DATA_B
RAM_DATA_B
RAM_DATA_BRAM_DATA_A
MEM_DQM
RAM_DATA_A
RAM_DATA_A
RAM_DATA_A
RAM_DATA_A
RAM_DATA_A
RAM_DATA_A
RAM_DATA_A
RAM_DATA_A
RAM_DATA_A
RAM_DQS_A
RAM_DQM_A
RAM_MUXSEL_L
MEM_DATA
MEM_DQS
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DQM
MEM_DATA
MEM_DATA
MEM_DQS
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
MEM_DATA
RAM_DQM_A
MEM_DATA
RAM_DQS_A
RAM_DATA_A
RAM_DATA_A
RAM_DATA_A
RAM_DATA_A
RAM_DATA_A
RAM_DATA_A
RAM_DATA_B
RAM_DATA_B
RAM_DATA_B
RAM_DATA_B
RAM_DQM_B
RAM_DATA_B
RAM_DATA_B
RAM_DATA_B
RAM_DATA_B
RAM_DQS_B
RAM_DQM_B
RAM_DATA_B
RAM_DATA_B
RAM_DATA_B
RAM_DATA_B
RAM_DATA_B
RAM_DATA_B
RAM_MUXSEL_LMEM_MUXSEL_L
RAM_MUXSEL_HMEM_MUXSEL_H
RAM_MUXSEL_LMEM_MUXSEL_L
RAM_MUXSEL_HMEM_MUXSEL_H
+2_5V_INTREPID
RAM_DATA_A
RAM_DATA_A
+2_5V_INTREPID39 39
3939
16 1616
1615 15
1515
37
37
37
37
37
37
37
37
37
37
10
37
37
37
37
37
10
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
3737
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
3737
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
3737
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
3737
3737
3737
3737
10
37
37
10
11
9
9
9
9
11
9
11
11
11
9
9
11
11
11
11
9
11
9
11
11
11
11
11
11
11
11
11
11
11
10
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
11
9
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
1111
11
11
11
11
11
11
11
11
11
11
11
10
9
9
9
9
9
9
9
9
9
9
9
9
9
11
9
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
1111
9
11
11
11
11
11
11
11
11
11
11
11
10
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
11
9
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
1111
9
11
11
11
11
11
11
11
11
11
11
11
10
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
11
9
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
109
109
109
109
9
11
11
9
-
7/22/2019 PowerBook G4 17" Low-Res
11/45
DQ58
RFU18
KEY
VDD6
VSS6
VSS8
VDD5
DQ15
DQ13
DQ14
VSS5
DM1
VDD3
VSS3
DQ7
DQ12
DQ6
DM0
DQ4
DQ5
VSS1
VREF1
VDD1
SA1
SA2
RFU19
SA0
VDD32
DQ63
DQ62
VSS32
DQ61
VDD30
DQ60
DQ55
DM7
VSS30
DQ54
DM6
VDD28
DQ53
DQ52
VDD25
CK1*
CK1
VSS28
DQ47
DQ46
VDD23
VSS25
DM5
DQ45
DQ44
DM4
DQ39
VSS23
DQ38
DQ37
RFU17
DQ36
VSS21
VDD21
VDD19
RAS*
BA1
CAS*
S1*
A6
A4
A2A0
VSS19
A8
A11
VDD17
RFU15
CKE0
VDD15
VSS17
RFU11
VSS16
RFU9
VDD14
RFU3
VSS14
RFU5
RFU7
RFU1
VDD12
VSS12
DM3
DQ31
DQ30
DQ29
VSS10
VDD10
DQ28
DQ23
DM2
DQ20
VDD8
DQ21
DQ22
VDDSPD
SCL
SDA
VDD31
VSS31
DQ59
DQS7
DQ51
VDD29
DQ56
VSS29