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Department of Electronics and Communication,MSEC Page 1
Power Electronics Lab 2010
M S Engineering College (ISO 9001-2002 , Affiliated to VTU , Belgaum)
International Airport Road , Navaratha Agrahara, Sadahlli P.O, Bangalore-
562110
Power Electronics LAB MANUAL
(10ECL78)
Department of
Electronics and communication Engineering
Prepared By
Nagayya S Hiremath MTech
Assistant Professor in ECE Dept
M S Engineering College, Bangalore
Department of Electronics and Communication,MSEC Page 2
Power Electronics Lab 2010
VTU PRESCRIBED SYALLBUS
Sub Code : 10ECL78 IA Marks : 25
Hrs/ Week : 03 Exam Hours: 03
Total Hrs. : 42 Exam Marks : 50
NOTE: Use discrete components to test and verify the logic gates. LabView can
be used for designing the gates along with the above.
1 Static characteristics of SCR or DIAC. 2 Static characteristics of MOSFET & IGBT. 3 Controlled HWR & FWR using RC Triggering circuit. 4 AC- voltage controller by using TRIAC-DIAC combination. 5 UJT firing circuit for HWR & FWR. 6 Parallel Inverter. 7 Speed control of a universal motor. 8 Speed control of a separately excited DC motor. 9 Speed control of stepper motor. 10 Single phase fully controlled bridge converter with R & RL loads. 11 Voltage commutated chopper both constant frequency & variable frequency.
Department of Electronics and Communication,MSEC Page 3
Power Electronics Lab 2010
TABLE OF CONTENTS
Experiment #
Particulars
Page #
1
Static characteristics of SCR or DIAC.
1-6
2
Static characteristics of MOSFET & IGBT.
7-15
3
Controlled HWR & FWR using RC Triggering
circuit.
16-19
4
AC- voltage controller by using TRIAC-DIAC
combination.
20-22
5
UJT firing circuit for HWR & FWR.
23-27
6
Parallel Inverter.
28-29
7
Speed control of a universal motor.
30-31
8
Speed control of a separately excited DC motor.
32-33
9
Speed control of stepper motor.
34-36
10
Single phase fully controlled bridge converter
with R & RL loads.
37-41
11
Voltage commutated chopper both constant
frequency & variable frequency.
42-44
Department of Electronics and Communication,MSEC Page 4
Power Electronics Lab 2010
Experiment No:1
CHARACTERISTICS OF SCR
AIM:
1. To obtain the V – I characteristics and to find on-state forward resistance of given SCR
2. To determine latching current (IL), holding current (IH) and break over voltage of given
SCR
APPARATUS REQUIRED:
Sl # Instrument/Component Range Quantity
1 DC Regulated power supply 0-300V/2A 01
2 DC Regulated power supply 0-30V/2A 01
3 DC milli Ammeter 0-200mA 02
4 DC Voltmeter (Multimeter) 0-200V 01
5 Power Resistors 1.5K/5W 02
6 SCR TYN 616 01
7 Connecting wire 1/22 5 mts.
CIRCUIT DIAGRAM:
THEORY:
Silicon Controlled Rectifier:
Department of Electronics and Communication,MSEC Page 5
Power Electronics Lab 2010
A Silicon Controlled Rectifier (SCR) is a four layer, three terminals and three junction
device, which is basically a rectifier with a control terminal called Gate. Like diode, it is
also a uni-directional device and forward conduction is from anode to cathode. Since
SCR use silicon for its construction so it is called silicon controlled rectifier. Where it
operates as a rectifier, it is mainly used as a switch.
Construction of SCR with symbol.
Fig: Structure and symbol of SCR
There are three terminals namely Anode (A), Cathode (K), and Gate (G). Four layers,
with alternatively P-type and N-type silicon semiconductors forming three junctions J1,J2
and J3 as in above fig.
V-I characteristics of an SCR, indicating all the regions of the characteristics and all
important current and voltage levels.
Fig: V-I Characteristics of an SCR
Department of Electronics and Communication,MSEC Page 6
Power Electronics Lab 2010
If a negative voltage is applied to anode and a positive voltage is applied to
cathode of the SCR, the junction J2 is forward biased and J1 and J2 are reverse biased
with very small leakage current flow called reverse blocking current. If the reverse
voltage is now increased, J1 and J3 break down in the zener or avalanche mode and IR is
not limited, hence SCR could be damaged or destroyed. The region of the reverse
characteristics before reverse breakdown is called reverse blocking region as shown in
above fig
If SCR is forward biased with IG=0, the Junctions J1 and J3 are forward
biased and J2 is reverse biased .If +VAK is small, leakage current flows (IFX) until +VAK is
large enough to cause reverse biased junction J2 to break down. The forward voltage at
this point is called forward break over voltage VF (BR).
CONTROLLED RECTIFICATION PROPERTY AND IMPORTANT
DEFINITIONS:
TERM
DEFINITION
Forward
Blocking State
When the anode is made positive with respect to the cathode,
junction J2 is reverse biased and only the leakage current will flow
through the device. The SCR is said to be in the forward- blocking
state.
Reverse
Blocking State
When the cathode is made positive with respect to the anode,
junctions J1 and J3 are reverse-biased and a small reverse leakage
current will flow through the SCR. This is the reverse-blocking state
of the SCR
Reverse
Breakdown
When the reverse bias on the SCR is increased beyond reverse break
over voltage VBR, avalanche breakdown takes place and large reverse
current flows.
Conducting
State
When forward-bias on the SCR is increased, junction J2 will break
down. This is due to avalanche effect. Since other junctions J1 and J3
are forward-biased, there will be free carrier movement across all
three junctions, resulting in a large anode-to-cathode forward current
la. The device is said to be in conducting-state or on-state. Forward
break over voltage (VBO) is that voltage above which the SCR enters
the conduction region in the absence of a gate signal.
Department of Electronics and Communication,MSEC Page 7
Power Electronics Lab 2010
Holding
Current (lh)
Holding current is the forward current below which the SCR
switches over from on- state to the forward-blocking state. The
holding current is usually lower than, but very close to, the latching
current.
Latching
Current (IL)
Latching current is the minimum forward current that has to be
maintained in order to switch the SCR forward blocking state (off-
state) to on-state.
Gate Control
A more convenient and useful method of turning on the device
employs the gate drive. Even if a forward voltage less than VBO is
applied across the device, it can be turned on by applying a positive
voltage between the gate and the cathode. This method is known as
gate control.
Phase Control
The average current that SCR conducts can be reduced and varied by
delaying the time in each half cycle when SCR is fired. This method
of gradual control of an SCR is called phase control.
Commutation
The process of turning off the SCR is known as commutation. SCR
cannot be turned off by simply removing the gate pulse. It is turned
off by making use of an external circuit known as commutation
circuit which reduces anode-to-cathode current below holding current
lh.
PROCEDURE:
TO FIND THE V-I CHARACTERISTICS:
1. Rig up the circuit as per the circuit diagram.
2. Switch on the gate supply and set the gate current to IG= mA.
3. By keeping this constant, vary VAA in steps and at each step note down the voltage
VAK and anode current IA.
4. Tabulate the readings and plot a graph of IA Vs VAK.
5. Repeat the above steps for different values of gate currents.
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Power Electronics Lab 2010
TO FIND LATCHING CURRENT:
1. With VAA=0 & with sufficient gate current “Switch On” the Power supply.
2. Slightly increase VAA & apply gate drive momentarily.
3. See whether SCR is ON or OFF.
4. Repeat steps 2 & 3 till SCR just turns ON.
5. The corresponding Anode current when SCR turns ON is the latching current.
6. See that SCR should be continuously ON even if the gate signal is removed.
TO FIND HOLDING CURRENT:
1. Turn ON the SCR by normal method.
2. Now reduce VAA gradually.
3. Note down Anode current at which SCR turns OFF (the corresponding Anode
current). The corresponding Anode current is the Holding Current.
TABULAR COLUMN:
IG=IG1 = …… mA IG2 = …… mA
VAK (V) IA (mA) VAK (V) IA (mA)
Department of Electronics and Communication,MSEC Page 9
Power Electronics Lab 2010
I
NATURE OF GRAPH:
IA
rd = ∆VAK/∆IA
Ig2 L
IH
Ig1
VBO
VAK
RESULT :
CONCLUS ION :
Power Electronics Lab MOSFET
MSEC Bangalore Page 7
Experiment No:2a
CHARACTERISTICS OF MOSFET
AIM: Conduct a suitable experiment to draw the V-I characteristics of the given
MOSFET.
APPARATUS REQUIRED:
Sl # Instrument/Component Range Quantity
1 DC Regulated power supply 0-30V/2A 02
2 DC milli Ammeter 0-200mA 01
3 DC Voltmeter (Multimeter) 0-200V 02
4 Power Resistors 1K, 500E/5W 02
5 MOSFET IRF740 01
6 Connecting wire 1/22 5 mts.
CIRCUIT DIAGRAM:
THEORY:
Characteristics of Depletion MOSFET:
Figure below shows n-channel depletion type MOSFET with gate positive with respect to
source ID, VDS and VGS are drain current, drain source voltage and gate-source voltage. A
plot of variation of ID with VDS for a given value of VGS gives the Drain characteristics or
Output characteristics.
Power Electronics Lab MOSFET
MSEC Bangalore Page 8
D ID
G VDS
VGS
+ +
S
Fig: n-channel Depletion MOSFET
n-c annel Depletion type MOSFET
VGS & VDS are positive. ID is positive for n channel MOSFET . VGS is negative for
depletion mode. VGS is positive for enhancement mode.
Figure below shows the drain characteristic. MOSFET can be operated in three regions
Cut-off region,
Saturation region (pinch-off region) and
Linear region.
In the linear region ID varies linearly with VDS. i.e., increases with increase in VDS. Power
MOSFETs are operated in the linear region for switching actions. In saturation region ID
almost remains constant for any increase in VDS.
Linear region
Saturation region
VGS3
ID VGS2
VGS1
VDS
Fig.: Drain Characteristic
Power Electronics Lab MOSFET
MSEC Bangalore Page 9
Figure below shows the transfer characteristic. Transfer characteristic gives the variation
of ID with VGS for a given value of VDS. IDSS is the drain current with shorted gate. As
curve extends on both sides VGS can be negative as well as positive.
IDSS
ID
VGS(OFF)
Fig.: Transfer characteristic
Characteristics of Enhancement MOSFET:
VGS
D ID
G VDS
VGS
+ +
S
Fig: n-Channel Enhancement MOSFET
Enhancement type MOSFET
VGS is positive for a n-channel enhancement MOSFET. VDS & ID are also positive for n
channel enhancement MOSFET
Figure above shows circuit to obtain characteristic of n channel enhancement type
MOSFET. Figure below shows the drain characteristic. Drain characteristic gives the
variation of ID with VDS for a given value of VGS.
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ID
VT VGS
VT VGS TH Gate Source Threshold Voltage
Fig.: Transfer Characteristic
Figure below shows the transfer characteristic which gives the variation of ID with VGS
for a given value of VDS.
Linear region
Saturation region
VGS3
ID VGS2
VGS1
VGS 3 VGS 2 VGS1
Fig. : Drain Characteristic
VDS
PROCEDURE:
TO OBTA IN T HE T RA NS F E R (COLLE CTOR) CHARA CT ERISTI CS
1) Rig up the circuit as shown in the figure
2) Switch on the power supply and set VDS to some constant value.
3) Vary VGG in steps and at each step note down the value of ID and VGS. From the
readings note down the threshold voltage.
TO OBTA IN T HE D RAI N CHARACTE RISTI CS
1) Set VGS to a value above the threshold value. Vary VDD in steps and at each step note
down drain current and drain to source voltage.
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VGS1 V
VDS (V) ID (mA)
2) Calculate the parameter from the characteristics
Gm= ∆ID/∆VGS mho (from transfer characteristics) &
RDS = ∆VDS/∆ID (from drain characteristics)
CHARACTERISTIC GRAPH:
TABULAR COLUMN:
TRANSFER CHARACTERISTICS: DRAIN CHARACTERISTICS:
VDS1 = V
VGS (V) ID (mA)
RESULT :
CONCLUS ION :
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Power Electronics Lab IGBT
Experiment No:2b
Characteristics of IGBT
Aim: Conduct a suitable experiment to draw the V-I characteristics of the given IGBT.
Apparatus Required:
Sl # Instrument/Component Range Quantity
1 DC Regulated power supply 0-30V/2A 02
2 DC milli Ammeter 0-200mA 01
3 DC Voltmeter (Multimeter) 0-200V 02
4 Power Resistors 1K, 500E/5W 02
5 IGBT IRGBC 20S 01
6 Connecting wire 1/22 5 mts.
Circuit Diagram:
Theory:
Characteristic Of IGBT
Figure below shows circuit diagram to obtain the characteristic of an IGBT. An
output characteristic is a plot of collector current IC versus collector to emitter voltage
VCE for given values of gate to emitter voltage VGE.
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Power Electronics Lab IGBT
IC
RC
RS
VG
RGE
G
VGE
E
VCE
VCC
Fig.: Circuit Diagram to Obtain Characteristics
IC
VGE4
VGE3
VGE2
VGE1
VGE4>VGE3
>VGE2>VGE1
Fig: Output Characteristics
VCE
A plot of collector current IC versus gate-emitter voltage VGE for a given value of VCE
gives the transfer characteristic. Figure below shows the transfer characteristic.
Note:Controlling parameter is the gate-emitter voltage VGE in IGBT. If VGE is less than
the threshold voltage VT then IGBT is in OFF state. If VGE is greater than the threshold
voltage VT then the IGBT is in ON state.
IGBTs are used in medium power applications such as ac and dc motor drives, power
supplies and solid state relays.
IC
VT
Fig: Transfer Characteristic
VGE
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Power Electronics Lab IGBT
Procedure:
Transfer Characteristics:
1. Rig up the circuit as shown in the figure.
2. Switch ON the power supply and set VCE to some constant value using voltage source
VCC.
3. Vary VGG in steps and at each step note down the value of IC & VGE (At each step of
reading VCE is to be kept to constant using VCC). From the readings note down the
threshold voltage.
Collector (Output) Characteristics:
1. Set VGE to a value above the threshold voltage.
2. Vary VCC in steps and at each step note down collector current (IC) and collector to
emitter voltage (VCE).
3. Repeat the above 2 steps for three values of VGE.
Characteristic Graph:
Trans conductance: GM = ΔIC/ΔVGE (Mho)
Forward Resistance: RDS = ΔVCE/ΔIC Ω
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Power Electronics Lab IGBT
VGE1= V
VCE (V) IC (mA)
Tabular Column:
Transfer Characteristics Collector (Output) Characteristics:
VCE1 = V
VGE (V)
IC (mA)
Result:
Conclusion:
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Power Electronics Lab IGBT
Power Electronics Lab AC Voltage
MSEC Bangalore Page 20
Experiment No:3 CONTROLLED HWR AND FWR USING RC TRIGGERING
CIRCUIT
Aim: To study the performance of controlled HWR and FWR using RC triggering
circuit
Components Required:
Sl # Instrument/Component Range Quantity
1 Ammeter - - - 01
2 Voltmeter - - - 01
3 Rheostat 0-100Ohms/3A 01
4 Dc regulated power supply ------- 01
5 Connecting wire 1/22 6 mts.
6 CRO 20MHz 2Channel 01
7 CRO Probes BNC to Crocodile 02
8 Patch Cards 1 mtr with 4mm
pins
30
Theory:
The Performance of FWR is significantly improved compared with that of a HWR.
During the positive half-cycle of the input voltage power is supplied to the load through
diodes D1 & D2. During negative half-cycle diode D3 & D4 conducts.
The output voltage is found using the following equation
VOUT = VDC = *
Where:- α - firing angle
Vin - input voltage
VDC - Voltage across drain and collector
1) HWR Circuit Diagram:
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Circuit Operation: In the negative half cycle of the AC supply, diode D2 is forward biased. It will
short circuit the potentiometer “R’’ and the capacitor “C’’ is charged to negative peak
voltage through D2 as shown in fig (a). with its upper plate negative with respect to its
lower plate . In the positive half cycle, D2 is reverse biased. The capacitor “C’’ will
charged through “R’’ to the trigger point of the thyristor in a time determined by the RC
time constant and the rising anode voltage(see fig(b)). The diode D1 will isolate and
protect the gate cathode junction against reverse (negative) voltage.
As soon as the capacitor voltage become sufficiently positive to forward bias.
Diode D1 and the gate cathode junction of thyristor will be turned on. As soon as the
thyristor is turned on, the voltage across it reduced to a very low value and the gate
current goes to zero.
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Waveforms:
Tabular column: α in degrees VDC in Volts β in degrees
Theoretical Practical
MSEC Bangalore Page 23
2) FWR Circuit Diagram:
Waveforms:
Tabular column: α in degrees VDC in Volts β in degrees
Theoretical Practical
Procedure: 1. Check all the components before making the connection.
2. Rig up the circuit as shown in the circuit diagram.
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3. Check the waveforms for full-wave rectifier and for half-wave rectifier
and note down the firing angles.
4. Note down the corresponding drain to collector voltage, Vdc .
5. Repeat the experiment for different firing angles and note down the
corresponding, Vdc .
6. Calculate the value of VDC theoretically using the given formula for
different value of firing angles.
Result:
Conclusion:
Experiment No:4
AC VOLTAGE CONTROLLER BY USING TRIAC-DIAC
COMBINATION. Aim: To study the performance of AC voltage controller using TRIAC and DIAC
combination.
1) To observe variation of intensity of light with reference to firing angle.
2) To plot Delay angles α V/S Load voltage VL.
Apparatus Required:
Sl # Instrument/Component Range Quantity
1 AC Voltage Regulator module - - - 01
2 Resistive load 200W 01
3 Inductor (Inductive load) 0-100mH/2A 01
4 Connecting wire 1/22 6 mts.
5 Power Scope 20MHz 2Channel 01
7 Multimeter 0-200V/10A 01
8 Patch Cards 1 mtr with 4mm
pins
30
Circuit Diagram:
MSEC Bangalore Page 25
Circuit Working:
In this circuit resistor R is variable where as resistor R1 has a constant value.
When R is zero, R1 protects the Diac and Triac gate from getting exposed to almost full
supply voltage. R2 limits the current in the Diac and Triac gate when Diac turns ON. The
value of R and C are so selected as to give a firing angle range of nearly 0 & 180.When
capacitor C charges to break down voltage Vdc of DIAC, DIAC turns ON. As a
consequence, capacitor discharges rapidly there by applying capacitor voltage Vc in the
form of pulse across the Triac gate to turn it ON. After Triac turns ON at firing angle a,
source voltage Vs appears across the load during the positive half cycle for ( - )
radians. When Vs becomes 0 at t = , Triac turns OFF. After t = , Vs becomes
negative, the capacitor C now charges with lower plate positive. When Vc reaches Vdt of
the Diac, Diac and Triac turn ON and Vs appears across the load during the negative half
cycle for (– ) radians. At t = 2, Triac turns OFF again and the process repeats.
In usual form, capacitor retains some charge of the initial voltage applied across its plates
when source voltage falls to zero. Waveforms can however be made symmetrical if
additional resistance of R3 and capacitor C1 are employed.
Procedure:
1. Make connections as given in the circuit diagram.
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2. Vary the firing angle potentiometer and note down the voltage across load for
different values of firing angle.
3. Plot a graph of load voltage v/s delay angle.
Graph:
Tabular Column:
α (in
degrees)
VL rms
(practical)
VL rms
(theoretical)
Conduction
angle β
VOUT= 1/2
Waveforms:
MSEC Bangalore Page 27
RESULT :
CONCLUS ION :
Power Electronics Lab UJT
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EXPERIMENT No:5
UJT TRIGGERING FOR HW & FW RECTIFIER CIRCUIT
Aim: SCR turn on using synchronized UJT Relaxation oscillator. Synchronized UJT
firing for half wave controlled and full wave controlled rectifier.
Apparatus Required:
Sl # Instrument/Component Range Quantity
1 Step-Down Transformer 9-0-9/1Amp 01
2 Diode IN4007 04
3 UJT 2N2646 01
4 Zener Diode, IZ6.8 01
5 SCR 2P4M 01
6 Resistors: 1KΩ (3), 220Ω(1) 05
7 Pot 470K 01
8 Power Resistors 470Ω/5W 02
9 Capacitor 0.01μF 01
10 Connecting wire 1/22 5 mts.
11 CRO 20MHz 2Channel 01
12 CRO Probes BNC to Crocodile 02
Theory:
UJT is highly efficient switch. The switching time is in the range of nanoseconds.
Since UJT exhibits negative resistance characteristics it can be used as relaxation
oscillator. The circuit diagram is as shown with R1 and R2 being small compared to
RB1 and RB 2 of UJT.
Power Electronics Lab UJT
MSEC Bangalore Page 24
Fig.: UJT oscillator (a) Connection diagram and (b) Voltage waveforms
Operation:
When VBB is applied, capacitor ‘C’ begins to charge through resistor ‘R’
exponentially towards VBB. During this charging emitter circuit of UJT is an open circuit.
The rate of charging is1 RC . When this capacitor voltage, which is nothing but emitter
voltage, VE reaches the peak pointVP VBB VD , the emitter base junction is forward
biased and UJT turns on. Capacitor ‘C’ rapidly discharges through load resistance R1
with time constant2 R1C . When emitter voltage decreases to valley point Vv , UJT turns
off. Once again the capacitor will charge towards VBB and the cycle continues. The
resistor R in the circuit will determine the rate of charging of the capacitor. If R is small
the capacitor charges faster towards VBB and thus reaches VP faster and the SCR is
triggered at a smaller firing angle. If R is large the capacitor takes a longer time to charge
towards VP the firing angle is delayed. The waveform for both cases is as shown below.
Synchronized UJT Oscillator:
A synchronized UJT triggering circuit is as shown in figure below. The diodes
rectify the input ac to dc; resistor RD lowers Vdc to a suitable value for the zener diode and
UJT. The zener diode ‘Z’ functions to clip the rectified voltage to a standard level VZ
which remains constant except near Vdc=0. This voltage VZ is applied to the charging RC
circuit. The capacitor ‘C’ charges at a rate determined by the RC time constant. When the
capacitor reaches the peak point VP the UJT starts conducting and capacitor discharges
through the gate of the SCR. As the discharge current is in the form of pulses & the
amplitude of these pulses can be controlled by varying Resistor (POT) connected in the
R-C circuit. Thus the triggering angle of the SCR can be varied & Output voltage can be
controlled.
Power Electronics Lab UJT
MSEC Bangalore Page 25
Half Wave UJT Triggering
Circuit Diagram:
Waveforms:
Power Electronics Lab UJT
MSEC Bangalore Page 26
Power Electronics Lab UJT
MSEC Bangalore Page 27
Full Wave UJT Triggering
Circuit Diagram:
Waveforms:
Power Electronics Lab UJT
MSEC Bangalore Page 28
α (in
degrees)
VDC
(practical) in Volts
VDC in
Volts
(theor
etical)
Graph:
VDC
(Volts)
Delay Angle α (degrees)
Procedure:
1. Connections are made as per the circuit diagram.
2. Switch ON the supply and observe waveforms at different points.
3. Note down the readings for different values of delay angle and note down the dc
output voltage across the load.
4. Plot the graph of VDC v/s α.
Tabular Column:
For Half wave For Full wave
α (in
degrees)
VDC
(practical) in Volts
VDC in
Volts
(theoretic
al)
VDC = VM (1 + cos α)/ 2 (for half wave) VDC = VM (1 + cos α)/ (for full wave)
Where VM = V S * √2. H ere V S is the rms v alu e of th e su ppl y vol tage
(Seco nd ar y o f step d own tran sform er) & VM is it s p eak volt age
RESULT :
CO NCL USIO N:
Power Electronics Lab UJT
MSEC Bangalore Page 29
Power Electronics Lab U-MOTOR
MSEC Bangalore Page 30
Experiment No:6 PARALLEL INVERTER
Aim: To conduct an experiment to convert DC-AC using parallel inverter
Components required:
Sl # Instrument/Component Range Quantity
1 Parallel inverter kit - - - 01
2 Rheostat 0-100Ohms/3A 01
3 Dc regulated power supply ------- 01
4 Connecting wire 1/22 6 mts.
5 CRO 20MHz 2Channel 01
6 CRO Probes BNC to Crocodile 02
7 Patch Cards 1 mtr with 4mm
pins
30
Theory:
The Inverters are DC to Ac Converters. The Dc source is normally a battery or
output of the controlled rectifier. Inverters are used in induction heating etc. The output
voltage waveform of the inverter can be square wave quasi require wave or low distorted
sine wave . The output voltage can be controlled with the help of drives of the switches.
The inverters can be classified as voltage source inverters or current source
inverters When input Dc voltage remains constant, then it is called voltage source inverter
when input current remain constant, then it is called current source inverter.
Procedure:
1 . Rig up the circuit connections as shown.
2. When the input voltage is set & firing angle is varied.
3. The output is appeared as square wave.
4. The TON & TOFF of square wave will be equal because it has 50% duty cycle
Circuit Diagram:
MSEC Bangalore
Page 31
Waveforms:
Calculation:
Duty Cycle =
Result:
Conclusion:
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Page 32
Experiment No:7
SPEED CONTROL OF UNIVERSAL MOTOR
Aim:1 ) TO ob tai n vari ation o f s peed V/ S del a y an gl e.
2 ) To plot vol t age V/S d el a y an gl e.
Apparatus Required:
Sl # Instrument/Component Range Quantity
1 Power module - - - 01
2 Isolation transformer 0-30 / 60 / 120 /
230V
01
2 Firing Unit - - - 01
3 Universal Motor 0.5 HP 01
4 Tachometer Analog 01
5 Connecting wire 1/22 6 mts.
6 Patch Cards 1 mtr with 4mm
pins
30
Circuit Diagram:
V
Note: A separate firing module is used to trigger the SCR’s
Procedure:
1. Connections are made as per the circuit diagram.
2. Triggering pulses are given through the module.
3. The triggering angle is varied in steps and at each step the voltage across the
motor and the speed is noted and tabulated.
4. The graph of a) speed v/s and b) voltage v/s is plotted.
MSEC Bangalore
Page 33
Tabular Column:
in
Degrees.
Vac
(practical)
Speed in
rpm.
Waveforms:
RESULT:
CONCLUSION:
MSEC Bangalore Page 34
MSEC Bangalore Page 34
Power Electronics Lab S-MOTOR
Experiment No:8
SPEED CONTROL OF A SEPARATELY EXCITED DC
MOTOR
Aim: To study speed control of a DC supply using single phase may have controlled
rectifier.
Components Required: Separately excited DC motor circuit module,
transformer, power supply, patch chords, voltmeter & ammeter, tachometer, CRO.
Theory:
Experimental setup is same as that of 1 phase fully controlled bridge rectifier
circuit where the load is replaced by a separately excited DC motor. DC motor is used in
adjustable speed drives & position control applications. DC motors are preferred when
wide speed control application. DC motors are preferred when wide speed control range
is required phase control converter provide an adjustable DC output Voltage from a fine
AC input.
Procedure:
1. Initially switch ON the DC Chopper using circuit and observe the triggering
output voltage by varying the duty cycle and frequency part by keeping the
control switch into the initial position. Now make connection in power circuit
as given in circuit diagram.
2. Initially set DC input voltage to 10v and connect a resistor load b/w points
connected the triggering output from firing circuit to resistance SCR’s in
power circuit.
3. Keep ON/OFF switch in off position initially switch on DC supply. Apply
main SCR triggering phases from firing circuit unit.
4. Observe voltage waveforms across load. Now vary DC supply up to 30v and
draw output waveform at different duty cycle.
Circuit diagram:
MSEC Bangalore
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Waveforms:
Tabular column:
Without Load
Firing Angle(α) Output Voltage(V0) Speed N (rpm)
With Load:
Firing Angle(α) Output Voltage(V0) Speed N (rpm)
Result:
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Experiment No:8
SPEED CONTROL OF STEPPER MOTOR
Aim: To study the speed control of stepper motor using a logic controller by activating
the appropriate field coils at appropriate time.
Apparatus:
Stepper motor, Logic controller, Patch chords.
Circuit Diagram:
Procedure:
1. Connect A1, A2, B1 & B2 leads of stepper motor to the corresponding O/p
terminal points in logic controller. Give V+ supply to stepper motor
through logic controller.
2. Switch ON the mains supply to the unit. The unit display shows RPM
3. If you press ENT now the speed mode is set & it displays 00.
4. Then press INCkey to set the RPM. When the display shows RPM, if u
press INC/ DECit goes to step mode or vice-versa.
5. After setting the speed in RPM / no. of steps, press ENT key. Then the
parameter value is entered and it shows set direction of rotation
Press INC/ DECchanges the direction of rotation. Then press ENT
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SL No A1 A2 B1 B2
1 1 0 1 0
2 1 0 0 0
3 1 0 0 1
4 0 0 0 1
5 0 1 0 1
6 0 1 0 0
7 0 1 1 0
8 0 0 1 0
key to set/ save the direction of rotation.
6. Then it displays half step or full step mode.
Pressing INC/ DECwill change to half step/ full step mode or vice–
versa. Pres ENT key to set/save the half step or full step mode.
Note: The above point is valid only for step mode and can be just ignored
if speed mode is previously set/saved.
7. Then it displays n-set RPM if speed is selected or s-set steps if
steps is selected .
8. Then press RUN/STOP key, the stepper motor rotates continuously if
the speed set if speed mode is selected.
9. Press RUN/STOP again to stop again.
10. If we select the select mode the motor moves to the set no. of steps when
we press RUN/STOP key. When we again press the motor moves and
stops.
11. Set the step mode at one step and half step mode and check the output
states by LED indications with each step of rotation and verify with the
theoretical.
12. Repeat the same for full step mode also and also for other directions.
Switching Logic Sequence:
Full step: Half step:
SL No A1 A2 B1 B2
1 0 1 0 1
2 0 1 1 0
3 1 0 1 0
4 1 0 0 1
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Tabular Column:
Full step Forward direction Reverse direction
Step set Step measured %Error Step set Step measured %Error
Half step Forward direction Reverse direction
Step set Step measured %Error Step set Step measured %Error
%ERROR = STEP SET - STEP RECORDED*100 STEP SET
Result:
Conclusion:
Power Electronics Lab 1Phase
MSEC Bangalore Page 37
Experiment No: 10
SINGLE PHASE FULLY CONTROLLED BRIDGE
CONVERTER WITH R AND RL LOADS
Aim: Conduct a suitable experiment to obtain output voltage waveforms of fully
controlled bridge using RL load. Plot DC voltage v/s delay angle,
1. Without free wheeling diode
2. With free wheeling diode.
Apparatus Required:
Sl # Instrument/Component Range Quantity
1 Step-Down Transformer 30-60-120-
230/4Amps
01
2 Power module - - - 01
3 Firing Unit - - - 01
4 Rheostat 0-100Ohms/3A 01
5 Inductor 0-100mH/2A 01
6 Connecting wire 1/22 6 mts.
7 CRO 20MHz 2Channel 01
8 CRO Probes BNC to Crocodile 02
9 Multimeter 0-200V/10A 01
10 Patch Cards 1 mtr with 4mm
pins
30
Circuit Diagram:
Note: A separate firing module is used to trigger the SCR’s
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Theory
:
In the bridge rectifier all the four arms of SCR’s are connected as control
switches. This is called fully controlled bridge.
The advantage of fully controlled bridge rectifier is the capability of wide voltage
variation between +Vdc(av) to –Vdc(av), maximum i.e.2Vm/Π to -2Vm/Π Volts. Such
rectifiers find application in DC motor loads for both motoring and electrical braking of
the motor.
Circuit Working:
Fully Controlled Bridge Converter with R Load.
During positive half cycle, SCR T1 and SCR T11
are triggered simultaneously
through independent isolated gate pulses. The pair of SCR’s conducts up to Π. SCR T2
and SCR T21
are to be triggered in the next half cycle with another pair of isolated gate
pulses. The triggering angle of the pairs of SCR’s can be varied by va rying the control
voltages.
For R load, the average output voltage can be found from
=
= απ
= Fully Controlled Bridge Converter For R-L Load with Free
wheeling Diode.
When the single phase fully controlled bridge converter is connected with RL load
with free wheeling diode during positive half cycle T1 and T11
are forward biased. When
T1 and T11
fired at ωt = α, the load is connected to the input supply through T1 and T11
during period α ≤ ωt ≤ Π. During the period from Π ≤ ωt ≤ (Π + α), the input voltage is
negative and free wheeling diode DF is forward biased, DF conducts to provide the
continuity of current in the inductive load. The load current is transferred from T1 and
T11
to DF and thyristor T1 and T11
are turned off at ωt = Π. During negative half cycle of
input voltage, thyristor T2 and T21
are forward biased, and the firing of T2 and T21
at ωt
= Π + α will reverse bias DF. The diode DF is turned off and the load connected to the
supply through T2 and T21.
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This conversion has better power factor due to the freewheeling diode.
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=
=
The average output voltage can be found from
=
π α
=
Fully Controlled Bridge Converter For R-L Load Without
Frewheeling Diode. When the single phase fully controlled bridge converter is connected with RL
load, during the positive half cycle thyristor T1 and T11
are forward biased and these two
thyristors are fired simultaneously at ωt = α, the load is connected to the input supply
through T1 and T11. Due to inductive load T1 and T1
1 will continue to conduct till ωt = Π
+ α, even though the input voltage is already negative. During negative half cycle of the
input voltage, thyristor T2 and T21
are forward biased, and firing of thyristors T2 and T21
at ωt = Π + α will apply the supply voltage across thyristors T1 and T11
as reverse
blocking voltage. T1 and T11
will be turned off due to line or natural commutation and
load current will be transferred from T1 and T11
to T2 and T21.
During the period from α to Π, the input voltage Vs and input current is positive,
and the power flows from the supply to the load. The converter is said to be operated in
rectification mode. During period from Π to Π + α, the input voltage Vs is negative and
the input current is positive, and there will be reverse power from the load to the supply.
The converter is said to be operated in inversion mode.
The average output voltage can be found from
= π+α
α
=
Procedure:
1. Switch ON the mains supply of firing circuit.
2. The trigger output pulse varies as we vary the firing angle potentiometer.
3. Connect 30V tapping of the transformer secondary to the power circuit.
4. Switch ON MCB, switch ON the trigger outputs and note down the voltage
waveforms across load and devices.
MSEC Bangalore Page 40
5. Observe the waveforms and note down Vdc and delay angle. Plot a graph of Vdc v/s
delay angle, for both cases of WITH free wheeling diode and WITHOUT free
wheeling diode.
Graph:
VDC
(Volts)
Delay Angle α (degrees)
Waveforms:
MSEC Bangalore Page 41
Tabular Column:
For R Load:
α (in degrees) VDC (practical) VDC (theoretical)
VDC = VM (1 + Cos α)/
Wh ere VM = VS * √ 2
Where VS is th e rms val ue o f th e sup pl y v oltage & VM is i ts pe ak volt age For R-L Load:
Without free-wheeling diode
α (in degrees) VDC (practical) VDC (theoretical)
VDC = VM /( cos α- cosβ)
With free-wheeling diode
α (in degrees) VDC (practical) VDC (theoretical)
VDC = VM (1 + cos α)/
RESULT :
CONCLUSION:
Waveforms:
Experiment No:11
VOLTAGE COMMUTATED CHOPPER BOTH CONSTANT
FREQUENCY & VARIABLE FREQUENCY
Aim: To obtain fired DC into variable DC by using voltage commutating for following specifications
Vm = 12.2v
Constant frequency
Components required: Voltage / Impulse commutated chopper module rheostat, power
supplies patch cards, voltmeter & ammeter, CRO.
Theory:
The choppers convert the input DC voltage into fixed or variable DC output. The chopper has
fixed or variable DC input, Vs.Hence DC chopper is also called as DC to DC converter. The output Vo
can be greater or less than the input. Hence the choppers can be step down or step up type. The
dynamic response of choppers is fast due to switching nature of the devices.
Circuit diagram:
Calculation:
Tabular column:
1) Constant duty cycle and variable frequency
TON TOFF Frequency(Hz) Voltage(V0)
2) Constant frequency and variable duty cycle
Duty Cycle (%) Voltage(V0)
Duty cycle =
f = =
Procedure:
Initially switch on the DC chopper firing circuit & observe the triggering output by
varying the duty cycle & frequency part by keeping the control switch into the initial
position.
Now make connection in power circuit as given in circuit diagram.
Initially set DC input voltage to 10v & connect a resistance load between points connecting the
triggering output from firing circuit to resistance SCRS in power circuit.
Keep ON/OFF switches in off position initially.
Switch on DC supply. Apply main SCR triggering pulses from firing circuit.
Observe voltage waveform across load.
Now vary DC supply up to 30v and draw output waveform at different duty cycles.
Result:
Conclusion: