physics 434 module 1
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Physics 434 Module 1. About the computers: You can save VI’s on the local disk. put them into My Documents\your_name (But beware: no backup, no protection) Or just use catalyst for temporary storage! Review of last week – some important LV lessons - PowerPoint PPT PresentationTRANSCRIPT
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Physics 434 Module 1
• About the computers:– You can save VI’s on the local disk.
• put them into My Documents\your_name• (But beware: no backup, no protection)
– Or just use catalyst for temporary storage!• Review of last week – some important LV lessons
– Controls, indicators, while (and for) loops, graphs– Right-click!– Tool options: auto, menu, or tab – Cntrl-b (remove bad wires, with care)– Cntrl-z (undo) – Shift-right-click: bring up the tool menu
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The next two weeks
• Introduction to DC I/O capability of the PCI-E board and use of the break-out box– 10 V out, upto 8 measurement channels, also 10 V.
• Wire a simple circuit on a breadboard– Layout guidelines– Oscilloscope, DVM auxiliary tools
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The “voltage divider” circuit
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dac0ach0
ach1
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R1 = 100R2 = 200
+
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PAUSE FOR SELF-TEST
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Properties of the USB DAQ– up to 16 input channels, multiplexed to a 16-bit ADC
• (we use four, configured as two differential)– 2 output channels (2 16-bit DACs) (we use one)– Questions:
• what does 16-bit mean? • Linear A vs. D: but what are the offset and scale factors?• Can you control them?• Differential vs. single-ended?
Reference: the full manual
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Basic block diagram
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See the full manual
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Analog input
Number of channels …………….………….8 differential or 16 single endedADC resolution................................................. 16 bitsSample rate Maximum................................. 500 kS/s Input coupling...................................................DCInput range........................................................ ±10 V, ±5 V, ±1 V, ±0.2 VInput FIFO size .................................................4,095 samples
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Analog output
• DAC resolution................................................. 16 bits• Maximum update rate (simultaneous)• 1 channel................................................... 900 kS/s• 2 channels ................................................. 840 kS/s per channel• Output range..................................................... ±10 V• Output coupling ................................................DC• Output impedance............................................. 0.2 Ω• Output current drive.......................................... ±5 mA• Output FIFO size .............................................. 8,191 samples shared
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Analog input/output wiring
• Differential inputs: 12” twisted pairs(yellow-blue +, blue -)– Input channel 0 (ach0): AI 0/AI 8 [1/2]– Input channel 1 (ach1): AI 1/AI 9 [4/5]
• Output: red/black(gnd) twisted pair– channel 0 (dac0): A0 0/ A0GND [15/16]
• Note that while the inputs are “floating”, the output is not: it is relative to ground (black wire at 16)
• Insert under the bar, as shownIt is important that all stations are the same.
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dac0 acho ach1
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Testing: get the testio vi
• Click on the calendar entry; copy Module1.llb to your space; open it, then the vi test_io
• We rarely build vi’s completely from scratch: this is a framework, around a custom vi to do the I/O
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Features of the test framework
• Knobs, dials for the input, two outputs• A special test mode – an important feature for
experimental design• I/O put into a special sub-VI with three “frames”
– Set dac0 using a DAQ assistant– Delay (default 0) (allow system to adjust to change)– Read ach0 and ach1 with another DAQ assistant.– All set for -10 to +10 volts: you may want to change later.
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Procedure for this week• Set the test mode of the test_io VI to produce outputs according to
what you would expect from Ohms law.• Revise the VI so that you can generate a graph like the one you
sketched (see the graph example in graphdemo vi, or examine fig 8.17.)
• Wire up the board with the two resistors, and make connections to the breakout board, to correspond to the question. Neat layout is very important, for you to understand, and for us to help!
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XY GraphX InputY Input
XY Graph
Instance
Numeric
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Hints
• VI: keep neat, use labels and add comments• Test each piece first! You can have separate vi’s• Breadboard: Lay out the circuit neatly: use the space• If appropriate, test the circuit with power supply, DVM
or scope before trying to run the VI.• Keep good notes: a personal lab book is best• Use reference material• Ask a staff member
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Requirements for the VI
• Sweep through predefined set of values for setting V0 (perhaps a for loop)
• Record values for V1 and V2 for graphs and analysis, using either or both experimental or test modes.
• Plots:– V1 and V2 vs. V0: the data and your expectation (test mode) perferably on
the same graph, each labeled (so 4 graphs on the same plot) or two plots)– V2 vs. V1 (as in the pretest)
• Analysis:– Discuss the graphs and comment on the results– Measure and comment on the ratio V2/V1 and the sum V2+V1. (You may
want to have plots or at least some measurements)
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Turning in your VI(s)
• Operate | Make current values default – needed to record your results by saving the graphs
• File | VI properties | Documentation: write a little report, containing your name(s), purpose of the VI, implementation features, conclusions.
• Submit multiple VIs in an llb, like Module1.
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Bonus (upto 5)
• see if you can detect the fact that either input or output are discrete! Make separate VI.
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Next week’s circuit
Lamp Characteristic Test Circuit
V (10V)
IRF 511
R1, 22
Lamp
R0, 1M
D
S G Set the voltage here…
And measure the voltage and current here
The IRF511 power MOSFET Transistor.
G D S
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