parasitic extraction product from tanner eda
DESCRIPTION
Parasitic Extraction: Tanner EDA’s HiPer PX helps you reliably design high-performance circuits in modern process technologies.TRANSCRIPT
Copyright © 2008 Tanner Research, Inc. All rights reserved.
A DIVISION OF TANNER RESEARCH, INC.
Parasitic Extraction
Tanner EDA’s HiPer PX helps you reliably design high-performance
circuits in modern process technologies.
Page 2 Copyright © 2009 Tanner Research, Inc. All rights reserved.
• First EDA solution on Windows
• Development, sales and support of IC design tools since 1988
• 25,000 installed seats worldwide – Global presence
• Expertise in advanced microelectronics research such as MEMS, speech recognition, active pixel imagers and data acquisition systems
Tanner EDA Facts
Tanner Research, Inc. Headquarters
Monrovia, CA
Page 3 Copyright © 2009 Tanner Research, Inc. All rights reserved.
Interconnect Parasitics in Modern Processes
• As process geometries shrink, the impact of interconnect parasitic effects gets larger
• Importance has shifted from vertical to lateral crosstalk capacitance
Page 4 Copyright © 2009 Tanner Research, Inc. All rights reserved.
Traditional Approaches
• Manual estimation on known-critical nets• easy to miss unexpected problems
• Avoidance and mitigation techniques• wasteful of area, time
• Lumped vertical extraction• misses now-dominant lateral crosstalk capacitance
Page 5 Copyright © 2009 Tanner Research, Inc. All rights reserved.
HiPer PX
• Tanner EDA’s parasitic extraction tool• Proven technology
• Interconnect extract engine based on the long-running and influential Space project at TU Delft
• Integrated with L-Edit• RC interconnect models• 2D, 3D, and hybrid extract modes• Frequency based circuit reduction
Page 6 Copyright © 2009 Tanner Research, Inc. All rights reserved.
HiPer PX – 2D and 3D
• 2-D Mode (table interpolation)• 2-D extraction is extremely fast (>1M transistors/hr)• Accurate enough for many designs, and fast enough to
extract huge circuits
• 3-D Mode (boundary element)• Maximum accuracy• Still fast enough to run medium sized circuits (thousands
of transistors)
Page 7 Copyright © 2009 Tanner Research, Inc. All rights reserved.
Extract Early and Often
• HiPer PX extracts both devices and interconnect parasitics in one pass
• No requirement for an LVS pass; extract while you work and catch problems early
Page 8 Copyright © 2009 Tanner Research, Inc. All rights reserved.
Accurate Post-Layout Simulations
• All resistors and capacitors are treated the same• drawn resistors and
capacitors divided into finite elements
Page 9 Copyright © 2009 Tanner Research, Inc. All rights reserved.
Faster Simulations
• Netlist reduction • fastest possible simulations with accuracy guaranteed up
to specified frequency
Page 10 Copyright © 2009 Tanner Research, Inc. All rights reserved.
Flexible
• Analyze just resistance or just capacitance at the push of a button
• Selectively extract parasitics on important nets• Extract a single cell, a clipped out region, or the
whole chip
Page 11 Copyright © 2009 Tanner Research, Inc. All rights reserved.
Tanner EDA
• Find out more via:
www.TannerEDA.com
Contact sales:• [email protected]• 1-877-325-2223