noninverted buck–boost converters with dual delta sigma modulators

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Noninverted Buck–Boost Converters with Dual Delta Sigma Modulators YASUNORI KOBORI, 1 MASASHI KONO, 1 TOSHIHIKO SHIMIZU, 2 and HARUO KOBAYASHI 1 1 Gunma University, Japan 2 Renesas Electronics Corporation, Japan SUMMARY This paper presents a new control circuit to create a high-performance noninverted buck–boost converter with dual ∆Σ modulations. Experimental load regulation, corre- sponding to load current steps of ±0.5 A, is within 45 mVpp, and the efficiency without a synchronized rectifier is 83% at an input voltage of 2.5 V and a load current of 0.8 A. © 2011 Wiley Periodicals, Inc. Electr Eng Jpn, 178(2): 21–28, 2012; Published online in Wiley Online Library (wileyonlinelibrary.com). DOI 10.1002/eej.21115 Key words: switching regulator; buck–boost con- verter; DC-DC converter; delta-sigma modulation; full bridge circuit. 1. Introduction Secondary batteries used in mobile devices continue to undergo improvements in their output voltage range and output capacity, and development of a buck–boost power source that can be controlled continuously so as to output the desired voltage stably despite changes of input voltage over a broad range is urgently needed. For instance, in a cell phone, the output of a conven- tional lithium-ion battery is 4.2 to 3.0 V for a circuit voltage of 2.5 V, which is sufficient when using only a step-down power source. However, in improved batteries, the battery output is extended toward the lower voltage range of 4.2 to 2.2 V, and the need to switch automatically and continu- ously from step-down to step-up operation arises. We have previously proposed a buck–boost power source with this kind of continuous control, and have re- ported on performance improvements using simulations and prototypes [1–5]. Here we report on the development of a noninverted buck–boost power source with a dual ∆Σ modulation control method. 2. Full-Bridge Configuration Buck–Boost Power Source 2.1 Proposal 1: Mixed control method In a switching power source, normally the output voltage is controlled by a pulse width modulation (PWM) signal. In the PWM duty ratio, there is, for instance, a limit of 10% to 90%. Therefore, when the input voltage drops slowly and the power source control switches from buck to boost, there is an input voltage range (voltage gap) in which control is not possible around an ideal switching point. We evaluated a control method [1] to successively alter the mixing ratio by mixing the buck and boost control methods in this voltage gap. Figure 1 shows the concept of operation in this method. The voltage difference (gap volt- age) in the gap is measured based on the difference between the input and output voltages, and the buck and boost control ratios are switched using the PWM cycle. In other words, the mix ratio (boost: buck) is switched successively in accordance with the gap voltage. Figure 2 shows the configuration using the proposed method. The U/D switch (SW) controller in the figure is the equivalent of the voltage gap detector and mix ratio controller. © 2011 Wiley Periodicals, Inc. Electrical Engineering in Japan, Vol. 178, No. 2, 2012 Translated from Denki Gakkai Ronbunshi, Vol. 129-C, No. 1, January 2009, pp. 153–158 Fig. 1. Mix controlled buck–boost converter. 21

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Page 1: Noninverted buck–boost converters with dual delta sigma modulators

Noninverted Buck–Boost Converters with Dual Delta Sigma Modulators

YASUNORI KOBORI,1 MASASHI KONO,1 TOSHIHIKO SHIMIZU,2 and HARUO KOBAYASHI11Gunma University, Japan

2Renesas Electronics Corporation, Japan

SUMMARY

This paper presents a new control circuit to create ahigh-performance noninverted buck–boost converter withdual ∆Σ modulations. Experimental load regulation, corre-sponding to load current steps of ±0.5 A, is within 45 mVpp,and the efficiency without a synchronized rectifier is 83%at an input voltage of 2.5 V and a load current of 0.8 A.© 2011 Wiley Periodicals, Inc. Electr Eng Jpn, 178(2):21–28, 2012; Published online in Wiley Online Library(wileyonlinelibrary.com). DOI 10.1002/eej.21115

Key words: switching regulator; buck–boost con-verter; DC-DC converter; delta-sigma modulation; fullbridge circuit.

1. Introduction

Secondary batteries used in mobile devices continueto undergo improvements in their output voltage range andoutput capacity, and development of a buck–boost powersource that can be controlled continuously so as to outputthe desired voltage stably despite changes of input voltageover a broad range is urgently needed.

For instance, in a cell phone, the output of a conven-tional lithium-ion battery is 4.2 to 3.0 V for a circuit voltageof 2.5 V, which is sufficient when using only a step-downpower source. However, in improved batteries, the batteryoutput is extended toward the lower voltage range of 4.2 to2.2 V, and the need to switch automatically and continu-ously from step-down to step-up operation arises.

We have previously proposed a buck–boost powersource with this kind of continuous control, and have re-ported on performance improvements using simulationsand prototypes [1–5]. Here we report on the developmentof a noninverted buck–boost power source with a dual ∆Σmodulation control method.

2. Full-Bridge Configuration Buck–Boost PowerSource

2.1 Proposal 1: Mixed control method

In a switching power source, normally the outputvoltage is controlled by a pulse width modulation (PWM)signal. In the PWM duty ratio, there is, for instance, a limitof 10% to 90%. Therefore, when the input voltage dropsslowly and the power source control switches from buck toboost, there is an input voltage range (voltage gap) in whichcontrol is not possible around an ideal switching point.

We evaluated a control method [1] to successivelyalter the mixing ratio by mixing the buck and boost controlmethods in this voltage gap. Figure 1 shows the concept ofoperation in this method. The voltage difference (gap volt-age) in the gap is measured based on the difference betweenthe input and output voltages, and the buck and boostcontrol ratios are switched using the PWM cycle. In otherwords, the mix ratio (boost: buck) is switched successivelyin accordance with the gap voltage. Figure 2 shows theconfiguration using the proposed method. The U/D switch(SW) controller in the figure is the equivalent of the voltagegap detector and mix ratio controller.

© 2011 Wiley Periodicals, Inc.

Electrical Engineering in Japan, Vol. 178, No. 2, 2012Translated from Denki Gakkai Ronbunshi, Vol. 129-C, No. 1, January 2009, pp. 153–158

Fig. 1. Mix controlled buck–boost converter.

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In Fig. 2, the two switches S1 and S2 perform switch-ing operations using the PWM signal from only one side.In buck switching, S2 is set to OFF at all times, and S1performs switching. In boost switching, S1 is set to ON atall times, and S2 performs switching. Switching is control-led in the U/D SW controller for every PWM cycle.

2.2 Voltage conversion equations in the mixedcontrol method

(1) Basic voltage conversion equations in a buckand boost power source

The voltage conversion equation M (= V0/Vi) in abuck power source or a boost power source is ideally givenby the following equations.

Here D is the duty ratio.In a real power source, the switching elements, coil

internal resistance, and load resistant R are affected, and thevoltage conversion ratio is known to be given by the follow-ing complex equations [6].

Here, if rL is taken to be the coil internal resistance, rD is thediode connection (or conduction) resistance, and rS is theswitch connection resistance, then the various internal re-sistances Zo can be represented using the equations below:

Therefore, when outputting a fixed voltage, the actual inputvoltage range must have further margin, and the voltage gapexpands more.

(2) Voltage conversion equations in the mixedcontrol method

The voltage conversion ratio in a buck and boostpower source using the mixed control method can be con-sidered as follows using the state space averaging method[6]. In a mixed state, the buck voltage and boost voltage areboth regulated to their maximum values in the duty ratio inthe voltage gap. Therefore, if the respective voltage conver-sion ratios are designated as MUM and MDM, and the mixingratio (buck:boost) is M:N, then the voltage conversionequation using buck–boost operation is

Thus,

2.3 Proposal 2: DS modulation mixed controlmethod

In the mixed control method, detection of the voltagegap and control of the mixed ratio in the gap are essential.In this case, the mixing ratio must be controlled in se-quence, and the circuit configuration and control procedureare complex. Thus, we evaluated a ∆Σ modulated mixedcontrol method that uses a ∆Σ modulator circuit in the U/DSW controller (the configuration is the same as that in Fig.2). In this method, it is not necessary to detect the voltagegap, and the mixing ratio is automatically switched acrossthe entire input voltage range.

2.4 Proposal 3: Dual DS modulation controlmethod [3, 4]

(1) Configuration of the dual ∆Σ modulationcontrol method

In the ∆Σ modulation mixed control method in Fig.2, both switches S1 and S2 are switched and controlledseparately using the PWM signal. With respect to the op-eration of each switch, buck–boost operation becomes pos-sible by primarily operating S1 for buck switching and S2for boost switching, even when controlling the switchesindividually in the PWM cycle. Thus, we evaluated amethod of controlling the switches by setting up two inde-pendent ∆Σ modulation circuits as shown in Fig. 3. Notethat the response speed is improved by using the clock inboth modulation circuits as the inverse phase.

In the configuration shown in Fig. 3, the parametersare set with L = 1.6 µH and C = 200 µF, and the ∆Σmodulation clock is set to fck = 2 MHz. First, the operationof buck–boost control is checked using an open loop. Figure4 shows the output pulse (MOS gate control pulse) in each

Fig. 2. Buck–boost converter with U/D controller.[Color figure can be viewed in the online issue, which is

available at wileyonlinelibrary.com]

(1)

(2)

(3)

(4)

(5)

(6)

(7)

(8)

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modulation circuit and the output voltage when the samesine wave is applied to the input edge of each ∆Σ modula-tion circuit. Here, the MOS is on when the pulse is at the“H” level. Based on the figure, the ON state for both MOSis long when the output voltage is in the boost mode, andthe OFF state for both MOS is sustained for a long time inthe buck mode. The minimum pulse width and clock cycleare both the same, 0.5 µs.

(2) Characteristics of the ∆Σ modulation controlmethod

In feedback control in the power source under thePWM control method, the pulse width (i.e., the duty ratio)of the PWM is controlled at high resolution and the outputvoltage is stabilized for the amplified error voltage. On theother hand, in the dual ∆Σ modulation method, a binary

pulse that is controlled to ON or OFF in the clock cycle isoutput on the basis of the amplified error voltage. There-fore, control precision is poor for a single pulse, but aftersuccessive feedback of the control error component, thelater pulse precision rises. In this instance, the output of the∆Σ modulation circuit determines the ON/OFF output foreach clock cycle based on the sum of the power sourceoutput error component and the modulation circuit errorcomponent. The minimum pulse width is fixed at the clockcycle To, and the cycle T is determined by the number ofON/OFF continuous pulses. In this case, the duty ratio isvaried by altering the cycle using pulse frequency modula-tion (PFM) control. Here, the average voltage conversionratio is determined by the duty ratio, as is the case in PWMcontrol, and is represented in Eqs. (3) and (4) in accordancewith the buck operation and boost operation at each instant.

3. Dual DS Buck–Boost Converter (Simulation)

3.1 Normal operation and componentwaveforms

We evaluated the operation and characteristics of thedual ∆Σ modulated buck–boost converter shown in Fig. 3through simulations. Figure 5 shows the gate pulses in bothMOSFETs and the input current id2 and the output voltageVo passing through diode D2. The buck/boost modes in theoutput voltage and the pulse waveforms for each MOS areoperating appropriately. Here the steady ripple at an inputvoltage of Vi = 2.5 V, an output voltage of Vo = 2.5 V, anda load current of Io = 0.5 A is extremely low at Vrip = 3mVpp.

Figure 6 shows the output ripple waveform when theamount of fluctuation in the current is ∆Io = 0.5, 1.0, and1.5 A with respect to a current Io = 0.5 A at low load.

Fig. 5. Waveform of the dual ∆Σ converter.

Fig. 3. Buck–boost converter with dual ∆Σ modulators.[Color figure can be viewed in the online issue, which is

available at wileyonlinelibrary.com]

Fig. 4. Output pulses of dual ∆Σ modulators.

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3.2 Load fluctuation response (dynamic load

regulation) and output voltage ripple

We confirmed the response characteristics (outputripple voltage) with respect to load fluctuations in the sameconfiguration. Initially, the ripple was large, and a largepositive and negative imbalance occurred. Thus, the ripplewas smoothed to 35 mVpp with good high and low balanceby combining the characteristics of the two ∆Σ circuits(gain and phase compensation characteristics) for eachripple. Figure 7 shows a comparison of the two proposedmethods as regards improvement of the ripple with respectto the load current step ∆Io at this point. It is clear that theripple was reduced even when ∆Io was high under the dual∆Σ modulation method.

3.3 Evaluation of efficiency

In addition to the ripple voltage in the power sourceperformance, the efficiency η is also important. Figure 8shows the results of a simulation of the efficiency η withrespect to the output current Io for each input voltage Viwhen the output voltage is Vo = 2.5 V, the clock frequencyf = 500 kHz, L = 1.5 µH, C = 300 µF, and the connectionresistance for each SW⋅Di is Ron = 50 mΩ. In the figure,the order of the legends is corresponding to one of thegraphs. In the experimental circuit, a buck–boost powersource using an asynchronous rectification method wouldbe used, because control under the synchronous rectifica-tion method using the MOS switches in parallel in a diodewould be difficult. The synchronous rectification method isused for the purpose of improving efficiency, and as a result,the efficiency drops by several percent under the asynchro-nous rectification method.

In the characteristics shown in Fig. 8, the efficiencyis good overall when the input voltage is near 3.0 V, and themaximum efficiency reaches 83% at Io = 0.5 A. In theoperation of the buck power source in this state, buckcontrol switches to the main current from the buck–boostcontrol state. When the input voltage is below 3 V, theproportion of boost-type operation increases, the equivalentinternal resistance of the power source increases, the con-nection (or conduction) loss rises, and the efficiency drops.Furthermore, if the input voltage rises above the buck-statelimit voltage of 3 V, then the voltage conversion ratio andthe duty ratio steadily decrease, and the efficiency tends intheory to fall slightly. When the efficiency is consideredwith respect to the output current, if the output current dropsbelow 0.3 A, then the proportion of switching loss unrelatedto the output current rises, and as a result, the efficiencysteadily drops. On the other hand, if the output current isgreater than 0.5 A, then the connection loss in the switch

Fig. 6. Improvement of the output voltage ripple.[Color figure can be viewed in the online issue, which is

available at wileyonlinelibrary.com]

Fig. 7. Output ripple versus load current step. Fig. 8. Efficiency versus input voltage.

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and diode increases proportionally, and the efficiency tendsto drop slightly. Under the simulation conditions here, themaximum efficiency is obtained at about Io = 0.5 A. Notethat in order to increase the output current Io to obtain themaximum efficiency, the internal resistance must be re-duced.

4. Confirmation Experiments (Dual DS ModulationControl Method)

4.1 Experimental circuit

Figure 9 shows the prototype circuit for the ∆Σ modu-lator. In an ordinary ∆Σ modulator, an A/D converter and aD/A converter are required, and one bit is sufficient forswitching control. This can be achieved using one D-latch.Moreover, the op-amp is used for the intergrator and theadder addition, and the added resistance is assumed to bethe same.

4.2 Efficiency improvement in theexperimental circuit [5]

We confirmed the operation and measured the per-formance by experiments on the dual ∆Σ modulation con-trol method. We initially used a small MOSFET and diodein the experiments, and as a result, the loss due to the ONresistance was high. Moreover, the prototype coil diameterwas small, and the internal resistance was high. Thus, theinternal resistance of the MOSFET was set to 10 mΩ, andthe forward voltage VF of the diode was set to 0.3 V. Thecoil had its internal resistance halved to r = 50 mΩ. In thisway we revised each element and attempted to improve theefficiency, but on average the efficiency was only about75%.

Thus, we evaluated the factors other than circuitelements that reduced efficiency. First, we evaluated theincrease in switching loss caused by an increase in the diode

capacity due to the larger switch S1. If the clock frequencyis lower, then the efficiency should rise. However, in realitythere was no significant change in efficiency. Thus, weevaluated the various control pulse states in dual ∆Σ modu-lation, and realized that modes not found in the buck orboost operation were present in the two switching states.That is, because each modulator operates independently,there are four modes, SW1: SW2 = (ON: ON), (ON: OFF),(OFF: ON), and (OFF: OFF), resulting from the switchingstates.

Here, the (OFF: ON) mode is the state that maintainsthe coil current or the coil energy, and is an idle state thathardly contributes to the control of the output voltage. It isthus clear that the coil current flows in the form D1 ⇒ L ⇒S2 ⇒ D1, and a large loss occurs due to the internalresistance of each element. Efficiency can be improved bymore than 5% on average by forcibly allocating this modeto the other modes logically.

4.3 Measurements of efficiency

We removed the idle state shown above. Figure 10shows the measured efficiency with respect to the loadcurrent when Vin = 2.5 V. In the measurements reportedhere, we created a prototype using a discrete power MOS,and used a handmade coil. In this case, efficiency wasreduced by increasing the switching loss slightly becauseof small capacitance and equivalent series inductance(ESL) of the gate wiring and IC pins.

In the measurements reported here, the efficiencydropped significantly when Io < 0.2 A, but the power sourcewas similar to one without the conventional measures toimprove efficiency under low load. On the other hand, at Io= 0.9 A, η = 82% or more, and the efficiency tends to riseslightly with respect to a further increase in Io, with per-formance similar to that of an asynchronously controlledpower source.

Fig. 9. Circuit for the ∆Σ modulator. Fig. 10. Efficiency versus Io (experiment).

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The circle in the upper part where Io = 0.5 A in thefigure represents the efficiency for a buck unit (Vin = 2.5V) with a conventional configuration in the same circuit,and the circles below represent the efficiency for a boostunit (Vin = 2.5 V). Measurements were performed withunnecessary switches and diodes removed. The efficiencyof a conventional boost and buck series connected powersource is the product of the two efficiencies, with η = 66%expected. In comparison with this, it is clear that the dual∆Σ control method has an efficiency adequate for use.

Figure 11 shows the measured values for the effi-ciency η with respect to the input voltage Vin when the loadcurrent is constant (Io = 0.46 A). A maximum efficiency ofη = 81% is reached near where the mixing ratio is highestdue to delta-sigma modulation. The average efficiency isabout 80%, and further improvements in efficiency due tosynchronous rectification of the two diodes can be ex-pected.

Figure 12 shows the relationship between the clockfrequency and efficiency for each input voltage when theload current is constant (Io = 0.47 A). When the frequency

rises, the switching loss increases, and the efficiency dropsslightly, as is the case in a normal switching power source.Furthermore, at the lower frequency, the operation of the∆Σ modulator is slower, the loss due to increased ripple inthe coil current rises, and efficiency drops.

4.4 Voltage ripple versus load currentfluctuations

We switched the load resistance in the prototypecircuit periodically, and measured the output voltage ripple(see Fig. 13). The voltage variation is ∆Vo = 2 mV withrespect to a load current fluctuation of ∆Io = 0.25 A, whichrepresents sufficient load regulation characteristics. Fur-thermore, no overshoot is seen, although harmonic oscilla-tion during switching generates approximately ∆Vo = 15mV. However, this is large because the circuit has beencreated with discrete components. It can probably be re-

Fig. 11. Efficiency versus Vin (experiment).

Fig. 12. Efficiency versus clock frequency.

Fig. 13. Output voltage ripple versus Io step.

Fig. 14. Closed-loop characteristics of the experimentalcircuit.

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solved by using IC and modularization, as found in ordinarypower sources.

For the loop characteristics of the buck–boost powersource using the dual ∆Σ modulation in the prototypedescribed here, the cutoff frequency is 3.0 kHz, as seen inFig. 14. If the inductance and the output capacitance arereduced, then the response frequency characteristics can beincreased, but the current and voltage ripple also rise. Adetermination based on the level of variation in the loadcurrent and the ripple specifications should be made.

5. Conclusions

We evaluated a noninverted buck–boost converterusing dual ∆Σ modulation. We established its operationthrough simulations. We also confirmed stable operation inan experimental circuit, and measured the ripple and effi-ciency. The voltage variation was 2 mV and the overshootwas 8 mV for a load current fluctuation of 0.25 A. Theefficiency was about 80% on average when not using thesynchronous rectification method, demonstrating the pos-sibility of practical use.

REFERENCES

1. Furuya T, Kobori Y, Tsugane M, Kobayashi H. Evalu-ation of a switching control method in a DC-DCconverter for portable phones. Institute of Electrical

Engineers of Japan Electronic Circuit Research Re-port, ECT-05-53, p 61–66, 2005.

2. Kobori Y, Furuya T, Kono M, Shimizu T, KobayashiH. A new control method for switched buck-boostDC-DC converters with delta-sigma modulation formobile equipment. 2006 International Symposiumon Intelligent Signal Processing and CommunicationSystems, p 127–130.

3. Kobori Y, Furuya T, Kono M, Shimizu T, KobayashiH. A new control method for buck-boost DC-DCconverters using dual delta-sigma modulations formobile equipment applications. 2006 Institute ofElectrical Engineers of Japan Analog VLSI Work-shop, CD-ROM.

4. Kobori Y, Furuya T, Kobayashi H, Kono M, ShimizuT. A seamless control buck-boost converter with dualdelta-sigma modulation over a wide input range.2007 Institute of Electrical Engineers of Japan Na-tional Conference, 4, p 82–83.

5. Kobori Y, Kono M, Kobayashi H, Shimizu T. Ad-vanced seamless control for buck-boost converterswith dual delta sigma modulators. 2007 Institute ofElectrical Engineers of Japan International AnalogVLSI Workshop, CD-ROM.

6. Harada K, Ninomiya T, Gu WJ. The fundamentals ofswitched-mode converters. Corona Publishing; 1992.p 41–47.

AUTHORS (from left to right)

Yasunori Kobori (member) received a bachelor’s degree from Tokyo Institute of Technology in 1974 and joined HitachiLtd. He received a D.Eng. degree from Tokyo Institute of Technology in 2001. He joined Matsue National College of Technologyin 2002. He became a visiting professor of Gunma University in 2004. He joined the College of Technology of Kinki Universityin 2008, and moved to Oyama National College of Technology in 2010. He is now an adjunct professor at Gunma University.He is interested in analog circuit and power electronics. He is a senior member of IEEE.

Masashi Kono (member) received his B.S., M.S., and Ph.D. degrees in electronic engineering from Gunma University in2003, 2005, and 2008 and joined the Central Research Laboratory, Hitachi Ltd., where he was engaged in research on analogintegrated circuit design. His current research interest is hardware technology for high-speed interconnections related to thenext-generation Ethernet. He is a member of IEEE, IEICE, and IEEJ.

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AUTHORS (continued) (from left to right)

Toshihiko Shimizu (nonmember) received his B.S. and M.S. degrees in electrical engineering from Keio University in1981 and 1983 and joined the Central Research Laboratory, Hitachi Ltd. In 2003, he joined Renesas Technology Corp. andmoved to Renesas Electronics Corp. in 2010, and is affiliated with its Mixed Signal Core Development Division. He is a memberof IEICE.

Haruo Kobayashi (member) received his B.S. and M.S. degrees in information physics from the University of Tokyo in1980 and 1982, M.S. degree in electrical engineering from UCLA in 1989, and D.Eng. degree in electrical engineering fromWaseda University in 1995. He joined Yokogawa Electric Corp. in 1982. In 1997, he joined Gunma University and presently isa professor in the Electronic Engineering Department. His research interests include mixed-signal integrated circuit design andsignal processing algorithms.

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