nemi technology roadmaps: closing identified technology gaps...

Chuck RichardsonSMTAI 2004

NEMI Technology Roadmaps:NEMI Technology Roadmaps: Closing IdentifiedClosing IdentifiedTechnology Gaps - NEMI Projects To Eliminate Technology Gaps - NEMI Projects To Eliminate PbPb

SolderSolder

2

Connect with and Strengthen Your Supply ChainConnect with and Strengthen Your Supply Chain

Presentation TopicsPresentation Topics

• Introduction to NEMI & 2004 Roadmap process

• Discuss Portable/Consumer 2004 Roadmap EmulatorExample

• Review Gap Analysis Process

• Review Example of Lead Free Gap

• Describe Lead Free & Associated Projects

• Discuss Lead Free / Tin Whiskers Project Results

• Discuss New Projects Identified From 2002/4Roadmap Work

• Summarize

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NEMI Mission StatementNEMI Mission Statement

NEMI is a North American basedconsortium whose mission is dedicatedto providing leadership for the globalelectronics manufacturing supply chainfor the benefit of its member companiesand the industry.


What Does NEMI Do?What Does NEMI Do?

Leverage the combined Power of MemberCompanies to Provide Industry Leadership

• NEMI Conducts Industry Forums on Emerging Topics

• NEMI Roadmaps the Needs of the North AmericanElectronics Industry

• NEMI Identifies Gaps (both business & technical) inthe North American Infrastructure

• NEMI Stimulates R&D Projects to fill these Gaps

• NEMI Establishes Implementation Projects toEliminate these Gaps

• NEMI Stimulates Standards to speed the Introductionof New Technology & Business Practices

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Industry Leaders belong to NEMI Industry Leaders belong to NEMI –– OEM/EMS OEM/EMS

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Industry Leaders belong to NEMI Industry Leaders belong to NEMI –– Suppliers Suppliers

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Industry Leaders Industry Leaders –– Consultants, Government, Consultants, Government,Organizations, and UniversitiesOrganizations, and Universities

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NEMI Planning MethodologyNEMI Planning Methodology

NEMI Manufacturing System Plan

Product Sector Requirements

Global Electronics ManufacturingRoadmap

NEMI Gap Analysis

NEMI Implementation Plan

NEMI Projects

RoadmappingRoadmapping

PlanningPlanning

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NEMI Roadmap Emulator ChaptersNEMI Roadmap Emulator Chapters

• 2004 Roadmap cycle will include 7 Product EmulatorChapters

• A product emulator is defined as an abstractrepresentation of a product to allow companies toshare needs without sharing proprietary productinformation

• Each chapter sets OEM requirements over the next 10years

• Requirements are presented as key product attributesin spreadsheet format and supporting text discussingbusiness and state of the art issues

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2004 Product Emulator Descriptions2004 Product Emulator Descriptions

Emulators Characteristics

Portable / Consumer High volume Consumer Products for which cost is the primary driver including Hand held, battery -powered products driven by size and weight reduction

System in a Package Complete function provided in a packag e to system manufacturer

Office Systems / Large Business Systems

Products which seek maximum performance from a few thousand dollar cost limit to literally no cost limit

Network / Datacom / Telecom Products

Products that serve the networking, datacom and telecom markets and cover a wide range of cost and performance targets

Specialty Emulators Defined by Operating Environment

Medical Products Products which must operate within a high reliability environment

Automotive Products which must operate in an automotive environment

Defense and Aerospace Products which must operate in extreme environments

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NEMI 2004 RoadmapsNEMI 2004 Roadmaps19 Individual Roadmap Chapters19 Individual Roadmap Chapters

• SemiconductorTechnology

• Packaging

• Mass data storage

• Board Assembly

• Final Assembly

• EnvironmentallyConscious Electronics

• Interconnect SubstratesOrganic

• Interconnect SubstratesCeramic

• Connectors

• Sensors

• RF Components &Subsystems

• Optoelectronics

• Passive Components

• Energy Storage &Conversion Systems

• Display

• Modeling, Simulation &Design Tools

• Thermal Management

• Test, Inspection &Measurement

• Product LifecycleInformation Management

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NEMI Roadmap AffiliationsNEMI Roadmap Affiliations

NEMIOptoelectronics

TWG

NEMIOptoelectronics

TWG

Optoelectronics andOptical Storage

InterconnectSubstrates—Ceramic

InterconnectSubstrates—Organ

ic

Magnetic andOptical Storage

Supply ChainManagement

Displays

Semiconductors

NEMI Roadmap

NEMIProduct Life-

CycleInformation

ManagementTWG

NEMIProduct Life-

CycleInformation

ManagementTWG

NEMIMass Data

Storage TWG

NEMIMass Data

Storage TWG

NEMI / IPCInterconnect

TWG

NEMI / IPCInterconnect

TWG

NEMI / SIAPackaging

TWG

NEMI / SIAPackaging

TWG

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Roadmap DevelopmentRoadmap Development

Product Emulator GroupsTWGs

Net

com

Med

ical

Pro

du

cts

Au

tom

oti

ve

Def

ense

an

d A

ero

spac

e

Semiconductor Technology

Design Technologies

Manufacturing Technologies

Comp./Subsyst. Technologies

Modeling, Thermal, etc.

Board Assy, Test, etc.

Packaging, Substrates, Displays, etc.

Product Sector Needs Vs. Technology Evolution

Business Processes Prod Lifecycle Information Mgmt.

Po

rtab

le /

Co

nsu

mer

Off

ice

/ Lar

ge

Sys

tem

s

Sys

tem

in a

Pac

kag

e

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2004 TWG Leadership2004 TWG Leadership

Eric Simmon, NISTProduct Lifecycle InformationManagement

Joe Johnson,MicrosoftMark Newton, DellEnvironmentally conscious

electronics

Tom Roth and Dr. CamMurray, 3MThermal management

S.B. Park, BinghamtonUniversity

Dr. Sanjeev Sathe, ASE(US) Inc.Modeling, simulation & design tools

Design Technologies

Co-ChairChairBusiness Processes/Technologies


2004 TWG Leadership (cont.)2004 TWG Leadership (cont.)

Gans Ganesan, U. Md.Mike Azarian, U. Md.• Sensors

Alan K. Allan, Intel Paolo Gargini, Intel• Semiconductor Technology

Ralph Brodd, BroddarpDan Doughty, Sandia Labs• Energy Storage &Conversion Systems

John MacWilliams, Consultant• Connectors

Roger F. Hoyt, Hitachi GlobalTom Coughlin, Consultant• Mass data storage

Dr. Norman Bardsley, USDCM. Robert Pinnel, USDC• Displays

Dr. Laura Turbini, CMAPJohn Stafford, Consultant• Optoelectronics

J. Stevenson Kenney, GIT;John Barr, AgilentDr. V.J. Nair, Intel• RF components &

subsystems

Dr. Joseph Dougherty, PSUPhilip Lessner, KEMET Electronics• Passive components

Ton Schless, MIDAS VisionHoward Imhoff, Metalor• Interconnect subs – ceramic

Dieter Bergman, IPCJohn T. Fisher, NEMI• Interconnect subs – organic

Bill Bottoms, 3MT Solutions Joe Adam, Skyworks• Packaging

Component/Subsystem Technologies

Dr. Reijo Tuokko, Tampere U.Mike Reagin, Delphi Delco• Final assembly

Stig Oresjo, AgilentMichael J. Smith, Teradyne• Test, inspection &measurement

Kirk VanDreel, Plexus

Dennis Krizman, Celestica• Board Assembly

Co-ChairChairManufacturing Technology

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Cellular Handset: Key Attribute NeedsCellular Handset: Key Attribute Needs

Parameter

Metric

2003

2005

2007

2013 RF section cost (for a given function)

Relative to costs in 2000

0.7

0.35

0.17

0.05

Number of freq bands 2

4

6

6

Number o f Antennas (Diversity) 1

2

2

3

Number of Modulation formats 2

4

5

5

Data transmission rate (peak)?

kb/s

14

160

1500

11,000 Transmit Peak - to - Average Ratio (worst)

dB

4 dB

5 dB

5 dB

4 dB

Talk time

minutes

90

120

160

200 Battery Voltage

V

3.3

2.7

1.5

1.2

RF section area

mm 2

1800

1200

800

500 RF component thickness

mm

2.5

1.5

1.5.MEMs

1.0,MEMS

From Portable emulator:

Average Component I/O Density

I/O per cm 2

70

80

100

140 Max Component I/O Density**

I/O per cm 2

280

320

350

450

I/O per Component, avg.

#

3.6

4.0

4.4

5.0 Package I/O Pitch (Perimeter)

mm

0.5

0.5

0.5

0.5

Package I/O Pitch ( Area array)

mm

0.5

0.4

0.25

0.2 Max I/O per package

I/O per pkg

256

288

312

360

Flip Chip I/O Pitch (Area)

mm

0.25

0.25

0.20

0.10 Substrate Lines and Spaces

microns

60

35

30

20

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Connect with and Strengthen Your Supply ChainConnect with and Strengthen Your Supply ChainMember Collaboration Efforts

SoftwareSolutions

Life Cycle Solutions

Materials

ComponentsCollaborative

Design

MaterialsTransformation

Substrates TIGProjects:

• High Frequency Materials Effects for HDI• Integral Passives Testing• Optical PWB Cost Modeling

Board Assembly TIGProjects:

• DPMO• Materials & Processes for High-

Performance Products• Substrate Surface Finishes for Lead-Free

Product Life Cycle Information Management TIG Projects:

• PDX Extensions & Updates• Data Exchange Convergence Project

- Industry Adoption

Optoelectronics TIGProjects:

• Fiber Optic Splice Improvement• Fiber Optic Signal Performance• Fiber Optic Splice Loss Measurement

Specification• Fiber Connector End-Face Inspection

Specifications

Environmentally Conscious Electronics TIGProjects:

• Lead-Free Assembly & Rework• Tin Whisker Accelerated Test• Tin Whisker Modeling• Tin Whisker User Group• RoHS Transition Group

Build toOrder

Equipment

China Efforts:• Sharing Best Practices• Lead-Free Transition

China Efforts:• Sharing Best Practices• Lead-Free Transition

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Closing Identified Technology Gaps: NEMIClosing Identified Technology Gaps: NEMIProjects To Eliminate Projects To Eliminate Pb Pb SolderSolder

• Phase 1 Projects:– 1998 Roadmap identified need for lead free processes– 1999 NEMI organized the Lead Free Assembly Project– Over a three year span; recommended Sn3.9Ag0.6Cu standard

alloy for reflow and / or Sn0.7Cu for wave solder– Followed with extensive testing to characterize the new materials

and demonstrate reliability– Since then several other alloys have been proposed by others but

most commercialized alloys vary slightly from the NEMI proposedrange.

– Tin-silver-copper formulations with silver content between 3.5%and 4.1% and copper between 0.5% and 1.0% are virtuallyindistinguishable in terms of melting point (217C) and processfeatures.

– The NEMI alloy provides a model system for industry that is wellcharacterized and in use by NEMI members (HP, Intel, Motorola,Solectron, Celestica, Sanmina-SCI, Lace Technologies)

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• History of Pb-Free Projects Worldwide and NEMIProject Structure

• Analysis of Sn-Ag-Cu Alloy Results– Issues in processing, particularly in the transition period

– Reliability testing results

– Melting behavior of Sn-Ag-Cu alloys as function of composition

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•• AT&T/ Lucent Technologies AT&T/ Lucent Technologies•• Ford Motor Company (Ford) Ford Motor Company (Ford)•• General Motors (GM) General Motors (GM) ——Hughes AircraftHughes Aircraft•• General Motors General Motors——Delco ElectronicsDelco Electronics•• Hamilton Standard, Division of United Technologies Hamilton Standard, Division of United Technologies•• National Institute of Standards and Technology (NIST) National Institute of Standards and Technology (NIST)•• Electronics Manufacturing Productivity Facility (EMPF) Electronics Manufacturing Productivity Facility (EMPF)•• Rensselaer Polytechnic Institute (RPI) Rensselaer Polytechnic Institute (RPI)•• Rockwell International Corporation Rockwell International Corporation•• Sandia Sandia National LaboratoriesNational Laboratories•• Texas Instruments Incorporated Texas Instruments Incorporated

NCMS Lead-Free Solder ConsortiumNCMS Lead-Free Solder Consortium

1993-1997

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NEMI Task Group Structure: 1999-2002NEMI Task Group Structure: 1999-2002

NEMI Pb-free Assembly Task ForceEdwin Bradley, Motorola

Rick Charbonneau, StorageTek

Solder AlloyCarol Handwerker, NIST

ComponentsRich Parker, Delphi

ReliabilityJohn Sohn, NEMI

Assembly ProcessJasbir Bath, Solectron

Tin WhiskersSwami Prasad, ChipPAC

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NEMI Assembly Project ParticipantsNEMI Assembly Project Participants

•OEMs/EMS•Agilent•Alcatel Canada•Celestica •Compaq•Delphi Delco•IBM•Intel•Kodak•Lucent•Motorola•Sanmina-SCI•Solectron•StorageTek

•Solder Suppliers•Alpha Metals•Heraeus•Indium•Johnson Mfg.•Kester

•Components•ChipPac•Intel•Motorola•Texas Instruments•FCI USA Electronics

Govt. & OtherNISTSUNY-B/IEECITRI (US)IPC

EquipmentBTUDEKOrbotechTeradyneUniversalVitronics-Soltec

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Debate on Alloy CompositionDebate on Alloy Composition

Which alloy composition should we use?

Three main effects of solder alloy composition:

During assembly:

melting, wetting, reaction, solidification

After assembly:

thermal fatigue resistance, fracture, tin

whiskers

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Melting Behavior of Sn-Ag-Cu soldersMelting Behavior of Sn-Ag-Cu solders

NEMI

eutecticJEIDA

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NEMI

eutectic

JEIDA

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Inside green lines -<0.5% solid

Inside red line –<1% solid < 0.5% solid

< 1% solid

NEMIJEIDA

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Lead-free surface finishes¸Organic surface finishes already a problem for Sn/Pbsolder¸Higher reflow temperatures with Sn-Ag-Cu is even more ofa challenge; second side reflow

Sn-Ag-Cu solders with Sn/Pb balls¸No discernable issues

Sn-Ag-Cu balls with Sn/Pb solders¸May be some issues of backward compatibility withrespect to reliability for area array joints

Sn-Ag-Cu solders with Sn/Pb surface finishes¸Through-hole fillet lifting

Transition IssuesTransition Issues

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Through-Hole Lead

Solder Fillet

Separation duringCooling

Through-Hole on Board

Morpholology Morpholology of Fillet Liftingof Fillet Lifting

NCMS Lead-FreeSolder Project andcollaborationbetween NIST andTsung-Yu Pan,Ford

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Universal Build Visual Inspection Results:Universal Build Visual Inspection Results:CBGACBGA

Visual Inspection Criteria must be changedVisual Inspection Criteria must be changed

Tin-lead paste/tin-lead CBGA(Shiny joint)

Lead-free paste/ Tin-lead CBGA(Dull joint)

Lead-free paste/lead-free CBGA(Cratered solder joint)

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0

3

2

4

2a

1

5a

5

6

48 100 240352

PBGA

M2CSP(stacked)

196 (15X15 mm) 72 (8X10 mm)

Lead count

MSL

Package Vs. MSL Vs. Peak Reflow Temperature

uBGATBGA

388 (35X35 mm)

S1

S2

S1

S2

S1

S2

S1 S2S1

S1

S1

S1

S3

S2

S2

S2

S1

S3

S2

S2

S2

MSL vs Reflow Temperature: IC Packages

S1, S2, S3, etc. = S1 is existing package structure; S2 is improved package structure; S3 is further improved package structure;S1, S2, S3 may not be the same for each package tested (i.e. new mold compound, assembly equipment, die coat, etc.)

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Reliability Test MatrixReliability Test Matrix

ComponentSourceDescriptionReliability Testing-40 to 125°

C0 to 100°

CType 1 TSOPAMD48 Pin TSOP with leads on shortsides, SnPb and NiPd finishesSolectron2512 ResistorKoaspeerzero ohm chip resistor, SnPb andpure Sn finishesSanmina-SCI169 CSPLucent0.8mm pitch, 11x11mm, 7.7 x 7.7mm die, SnAgCu and SnPb ballsKodakLucent208 CSP(HDPUG)ChipPac0.8mm pitch, 15x15mm, 8.1 x 8.1mm die, SnAgCu and SnPb ballsKodak (bothSnAgCualloys)Sanmina-SCI256 BGA(NCMS)Amkor1.27mm pitch, 27x27 mm, 10.0 x10.0 mm die, SnAgCu and SnPbballsCelesticaSanmina-SCI256 CBGAVendorpart; IBMball attach1.27mm pitch, no die, SnAgCu andSnPb ballsMotorola

SnAgCu balls: Sn4.0Ag0.5Cu - provided by Heraeus

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Reliability flow chartReliability flow chart

Test PlanDesign, Procure

BoardsAssembly

Identify, ProcureComponents

CTEMeasurements

T0 Information• AOI• C-SAM• x-ray

Bend Testing

ElectrochemicalMigration Testing

ThermalCycling

Data Analysis

Failure Analysis• Post-cycling C-SAM• Cross-section• Joint characterization• Dye Penetrant Analysis

Pre-AssemblyC-SAM

Final Report

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169CSP Lifetime Analyses: What are169CSP Lifetime Analyses: What areAcceleration Factors for Sn-Ag-Cu ?Acceleration Factors for Sn-Ag-Cu ?

0 °C to 100 °C cycling -40 °C to +125 °C cycling

Pb-Pb Pb-LF LF-LFh (N63) 3321 3688 8343b 7.5 2.9 4.1

Pb-Pb Pb-LF LF-LFh (N63) 1944 3046 3230b 6.6 11.3 7.7

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Example of Solder Joint Microstructure:Example of Solder Joint Microstructure:169CSP, LF-LF, -40 169CSP, LF-LF, -40 °°C to +125 C to +125 °°CC

Solder consists oftin dendritesseparated byCu-Sn and Ag-Snintermetallics

Sn-3.9Ag-0.6Cu

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ATC Relative PerformanceATC Relative Performance

-40 to +125 0 to 100

Component Relative Performance Relative Performance

SnPb - SnPb SnPb - LF LF-LF SnPb - SnPb SnPb - LF LF-LF

AMD 48 TSOP - im Ag bds 0 - 0

AMD 48 TSOP - NiAu bds 0 + +

2512 Resistors - im Ag bds 0 0 0

2512 Resistors - NiAu bds 0

169 CSP 0 + + 0 0 +

208 CSP 0 0 + 0 + +

208 CSP - JEITA alloy 0

256 PBGA 0 0 0 0 0 0

256 Ceramic BGA 0 - +0 equivalent to SnPb-SnPb benchmark (95% confidence bounds)

- statistically worse than SnPb-SnPb benchmark

+ statistically better than SnPb-SnPb benchmark

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Pb-Free Project ResultsPb-Free Project Results

• Solder Alloy

– Recommended Tin-Silver-Copper alloy (Sn/Ag3.9/Cu0.6) for reflowand Tin-Copper alloy (Sn99.3/Cu0.7) for wave soldering

– Backwards compatible with lead based systems

• Components

– Maximum component temperatures of 240C for large ICs, 250C maxfor small ICs on boards £ 0.92” thick were achieved

– JEDEC revised J-STD-020B standard 250°C –5/+0

• Process

– Manufactured with existing assembly process equipment

– Performance of Pb-free pastes and fluxes are adequate

• Reliability– Demonstrated Pb-free joints are more reliable than tin-lead

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• Phase 2 Projects:

– Lead Free Hybrid Assembly & Rework Project» Includes extensive testing of tools and processes for reworking with SnAgCu

alloys on thick substrates (up to 0.130”)» Findings showed components reaching higher than the recommended maximum

of 260C during rework» Team is developing new tools and processes to keep temperatures between 245-

250C» Testing began in December on several assemblies using two different board

thicknesses and a variety of components manufactured with the new procedures– Tin Whisker Accelerated Test Project

» Open program to devise industry standard tests for predicting tin whiskers» Completed a second round of experiments and comparing results with Soldertec

of Tin Technology Ltd. (Europe) and the Japan Electronics and InformationTechnology Industries Association (JEITA) concluded that thermal cyclingaccelerates whisker growth

» Submitted definitions of tin whiskers and measurement techniques to JEDEC forconsideration as industry standards

» The team subsequently found that whiskers can also be induced by bias» The team is presently defining testing to evaluate bias

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– Tin Whisker Modeling Project» Attempting to understand why whiskers form and how to control them» This team continues to pursue an understanding of the mechanism(s) that cause

tin whiskers to form and grow» Published an annotated bibliography of tin whisker literature written by project

chair George Galyon (IBM)» Developed a consensus position on whisker theories» Experimentation is in process that looks at stress, crystal orientation and

material movement within tin film using laboratory prepared samples to eliminatethe variations in commercial plating processes

» The project has applied to Lawrence Livermore National Laboratory to use theirsynchrotron X-ray diffraction tool to gain insight into how whiskers form

– Tin Whiskers User Group Initiative» Formed to develop recommendations for lead free surface finishes on

components that minimize the risk of failure from tin whiskers in high reliabilityelectronic applications

» The root cause of tin whiskers is not yet fully understood so this initiative isdeveloping mitigation strategies to reduce the immediate risk

» Latest updates include: nickel-palladium or nickel palladium –gold instead of tin,use of a nickel underlay, heat treatment(150C for 1 hour) or reflow the tin coating

» Mitigation practices are continuously refined as new information is available

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Tin Whisker Formation¸Why? When? How?¸Is there a magic bullet?

Open IssuesOpen Issues

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Whisker ExamplesWhisker Examples

Odd-ShapedEruptions (OSE)

Hillocks(Lumps)

Needles

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Consistent cross-section(column)

Striations Rings

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Kinked Branched Initiating fromHillock

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NEMI Committee StructureNEMI Committee Structure

• Tin Whisker Test Standards Committee (Test Group)– First committee formed

– Objective to develop tests/test criteria for tin whiskers– 42 companies including two governmental organizations

– Nick Vo (Chair) – Motorola

– Jack McCullen (Co-Chair) – Intel

– Mark Kwoka (Co-Chair) – Intersil

• Tin Whisker Modeling Group (Modeling Group)– Formed to gain fundamental understanding of whisker formation– 13 companies including one government organization.

– George Galyon (Chair) – IBM

– Maureen Williams (Co-Chair) – NIST

– Irina Boguslavsky (Co-Chair) – EFECT, NEMI Consultant

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Tin Whisker CommitteesTin Whisker Committees

• Tin Whisker Users Group (Users Group)– Formed by large companies with high reliability products to

look at mitigation techniques– Started in late 2002

– 10 companies

– George Galyon (Chair) – IBM

– Richard Coyle (Co-Chair) – Lucent

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Test Team MembersTest Team Members

• Agilent

• Alcatel

• Allegro Microsystems

• AMD

• Analog Devices

• Boeing

• ChipPAC

• Cooper Bussmann

• Delphi Delco

• Engelhard Clal

• Enthone

• FCI Framatome

• Flextronics

• HP

• IBM

• Indium

• Infineon AG

• Intel (Co-Chair)

• Intersil (Co-Chair)

• IPC

• ITRI Soldertec

• Kemet

• Lockheed Martin

• Microchip

• Micro Semi

• Molex

• Motorola (Chair)

• NASA Goddard

• NIST

• NEMI

• On Semi

• Philips

• Raytheon

• Soldering Tech.

• Shipley

• Solectron

• ST Micro

• SUNY Binghamton

• SUNY Buffalo

• Technic

• Texas Instruments

• US Army

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Overview of Whisker Committee EffortOverview of Whisker Committee Effort

• Direct:– Completed two comprehensive matrices, Phase 1 and 2, both for ICs and

Passives.

– Proposed a definition for whiskers.

– Developed an inspection protocol.

– Identified three test methods recommended for plating finishdevelopment and characterization.

– Initiated test method document for potential release by JEDEC.

– Preparing matrix for Phase 3 DOE (validation and verification).

• Indirect:– Generated considerable momentum to understand whiskers and tin

plating globally.

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Whisker DefinitionWhisker Definition

• Purpose:– To specify the physical and visual characteristics of a tin whisker for

use in inspection (not intended as a metallurgical definition)

• Tin Whisker:– A spontaneous columnar or cylindrical filament, which rarely branches,

of tin emanating from the surface of a plating finish.

• NOTE, For the purpose of inspection tin whiskers havethe following characteristics:– an aspect ratio (length/width) > 2;

– can be kinked, bent, twisted;

– generally have a consistent cross-sectional shape;

– rarely branch;

– and may have striations/rings around it.

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RoHS Compliance Transition Issues RoHS Compliance Transition Issues –– OEM OEMExampleExample

• RoHS compliant/Pb-free SMT components must be compatible with a 260 oC peak reflow temperature. (Lower temperature requirements may be considered for some large, thick lead frame components.)

• Tin plating poses a reliability risk from Sn whisker growth which may cause electrical shorts.

• To mitigate tin whisker problems, recommended NiPdAu plating or a Ni layer (≥1.3 mm) below the Sn plating. Also, considering whether annealing Sn on Cu offers a practical technical solution.• Our test requirements are based on recommendations from NEMI’s test acceleration group. However, we have set requirements for test length and failure criteria based on our product requirements.

Note: Pb-free area array components (BGAs, CSPs, etc.) pose a reliability risk when used with today’s SnPb solder process, and should not be accepted for this process.

50


Summary-Summary-OEM Needs For Supply Chain AlignmentOEM Needs For Supply Chain Alignment

• Work with NEMI and standards committees to adapt existing standards to meet RoHS compliance.

• Communicate RoHS compliance requirements (not just “Pb-free”) to component suppliers and EMS providers.

• RoHS compliance compatibility means both metallurgical compatibility and manufacturing process compatibility.

• Communicate need for unique part numbers for RoHS compliance, tracking, repair, etc.

Note: RoHS compliance policy and compliance testing procedures have not yet been defined

51


Closing Identified Technology Gaps: NEMIClosing Identified Technology Gaps: NEMIProjects To Meet Projects To Meet RoHS RoHS / WEEE Directives/ WEEE Directives

• Phase 3 Projects:• Supply Chain Readiness Projects

– RoHS Assembly Process Specifications Project» Develop updated assembly/rework standards for LF assemblies» Develop process definition / component specifications documents for successful

implementation of LF assembly– RoHS Component and Board Marking Project

» Develop a standard for part marking that identifies LF status» Address components, cards and motherboards both raw material / finished product form

– RoHS Component Supply Chain Readiness» Develop component compatibility and compliance criteria to assess readiness of the supply

chain» Focusing on board mounted components and PCBs for mainstream & high reliability

applications– RoHS Materials Declarations Project

» EIA, EICTA, JGPSSI have drafted a Material Composition Declaration Guide and submitted it toJEDEC for approval

» Will run pilot tests to ID issues related to Declaration Guide» Recommend standard for materials declaration process / toolset» Supply automated reporting process with minimal supply chain impact

– RoHS Materials Composition Data Exchange Project» Joint project of PLIM and ECE TIGS» Investigating PDX 2.0, RosettaNet capability of resolving the need for a tool

52


Transition to Pb-free AssemblyTransition to Pb-free Assembly

• 1998 Roadmap identified the gap.

• Phase I project developed the alloy, process, componentsand reliability from 1999-2002.

• Phase II project is expanding the technology base toinclude rework, wave-soldering, and reliability of leadfinishes.

• 2002 Roadmap identified a number of business Issues toconvert to a Pb-free supply chain.

• Phase III project teams are currently being established toaddress these supply chain transition issues.

Results:

• The NEMI efforts have accelerated the establishment ofSAC alloys as the new standard and reduced the effort ineach member company.

53


Next Steps:Next Steps:Sharing information with the Supply ChainSharing information with the Supply Chain

NEMI RoHS/Pb-Free Summit MeetingNEMI RoHS/Pb-Free Summit MeetingOctober 18-20, 2004October 18-20, 2004

Co-sponsored by AeA, EIA, and IPCCo-sponsored by AeA, EIA, and IPC

hosted by StorageTek, Louisville, Colorado

54


Agenda: NEMI RoHS/Pb-Free Summit MeetingAgenda: NEMI RoHS/Pb-Free Summit Meeting

Monday, October 18Monday Morning – Regulatory Environment

Chair: Holly Evans, ConsultantMonday Afternoon — Status of Manufacturing Process Technology

Chair: Bob Pfahl, NEMI

Tuesday, October 19Tuesday Morning — Status of RoHS Implementation and Standards

Chair: Fern Abrams, IPCTuesday Afternoon — Business-to-Business Data Exchange

Chair: Jim McElroy, NEMI

Wednesday, October 20Working Discussions on Key TopicsNew Initiatives and NEMI Project Meetings

Chair: Dave McCarron, Dell

55


ConclusionConclusion

• NEMI forms projects to address technology / infrastructuregaps identified through roadmapping and gap analysisactivities

• NEMI identifies areas:– Not being addressed by other industry efforts– Where members can collectively have an impact

• Projects aim to eliminate gaps through:– Accelerated deployment of new technology– Development of industry infrastructure– Dissemination of efficient business practices– Stimulation of standards

• The projects to establish an infrastructure to meet therequirements of the EU’s RoHS directive and for eliminatinglead in electronics are excellent examples of the achievementsof the NEMI process

nemi technology roadmaps: closing identified technology gaps...

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