microprocessors 68hc11

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Microprocessors Juan C Luna

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Introduction to 68HC11 instruction set

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Page 1: Microprocessors  68HC11

MicroprocessorsMicroprocessorsJuan C LunaJuan C Luna

Page 2: Microprocessors  68HC11

Introduction

In order for microprocessors to be effectively utilized two things must be done:

• They must be interfaced to other components, such as memory and I/O devices, to create a microprocessor system

• They must be programmed to perform some specific function or functions

Page 3: Microprocessors  68HC11

• Microprocessors can have instruction sets containing many hundreds of different instructions

• The 68HC11, a relatively simple 8-bit microprocessor, for example has 108 different types of instruction

• We will not, therefore, examine all of these instructions in detail, rather, in exploring the basic concepts of microprocessor programming we will examine those that are most commonly used

• Once these basics are grasped, it should be relatively easy to apply that knowledge to the use of the wider instruction set and to the instruction set of any other microprocessor

Page 4: Microprocessors  68HC11

Programming Model of the 68HC11

Page 5: Microprocessors  68HC11

Addressing Modes

In any microprocessor instructions can be classified according to how the operand portion is specified, i.e. how it is addressed

To investigate this concept we will start by looking at the addressing modes of the 68HC11 microprocessor as these are relatively simple to understand

The 68HC11 actually has seven different addressing modes (although no single instruction can use them all)

Each of the modes (with one exception) results in the microprocessor generating a 16-bit effective address, which it places onto the address bus during the execution portion of an instruction cycle

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68HC11 Addressing Modes (1)

• Inherent Addressing

Inherent addressing is used by instructions that do not need to access memory or I/O locations, and for which the operand can be assumed from the nature of the instruction.

One example is the instruction to clear the contents of ACCA,

CLRA (op-code 4Fh)

Another example is the instruction to increment the X register,

INX (op-code 08h)

the μP knows from the op-code that the operand is the contents of IX and simply adds one to it

This instruction will stop the internal Clocks

STOP (op-code CFh)

All of the instructions to set or clear flags in the CCR also use inherent addressing

Page 7: Microprocessors  68HC11

68HC11 Addressing Modes (2)

• Direct Addressing

Direct addressing instructions require only two bytes (and only three cycles to execute), the format is shown below:

The first byte is the op-code, the second byte the low order address, no high order address is specified, it is automatically

assumed to be 00h

The op-code 96h loads data from address 0050h into ACCA; the byte immediately following the op-code is loaded into the low order byte of the DAR and the high order byte is automatically cleared to 00h

Page 8: Microprocessors  68HC11

68HC11 Addressing Modes (3)

• Page Zero Addressing

It is clear that direct addressing will always produces an operand address that is on page zero since the high order byte is always 00h

For this reason it is often called page zero addressing

Since it requires fewer bytes and has a shorter execution time than extended addressing it is used whenever possible

Typically addresses on page zero are used for the storage of operands and data used by programs, meaning data will be moved into and out of this area of memory, thus addresses 00xxh (page zero) on the memory map are always RAM addresses

Page 9: Microprocessors  68HC11

68HC11 Addressing Modes (4)

• Immediate Addressing

Often the data to be loaded into a μP register or operated on by the ALU are known, fixed values

In these cases it is not necessary to specify an operand address; instead the operand itself is specified immediately following the op-code:

The first byte is again the op-code, the second byte is not an address, it is the actual operand that will be operated on.

The op-code 86h will load ACCA with the data word 24h, the contents of the address immediately following the op-code in the code space (note the # designates an immediate value)

Page 10: Microprocessors  68HC11

68HC11 Addressing Modes (5)

• Extended Addressing

This address mode uses a 2-byte operand address following the op-code:

The op-code, B6h, causes the μP to fetch the next two bytes in memory and load them into the data address register (DAR) from where they will be placed onto the address bus

In executing the load instruction, the μP will then read the contents of the specified memory address into ACCA

Page 11: Microprocessors  68HC11

Quiz

After execution of the instruction

LDAA #99

what will the contents of the Data Register be?

1. 99

2. 0063h

3. 0099h

4. Data at address 0063h

5. Same as AccA

6. Unchanged

Page 12: Microprocessors  68HC11

68HC11 Addressing Modes (6)

• Indexed Addressing

The index addressing mode makes it easy to handle blocks or tables of data in memory:

Indexed addressing is always a two-byte instruction (except if there is a prebyte – see later), the first byte is the op-code and the second byte is an unsigned 8-bit number called the offset

The offset is added to the contents of the X or Y index registers to obtain the effective operand address, in the example shown the effective address will be 2Ah + [X]

Page 13: Microprocessors  68HC11

68HC11 Addressing Modes (7)• Relative Addressing

Conditional branch instructions that can be used to alter the sequence in which instructions are executed will all use the relative addressing mode

This class of instructions is what gives any μP its decision making capability and as such are very important to its operation

For this reason we give this form of addressing a more detailed examination a little later

Page 14: Microprocessors  68HC11

Quiz

What will the contents of the Data Register be after execution of the code shown on the right??

1. 512

2. 200h

3. 551h

4. 23Fh

5. 10

6. Unchanged

Page 15: Microprocessors  68HC11

68HC11 Instruction Set

Out of the thousands of possible op-codes, 308 are actually used to represent different operations

The instruction set of the 68HC11, however, only contains 108 different types of instruction, the difference occurs because many of the instructions can use more than one addressing mode

For example, one of the most common types of instruction is LDDA (load a value from memory into ACCA); this instruction can use any one out of five addressing modes: immediate, direct, extended, indexed X or indexed Y

Page 16: Microprocessors  68HC11

68HC11 Instruction Set

Four Byte Instructions

Because more than 256 different op-codes are needed for all of these addressing modes, some instructions require four bytes, an example is:

In 68HC11 machine language, whenever the Y index register is involved the pre-byte 18h is needed

The op-code FF causes the μP to store the most significant byte of IY in memory location C107h and the least significant byte in the subsequent memory location C108h (N.B. big endian)

Page 17: Microprocessors  68HC11

Assembler Basics

Assemblers

Assemblers are the tools that convert assembly language programs into executable code

They are similar in principle to higher level language compilers, such as those for C or PASCAL

They generally provide many features to simplify the task of machine code programming including:

• Automatic calculation of addressing during assembly

• Assignment of variable names (labels) to memory locations

• Syntactical error trapping

Page 18: Microprocessors  68HC11

Assembler Basics

• Symbolic Addresses (Labels)

One of the most useful features of assembly language

programming is that symbolic addresses may be used,

instead of physical RAM locations:

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