Micro-Computer Applications:Arithmetic, Logic & Data Movement

Instructions

Dr. Eng. Amr T. Abdel-Hamid

ELECT 707

Fall 2011

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Instructions Types

Arithmetic/Logic Data Movement Program Control (if,..) Loop Control Interrupts

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MOV et.al.

MOV is still the main data transfer instruction, but there are many variations that perform special tasks such as PUSH and POP.

We do not often code in hexadecimal machine language, but an understanding tends to help with learning the instruction set and the form of instructions in the memory.

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The Opcode

D W

Opcode Mod Reg R/M

Feild Description

D the direction of data flow either from or to R/M from REG. If D = 0 REG R/M and if D = 1 R/M REG

W specifies a word (16-bit mode) or a doubleword (32-bit mode). W = 0 byte and W = 1 word/doubleword

MOD specifies how R/M is used and whether a displacement exists. MOD = 00 memory no displacement MOD = 01 memory 8-bit displacement MOD = 10 memory 16/32-bit displacement MOD = 11 register

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Segment Register Moves

Although we do not often directly address segment registers it is important to understand the limitations of the segment register MOV instruction.

Immediate data cannot be moved into a segment register.

CS cannot successfully be loaded with a segment register MOV.

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Addition

The ADD instruction is used for binary addition. The addition causes the flag bits to change. Addition can be 8-, 16-, and 32-bits. All of the addressing modes presented in

Chapter 2 are used by addition.

ADD EAX,EBX ;EAX = EAX + EBX;EAX = EAX + EBX

C Z S O P A

r r r r r r

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Flags

Flag Status After Instructions:

1 - instruction sets this flag to 1.0 - instruction sets this flag to 0. r - flag value depends on result of the

instruction.? - flag value is undefined (maybe 1 or 0)

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Increment

The INC instruction adds a oneone to a register or the contents of a memory location.INC BX ;BX = BX + 1;BX = BX + 1INC BYTE PTR [EBX]

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Add with Carry

The ADC instruction adds the carry bit into the sum. Used for wide additions (wider than 32-bits) and other reasons.

ADC AX,DX ;AX = AX + DX + C;AX = AX + DX + CADX ESI,[EBX]

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Subtraction

The SUB instruction performs subtraction and the flags change to reflect condition of the result.

As with other arithmetic and logic instructions, subtraction exists for 8-, 16-, and 32-bit data.

SUB AL,3 ;AL = AL - 3;AL = AL - 3SUB ECX,ESI

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Decrement

The DEC instruction subtracts oneone from a register or the contents of a memory location.

DEC EBX ;EBX = EBX - 1;EBX = EBX - 1

DEC DWORD PTR [EAX]

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Subtract with Borrow

The SBB instruction subtracts with borrow (where the borrow is held in the carry flag).

SBB EAX,EBX ;EAX = EAX – EBX – C;EAX = EAX – EBX – C

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Compare

The CMP instruction is a special form of the SUB instruction. A compare does not result in a difference that is saved, on the flag bits change to reflect the difference.

CMP AL,3

;if AL = 3 the result to zero (flag);if AL = 3 the result to zero (flag)

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Multiplication

The MUL (unsigned) and IMUL (signed) instruction exist to perform 8-, 16-, or 32-bit multiplication.

The result is always a double wide result. The carry and overflow bits indicate conditions

about the multiplication. A special IMUL exists with 3 operands.

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Division

The DIV (unsigned) and IDIV (signed) instruction exist to perform division on 8-, 16-, or 32-bit numbers.

Division is always performed o a double wide dividend.

The result is always in the form of an integer quotient and an integer remainder.

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AND

The AND instruction performs logical multiplication (the AND operation).

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OR

The OR instruction generates the logical sum (OR operation).

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Exclusive OR

The XOR instruction performs the Exclusive OR operation.

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NEG and NOT

The NEG (negate) instruction 2’s complements a number,

The NOT instruction 1’s complements a number.NOT EAXNEG DWORD PTR [EBX]

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Shifts

There are 4 shift instructions. Two are logical shifts and two are arithmetic shifts.

The logical shifts reposition the bits in a number. The arithmetic shifts multiply or divide signed numbers by powers of two.

SHR and SHL are logical and SAR and SAL are arithmetic shifts.SHL AL,3 or SHL AL,CL

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Rotates

Rotates are shifts that re-circulate the bit that moves out of an end of the register or memory location.

Four rotates exist where two just rotate the target and two rotate the target through the carry flag.

ROL AL,3 or RCL AL,3

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TEST

The TEST instruction is a special form of the AND instruction that produces no result except for a change of the flags.

This instruction is often used to test multiple bits of a number.

TEST AL,3 ;test the right two bits (if both are test the right two bits (if both are zero the result is zero)zero the result is zero)

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Bit Test Instructions

There are four bit test instructions BT (bit test), BTR (bit test and reset), BTS (bit test and set), and BTC (bit test and complement).

Each tests the prescribed bit by moving it into carry. Then the bit is modified (except for BT)BT AL,3 ;bit 3 is moved to carry;bit 3 is moved to carry

BTS AL,3 ;bit 3 is moved to carry then ;bit 3 is moved to carry then setsetBTR AL,3 ;bit 3 is moved to carry then reset;bit 3 is moved to carry then resetBTC AL,3 ;bit 3 is moved to carry then ;bit 3 is moved to carry then inverted.inverted.

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PUSH and POP

PUSH and POP transfer data to and from the stack. The stack is an area of memory that is reused and grows in size with each PUSH and shrinks in size with each POP.

PUSH and POP function with either 16- or 32-bit data. PUSHF (PUSHFD) and POPF (POPFD) save and restore the

flags (EFLAGS) PUSHA (PUSHAD) and POPA (POPAD) save and restore all

the registers

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Load Segment and Index

LDS, LES, LSS, LFG, and LGS allow a segment registers and a pointer to both be loaded from memory.

LDS BX,BOB

;loads DS and BX with the offset and segment address stored in a 32-bit memory location called BOB.

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LEA

The LEA instruction loads the effective address of a memory location into a pointer or index register.

At times we do the same operation with a MOV and the keyword OFFSET

MOV BX,OFFSET FREDLEA BX,FRED

Both instruction accomplish the same task.

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String Data Transfer Instructions

String data transfer instructions are: LODS, STOS, MOVS, INS, and OUTS.

These instructions use the direction flag bit to select the way that a pointer is modified after the instruction. D = 0 auto-increment and D = 1 auto-decrement.

Many of these instructions can be prefixed with a REP (repeat) to repeat the instruction the number of times stored in the CX register.

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Miscellaneous

NOP (does nothing) XCHG (swaps contents) CLC, STC, CMC (modify Carry)

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References:Based on slides from B. Brey, The Intel Microprocessor: Architecture, Programming, and Interfacing, 8th Edition, 2009 & others