Mems Package

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<ul><li><p>MEMSPACKAGING </p></li><li><p>Contents PackagingIC &amp; MEMSPackaging steps Wafer levelDie levelInter connectsEncapsulation &amp;Types of Materials</p></li><li><p>What is Packaging ?Websters dictionary defines package as a group or a number of things, boxed and offered as a unit.</p><p>Packaging is the science and art of establishing inter-connections and an appropriate operating environment for MEMS to process and/or to store information.</p><p>The package provides the interface between the components and the overall system.</p></li><li><p>Packaging ?The package serves to integrate all of the components required for a system application in a manner that minimizes size, cost, mass and complexity.</p><p>The cost of packaging tends to be significantly larger than the cost of the actual micro machined components. (75% to 95% of the overall cost)</p><p>Packaging is a necessary evil. Its relatively large dimensions tend to dilute the small size advantage of MEMS.</p></li><li><p>Essential requirements of packaging?</p><p>Routing of different electrical signals Hermetic sealingScreening of electrical and magnetic fieldsProtection against harsh environmentHeat dissipationAdapted thermal expansion coefficientResistance against high operation temperature &amp;Minimization of mechanical stress</p></li><li><p>IC and MEMS PackagingMEMS packaging is more challenging than IC packaging </p><p>Each application is unique in its packaging requirements because of the diversity in MEMS devices.</p><p>Effort must be made to meet each packaging requirements in MEMS</p><p>Standardized process and Well established mass production technologies are available for ICs</p></li><li><p>MEMS devicesMust be free to allow mechanical movement</p><p>are very sensitive to mechanical damage</p><p>are very sensitive to damage from particle contamination</p><p>are often be open so that the sensors are in contact with the environment</p></li><li><p>MEMS fabrication steps</p></li><li><p>Wafer Certain standards are also adopted from microelectronics fabricationStandards in the electronic integrated circuit industry dictate specific thickness for silicon wafer, depending on their diameter.</p><p>Wafers polished on both sides are normally thinner.</p><p>Proper knowledge of the thickness to the parties responsible for packaging is required in order to minimize disruption to the assembly line and avoid unnecessary delays. </p></li><li><p> Wafer dicing concerns</p><p>Hundreds and thousands of identical structures or Microsystems are fabricated simultaneously on the same wafer Dicing separates these structures into individual components (dice) that can be packaged later.</p><p>A diamond or carbide saw blade, approximately 75- to 250-microm-wide,spins at high speed and cuts through the substrate, which is normally mounted and held in position on a blue-colored sticky tape. </p><p>Water flows continuously during sawing to cool the blade Dicing is a harsh process conducted in an unclean environment and subjects the microstructures to strong vibrations and shaking. </p></li><li><p>Thermal ManagementThe main role of thermal management for electronic packaging is to cool the integrated circuit during operation</p><p>In contrast, the role of thermal management in MEMS includes the cooling of heat-dissipating devices, especially thermal actuators</p><p>Also involves understanding and controlling the sources of temperature fluctuations that may adversely affect the performance of a sensor or actuator </p></li><li><p>Thermal management is performed at two levels: the die level and the package level The package designer has no control over Thermal resistance and the case temperature, and therefore, it is the thermal resistance of the package that must be minimizedIt is seen that there are three thermal resistances that must be minimized: the resistance through the package substrate, the resistance through the die-attach material, and the resistance through the carrier or package base.</p></li><li><p>Thermal actuators also will dissipate heat, this must be removed through the substrate and package housing.</p><p>Ceramics and metals make excellent candidate materials for the package housing because of their high thermal conductivity.</p><p>To ensure easy heat flow from the die to the housing, it is necessary to select a die attach material that exhibit a high thermal conductivity.</p><p>This may exclude silicones and epoxies instead favor solder-attach methods or silver-filled epoxies.</p></li><li><p>Stress Isolationpiezoresistive pressure sensor gives an incorrect pressure measurement if the package housing subjects the silicon die to stresses.sensor manufacturers take extreme precautions for stress isolation during the design and implementation of packaging.Another serious effect of packaging on stress-sensitive sensors is long-term drift resulting from slow creep in the adhesive or epoxy that attaches the silicon die to the package housing.Modeling of such effects is extremely difficult, leaving engineers with the task of constant experimentation to find appropriate solutions</p></li><li><p>Protective coatings and media isolationSensors and actuators coming into intimate contact with external media must be protected against adverse environmental effects</p><p>For example, sensors for automotive applications must be able to withstand salt water and acid rain pollutants</p><p>For mildly aggressive environments, a thin conformal coating layer is sufficient protection. A common material for coating pressure sensors is parylene - deposited using chemical vapor deposition process at near-room-temperature. </p><p>It is resistant to automotive exhaust gases, fuel, salt spray, water, alcohol, and many organic solvents.</p></li><li><p>silicon carbide may prove to be an adequate coating material for protecting MEMS in very harsh environments.</p><p>If the silicon parts do not need to be in direct contact with the surrounding environment, then a metal or ceramic hermetic package may be sufficient. But not possible for pressure and flow sensors.</p><p>Clever media isolation schemes for pressure sensors involve immersing the silicon microstructure in a special silicone oil, with the entire assembly contained within a heavy duty steel package. A flexible steel membrane allows the transmission of pressure through the oil to the sensors membrane.</p></li><li><p>Hermetic packagingA hermetic package is theoretically defined as one that prevents the diffusion of helium.</p><p>For small volume packages the leak-rate of helium must be lower than 5 10-8 cm-3/s</p><p>In practice Hermetic package prevents the diffusion of moisture and water vapor through its walls and prevents corrosion.A hermetic package must be made of metal, ceramic, or glass.</p><p>Plastic and organic-compound packages, allow moisture into the package interior; hence, they are not considered hermetic.</p></li><li><p>A hermetic package significantly increases the long-term reliability of electrical and electronic components.</p><p>The interior of a hermetic package is typically evacuated or filled with an inert gas such as argon, or helium.</p><p>The Digital Mirror Device from Texas Instruments and the infrared imager from Honeywell, utilize vacuum hermetic packages with transparent optical windows.</p><p>Electrical interconnections through the package must also conform to hermetic sealing</p></li><li><p>Calibration and compensationThe performance characteristics of precision sensors often must be calibrated in order to meet the required specifications.</p><p>Errors frequently arise due to small deviations in the manufacturing process.</p><p>One compensation and calibration scheme utilizes a network of laser-trimmed resistors with near-zero TCR to offset errors in the sensor.</p><p>Laser trimming is also useful to calibrate critical mechanical dimensions by direct removal of material.</p></li><li><p>Many modern commercial sensors now incorporate application-specific integrated circuits (ASICs) to calibrate the sensors output and compensate any errors.</p></li><li><p>DIE LEVEL &amp; WAFER LEVEL PACKAGING</p><p> Fabricated MEMS chip is robust before the sacrificial layers are removed</p><p>Sacrificial layer removal (Releasing chip) is done with dry etching</p><p>This process brings a large yield loss for MEMS</p><p>Chip is also prone to damage during wafer dicing and handling</p></li><li><p>Die Level Packaging</p><p>Multiple numbers of MEMS devices are fabricated on a waferEach device is diced Diced device is released to make MEMS moveable (or suspend in air)Diced device is packaged</p><p>The fabrication process of the Texas instruments Digital Mirror Devices (DMD) follows a similar approach. The DMD arrays are diced first, then the organic sacrificial layer is consequently etched and packaged</p></li><li><p>sequence</p></li><li><p>Wafer level packaging</p><p>Multiple numbers of MEMS devices are fabricated on a wafer</p><p> All the MEMS devices on the wafer are released.</p><p>All MEMS devices on the wafer are packaged in parallelThen they are diced.</p><p>Production cost less.</p></li><li><p>sequence </p></li><li><p>Die attach to package</p></li><li><p>Die-attach processes</p><p> After the dicing of the substrate, each individual die is mounted inside a package and attached (bonded) onto a platform made of metal or ceramic, though plastic is also possible under limited circumstances.</p><p>The bond must not crack over time or suffer from creep</p><p>Its reliability must be established over very long periods of time.</p></li><li><p>Die-attach processes employ metal alloys (all forms of solder) or organic or inorganic adhesives as intermediate bonding layers.</p><p>Organic adhesives consist of epoxies, silicones. </p><p>Solders, silicones, and epoxies are vastly common in MEMS packaging.</p><p>Inorganic adhesives are glass matrices embedded with silver and resin, but their utility for die-attach is limited because of the high-temperature (&gt; 400 C) glass seal and cure operation.</p></li><li><p>Solder alloyfirmly attaches the die to the package but normally provides little or no stress isolation when compared with organic adhesives.</p><p>bond is very robust and can sustain very large, normal pull-forces on the order of 5,000 N/cm2.</p><p>The large mismatch in the coefficients of thermal expansion with silicon results in undesirable stresses that can cause cracks in the bond.</p><p>Most common solders are alloys of lead (Pb), tin (Sn), indium (In), antimony (Sb), bismuth (Bi), or silver (Ag)</p></li><li><p>Organic adhesives</p><p>Inexpensive, they cure at lower temperatures.</p><p>The most widely used are epoxies and silicones, including room-temperature vulcanizing (RTV) rubbers</p><p>The operating temperature for most organic adhesives is limited to less than 200 C, otherwise they suffer from structural breakdown and outgassing.</p></li><li><p>Wiring and interconnects</p><p>Electrical connectivity addresses the task of providing electrical wiring between the die and electrical components external to it.</p><p>fluid connectivity is to ensure the reliable transport of liquids and gases between the die and external fluid control units.</p></li><li><p>Electrical Interconnects</p><p>Wire bonding</p><p>Wire bonding is unquestionably the most popular technique to electrically connect the die to the package. </p><p>The free ends of a gold or aluminum wire form low-resistance (ohmic) contacts to aluminum bond pads on the die and to the package leads (terminals). </p><p>Bonding gold wires tends to be easier than bonding aluminum wires.</p><p>The gold wire forms a ball bond to the aluminum bond pad on the die, and a stitch bond to the package lead</p></li><li><p>The ball bond designation follows after the spherical shape of the wire end as it bonds to the aluminum.</p><p>The stitch bond, in contrast, is a wedge-like connection as the wire is pressed into contact with the package lead</p><p>Thermosonic gold bonding is a well-established technique in the integrated circuit industry</p><p>It simultaneously combines the application of heat, pressure, and ultrasonic energy to the bond area. </p><p>Ultrasound causes the wire to vibrate, producing localized frictional heating to aid in the bonding process.</p></li><li><p>Bonding aluminum wires to aluminum bond pads is also achieved with ultrasonic energy, but without heating the substrate. </p><p>In this case, a stitch bond works better than a ball bond, but the process tends to be slow.</p><p>This makes bonding aluminum wires not as economically attractive as bonding gold wires. </p></li><li><p>The thermosonic ball bond process begins with an electric discharge or spark to produce a ball at the exposed wire end. The tip-capillary of the wire-bonding tool descends onto the aluminum bond pad, pressing the gold ball into bonding with the bond pad. Ultrasonic energy is simultaneously applied. </p><p>The capillary then rises and the wire is fed out of it to form a loop as the tip is positioned over the package lead (the next bonding target). </p></li><li><p>The capillary is lowered again, deforming the wire against the package lead into the shape of a wedge (the stitch bond). </p><p>As the capillary rises, special clamps close onto the wire causing it to break immediately above the stitch bond.</p></li><li><p>Wire Bonding</p></li><li><p>Wedge bonding</p></li><li><p>Flip chip Flip Chip (Controlled-Collapse Chip Connections (C4))Controlled Collapse Chip Connection (C4) is an interconnect technology developed by IBM during the 1960s as an alternative to manual wire bonding.</p><p>Flip-chip bonding, as its name implies, involves bonding the die, top-face-down, on a package substrate.</p><p>Electrical contacts are made by means of plated solder bumps between bond pads on the die and metal pads on the package substrate.</p></li><li><p>The bumps themselves are created in a large number of ways. High-melting (~300C) solders, often with high lead content, which when melted form a bump from the inherent surface tension of solder.</p><p>Flip-chip may not be compatible with the packaging of MEMS that includes microstructures exposed to the open environment.</p><p>Flip chip has the highest density of interconnects. Example: P2SC single-chip RISC 6000 processor has 2050 C4 bumps on 18x18 mm.</p></li><li><p>Flip chip process flow</p></li><li><p>Specific advantages include:Size and weight reduction</p><p>Applicability for existing chip designs</p><p>Increased I/0 capability</p><p>Performance enhancement</p><p>Increased production capability</p><p>Rework/chip replacement</p><p>Stress compensation due to underfill</p></li><li><p>Wafer Bonding Processes</p><p>Anodic Bonding Silicon to glass Fusion Bonding Silicon to silicon The EVG510 semi-automated wafer bonding system handles wafers up to 200mm The EVG510 system provides fully-automated processing with manual loading and unloading. The modular bond chamber design for 150mm and 200mm wafers </p></li><li><p>At elevated temperature, sodium migrates toward the cathode and leaves a space charge region and a high electrical field between the glass and silicon</p><p>Electrostatic force pull silicon and glass into intimate contact</p><p>Covalent bonds are formed</p></li><li><p>Si-Si Fusion bondingChemical reaction between OH-groups (Si is hydrophilic)</p><p>In an oxidizing ambient at temperatures greater than800oC get void less bonds</p><p>Surface roughness less than 4 nm</p></li><li><p>Microfluidic interconnectsThese are required to package micro fluidic devices such as micro pumps and micro valves.Most micro fluidic interconnect schemes remain at the level of manually inserting a capillary into a silicon cavity or via-hole, and sealing the assembly with silicone or epoxy</p></li><li><p>Types of packaging solutionsThere are three general categories of widely adopted packaging approaches in MEMS.</p><p>Ceramic metal Plasticeach with its own merits and limitations.</p><p>plastic is a low-cost and often small size (surface-mount) solution,</p></li><li><p>Ceramic packagingCeramics are hard and brittle materials made by shaping a nonmetallic minera...</p></li></ul>