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MEMS MEMS PACKAGING PACKAGING

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  • MEMSPACKAGING

  • Contents PackagingIC & MEMSPackaging steps Wafer levelDie levelInter connectsEncapsulation &Types of Materials

  • What is Packaging ?Websters dictionary defines package as a group or a number of things, boxed and offered as a unit.

    Packaging is the science and art of establishing inter-connections and an appropriate operating environment for MEMS to process and/or to store information.

    The package provides the interface between the components and the overall system.

  • Packaging ?The package serves to integrate all of the components required for a system application in a manner that minimizes size, cost, mass and complexity.

    The cost of packaging tends to be significantly larger than the cost of the actual micro machined components. (75% to 95% of the overall cost)

    Packaging is a necessary evil. Its relatively large dimensions tend to dilute the small size advantage of MEMS.

  • Essential requirements of packaging?

    Routing of different electrical signals Hermetic sealingScreening of electrical and magnetic fieldsProtection against harsh environmentHeat dissipationAdapted thermal expansion coefficientResistance against high operation temperature &Minimization of mechanical stress

  • IC and MEMS PackagingMEMS packaging is more challenging than IC packaging

    Each application is unique in its packaging requirements because of the diversity in MEMS devices.

    Effort must be made to meet each packaging requirements in MEMS

    Standardized process and Well established mass production technologies are available for ICs

  • MEMS devicesMust be free to allow mechanical movement

    are very sensitive to mechanical damage

    are very sensitive to damage from particle contamination

    are often be open so that the sensors are in contact with the environment

  • MEMS fabrication steps

  • Wafer Certain standards are also adopted from microelectronics fabricationStandards in the electronic integrated circuit industry dictate specific thickness for silicon wafer, depending on their diameter.

    Wafers polished on both sides are normally thinner.

    Proper knowledge of the thickness to the parties responsible for packaging is required in order to minimize disruption to the assembly line and avoid unnecessary delays.

  • Wafer dicing concerns

    Hundreds and thousands of identical structures or Microsystems are fabricated simultaneously on the same wafer Dicing separates these structures into individual components (dice) that can be packaged later.

    A diamond or carbide saw blade, approximately 75- to 250-microm-wide,spins at high speed and cuts through the substrate, which is normally mounted and held in position on a blue-colored sticky tape.

    Water flows continuously during sawing to cool the blade Dicing is a harsh process conducted in an unclean environment and subjects the microstructures to strong vibrations and shaking.

  • Thermal ManagementThe main role of thermal management for electronic packaging is to cool the integrated circuit during operation

    In contrast, the role of thermal management in MEMS includes the cooling of heat-dissipating devices, especially thermal actuators

    Also involves understanding and controlling the sources of temperature fluctuations that may adversely affect the performance of a sensor or actuator

  • Thermal management is performed at two levels: the die level and the package level The package designer has no control over Thermal resistance and the case temperature, and therefore, it is the thermal resistance of the package that must be minimizedIt is seen that there are three thermal resistances that must be minimized: the resistance through the package substrate, the resistance through the die-attach material, and the resistance through the carrier or package base.

  • Thermal actuators also will dissipate heat, this must be removed through the substrate and package housing.

    Ceramics and metals make excellent candidate materials for the package housing because of their high thermal conductivity.

    To ensure easy heat flow from the die to the housing, it is necessary to select a die attach material that exhibit a high thermal conductivity.

    This may exclude silicones and epoxies instead favor solder-attach methods or silver-filled epoxies.

  • Stress Isolationpiezoresistive pressure sensor gives an incorrect pressure measurement if the package housing subjects the silicon die to stresses.sensor manufacturers take extreme precautions for stress isolation during the design and implementation of packaging.Another serious effect of packaging on stress-sensitive sensors is long-term drift resulting from slow creep in the adhesive or epoxy that attaches the silicon die to the package housing.Modeling of such effects is extremely difficult, leaving engineers with the task of constant experimentation to find appropriate solutions

  • Protective coatings and media isolationSensors and actuators coming into intimate contact with external media must be protected against adverse environmental effects

    For example, sensors for automotive applications must be able to withstand salt water and acid rain pollutants

    For mildly aggressive environments, a thin conformal coating layer is sufficient protection. A common material for coating pressure sensors is parylene - deposited using chemical vapor deposition process at near-room-temperature.

    It is resistant to automotive exhaust gases, fuel, salt spray, water, alcohol, and many organic solvents.

  • silicon carbide may prove to be an adequate coating material for protecting MEMS in very harsh environments.

    If the silicon parts do not need to be in direct contact with the surrounding environment, then a metal or ceramic hermetic package may be sufficient. But not possible for pressure and flow sensors.

    Clever media isolation schemes for pressure sensors involve immersing the silicon microstructure in a special silicone oil, with the entire assembly contained within a heavy duty steel package. A flexible steel membrane allows the transmission of pressure through the oil to the sensors membrane.

  • Hermetic packagingA hermetic package is theoretically defined as one that prevents the diffusion of helium.

    For small volume packages the leak-rate of helium must be lower than 5 10-8 cm-3/s

    In practice Hermetic package prevents the diffusion of moisture and water vapor through its walls and prevents corrosion.A hermetic package must be made of metal, ceramic, or glass.

    Plastic and organic-compound packages, allow moisture into the package interior; hence, they are not considered hermetic.

  • A hermetic package significantly increases the long-term reliability of electrical and electronic components.

    The interior of a hermetic package is typically evacuated or filled with an inert gas such as argon, or helium.

    The Digital Mirror Device from Texas Instruments and the infrared imager from Honeywell, utilize vacuum hermetic packages with transparent optical windows.

    Electrical interconnections through the package must also conform to hermetic sealing

  • Calibration and compensationThe performance characteristics of precision sensors often must be calibrated in order to meet the required specifications.

    Errors frequently arise due to small deviations in the manufacturing process.

    One compensation and calibration scheme utilizes a network of laser-trimmed resistors with near-zero TCR to offset errors in the sensor.

    Laser trimming is also useful to calibrate critical mechanical dimensions by direct removal of material.

  • Many modern commercial sensors now incorporate application-specific integrated circuits (ASICs) to calibrate the sensors output and compensate any errors.

  • DIE LEVEL & WAFER LEVEL PACKAGING

    Fabricated MEMS chip is robust before the sacrificial layers are removed

    Sacrificial layer removal (Releasing chip) is done with dry etching

    This process brings a large yield loss for MEMS

    Chip is also prone to damage during wafer dicing and handling

  • Die Level Packaging

    Multiple numbers of MEMS devices are fabricated on a waferEach device is diced Diced device is released to make MEMS moveable (or suspend in air)Diced device is packaged

    The fabrication process of the Texas instruments Digital Mirror Devices (DMD) follows a similar approach. The DMD arrays are diced first, then the organic sacrificial layer is consequently etched and packaged

  • sequence

  • Wafer level packaging

    Multiple numbers of MEMS devices are fabricated on a wafer

    All the MEMS devices on the wafer are released.

    All MEMS devices on the wafer are packaged in parallelThen they are diced.

    Production cost less.

  • sequence

  • Die attach to package

  • Die-attach processes

    After the dicing of the substrate, each individual die is mounted inside a package and attached (bonded) onto a platform made of metal or ceramic, though plastic is also possible under limited circumstances.

    The bond must not crack over time or suffer from creep

    Its reliability must be established over very long periods of time.

  • Die-attach processes employ metal alloys (all forms of solder) or organic or inorganic adhesives as intermediate bonding layers.

    Organic adhesives consist of epoxies, silicones.

    Solders, silicones, and epoxies are vastly common in MEMS packaging.

    Inorganic adhesives are glass matrices embedded with silver and resin, but their utility for die-attach is limited because of the high-temperature (> 400 C) glass seal and cure operation.

  • Solder alloyfirmly attaches the die to the package but normally provides little or no stress isolation when compared with organic adhesives.

    bond is very robust and can sustain very large, normal pull-forces on the order of 5,000 N/cm2.

    The large mismatch in the coefficients of thermal expansion with silicon results in undesirable stresses that can cause cracks in the bond.

    Most common solders are alloys of lead (Pb), tin (Sn), indium (In), antimony (Sb), bismuth (Bi), or silver (Ag)

  • Organic adhesives

    Inexpensive, they cure at lower temperatures.

    The most widely used are epoxies and silicones, including room-temperature vulcanizing (RTV) rubbers

    The operating temperature for most organic adhesives is limited to less than 200 C, otherwise they suffer from structural breakdown and outgassing.

  • Wiring and interconnects

    Electrical connectivity addresses the task of providing electrical wiring between the die and electrical components external to it.

    fluid connectivity is to ensure the reliable transport of liquids and gases between the die and external fluid control units.

  • Electrical Interconnects

    Wire bonding

    Wire bonding is unquestionably the most popular technique to electrically connect the die to the package.

    The free ends of a gold or aluminum wire form low-resistance (ohmic) contacts to aluminum bond pads on the die and to the package leads (terminals).

    Bonding gold wires tends to be easier than bonding aluminum wires.

    The gold wire forms a ball bond to the aluminum bond pad on the die, and a stitch bond to the package lead

  • The ball bond designation follows after the spherical shape of the wire end as it bonds to the aluminum.

    The stitch bond, in contrast, is a wedge-like connection as the wire is pressed into contact with the package lead

    Thermosonic gold bonding is a well-established technique in the integrated circuit industry

    It simultaneously combines the application of heat, pressure, and ultrasonic energy to the bond area.

    Ultrasound causes the wire to vibrate, producing localized frictional heating to aid in the bonding process.

  • Bonding aluminum wires to aluminum bond pads is also achieved with ultrasonic energy, but without heating the substrate.

    In this case, a stitch bond works better than a ball bond, but the process tends to be slow.

    This makes bonding aluminum wires not as economically attractive as bonding gold wires.

  • The thermosonic ball bond process begins with an electric discharge or spark to produce a ball at the exposed wire end. The tip-capillary of the wire-bonding tool descends onto the aluminum bond pad, pressing the gold ball into bonding with the bond pad. Ultrasonic energy is simultaneously applied.

    The capillary then rises and the wire is fed out of it to form a loop as the tip is positioned over the package lead (the next bonding target).

  • The capillary is lowered again, deforming the wire against the package lead into the shape of a wedge (the stitch bond).

    As the capillary rises, special clamps close onto the wire causing it to break immediately above the stitch bond.

  • Wire Bonding

  • Wedge bonding

  • Flip chip Flip Chip (Controlled-Collapse Chip Connections (C4))Controlled Collapse Chip Connection (C4) is an interconnect technology developed by IBM during the 1960s as an alternative to manual wire bonding.

    Flip-chip bonding, as its name implies, involves bonding the die, top-face-down, on a package substrate.

    Electrical contacts are made by means of plated solder bumps between bond pads on the die and metal pads on the package substrate.

  • The bumps themselves are created in a large number of ways. High-melting (~300C) solders, often with high lead content, which when melted form a bump from the inherent surface tension of solder.

    Flip-chip may not be compatible with the packaging of MEMS that includes microstructures exposed to the open environment.

    Flip chip has the highest density of interconnects. Example: P2SC single-chip RISC 6000 processor has 2050 C4 bumps on 18x18 mm.

  • Flip chip process flow

  • Specific advantages include:Size and weight reduction

    Applicability for existing chip designs

    Increased I/0 capability

    Performance enhancement

    Increased production capability

    Rework/chip replacement

    Stress compensation due to underfill

  • Wafer Bonding Processes

    Anodic Bonding Silicon to glass Fusion Bonding Silicon to silicon The EVG510 semi-automated wafer bonding system handles wafers up to 200mm The EVG510 system provides fully-automated processing with manual loading and unloading. The modular bond chamber design for 150mm and 200mm wafers

  • At elevated temperature, sodium migrates toward the cathode and leaves a space charge region and a high electrical field between the glass and silicon

    Electrostatic force pull silicon and glass into intimate contact

    Covalent bonds are formed

  • Si-Si Fusion bondingChemical reaction between OH-groups (Si is hydrophilic)

    In an oxidizing ambient at temperatures greater than800oC get void less bonds

    Surface roughness less than 4 nm

  • Microfluidic interconnectsThese are required to package micro fluidic devices such as micro pumps and micro valves.Most micro fluidic interconnect schemes remain at the level of manually inserting a capillary into a silicon cavity or via-hole, and sealing the assembly with silicone or epoxy

  • Types of packaging solutionsThere are three general categories of widely adopted packaging approaches in MEMS.

    Ceramic metal Plasticeach with its own merits and limitations.

    plastic is a low-cost and often small size (surface-mount) solution,

  • Ceramic packagingCeramics are hard and brittle materials made by shaping a nonmetallic mineral, then firing at a high temperature for densification.

    The vast majority of ceramics are electrical insulators, and often good thermal conductors, also.

    Ease of shaping along with reliability and attractive material properties (e.g., electrical insulator, hermetic sealing) have made ceramics a mainstay in electronic packaging and in MEMS packaging.

    But ceramics usually suffer from shrinkage (~ 13% in the horizontal direction and ~ 15% in the vertical direction) during firing and more expensive.

  • Alumina (Al2O3) are the most common of all ceramics.

    Aluminum nitride (AlN) and beryllia (BeO) have superior material properties (e.g., better thermal conductivity), but the latter is very toxic.

    A ceramic package is made of laminates, each formed and patterned separately, then brought together and co-fired (sintered) at an elevated temperature, typically between 1500 and 1600 C

  • Recent advances have led to the Low Temperature Co-fired Ceramic (LTCC) technology -can be defined as a way to produce multilayer circuits with the help of single tapes, which are to be used to apply conductive, dielectric and / or resistive pastes on. These single sheets have to be laminated together and fired in one step all.

    This saves time, money and reduces circuits dimensions.

    An other great advantage is that every single layer can be inspected (and in the case of inaccuracy or damage) replaced before firing; this prevents the need of manufacturing a whole new circuit.

  • Powders are first mixed together with special additives and extruded under a knife edge to form a thin laminate sheet. This green unfired soft tape, approximately 0.1- to 0.3-mm-thick, is peeled from the supporting table, then cut and punched using precise machining tools.

    Patterns of electrical interconnects are screen-printed on each sheet

    Several green sheets are aligned and presslaminated together, then co-fired at an elevated temperature in a reducing atmosphere to sinter the laminate stack into a monolithic body

  • LTCC main application areas include

    Telecommunications Sensor Industrial Automotive Medical Military Aerospace

  • Metal packaging

    Metal packages are strong and easy to assemble.

    They are hermetic when sealed.

    But a major drawback is the relatively large expense of metal headers and caps;

    Packaging solutions for harsh environments, namely those found in heavy industries and aerospace.

  • Molded plastic packagingThey are not hermetic.

    They dominate in the packaging of integrated circuits because they are cost-effective solutions.

    There are two general approaches to plastic packaging: Postmolding and premolding.

    In the first approach, the plastic housing is molded after the die is attached to a lead frame (a supporting metal sheet).

    The process subjects the die and the wire bonds to the harsh molding environment.

  • In premolding, the die is attached to a lead frame over which plastic was previously molded.

    It is attractive in situations where the risk of damaging the die is high, or if openings through the plastic are necessary (e.g., for pressure or flow sensors).

    More expensive than post molding.

  • The material properties of the plastic, and especially its coefficient of thermal expansion, are carefully adjusted by the introduction of additives to the epoxy.

    Fillers such as glass, silica, or alumina powder make up 65 to 70% of the weight of the final product, and help tailor its coefficient of thermal expansion as well as its thermal conductivity.

    In addition, mold-release agents (e.g., synthetic or natural wax) are introduced to promote the release of the plastic part from the mold.

  • Flame-retardant materials, typically brominated epoxy or antimony trioxide, are also added to meet industry flammability standards.

    Carbon and other organic dyes give the plastic its commonly black appearance

  • Thank U

  • Anodic bondingThe substrates are bonded at elevated temperature (~400 degC) by placing and clamping the substrates between two metal electrodes. A high DC potential (up to >1kV) is applied between the electrodes creating an electrical field, which penetrates the substrates. One substrate is a glass that contains sodium ions, which at the elevated temperature are displaced from the bonding surface of the glass by the applied electrical field. The depletion of sodium ions near the surface of the glass makes the surface highly reactive with the silicon surface of the other substrate forming a solid chemical bond.

  • Fusion bondingThe substrates are first forced into intimate contact by applying a high contact force. Once in contact the substrates hold together due to atomic attraction forces (Van der Waal), which are strong enough to allow the bonded substrates to be handled. The substrates are then placed in a furnace and annealed at high temperature, after which a solid bond is formed between the substrates.

  • Design The design of multilayer circuits for RF applications requires simulation, modelling and layout tools, which are all available at IMST. A long time experience in working with these software tools and in designing RF circuits and antennas in LTCC has grown to a comprehensive expertise in this field. Furthermore specific design and modelling software has been developed by IMST. These tools are called "EMPIRETM" and "MultiLibTM for ADSTM". IMST's experience is offered to design RF modules and antennas for customers applications ... Preparation The LTCC tapes will be delivered on rolls or as sheets in a specific format. The standard sizes, which will be processed at IMST's technology are (in inches) 3.5"x3.5", 3"x3" and 2"x2". These squares will be cut from the tape or roll. In the next steps, the coupons will be pre-conditioned in the furnace at about 80C followed by cutting registration and via holes with the YAG laser. All manufacturing steps will be made under clean room conditions ...

  • Via and Cavity Forming A YAG laser will be used to cut the registration and via holes (> 100m) out of the LTCC tape. Arbitrary shapes of cavities and windows can be formed with the laser, too ... Via Filling The via holes will be filled with thick film pastes using the screen printing method. An accurate alignment of the stencil and the tape can be achieved with an optical positioning system combined with the screen printer. The EKRA printer M2TM fulfils these demands and is used in IMST's LTCC process ... Screen Printing Two screen printers are available to print the thick film pastes into via holes or on the surface of the green LTCC tapes. The smaller one is used for less accuracy while the second printer is for high alignment better than 10m, equipped with an optical alignment system and computer controlled. Both Systems are from EKRA: S15TM and M2TM ...

  • High Resolution Lines For high frequency applications an improved conductor resolution is sometimes mandatory. Standard line width and spacing for screen-printing starts at about 100m. With a photoimageable paste a 50m resolution can be achieved for conductors in inner layers or on the top or bottom of the laminated structure. Such a system is offered from DuPont and is called FODELTM ... Collating and Stacking In volume production each layer is processed in parallel up to this step. After via filling and conductor printing all layers will be collated with a special tool and will be fixed together to avoid misalignment. Collating and stacking can either be carried with a hand operated tool for standard precision or with an automatic stacking machine for high alignment accuracy. IMST's prototyping process allows three different LTCC coupon sizes (unfired): 3.5" x 3.5", 3" x 3" and 2" x 2" ... Lamination IMST has installed a versatile isostatic pressing tool. In contrast to the uniaxial method, a higher quality especially when cavities are used, can be achieved. In this process step the lamination system IL-4004 from PTC is used at a typical temperature of 80C and a pressure of 3000 psi ...

  • Co-Firing The laminated LTCC stack will be fired in a computer controlled furnace. The firing will follow a specific profile, which shows a slow rising of the temperature to burnout the organic. Then the temperature is increased up to 870C, where the sintering takes place. Afterwards, the oven is cooled down. In a free sintering process the LTCC is shrinking up to 13% in X- and Y-direction and up to 15% in Z-direction (thickness) ... Post-Processing A number of post-processing steps are offered for the LTCC prototype manufacturing: post-firing of conductors and resistors, surface mount technology and wire bonding, dicing, singulation or sawing and the inspection of the LTCC module. This includes an optical check and a measurement of the geometry under the microscope as well as a high frequency characterisation ...

  • Characterisation LTCC (and also other) modules can be characterised at IMST. For RF circuits measurement equipment is available to determine S-parameters, noise behaviour, power, harmonics, spectrum, inter-modulation and load-pulling up to highest GHz-frequencies. For antenna measurements and EMC testing three anechoic chambers and an out-door range are available. Qualified staff will carry out these demanding measurements. All testing facilities are accredited laboratories ... Production The goal of the LTCC prototype manufacturing is to offer fast, accurate and reliable module fabrication with LTCC materials from standard suppliers like DuPont, Heraeus, Ferro and others. Moreover, the IMST-process will be adjusted to those foundries, where the volume production will take place. That means, that our process has to be compatible to the fab's process and that an early consolidation and co-operation will take place ...

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