manufacturing process of semiconductor

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Semiconductor Manufacturing Semiconductor Manufacturing Processes Processes Micro Electronics Fabrication Micro Electronics Fabrication

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Page 1: manufacturing process of semiconductor

Semiconductor Manufacturing Semiconductor Manufacturing ProcessesProcesses

Micro Electronics FabricationMicro Electronics Fabrication

Page 2: manufacturing process of semiconductor

Index Overview

Relevance, compare with traditional ChemE process

Opportunities

Course Overview

Goal, what is expected of you

Quiz, assignment etc

Scope

Outline of the course, what is covered, what is not

References

Introduction

Page 3: manufacturing process of semiconductor

Overview Relevance:

Used everywhere

Fairly expensive (computers) to very cheap (watch)

How is it similar to / different from ‘traditional ChemE’

process?

Basic Principles are same

Level of control needed is very high

Individual features are small, but volume is high

Need to be aware of electrical properties/behavior

Developing field (processes not always ‘mature’)

Short cycle time

Not prevalent in India ==> lower exposure

Page 4: manufacturing process of semiconductor

Overview Job opportunities:

Semiconductor Complex Limited (SCL) in Chandigarh

DRDO/ISRO, BEL

Research Abroad:

Very Active research, funded by industry and government

Job opportunities, among the best for Chemical Engineers

Page 5: manufacturing process of semiconductor

Course Overview Goal: Familiarize with key processes in the chip manufacturing

10000 ft view

Focus on the processes

Learn / Revise EE, optics, Material Science

Touch of economics

Few analytical techniques routinely used in semiconductor industry

Chip Manufacturing

PhysicsElectronics

ChemE

Material Science Economics

Page 6: manufacturing process of semiconductor

Course Overview

Quiz: 2*15 = 30

End Sem: 40

Project: 30

PROJECT WILL BE EVALUATED ONCE IN THE MIDDLE OF THE PROJECT. AND

THEN AT THE END.

Need:

Memorize (substitute for experience gained by operating

the tools yourself)

Follow in journals and internet, to keep up to date

(Information is new and the text books are not ‘up to date’ in

many aspects).

Page 7: manufacturing process of semiconductor

Index Overview

Relevance, compare with traditional ChemE process

Opportunities

Course Overview

Goal, what is expected of you

Quiz, assignment etc

Scope

Outline of the course, what is covered, what is not

References

Introduction

Page 8: manufacturing process of semiconductor

Chip manufacturing: Snap shot

Electrical Chip Design

Electrical Chip Design

R C

Physical “Layout” Design

Physical “Layout” Design

Blue Print-Photo“negative”

Creating the chipCreating the chipCreating the chipCreating the chip ““Print”Print”TestingTesting

Quality Control

Page 9: manufacturing process of semiconductor

Scope Types of chips

Focus: CMOS (Complementary Metal Oxide Semiconductor) processes

eg chips in computer processors, cell phone etc.

Most of the chips manufactured are CMOS chips

Silicon Based GaAs and others

BiPolarCMOS

Page 10: manufacturing process of semiconductor

What will / will not be covered (and to what extent)

Electrical Design - None

Semiconductor Device Physics

VLSI (IC Design)

Device Modeling

Physical Layout Design - Absolute Minimal

Creating the chip - Creating the chip - Main focusMain focus

Testing - Minimal

Electrical & Layout Design, Testing: Typically covered in EE courses

Page 11: manufacturing process of semiconductor

What will / will not be covered (and to what extent)

Economics: Yield Issues - Minimal

Environmental Issues - Minimal

Manufacturing of microelectronics related materials like

Computer Hard Disk, CD’s etc will not be covered

Processes not yet used (Next generation processes like Atomic Layer

Deposition or ALD) - Minimal

Supporting Techniques used in industry: - as necessary

Page 12: manufacturing process of semiconductor

References References:

Class Notes

Introduction to Micro Electronic Fabrication. Vol 5, Richard

Jager, 2001

Micro electronic Fabrication: A practical guide to

semiconductor processing, Peter Van Zant

ULSI design by Chang & Sze

Science and Engg of micro electronic fabrication by Stephan A

Campbell

INTERNET:

www. semiconductor.net

www. eedesign.com (mostly design related though)

www.intel.com/research/silicon/

....

Page 13: manufacturing process of semiconductor

Index Overview

Relevance, compare with traditional ChemE process

Opportunities

Course Overview

Goal, what is expected of you

Quiz, assignment etc

Scope

Outline of the course, what is covered, what is not

References

Introduction

Page 14: manufacturing process of semiconductor

INTRODUCTION

Chips are made on silicon wafers

Wafers look similar to the CD. Currently 8” wafers are

used and some manufacturers use 12” wafers

CD is about 4”, for comparison

IITM- EE dept has 4” wafer processing

Larger wafers have to be thicker

Less area is wasted in larger wafers

Uniformity is more difficult to achieve in larger wafers

12 ” wafer ©Intel

Page 15: manufacturing process of semiconductor

INTRODUCTION

Wafers are processed in a batch of 25 (called “LOT”)

Single wafer, batch, continuous processes

In one 8” silicon wafer, 500 chips may be made

Rectangular chips

330 million transistors in a RAM chip ©Intel

Page 16: manufacturing process of semiconductor

Schematic

Zoom (Exaggerated)

Chip is formed only on the top layer of the wafer

Mechanical strength

Processes: Shape definition, Material Modification,

Deposition, Removal

Page 17: manufacturing process of semiconductor

Process Classification

PackagingPackaging

Creating the devices (transistors,

capacitors, resistors)

Creating the devices (transistors,

capacitors, resistors)

Front End of the LineFEOL

Connecting the devices (wiring)Connecting the devices (wiring)

Back End of the LineBEOL

Silicon WaferSilicon WaferDevice 1 Device 2 Device 3 Device 4

Metal

Based on process sequence

Page 18: manufacturing process of semiconductor

General Process Grouping

Need to make many wires (or other structures)

in many layers (view in 3D)

with different materials (conductor, insulator, semiconductor)

of small sizes ( 90 nm is the state of the art production)

Silicon di Oxide

Cu

Page 19: manufacturing process of semiconductor

Silicon di Oxide

General Processes Grouping Strategy

For each layer, create a carefully made ‘photo negative’

Remove material 1 (oxide)

Define shape

Add material 2 (copper)

Remove excess of 2 (copper)

Shape Definition, Deposition, Removal

In some cases, instead of deposition,

Oxidation of silicon

Page 20: manufacturing process of semiconductor

Process Classification

Unit Operations

Called “Modules” in Semiconductor Industry

eg. Distillation, adsorption... are unit operations

Chemical Vapor Deposition (CVD), Etch.... are the typical

unit operations (Modules) in the chip industry

Based on process type

Relevant Modules

Photo Lithography, CVD, PVD, Etch, CMP, Oxidation...

FEOL: Ion Implantation, Diffusion

BEOL: Electrochemical Dep

Page 21: manufacturing process of semiconductor

Course Outline

May change...About 3 weeks for BEOL, 3 weeks for FEOL

Quiz 1

Quiz 2

Section Focus AreaNo.

Classes

1 Introduction 12 BEOL 23 Litho , layout, design 44 Dep (PVD, CVD, Electro) 45 Removal ( Wet,dry etch, CMP) 46 FEOL 57 Ion implanation, Diffusion, oxidation 58 Test (E Test, Binning) 39 Yield (KLA, Poisson Model etc) 3

10 Integration (Cu vs Al, Low K vs Oxide) 211 Relevant Tools and techniques:AFM, SEM, FA 512 Process Control 213 Guest lectures 2

Page 22: manufacturing process of semiconductor

General Information Complete chip production (IDM)

Electrical Design - Some companies in India (Fabless)

Physical Layout - Need interaction with “Fab”

Chip production - Not much in India (Fab/Foundry)

Testing - either at the customer site or at the production site

Chip production

Needs huge investment & state of the art tools

Work force

Discipline, for mass production (1 lot == 1 Million USD ==

80 kg gold)

Page 23: manufacturing process of semiconductor

General Information Chip production in India

Semiconductor Complex Limited (SCL), Chandigarh

DRDO,ISRO may have their own facilities

BEL???

International Tech Node

0.01

0.1

1

1990

1992

1994

1996

1998

2000

2002

2004

Year

Min

imu

m F

eatu

re S

ize

(um

) SCL

Smaller node earlier means more advanced technology

0.8 , Aluminum, 2 metal layers

Page 24: manufacturing process of semiconductor

General Information Processor Chips

Process variations

Chip Speed variations

Same design, production line, wafer --> Different chips

Memory chips

Repetitive design

Easier production --> lower cost

Page 25: manufacturing process of semiconductor

Processes Visualize the Final Product

Focus on

The ‘parts’ that need to be made

The processes (for each of the part)

Finally,Focus on integrating the processes

Page 26: manufacturing process of semiconductor

Chip Xsection- Simplified Schematic

Silicon WaferSilicon Wafer

Device 2 Device 3 Device 4

? ?

Insulator

Wiring Metal connectors

Device 1

Page 27: manufacturing process of semiconductor

Chip - Simplified Schematic

Silicon WaferSilicon Wafer

Device 1 Device 2 Device 3 Device 4

What if you want to connect Device 3 to another device 5 just at the back of Device 3?

Page 28: manufacturing process of semiconductor

Silicon WaferSilicon Wafer

Chip - Simplified Schematic

Device 1

Level 1

Level 2

Device 2 Device 3 Device 4

Many layers of metal are necessary for current Chips (typically 4 to 5)eg Next generation intel chips (90nm) are expected to have 7 or 8 metal layers

Page 29: manufacturing process of semiconductor

Intel 7 metal SEM (90 nm node)

© IntelCDO - carbon doped oxideM1 - Metal level 1, M2 - metal level 2, etc

Page 30: manufacturing process of semiconductor

IBM, multi level copper wiring

© IBM

Notice: The oxide has been removed by etching (perhaps with HF or KOH) and copper is not

Also notice that the real “wiring” is much more complicated than what we saw in the simple schematics before

Page 31: manufacturing process of semiconductor

FEOL Processes

Shape Definition Photo Lithography

Modification Ion Implantation Diffusion Rapid Thermal Anneal (RTA) Oxidation

Deposition Chemical Vapor Deposition (CVD) Physical Vapor Deposition (PVD)

Removal Chemical Mechanical Polishing (CMP) Etching

Page 32: manufacturing process of semiconductor

BEOL Processes Shape Definition

Photo Lithography Modification

Anneal Deposition

Chemical Vapor Deposition (CVD) Physical Vapor Deposition (PVD) Electrochemical Deposition

Removal Chemical Mechanical Polishing (CMP) Etching

Page 33: manufacturing process of semiconductor

Appendix

Page 34: manufacturing process of semiconductor

Acronyms

CMP - Chemical Mechanical Polishing

CVD - Chemical Vapor Deposition

PVD - Physical Vapor Deposition

SEM - Secondary Electron Microscopy

EDX - Energy Dispersion X-Ray Analysis

TEM - Transmission Electron Microscopy

Page 35: manufacturing process of semiconductor

Acronyms

IC - Integrated Circuits

ASIC - application specific integrated circuit

GaAs - Gallium Arsenide device

FEOL - Front End of the line (processes up to making the device)

BEOL - Back end of the line (processes involved in creating the

wiring connections between the devices)

Page 36: manufacturing process of semiconductor

Acronyms

CMOS Complementary metal oxide semiconductors

VLSI -Very large scale integration (creating one chip with many

millions of devices)

ULSI - Ultra large scale integration ( billion devices)

ALD - Atomic Layer Deposition (Depositing one layer of atoms in

a controlled manner)

MBE - Molecular Beam Epitaxy (Targetted layer by layer growth

of material)