"log-domain state-space": a systematic transistor-level approach for log-domain filtering

290 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 46, NO. 3, MARCH 1999

“Log-Domain State-Space”: A SystematicTransistor-Level Approach for

Log-Domain FilteringEmmanuel M. Drakakis, Alison J. Payne,Member, IEEE,and Chris Toumazou

Abstract—In this paper the properties of a low-level nonlinearcontinuous-time circuit element—termed a Bernoulli Cell (or Op-erator)—are described in a systematic way. This cell is composedof an npn BJT and an emitter-connected grounded capacitor,and is governed by a differential equation of the Bernoulli form.Although this cell has the potential for application in both linearand nonlinear analog signal processing, this paper will focuson the field of input–output linear log-domain filtering. TheBernoulli Cell can be utilized in both the analysis and synthesisof log-domain circuits. The Bernoulli Cell approach leads to thecreation of a system of linear differential equations with time-dependent coefficients and state variables nonlinearly related tocurrents internal to the circuit; this set of equations is termed“log-domain state-space,” and can be used for the synthesisof linear log-domain filters. Four design examples—including abandpass biquad—are presented.

Index Terms—Active filters, analog integrated circuits, log-domain circuits, translinear circuits.

I. INTRODUCTION

T HE operation of both translinear (TL) circuits and log-domain structures is based on the large-signal exponential

characteristic of BJT’s. TL circuits operate in accordancewith the translinear principle (TLP) as elegantly expressed byGilbert [1]. In general, TL circuits are not exploited for thedesign of frequency shaping networks, and real-time static lin-ear and nonlinear functions seem to be their main applicationarea [2]. The concept of log-domain signal processing wasoriginally proposed by Adams [3] and rigorously formalizedby Frey [4], [5]. Frey imposed a nonlinear (exponential)mapping on the state variables of a state-space (SS) descriptionof a linear transfer function; the result is the creation of a setof nonlinear differential equations that can be interpreted asKCL nodal equations, yielding a novel class of circuits termedExponential State Space (ESS) filters. Recently [6] Tsividis hasclassified those ESS topologies as forming part of a broaderbranch of structures classified as Externally Linear InternallyNonlinear (ELIN) networks.

Log-domain filters are currently attracting a great dealof theoretical and technological interest. Their operation isbased on instantaneous companding [7]–[9], and they poten-tially offer high-frequency operation, tuneability, and extended

Manuscript received July 31, 1997; revised May 30, 1998.The authors are with the Department of Electrical and Electronic Engineer-

ing, Imperial College, London SW7 2BT, U.K.Publisher Item Identifier S 1057-7130(99)01773-5.

dynamic range under low power-supply voltages [9]–[15].Furthermore, it has been shown that the exponential depen-dence of MOSFET’s in weak-inversion is uniquely suitedfor log-domain micropower applications [16], [17]. Additionalperformance considerations such as the noise behavior of log-domain structures and the effects of transistor nonidealities arestill under investigation [10], [18]–[21].

The synthesis of log-domain filters has been addressed byFrey [5] and Perry–Roberts [22]. Frey’s method (as previouslyoutlined) is based on an ingenious exponential transformationof the SS description of a linear transfer function. The methodis general, but for the implementation of filters of higher orderit becomes difficult for the designer to find and manipulate thelarge number of state equations. The Perry–Roberts method isa more modular approach, easily extendable to the synthesisof higher-order filters. It is based on the operational simula-tion of LC ladder networks, with the internal signals beingsuccessively exponentiated, summed, integrated, and finallylogged. In this way, a high-order signal flow graph (SFG) canbe appropriately transformed for log-domain operation withthe input–output linearity preserved, despite the fact that theinternal signal processing is nonlinear. Although this methodcopes with the synthesis of a transfer function when thenecessary dc-biasing conditions do not destroy the desired acresponse (as is the case for a low-pass function), a modifiedversion of this method was needed [23] for the synthesis ofa bandpass biquad to be accomplished; in [23] El-Gamal andRoberts proposed the synthesis of SFG based transfer functionsby means of dc-stable multi-input log-domain integrators,while in [24] they extended their approach to differentialstructures suitable for VHF operation.

The above methods could be characterized as “top-down”approaches, since they start from a high-level (SS or SFG)transfer function description, and end up with a circuit-levelarchitecture of integrating nodes interconnected by TL loops.A low-level approach to log-domain filtering has been pro-posed based on - representations of filters [14], [25].Furthermore, translinear strategies have also been reported[48]. An alternative low-level “bottom-up” approach allowsthe direct synthesis of a linear transfer function without theneed for a high-level (SS or SFG) representation of the desiredbehavior [26], [27]. This synthesis method is based on theidentification of the Bernoulli Cell. Synthesis proceeds byexploiting the form of the Bernoulli Cell capacitor currentsand by implementing a continued fraction decomposition of

1057–7130/99$10.00 1999 IEEE

DRAKAKIS et al.: LOG-DOMAIN STATE-SPACE APPROACH FOR LOG-DOMAIN FILTERING 291

the desired frequency domain transfer function. The resultingdesign equations are generally related to products of currents,and thus can be easily implemented using the TL principle.This approach enables the designer to take advantage of thewealth of knowledge currently developed for static translinearcircuit topologies, and relate the filter parameters with productsof collector currents in a direct way.

This paper aims to develop the Bernoulli Cell-based ap-proach further and to describe how the synthesis of a lineartransfer function can be simplified when the generic “log-domain state-space” is considered as starting point for thesynthesis procedure [28], and is combined with a high-level(SS or SFG) representation of the desired transfer function. Afurther advantage of this low-level approach is to shed morelight on the dc-biasing requirements inherent in log-domainstructures.

This paper is organized as follows. In Section II theBernoulli Cell is identified. Section III shows how theBernoulli Cell can be applied to the synthesis of log-domainstructures. Section III-A deals with a single Bernoulli Cell,whereas Section III-B considers the systematic interconnectionof Bernoulli Cells. Section IV reveals the generic “log-domainstate-space.” Section V shows a means by which the log-domain state-space can be used to generate linear log-domainfilters. In Section V-A the case of a lossy integrator anda low-pass biquad are considered, while in Section V-Bthe design issues of a lossless integrator and a bandpassbiquad are addressed, along with the problem of properdc biasing. In Section VI certain practical deviations andconsiderations are briefly discussed. Section VII presentssimulation results corresponding to circuits described inSection V. The mathematical treatment of Sections II–Vis fairly analytic to familiarize the reader with the BernoulliCell-based approach.

II. THE BERNOULLI CELL

The Bernoulli Cell is formed by connecting a groundedcapacitor of value at the emitter of a forward-biased npn BJTas illustrated in Fig. 1. Making the reasonable approximationthat the BJT collector current obeys the exponential law

(1)

where is the technology dependent reverse saturation cur-rent, the base voltage, the capacitor voltage(which is equal to the emitter voltage), and the thermalvoltage, then

(2)

Differentiation of (1) yields the following nonlinear differ-ential equation:

(3)

Interestingly, (3) is of the well-known Bernoulli form, and sowe will term the circuit of Fig. 1 a Bernoulli Cell. Despite

Fig. 1. The Bernoulli cell.

the fact that (3) is nonlinear, it can be linearized [29]–[32] bymeans of a nonlinear substitution of the form

(4)

and is then transformed into

(5)

Equation (5) is a linear first order differential equation. Ter-minals and are presently undefined and should beviewed as “free” parameters determinable by the designer. Thelinear operation of the cell is exploited via , which canbe accessed/defined by manipulating ; canbe easily accessed if forms part of a suitably biasedTL loop. For example, consider a translinear loop of 2forward-biased base-emitter junctions:

(6a)

where represent collector currents flowing in a clockwisedirection and represent collector currents flowing in

a counterclockwise direction. If (for example)(i.e., ), then can be

identified as

(6b)

In light of (3)–(6), we are now able to interpret in an alternativeway the role of complete TL loops in log-domain structures asfollows; TL loops globally linearize the differential equationwhich controls the Bernoulli Cell time-domain behavior, byspecifying and allowing access to the parameter/condition

.

III. B ERNOULLI CELLS IN LOG-DOMAIN STRUCTURES

A. A Single Input-Driven Bernoulli Cell

A convenient way of applying the Bernoulli Cell of Fig.1 to log-domain filtering is shown in Fig. 2(a). ConsideringClass-A operation, the input current is converted to alogarithmically compressed voltage where

(7)


(a) (b)

(c) (d)

(e)

Fig. 2. (a) A single input-driven Bernoulli Cell. (b)–(e) Networks dynami-cally equivalent to (a).

Substitution of (7) into (5) yields

(8)

Equation (8) can be interpreted as an expression for KCL atthe emitter of the BJT. Thus, the capacitor current is given by

(9)

Obviously, this is not the only way of driving a Bernoulli Cell;in fact, any topology (translinear or not) which ensures thatthe base terminal variations are equal to the quantity

will realize (9). Fig. 2(b)–(e) illustratesnpn-only driving topologies of this kind. It is a trivial task toshow that each of these circuits ensuresif the base currents are neglected.

B. Interconnection of Bernoulli Cells

In Fig. 3(a), two Bernoulli Cells are connected via a voltagelevel shifter . Evidently this is not the only possible way ofinterconnecting two Bernoulli Cells, but this topology sustainspower supply voltages at low levels. For the first cell, aspreviously shown,

(10)

The linearized expression for the second cell, according to(5), is given by

(11)

where , and is the capacitor value of thesecond Bernoulli Cell. From (9) is clear that

(12)

and since the level shifter ensures that, where is a constant current source, (11)

finally yields

(13a)

When the circuit of Fig. 3(a) is extended to includeinterconnected Bernoulli Cells, as shown in Fig. 3(b), withlevel shifters ensuring

, (13a) can be generalized for the last (th)cell as

(13b)

These cascaded Bernoulli cells plus level shifters can bethought of as a Bernoulli “backbone.” From the previousanalysis and (10)–(13), it is clear that the Bernoulli Cellcapacitors connected to this backbone willhave currents of the form

(14a)

Substituting the positive products ,, for a new variable , i.e.,

(14b)

(14a) take the form

(14c)


(a) (b)

(c) (d)

Fig. 3. (a) Two interconnected Bernoulli cells. (b) Cascaded Bernoulli cells. (c), (d) Networks dynamically equivalent to (b).

Fig. 4. Sensing of thewk(t)(k = 1; � � � ; m) variables for a cascade of Bernoulli cells.

From (14c) it can be concluded that

(14d)

with representing constant in time quantities,and , , representing the correspond-ing capacitor node voltages. is dimensionless, whereas thedimensions of will be [A(mpere)] .

The validity of the exponential dependence of thevariables on the capacitor node voltage: 1) holds for anykind of currents; and 2) is not restricted by the overallinput–output behavior, which might be linear or not.

Observe that the topology of Fig. 3(b) has no specifiedoutput, and the only functional assumption is that every emitterjunction involved is forward biased.

IV. A GENERIC “L OG-DOMAIN STATE-SPACE”

The definition of the variables allows the reexpressionof (10) and (13) in the form

(15)

When the currents are considered asknown functions of the time, then (15) represents a system ofcoupled linear ordinary differential equations which rigorously


Fig. 5. A log-domain lossy integrator.

(a)

(b)

Fig. 6. Subcircuits implementingu(t) = Iref exp[(Vref � VK(t))=VT ]:

describe the dynamic behavior of interconnected BernoulliCells. These equations can be considered as a “log-domainstate-space,” capable of describing and generating a multitudeof linear (or nonlinear) responses. In practice, any intercon-nection of Bernoulli Cells which ensures that the base voltagevariations , , of the th cell followthe capacitor voltage variations , ,

of the previous ( )th cell will yield the same systemof differential equations. Fig. 3(c) and (d) illustrates npn-onlyinterconnections which satisfy this requirement. Observe thatthe designer is free to choose among various dynamicallyequivalent interconnections, where the forward-biased emitterjunctions might either alternate [Fig. 3(d)] or be stacked[Fig. 3(c)]. In the following synthesis and analysis examples,the discussion concentrates on the interconnection shown inFig. 3(a), (b)—which typically forms the “backbone” of log-domain filters—since this kind of topology allows integrationat low power-supply levels.

The variables can be sensed by means of additionaldiode-connected BJT’s, as shown in Fig. 4. The output currents

can be derived by applying the TL principle

(16)

with . The dimensional consistency ofthe log-domain state-space equations can be readily verified.

In addition to linear filtering, a structure of this kind couldproduce a large-scale nonlinear signal processing system.Equations (15) hold for an open topology, with the coefficients

being real-valued currents determinable by the designer,and with state-variables being nonlinearly related to realcurrents. The log-domain state-space seems capable of creatingand/or describing large nonlinear signal processing systems;this kind of information vanishes when an ELIN approachis adopted because the input–output relationship is bound toconform to the linearity imposed by the linear SS or SFGrepresentation of the transfer function. Although small-scalenonlinear dynamics have been reported (e.g., translinear RMS-DC converter of Mulderet al. in [33], TL phase detectorof Payne et al. [34]), it is not currently clear in whichway useful large-scale nonlinear signal processing systemscould be appropriately structured, although this issue hasalso been addressed via a systematic generalization of (15)[35]. In the following discussions, we therefore constrainourselves to the synthesis of linear transfer functions. Itshould be noted, however, that the Bernoulli Cell seemsto be capable of conveniently representing/realizing highlycomplicated dynamics like the Hodgkin–Huzley nerve axonbehavior, extending accordingly the potential of logarithmiccircuits [43], [49].

V. APPLICATION OF THE “L OG-DOMAIN

STATE-SPACE” TO LOG-DOMAIN FILTERING

The above analysis has shown that the log-domain state-space equations described by (15) hold for any interconnectionof Bernoulli Cells which ensures that the capacitor voltagevariations of the previous cell are conveyed to the baseterminal of the next cell. When this set of differential equationsis considered as the starting point of a synthesis procedure,then the designer may easily synthesize a frequency-domaintransfer function by following the steps outlined below.

1) Express the desired frequency-domain transfer functionby means of a set of first-order differential equations,for example, state-space or signal-flow-graph represen-tation.

2) Write the respective log-domain state-space genericequations; when an th-order transfer function isrequired, the respective first differential equationsof system (15) describing the interconnection ofBernoulli Cells should be considered.

3) Compare the prototype system of step 1 to the genericequations of step 2 and define

a) the correct form of the necessary currents, andb) the output as a linear function of the variables.


4) Implement the necessary design equations, i.e., the cor-rect currents, by means of any appropriate archi-tecture, although a pure translinear design strategy seemsto facilitate the implementation.

Step 3a requires a consideration of both the required acresponse and the necessary dc biasing conditions, as willbecome clear in the following examples.

A. A Lossy Integrator and a Low-Pass Biquad

Table I summarizes the synthesis procedure for both a lossyintegrator and a low-pass biquad. Column 1 shows the desiredfrequency domain transfer function, while column 2 gives acorresponding linear state-space representation (step 1). Thethird column shows the generic log-domain state-space designequations, describing the dynamic behavior of one and twoBernoulli Cells for the case of the lossy integrator and the low-pass biquad, respectively (step 2). The fourth column showsthe design equations necessary to ensure that the log-domainstate-space has the same form as the prototype system (step3); in this way, it is ensured that the final log-domain structurewill behave as the required original system.

Lossy Integrator Synthesis:The necessary design equationsin column 4 are obtained by comparing the linear (column 2)and log-domain (column 3) state space equations. In both SSequations, the first term (left-hand term) relates to the differen-tial of the state variable [i.e., , , respectively], whilethe third term (to the right of the sign) relates to the inputsignal [ , respectively]. The linear SS equation hasthe remaining term proportional to the state-variable ,and thus the log-domain equation must similarly have theremaining term proportional to . This gives the firstdesign equation, (i.e., constant).The second linear SS equation states that the output variable

is proportional to . Thus, in log-domain SS, theoutput current must be proportional to Thisgives the second design equation. Proceeding to step 4 thefirst design equation requires constant which is easilyimplemented by incorporating (at circuit level) a constantcurrent source, i.e., . The second design equation isconveniently realized as shown in Fig. 4 and (16). The finalcircuit is shown in Fig. 5.

Referring to Table I, row 1 and Fig. 5, the log-domain SSequations can be written

Taking the Laplace transform and considering only the steady-state response

(17)

Equation (17) corresponds to the transfer function of a lossyintegrator with pole frequency and dc gain

. Both values are easily tuneable via currentsources and .

Low-Pass Biquad Synthesis:The procedure of extractingthe necessary design equations is similar to that described forthe lossy integrator. In this case, a comparison of columns 2and 3 in Table I (row 2) reveals

or, equivalently [recall that

],

(18a)

(18b)

(18c)

where are constant quantities.Equation (18a)—being a product of currents—could be

interpreted as corresponding to a translinear loop and canbe implemented using either of the blocks shown in Fig. 6reported previously by Frey [11], [12]. When points A and Bin Fig. 6 are connected to the emitters of Bernoulli Cell BJT’s

and (see Fig. 7), (18a) is fulfilled by the formation ofthe translinear loop . Equation (18b) is metby simply adding a constant current sourceat the emitter ofthe second Bernoulli Cell. Finally (18c) is met by connectinga level shifter and an output BJT to the second cell asdescribed in Fig. 4 and (16).

The exact ac response of the circuit shown in Fig. 7 isderived by applying the Laplace transform to the system oflog-domain state-space equations; referring to Table I (row 2)and considering Fig. 7, the design equations (18a)–(18c) canbe rewritten

or, equivalently,

(18d)

Substituting the design equations (18d) into the generic logdomain state-space equations (see Table I)


Fig. 7. A log-domain low-pass biquad.

TABLE ILOG-DOMAIN STATE-SPACE-BASED SYNTHESIS PROCEDURE OF ALOSSY INTEGRATOR AND A LOWPASS BIQUAD

Applying the Laplace transform and considering only thesteady-state solution

(19)

Equation (19) describes a low-pass biquad with a pole fre-

quency , a quality factor

, and a gain factor . Allthese parameters are tuneable via dc currents .

B. A Log-Domain Integrator and aLog-Domain Bandpass Biquad

In the following synthesis examples, the problem of properdc biasing of log-domain circuits is addressed. Recalling (15),it should be stressed thatthe currents should always begreater than zero, i.e., . The opposite would leadto impossible dc conditions for the BJT of theth BernoulliCell, since it would have no dc bias current. A realistic solutionto the problem of suitable dc biasing, when the ac behaviordictates that a specific current should be equal to zero,can be stated as follows: instead of nullifying the current,ensure that the product remains constant in time. Itwill be shown in the following examples that these additional“constant terms” in the log-domain state-space realization ofthe desired transfer function should be appropriately relatedto the level of dc biasing in such a way that the desired acbehavior remains undisturbed by their presence.


TABLE IILOG-DOMAIN STATE-SPACE-BASED SYNTHESIS PROCEDURE OF ALOSSLESSINTEGRATOR AND A BANDPASS BIQUAD

Before proceeding to the design of a lossless integrator and abandpass biquad, the implementation of these constant productterms will be considered. We require

(20)

where are constant terms.The subcircuits illustrated in Fig. 6(a), (b) [11], [12] [and

any other subcircuit capable of generating currents ofthis form] are suitable for the implementation of thesecurrents since

with constant in time. The designeris left with the freedom to choose any appropriate circuitnecessary for the generation of the voltage reference.

We turn now to Table II, which reveals the necessaryconditions for the generic “log-domain state-space” equationsto produce a theoretically ideal integrator and a bandpassbiquad.

Integrator (see Table II Row 1):A first examination of thestate equations in columns 2 and 3 suggests that the designermust set to ensure equivalence between the tworepresentations. However, if , the Bernoulli CellBJT will be off (no dc bias current). If, however, we chose

constant , the integrator would become lossy(Table I, row 1).

Effectively, the required ac conditions areincompatible with the necessary dc biasing. A solution to thisproblem is to set the product where isconstant

(21)

For class-A operation, the input signal is superimposed on adc component, i.e., with the dc-biascurrent. Taking the Laplace transform of (21) and substituting

yields

(22)

represents the initial value of the variable at, i.e., when the ac input is applied. The second design

equation in Table II states that , which canbe implemented as in the lossy integrator case. Referring toFig. 8 and (22):

(23)

The first term in (23) represents the dc component of the outputcurrent, the second term represents the desired integration ofthe ac component, whereas the third term must be activelycancelled. This cancellation is achieved when

(24)

Fig. 8 shows the complete integrator topology where the sub-circuit of Fig. 6(b) is used to implement the constant product

; for the loop comprised of itholds

(25)


Comparing (24) and (25), cancellation of the unwanted termis achieved when

(26)

Equation (26) states the necessary condition for the topologyof Fig. 8 to be theoretically an ideal lossless integrator withan output

(27)

Bandpass Biquad:A similar dc-biasing problem is encoun-tered since—from Table II, row 2— should be equalto zero. To avoid this situation, we again setconstant, giving the necessary design equations:

or, equivalently,

(28a)

(28b)

(28c)

Equation (28a) is conveniently implemented by means ofeither of the blocks of Fig. 6, similar to the case of the low-passbiquad. A constant current sourceis added at the emitter ofthe first Bernoulli Cell to realize the constant quantity(seeFig. 9). It is straightforward to show that the TL loop formedby fulfills (28a) with . Equation(28c) corresponds to the TL loop formed by[compare with (16) and Fig. 4]. Equation (28b) correspondsto the necessary dc-biasing condition and is again realized bymeans of the subcircuits of Fig. 6. From Fig. 9 it can be seenthat

(29)

The exact ac response is derived by applying the Laplacetransform to the system of log-domain state-space equations.When (28a,b,c) are met by means of the additional circuitry

described above, we can state

or, equivalently,

(30)

Combining (30) with the generic log-domain state-space ex-pressions (see Table II):

(31)

Applying the Laplace transform to (31) and taking into con-sideration the initial conditions for ,

(32)

where and represent the initial value ofthe and variables, respectively, at (whenthe ac input is applied) and

(33)

The first term of (32) represents the bandpass filtered ver-sion of the input which is characterized by a center fre-

quency , a quality factor

and a gain factor .The second and third terms contribute only transient terms

which are not of importance for the steady-state response (seethe Appendix). The last term contributes both transient termsand a dc component which is present at the output and whichequals (see the Appendix)

Therefore, the selection of the additional constant termaffects the dc level present at the output.


Fig. 8. A log-domain lossless integrator.

Fig. 9. A log-domain bandpass biquad.

VI. PRACTICAL DEVIATIONS AND CONSIDERATIONS

In the foregoing sections of this paper, the BJT’s havebeen considered as ideal exponential voltage-controlled cur-rent sources. This is a convenient simplification which easesthe systematic formation of the log-domain state-space dif-ferential equations. However, the integrated implementationof BJT’s leads to unavoidable physical deviations from apure exponential – characteristic, the most important ofthese being parasitic ohmic resistances of the base and theemitter regions, finite beta , and the associated parasiticcapacitance . A more detailed analysis should also includethe finite output impedance and the collector-substrate parasiticcapacitance. Each of those factors will distort the ideal BJTexponential behavior. Since log-domain circuits are large-signal networks, certain limitations exist on how these parasiticeffects can be reliably modeled to enable an analysis ofdistortion in log-domain circuits. The parasitic capacitancesfor instance are typically associated with the hybrid-(small-signal) equivalent of the BJT [36], [37]; thus, if a realistic

(a)

(b)

Fig. 10. (a) A nonideal Bernoulli cell. (b) A nonideal Bernoulli cell drivenby an identical nonideal input transistor.

distortion mechanism analysis for log-domain structures is tobe developed, large-signal ac models should be used [38].Unfortunately the complexity of such models renders themfairly impractical for hand-calculations, even for the simplestlog-domain structures.

These limitations have also been realized by other re-searchers in the field who have mainly concentrated on theonly large-signal parasitic parameter of BJT’s , i.e.,(beta)[21], [39]. The Bernoulli Cell-based formalism, being a low-level approach, seems to be well suited for both the identifi-cation of -related distortion mechanisms and the evaluationof its effects. Although the present paper focuses mainly onsynthesis issues of log-domain filters, in the following briefdiscussion we highlight certain aspects related to distortion.

When in the generic Bernoulli Cell BJT of Fig. 1, the finiteand the ohmic resistances of the base and the emitter (

and , respectively] are taken into consideration, the actualbase-emitter terminal voltage difference will have a valuedifferent than its ideal because of the voltage drops acrossand ; this situation is illustrated in Fig 10(a).

Assuming that: 1) the collector current has an idealexponential dependence on ; and 2) and

( and are the base and the emitter current,respectively), then the dynamic behavior of the modifiedBernoulli Cell of Fig. 10(a) can be derived as

(34)

with .A direct comparison of (3) to (34) reveals that the inclusion

of the parasitic voltage drops leads to the presence of anadditional term [shown on the right-hand side of (34)], which


distorts the ideal behavior of the cell. This transistor-levelanalysis yields a first qualitative insight into the distortionmechanism, and a clearer picture is created when a similartreatment is adopted for each transistor. Consider, for example,the nonideal Bernoulli cell being driven by an identical non-ideal input transistor as shown in Fig. 10(b). The pair of BJT’sare now approximately governed by the following distorteddifferential equation [compare with (8)]:

(35)

Taking into consideration that , the distortedcapacitor current reduces to

(36)

For reasonably high values of and for similar values ofdc currents biasing the two transistors, the capacitor currentdoes not deviate significantly from its expected value [see(8)]. In (35), two distorting terms remain present, which areclearly related to the parasitic voltage drops in each transistor.Luckily these terms affect the ideal behavior in a “symmetric”way (the terms are on opposite sides of thesign), andtheir values are proportional to a generally small parasitictime constant with .When the frequency of the input signal is much lower than

it might thus be argued that the transformedKCL expression given by (35) is not severely affected by theseparasitic terms. If, on the other hand, these parasitic terms maynot be neglected, then the distorted value can still beapproximatelycalculated since (35) yields [when (14b) and thecomments accompanying (36) are taken into consideration]:

(37)

Equation (37) is linear in and can be solved analyticallywhen the expected values of are substituted.

Taking into consideration these parasitic components forall BJT’s forming the Bernoulli “backbone” would lead toa modified set of log-domain state-space equations. Such anattempt is cumbersome and beyond the scope of the presentarticle. Nevertheless, it is useful to discuss certain qualitativeaspects.

Considering the effect of the parasitic voltage drops for anumber of base-emitter junctions that form a TL loop—a com-mon situation in log-domain structures—leads to the concept

of “excess voltage” around the TL loop [40]. This conceptis used both for analysis and optimization of (static) TLstructures as described in [40] and [41]. The time-varyingdependence of the excess voltage leads to residual distortion[42]. A rough estimation of the excess voltage is feasible ifthe ideal (i.e., expected) values of collector currents for eachjunction involved are known. A low-level analysis methodsuitable for determining the (nonlinear) currents internal tolog-domain structures in closed analytical form is thus neces-sary, and the log-domain state-space can be used as an analysistool [27] to derive these ideal current values [43]. As anexample of the use of the excess voltage, consider how thecondition is affected by the presence of theparasitic voltage drops in each transistor comprising the loop

of Fig. 8. An analysis with the parasiticvoltage drops taken into consideration yields the followingmodified condition:

(38)

where is the excess voltage along the TL loop;, where represents

the parasitic voltage drop at Substituting the “distorted”(38) into (37) yields [when is reasonably smallin comparison with unity, is reasonably high, and the inputfrequency is much smaller than ]

(39a)

Considering the quantity as a Fourier se-ries—which can be done when the expected values of theinternal log-domain currents are known—it should be clearthat its presence leads to distortion. The output current isgiven by

(39b)

with the distorted value of given by (39a) forand representing the excess voltage around

the TL loop . Clearly phase errors have nowbeen introduced to the output current due both to and

. Similar comments hold for higher order topologies.For the case of the bandpass biquad, for example, each of thethree TL loops described previously can be associated withan excess voltage quantity affecting the respectivedifferential equations. A reliable large-signal calculation of

around a TL loop should also take into account theoperand nature of for each transistor [2], as well as the factthat the internal collector currents are spectrally rich [43]. Avery low-level approach seems unavoidable [44].

A further convenience of employing the excess voltageconcept is that other sources of distortion such as emitter areamismatch and the Early effect can also be included.


From the above largely qualitative discussion it becomesclear that the exact prediction of distortion in log-domainstructures is fairly complicated. Therefore, small-signal ap-proximations—like those of (39a) and (39b)—seem to beuseful and insightful.

Consider, for example, the lossy integrator transfer functionderived by large-signal equations (17); its pole frequency isgiven by the relation

(40a)

Realizing that equals the small-signal of the respec-tive BJT, a “small-signal” pole frequency can be defined

(40b)

From (40b), it is easy to understand the “shift to the left” ofthe frequency response which is often observed in log-domainfilters; is degraded due to the presence of the finite emitterresistance [45]

(40c)

with the ideal transconductance value. Substituting (40c)into (40b) yields

(41)

assuming that the quantity is reasonably small in com-parison with unity. Equation (41) is identical to that calculatedby means of small-signal approximations on a linear state-space representation of the lossy integrator, and reveals that thebiasing currents should be appropriately scaled—as proposedin [21]—to compensate for the -induced “shift to the left” ofthe frequency response. When is substituted for ,the value of in (41) describes the same deviation dueto as expressed in [21]. Similar comments hold for the caseof the low-pass and the bandpass biquads.

Equations (17), (19), and (32) demonstrate that the filterparameters are proportional to biasing collector current values,which should be PTAT [46], [47] to prevent a drift of the filterparameters with temperature variations (a situationwhich is not uncommon in bipolar designs). However, thisleads to a higher current consumption at higher temperatures.In terms of power dissipation and chip area, the circuitsdescribed in the previous sections are typical representativesof class-A log-domain structures [4], [5], [12]. More economicrealizations in terms of power dissipation can be achievedby using fully differential structures [24] but at the expenseof increased circuit complexity. Finally the small values of

(a few mV’s) necessary for the appropriate tuning of the

filters can be conveniently generated; voltage references of thisorder of magnitude can be produced when the circuit outputvoltage is proportional to the of a pair of transistors.Alternatively can be set to some convenient value (e.g.,0 V), and can then be set appropriately [see (26)].

VII. SIMULATION RESULTS

The design approach developed in Section IV was testedand confirmed by means of HSPICE simulations with processparameters from a commercial 11 GHz bipolar process. Dueto a lack of space, the simulation results for the case of thelossy integrator and the low-pass biquad are not presented;the reader may consult [4], [5], [14], [15], and [22], wherevarious low-pass frequency responses are presented. In thefollowing we constrain ourselves to the cases of the integratorand the bandpass biquad, with the input having the form

(class-A operation). The results areindicativeand aim at examining certain qualitative features ofthe approach.

For the Case of the Integrator:It was shown in SectionV-B that when , the output currentis composed of a dc component and an accomponent which ideally is a pure integration of the alternatinginput current. Simulations were carried out with (i.e.,

) and voltage power supply voltage V. Referringto (27), the integration time constant dependsboth on the capacitance and the value of which flowsthrough the diode-connected level shifter. Fig. 11 shows thevariation of as is varied and held constant for a squarewave input signal of 10 MHz frequency, and an ac amplitudeof 15 A superimposed on a dc input A. Fig. 12shows how the variation of (with held constant) altersboth and the dc component present at the output as expectedfrom (23). The results were also confirmed for input signalfrequencies up to several tens of megahertz. The dependenceof the unity gain frequency upon was confirmed; however,the dc gain did not exceed 35–40 dB and in conjunction withthe phase errors induced by transistor non-idealities, limits thecircuit practicality as a pure integrator. For a sinusoidal inputat 10 MHz modulated by 30% and with ns, theoutput THD was 0.258%.

For the Case of the Bandpass Biquad:According to (32),the product of currents controls the center frequency

and the ratio controls the gain factor Thequality factor is dependent both on the capacitor valuesand Once these values have been selected to givethe desired ac response, the designer must also choose theoptimum values of and Fig. 13 illustrates variousac responses for a center frequency of 10 MHz and

Observe that the center frequency remains constant—aspredicted—when the values of and vary but theirproduct remains constant. At low frequencies, a finite rejectionband is observed, that is related to the finitevalue [4],[5], i.e., the higher the the higher the rejection. Curves(b) and (c) of Fig. 13 underline the importance of selectingthe optimum value of , whereas (d) reveals that there areoptimum values of currents and . Curves (a), (b), and


(a)

(b)

Fig. 11. Integrator output forD = I01 = 50 �A, fin = 10 MHz.—— C1 = 40 pF, f� = 7:65 MHz. - - - - - C1 = 20 pF, f� = 15:3 MHz.

(a)

(b)

Fig. 12. Alteration of the integration time-constant with currentI01 whenfin = 10 MHz; the dc level varies.D = 50 �A, C1 = 20 pF.—— I01 = 50 �A. - - - - - I01 = 100 �A.

(d) were confirmed with multitone transient analysis forupto % whereas curve (c) for up to %. For theextreme case of curve (e)—which is very close to the idealtheoretical bandpass response—a 1 kHz tone withhigherthan % would not be rejected by 70 dB; when %the rejection equals 50 dB, whereas when % therejection reduces further to 40 dB. Referring to curve (c) a lowfrequency (10 kHz) input signal with % turns offand the filter becomes a lossy integrator. For the design of log-

domain filters, large multitone transient simulations should beconsidered as a time-consuming necessity when accurate largesignal ac analysis are to be obtained especially when the BJT’sare forced to operate with significant current level differences.Fig. 14 shows higher center frequency tuning and reveals thatthe higher the center frequency, the higher the deviation fromthe theoretically predicted response. This kind of deviation isprimarily due to the presence of the parasitic ohmic resistancesand the parasitic capacitances [4], [21]. When

(e.g., A A the circuitexhibits better rejection at low frequencies and better linearityin the passband. In Fig. 15, tuning for a given centerfrequency is shown; the curves correspond to quality factorvalues of 1, 2, and 3.33 accomplished by altering the valueof For comparison the theoretical response for the caseof is also shown. For these simulations smallresistors in series with the capacitors were used to prevent

-enhancement, as suggested in [12]. Better results wereachieved when was equal to the value. However, whensignificant differences between the input and the output dclevels occur, then a small modulation index at the input wouldcorrespond to a large modulation index at the output. Finally,Fig. 16 illustrates an example of tuning by altering thecapacitor values, with pF and pF. Forcomparison, the response for and the theoreticalresponse for are also shown. The strong capacitorvalue assymetry affects the linearity in the passband. Betterresults can be obtained when withh the product

remaining constant (e.g., AA, a case not shown in Fig. 16. The results shown in

Figs. 13–16 are indicative only and do not correspond tooptimized ones. In Figs. 15 and 16, for example, waskept constant; however, in general it is when all currents donot differ significantly that optimized results can be obtained.Thus different combinations of along with differentgain factor values might result in improved performance. Asa final comment it should be emphasized that the fact thatall transistors have to operate in class-A (recall the remarkconcerning curve (c) of Fig. 13) dictates that the output dc levelshould be carefully determined when comparable modulationindices at both input and output can be obtained.

Generally speaking, the simulation results verified the va-lidity of the transistor-level approach developed in SectionsII–V and also revealed certain design options and performancelimitations.

VIII. C ONCLUSIONS

This paper has presented a systematic transistor-level ap-proach suitable for the design of linear log-domain filters. Themethod is based on a set of linear differential equations termedlog-domain state-space, and created via the identification of alow-level nonlinear analog cell governed by the Bernoulli dif-ferential equation. The approach identifies a convenient formof low-level nonlinear dynamics in log-domain structures, itreveals an alternative (other than exponential) current-relatedform for the log-domain state-variables, and also indicates thepossibility for implementing nonlinear applications. Simula-


Fig. 13. Simulated bandpass frequency response with a center frequencyf0 �= 10 MHz andQ = 1; D = Id = Iq1 = Iref = 50 �A, C1 = C2 = 30

pF. (a)I01 = 50 �A, I03 = 50 �A, Vref = �12 mV. (b) I01 = 35 �A,I03 = 71:4 �A, Vref = �23 mV. (c) I01 = 35 �A, I03 = 71:4 �A,Vref = �19 mV. (d) I01 = 71:4 �A, I03 = 35 �A, Vref = �12 mV.(e) I01 = 20 �A, I03 = 125 �A, Vref = �39 mV.

Fig. 14. Simulated bandpass frequency response withcenter frequency f0 = 100 MHz and Q = 1.—— D = Id = Iq1 = Iref = I01 = I03 = 500 �A, C1 = C2 = 30

pF, Vref = �12 mV. — — — D = Id = Iq1 = Iref = 500 �A,I01 = 400 �A, I03 = 625 �A, C1 = C2 = 30 pF, Vref = �17 mV.-.-.-.-.-.-.D = Id = Iq1 = Iref = 500 �A, I01 = 625 �A, I03 = 400 �A,C1 = C2 = 30 pF, Vref = �12 mV.

tion results confirming the operation for an integrator and abandpass biquad were also presented.

APPENDIX

For quality factor values , the following will hold:

Fig. 15. Q-tuning via Id. —— D = 100 �A, I01 = I03 = 100 �A,Id = 100 �A, Iref = 50 �A, C1 = C2 = 30 pF,R = 10 , Vref = 0 V,Iq1 = 100 �A. – – – – –D = 50 �A, I01 = I03 = 100 �A, Id = 50 �A,Iref = 50 �A, C1 = C2 = 30 pF, R = 10 , Vref = �10 mV,Iq1 = 50 �A. -.-.-.-.-.-. D = 30 �A, I01 = I03 = 100 �A, Id = 30 �A,Iref = 50 �A, C1 = C2 = 30 pF, R = 10 , Vref = �20 mV,Iq1 = 30 �A.

Fig. 16. Q-tuning viaC1; C2. – – – –Q = 1, D = 100 �A, Id = 100 �A,Iref = 50 �A, C1 = C2 = 30 pF,R = 0 , Vref = 0 V, Iq1 = 100 �A.—— Q = 6:67, D = 50 �A, Id = 50 �A, Iref = 50 �A, C1 = 100 pF,C2 = 9 pF, R = 0 , Vref = �10 mV, Iq1 = 50 �A. -.-.-.-.-. Q = 6:67,D = 50 �A, Id = 50 �A, Iref = 50 �A, C1 = 100 pF, C2 = 9 pF,R = 5 , Vref = �10 mV, Iq1 = 50 �A.

(A.1)


(A.2)

(A.3)

Equations (A.1) and (A.2) correspond to exponentially decay-ing time-domain terms. The last two terms of (A.3) similarlycorrespond to transient terms in the time domain. Thus, (32)(main text) describes a bandpass filtered version of the inputsuperimposed on a dc component which equals

ACKNOWLEDGMENT

The authors would like to thank Ericsson MicroelectronicsResearch Centre (MERC) for sponsoring this work, and the un-known reviewers for their fruitful comments and suggestionswhich significantly improved the readability of the paper.

REFERENCES

[1] B. Gilbert, “Translinear circuits: A proposed classification,”Electron.Lett., vol. 11, pp. 14–16, 1975.

[2] E. Seevink, “Analysis and synthesis of translinear integrated circuits,”in Studies in Electrical & Electronic Engineering. Amsterdam, TheNetherlands: Elsevier, 1988.

[3] R. W. Adams, “Filtering in the log-domain,” in63rd AES Conf.,NewYork, 1979, preprint 1470.

[4] D. R. Frey, “Log-domain filtering: An approach to current-mode filter-ing,” IEE Proc. G, vol. 140, pp. 406–416, 1993.

[5] , “Exponential state space filters: A generic current mode designstrategy,”IEEE Trans. Circuits Syst. I, vol. 43, pp. 34–42, 1996.

[6] Y. Tsividis, “Externally linear, time-invariant systems and their appli-cation to companding signal processors,”IEEE Trans. Circuits Syst. II,vol. 44, pp. 65–85, Feb. 1997.

[7] , “On linear integrators and differentiators using instantaneouscompanding,”IEEE Trans. Circuits Syst. II, vol. 42, pp. 561–564, 1995.

[8] , “General approach to signal processors employing companding,”Electron. Lett., vol. 31, no. 18, pp. 1549–1550, 1995.

[9] E. Seevinck, “Companding current-mode integrator: A new circuitprinciple for continuous-time monolithic filters,”Electron. Lett., vol.26, no. 24, pp. 2046–2047, 1990.

[10] Y. Tsividis, “Instantaneously companding integrators,” inProc. IEEEInt. Symp. Circuits Syst. (ISCAS’97), Hong Kong, 1997, vol. I, pp.477–480.

[11] D. R. Frey, “A 3.3 V electronically tuneable active filter useable tobeyond 1 GHz,” inProc. IEEE Int. Symp. Circuits Syst. (ISCAS’94),London, U.K., 1994, vol. 5, pp. 493–496.

[12] , “On log-domain filtering for RF applications,”IEEE J. Solid-State Circuits, vol. 31, pp. 1468–1475, 1996.

[13] , “An adaptive analog notch filter using log-filtering,” inProc.IEEE Int. Symp. Circuits Syst. (ISCAS’96), Atlanta, GA, 1996, vol. 1,pp. 297–300.

[14] F. Yang, C. Enz, and G. Ruymbeke, “Design of low-power and low-voltage log-domain filters,” inProc. IEEE Int. Symp. Circuits Syst.(ISCAS’96), Atlanta, GA, 1996, vol. 1, pp. 117–120.

[15] M. Punzenberger and C. Enz, “A new 1.2V BiCMOS log-domainintegrator for companding current mode filters,” inProc. IEEE Int. Symp.Circuits Syst. (ISCAS’96), Atlanta, GA, 1996, vol. 1, pp. 125–128.

[16] C. Toumazou, J. Ngarmnil, and T. S. Lande, “Micropower log-domainfilter for electronic cochlea,”Electron. Lett., vol. 30, no. 22, pp.1839–1841, 1994.

[17] R. Fried, D. Python, and C. Enz, “Compact log-domain current-modeintegrator with high transconductance-to-bias current ratio,”Electron.Lett., vol. 32, no. 11, pp. 952–953, 1996.

[18] C. Enz, M. Punzenberger, and D. Python, “Low-voltage log-domainsignal processing in CMOS and BiCMOS,” inProc. IEEE Int. Symp.Circuits Syst. (ISCAS’97), Hong Kong, 1997, vol. I, pp. 489–492.

[19] J. Mulder, W. A. Serdijn, A. C. van der Woerd, and A. H. M.van Roermund, “Signalx noise intermodulation in translinear filters,”Electron. Lett., vol. 33, no. 14, pp. 1205–1207, 1997.

[20] M. H. L. Kouwenhoven, J. Mulder, and A. H. M. van Roermund, “Noiseanalysis of dynamically nonlinear translinear circuits,”Electron. Lett.,vol. 34, no. 8, pp. 705–706, 1998.

[21] V. W. Leung, M. El-Gamal, and G. W. Roberts, “Effects of transistornonidealities on log-domain filters,” inProc. IEEE Int. Symp. CircuitsSyst. (ISCAS’97), Hong Kong, 1997, vol. 1, pp. 109–112.

[22] D. Perry and G. W. Roberts, “Log-domain filters based on LC laddersynthesis,” inProc. IEEE Int. Symp. Circuits Syst. (ISCAS’95), Seattle,WA, 1995, pp. 311–314.

[23] M. El-Gamal and G. W. Roberts, “LC ladder based synthesis oflog-domain bandpass filters,” inProc. IEEE Int. Symp. Circuits Syst.(ISCAS’97), Hong Kong, 1997, vol. I, pp. 105–108.

[24] M. El-Gamal, V. Leung, and G. W. Roberts, “Balanced log-domainfilters for VHF applications,” inProc. IEEE Int. Symp. Circuits Syst.(ISCAS’97), Hong Kong, 1997, vol. I, pp. 493–496.

[25] J. Mahattanakul and C. Toumazou, “Modular log-domain filters,”Elec-tron. Lett., vol. 33, no. 13, pp. 1130–1131, 1997.

[26] E. M. Drakakis, A. J. Payne, and C. Toumazou, “Log-domain filters,translinear circuits and the Bernoulli cell,” inProc. IEEE Int. Symp.Circuits Syst. (ISCAS’97), Hong Kong, 1997, vol. I, pp. 501–504.

[27] , “Log-domain filtering and the Bernoulli cell,”IEEE Trans.Circuits Syst. I, to be published.

[28] , “Bernoulli operator: A low-level approach to log-domain pro-cessing,”Electron. Lett., vol. 33, no. 12, pp. 1008–1009, 1997.

[29] E. Kreyszig,Advanced Engineering Mathematics. New York: Wiley,1962.

[30] G. Stephenson and P. M. Radmore,Advanced Mathematical Methodsfor Engineering and Science Students.Cambridge, U.K.: CambridgeUniv. Press, 1980.

[31] K. A. Stroud,Engineering Mathematics.New York: Macmillan, 1995.[32] E. Drazin, Non-Linear Systems. Cambridge: Cambridge University

Press, 1992.[33] J. Mulder, W. A. Serdijn, A. C. van der Woerd, and A. H. M. van

Roermund, “Dynamic translinear RMS-DC converter,”Electron. Lett.,vol. 32, no. 22, pp. 2067–2068, 1996.

[34] A. J. Payne and A. Thanachayanont, “Translinear circuit for phasedetection,”Electron. Lett., vol. 33, no. 18, pp. 1507–1509, 1997.


[35] E. M. Drakakis and A. J. Payne, “Structured log-domain synthesis ofnonlinear systems,” inProc. ISCAS’99, to be published.

[36] S. M. Sze, Semiconductor Devices—Physics and Technology. NewYork: Wiley, 1985, pp. 136–137.

[37] Y. Tsividis, Mixed Analog-Digital VLSI Devices and Technology.NewYork: McGraw-Hill, 1996.

[38] D. L. Pulfrey and N. G. Tarr,Introduction to Microelectronics Devices.Englewood Cliffs, NJ: Prentice Hall, 1989.

[39] M. Punzenberger and C. Enz, “Low-voltage companding current-modeintegrators,” inProc. IEEE Int. Symp. Circuits Syst. (ISCAS’95), Seattle,WA, 1995, pp. 2112–2115.

[40] B. Gilbert, “Current-mode circuits from a translinear viewpoint: Atutorial,” in Analogue IC Design: The Current-Mode Approach,C.Toumazou, F. J. Lidgey, and D. G. Haigh, Eds. London, U.K.: PeterPeregrinus, 1990.

[41] , “A precise four-quadrant multiplier with subnanosecond re-sponse,”IEEE J. Solid-State Circuits, vol. SC-3, 1968.

[42] S. D. Willingham and K. Martin, Integrated Video-FrequencyContinuous-Time Filters. Norwell, MA: Kluwer Academic, 1995.

[43] E. M. Drakakis and A. J. Payne, “A Bernoulli-Cell based theoreticalinvestigation of the nonlinear dynamics in log-domain structures,”J.Analog Integrated Circuits Signal Processing, to be published.

[44] , “Approximate estimation of distortion in log-domain: A casestudy,” submitted for publication.

[45] K. R. Laker and W. M. C. Sansen,Design of Analog Integrated Circuitsand Systems. New York: McGraw-Hill, 1994.

[46] R. W. J. Barker and R. L. Hart, “Low voltage rail-supply-insensitivePTAT current generator,”Proc. Inst. Elect. Eng. G, vol. 131, pp.242–244, 1984.

[47] A. Fabre, “Bi-directional current-controlled PTAT current source,”IEEETrans. Circuits Syst. I, vol. 41, pp. 922–925, 1994.

Emmanuel Michael Drakakis received the B.Sc.degree (physics) in 1991 and the M.Phil. degree(electronic physics) in 1994, both from Aristo-tle University of Thessaloniki, Macedonia, Greece.Since 1996, he has been working toward the Ph.D.degree in the Department of Electrical Engineering,Imperial College, London, U.K.

In 1996, he was a Research Associate at theGreek State Army Research and Technology Centre,Electronics and Physics Division. His main researchinterests include device modeling, circuit theory,

bio-inspired systems, and the design of high frequency analog integratedcircuits.

Mr. Drakakis was awarded Performance Scholarships from the Foundationof State Scholarships in 1986 and in 1988.

Alison Payne (S’90–M’95) received the B.Eng.degree in 1989 and the Ph.D. degree in 1992, bothfrom Imperial College of Science, Technology andMedicine, London, U.K.

From 1992 to 1994, she worked as a Design En-gineer for GEC-Plessey Semiconductors, Swindon,U.K., involved in the design of analog integratedcircuits for radiopaging receivers, with particularemphasis on low voltage (down to 1V) and lowpower operation. She is currently a Lecturer inanalog circuit design in the Department of Electrical

and Electronic Engineering, Imperial College, London, U.K. Her presentresearch interests include RF bipolar and CMOS analog circuit design,fully-integrated analog filters, robust analog design, and circuit synthesismethodologies. Dr. Payne has published various papers in internationaljournals and conferences in the field of analog IC design. Dr. Payne is currentlyvice president of the IEEE Circuits and Systems (UK Chapter) Committee,and is also president-elect of the IEEE Circuits and Systems Society AnalogSignal Processing Technical Committee.

Chris Toumazou is the Mahanakorn Professor ofAnalog Circuit Design in the Department of Elec-trical and Electronic Engineering, Imperial College,London, U.K. He received the B.Sc. degree inengineering and the Ph.D. degree in electrical en-gineering from Oxford-Brookes University, Oxford,England in 1983 and 1986, respectively. He is amember of the Analog Signal Processing Committeeof the IEEE Circuits and Systems Chapter for whichhe was Chariman (1992–1994), and is also a com-mittee member of the Circuits and Systems Chapter

of the U.K. and Republic of Ireland Section of the IEEE. Prof. Toumazou is apast Associate Editor of the IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS,and is an editor for the IEE Electronics Letters. He is currently Vice-Presidentfor Technical Activities for the IEEE Circuits and Systems Society and is alsoa Life Member of the Electronics Society of Thailand. His research interestsinclude high frequency analogue integrated circuit design in bipolar, CMOSand GaAs technology and low power electronics for biomedical applications.He is co-winner of the IEE 1991 Rayleigh Best Book Award for his part inediting Analog IC Design: The Current-Mode Approach. He is also recipientof the 1992 IEEE CAS Outstanding Young Author Award for his work withDr. David Haigh on high speed GaAs opamp design, as well as co-winner ofthe 1995 IEE Electronics Letters Best Paper Premium. Chris has authored orcoauthored more than 200 publications in the field of analog electronics.

"log-domain state-space": a systematic transistor-level approach for log-domain filtering

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