UNIVERSITY OF DAR ES SALAAM

DEPARTMENT OF ELECTRONICS AND TELECOMMUNICATION ENGINEERING

COURSE TITLE: EXPERIMENTS IN DIGITAL ELECTRONICSCOURSE CODE: ES222COURSE WEIGHT: 2 UnitsINSTRUCTOR: Mr. Baraka MaiseliLABORATORY ENGINEER: Ms. Aloyce AgripinaTUTORIAL ASSISTANT: Mr. Nassor Ally

VENUE: Physics Building, PHLAB3TIME TABLE: Wednesday (08:00 HRS-10:55 HRS) Friday (08:00 HRS-10:55 HRS)

IntroductionThe world we live in has been developing every day in the field of Science and Technology. We have moved from the Analog world to the Digital world. In the digital world, one deals with ON and OFF signals. The ON signal is described as logic state HIGH while the OFF signal is described as logic state LOW. Various digital components manufactured from different companies exist. These components are capable to analyze and process digital information. Examples of digital components are counters, encoders, seven segment displays, registers, logic gates and so on. In this course, we are going to explore the features and functionalities of common and frequently used digital components.Course ObjectivesThe following are specific objectives of the course:a) Familiarization of digital components b) Realization of digital systems in a block formc) Design and implementation of digital circuits and systemsd) Realization of practical application examples of digital circuits and systemsApparatus and ToolsYou will be provided with the following materials and tools during practical sessions: Power Supply Unit (PSU), Function Generator (FGEN), Oscilloscope (SCOPE), connecting wires, jumpers, digital components and prototyping board. On your side, you are required to have a Digital Multimeter (DMM), electronics toolbox with all necessary tools and any simulation software (Multism, Proteus or Circuit Maker) installed in your laptop. Mode of Course DeliveryDue to limited number of laboratory facilities you will be organized in groups of four students to share the available laboratory resources. For a given laboratory session, all groups will be given the same experimental problem. Where necessary a brief theory of a given laboratory work will be provided. It is, however, strongly recommended to revise the concepts of the courses Digital Electronics I and II.Course Evaluation Each student will be evaluated independently. The marks will be given on the spot at the time you submit your complete design to the course instructor. Upon submission of the design a few oral questions will be asked to each student in a group to measure understanding and involvement capabilities towards the given design problem. You are not required to write a lengthy laboratory report. What is needed is to let your complete designed circuit along with answers to the given questions checked by the course instructor or laboratory assistant or laboratory engineer and marks will be awarded at that instant. At the end of the course an average for all marks you acquired during practical sessions will be taken. The criteria which will be used during evaluation process are:a) Quality of the designb) Involvement and participation of an individual in a groupc) Correctness of the answers to the given problemsd) Attitude and commitment towards practical workCourse Contents1. Laboratory Assignment One: Digital Timing Circuits and Clock Generators(a) LM555 Timer Circuits Monostable Operation Mode Astable Operation Mode(b) NOT Gate Square Wave Generator(c) NAND Gate Square Wave Generator2. Laboratory Assignment Two: Operation and Functions of Digital Components(a) Seven Segment Display(b) BCD to Seven Segment Decoder(c) Encoder(d) Decoder(e) Counter(f) Shift Registers(g) Multiplexer(h) Demultiplexer3. Laboratory Assignment Three: Interfacing Digital Components and Systems(a) Encoder, Decoder and Seven Segment(b) Counter and Seven Segment(c) PISO shift register and SIPO shift register(d) Multiplexer and Demultiplexer4. Laboratory Assignment Four: Design and Implementation of Practical Digital Circuits and Systems

LABORATORY ASSIGNMENT ONEDIGITAL TIMING CIRCUITS AND CLOCK GENERATORS

(A) LM555 TIMER CIRCUITSThe LM555 timer is a popular IC that has been used over years for various applications. It suit both hobby and industrial projects. With LM555 timer one can ideally create any timing circuit. In many occasions, this chip is used to control timing of digital systems. Typical applications of this chip are: Precision Timing Pulse Generation Sequential Timing Time Delay Generation Pulse Width Modulation Pulse Position Modulation and Linear Ramp GenerationExamples of time dependent applications which can benefit from this chip are elevator control systems, production line systems, police siren systems and traffic light control systems. The LM556 is a dual LM555 timing circuit in a sense that it contains two LM555 timers contained in a single package. In this laboratory assignment, you will be introduced to the general features of an LM555/556 chip and its applications. Figure A1 illustrates the pinout of an LM555 timer and table A1 shows the function each pin serves.

Figure A1: The 555 Timer PinoutPin No.NameFunction

1Ground (GND)Reference Voltage

2Trigger (TR)Triggers the timer to start the timing sequence. If this pin goes LOW the output Q goes HIGH and remains at this state until the timer times out. The triggering circuitry of the timer is activated when the voltage at the TR pin falls below 1/3 of the supply voltage VCC.

3Output (Q)Drives the external circuitry. It is driven LOW when either Threshold (TH) pin is taken HIGH or Reset (R) pin is taken LOW.

4Reset (R)Resets the system. It drives the output Q LOW regardless of the state of the circuit. When not used this pin is connected to VCC.

5Control Voltage (CV)Used in a Voltage-Controlled mode when a user wants to control the width of the output pulse irrespective of the R1C1 timing network. If this pin is not used it is recommended to connect to ground through a bypass ceramic capacitor of about 0.01F to give the circuit immunity against noise. In the absence of a capacitor we may experience false triggering.

6Threshold (TH)Drives the output LOW when the voltage applied to it just exceeds 2/3 of the supply voltage VCC.

7Discharge (DC)Discharges the timing capacitor C1 to ground when the output Q goes LOW.

8Supply Voltage (VCC)Power Supply Voltage

Table A1: Functions of Pins of LM555 TimerMonostable (Single-Shot) Operation of LM555 Timer

The LM555 timer can be configured to produce a pulse of a fixed duration at its output. This is called a Monostable operation because the output has a single stable state, HIGH or LOW. In this mode, the output goes HIGH for a predefined amount of time when the Trigger pin is pulled LOW. The state of the output pin can be interrupted at any stage by issuing a LOW signal on the reset pin. Figure A2 illustrates Monostable operation of an LM555 timer. The timing components of the system are resistor R1 and capacitor C1. If the TR pin is pulled LOW the output Q goes HIGH for a duration of T=1.1R1C1. In this circuit, R1=47k and C1=100F. Thus, the duration for the output of the timer to stay in the HIGH state when the trigger pin is pulled LOW is 1.1x47x1000x100x0.0000015seconds. Notice that the minimum value of R1 should be 1K to prevent much current to flow into the TR pin of the chip and hence damaging its internal circuitry. The maximum value of R should be 1M so that enough current can flow into the TR pin of the chip and there is current to allow for the electrolytic capacitors leakage current. The minimum value of C1 should be 100pF to avoid the timing equation being too far off. The maximum value of C1 should be 1000F because a bigger capacitor will discharge too much current through the TR pin of the chip. Using these minimum and maximum conditions, we can achieve minimum timing duration of 0.1s and maximum timing duration of 1000s.

Figure A2: Monostable Operation of an LM555 timerFrom the given circuit in figure B4, the decoupling (bypass) capacitor C3 decouples the supply voltage VCC. This prevents unwanted ripple signals from the supply to interfere the functioning of circuit internal parts. If this capacitor is not included we may experience false triggering of the circuit while a button connected to TR pin of the timer is not pressed.Questions(a) Mount the circuit on the prototyping board and test its functionality.(b) Redesign the circuit to provide a timing sequence of your choice.(c) Do you think the circuit is ideal for high precision time critical applications? Explain.(d) Suggest two application examples which can benefit from the design.Astable Operation of LM555 TimerThis is a free running operation mode in which the timer output does not stay in a single stable state. The output toggles between LOW and HIGH logic states; resulting into formation of continuous train of square or rectangular pulses. Figure A3 illustrates an LM555 timer configured to operate in Astable mode. The figure shows a slightly modified copy of a Monostable circuit presented in figure A2. In this figure, the Threshold (TR) terminal is connected to the Trigger (TR) terminal to allow for an automatic self-retriggering of the device. When the circuit is just powered, the capacitor C1 starts to charge up through the resistors R1 and R2. When the voltage VC across the terminals of the capacitor reaches 2/3 of the supply voltage VCC, hence the voltage at the terminals TR and TH, the circuit becomes triggered. Consequently, the output Q toggles and becomes HIGH. The HIGH state of the output will be maintained for a period of T1=0.693(R1+R2)C after which it becomes LOW. The LOW state of the output Q enables the internal discharge transistor of the timer hence causing the capacitor C1 to start discharging. The discharging process takes a period of T2=0.693R2C1. The process of discharging is done through the resistor R2 only because the discharge pin (DC) of the timer has low impedance to ground during LOW states of the output signal. When the capacitor C1 discharges to 1/3 of the supply voltage VCC the discharge transistor in the timer becomes disabled and the capacitor starts to charge again. This process repeats continuously, leading to generation of rectangular train of pulses at the output Q of the timer.

Figure A3: Astable Operation of LM555 Timer

Thus, the period of a signal is T=T1+T2=0.693(R1+R2)C1 +0.693R2C1=0.693(R1+2R2)C1 and the frequency of a signal is .

It is interesting also to determine the duty cycle (also called mark-to-space) of the output signal. The term duty cycle refers to the percentage of time in which a system (LM555 timer in this case) spends in the active state measured as a fraction of the total time under consideration. It is given by the formula, where TON is a time spent during HIGH or ON state and TOFF is the time spent during the LOW or OFF state. Figure A4 shows a rectangular signal from which a duty cycle can be deduced. Recall that TON=0.693(R1+R2)C1 and TOFF=0.693R2C1. Thus, the duty cycle formula reduces to. Using this formula, the output duty cycle can be varied between 50% and 100%. When R2 is very small compared to R1 the duty cycle is 100% and when R2 is much larger than R1 the duty cycle is 50%. The problem with this circuit is that the duty cycle cannot be regulated to below 50% because the TON cannot be shorter that the TOFF. From the given formulae, TON=0.693(R1+R2)C1 must always be greater or equal to TOFF=0.693R2C1. One way to overcome this challenge is to connect a diode in parallel with the resistor R2. If this is done, the capacitor C1 charges through R1 only and discharges as usual through R2. Thus, TON=0.693R1C1 and TOFF=0.693R2C1. Therefore, the duty cycle becomes:

. With this formula, the duty cycle can be varied from 0% to 100%. Figure A5 illustrates an LM555 timer used to dim an array of five LEDs by changing their duty cycles through a variable resistor RV1. Notice from the figure that diode D1 in parallel with resistor R2 is added to allow flexibility in varying the duty cycle from 0% to 100%. TON=T1, TOFF=T2

TOFFTON

Figure A4: Duty Cycle of a Rectangular SignalUse figure A5 to attempt the following laboratory activity.Questions(a) Mount the circuit on a prototyping board(b) Vary a variable resistor RV1 from minimum to its maximum value. What changes to you observe on the brightness of LEDs? Explain your observation.(c) Connect one channel of the oscilloscope to the output Q of the timer. While varying the variable resistor RV1 from minimum to maximum value, observe the nature of a signal on the screen of the oscilloscope for different values of RV1. What changes do you see? Explain your observation. (d) What technical name is given to the phenomenon observed in (c) above? What does it mean?(e) Suggest one possible typical application of the circuit.

Figure A5: Varying LED Brightness Using LM555 TimerOne of a very nice and simple to build project using the LM555 timer configured in Astable mode is the Electronic Metronome. A Metronome is an electronic device used to mark time in pieces of music by producing a regular and recurring musical beat or click. Using LM555 timer in Astable mode, a simple metronome can be made by adjusting the output frequency to generate different tempo or beats per minute. If the output of a timer is set to a tempo of 60 beats per minute, for example, it means one bit occurs every one second. In electronics terms, this is equivalent to 1Hz. Table A2 illustrates different frequencies required for a metronome circuit shown in figure A6. Table A3 illustrates different values of the variable resistor RV1 for different corresponding frequencies. Musical DefinitionRateBeats per MinuteCycle Time (T)Frequency

Larghetto Very Slow601Sec1.0 Hz

Andante Slow90666ms1.5Hz

ModeratoMedium120500ms2.0Hz

AllegroFast150400ms2.5Hz

PrestoVery Fast180333ms3.0Hz

Table A2: Metronome Frequency TablePosition of RV1Beats per Minute

71.6K60

47.5K90

35.6K120

28.4K150

23.5K180

Figure A6: Beats per Second for Different Values of RV1

Figure A6: Astable LM555 Electronic MetronomeUse the circuit shown in figure A6 to attempt the following questions.Questions(a) Build the circuit on a prototyping board (b) Vary a variable resistor RV1 from minimum to maximum. What changes to you hear on the nature and pitch of sound produced from a speaker? Explain the cause of the changes observed.(c) What can be one possible application of the circuit?

Another interesting project which uses LM555 timer configured in Astable mode is a Voltage Controlled Oscillator (VCO). The VCO (also called a Voltage to Frequency converter) is an oscillator whose output frequency depends on the variation of the input voltage. That is to say, the frequency of the output waveform changes in response to the change of the input voltage. Recall the internal circuitry of the 555 timer. The inverting input of the upper comparator is directly connected to pin 5 (Control Voltage or CV). This pin is used to control the threshold and triggering levels. When not used the pin is usually connected to ground through a small capacitor of 0.01F or 10nF. In this case, the reference voltage at the inverting terminal of the upper comparator is internally set to through a potential divider network. However, in the VCO applications this pin is used to acquire varying voltages from the voltage source or some other device. If the voltage at pin 5 is increased the charging capacitor takes longer to charge and discharge. Consequently, the frequency of the output waveform is decreased. Conversely, if the voltage at pin 5 is decreased the charging capacitor takes shorter to charge and discharge, resulting into output waveform of low frequency. Figure A7 illustrates an LM555 timer configured to operate as a voltage-controlled oscillator. From the illustration, a pot RV2 connected to CV terminal of the device is used to vary voltages from 0V to VCC. The voltage across the timing capacitor C1 varies from to VCONTROL, where VCONTROL stands for the voltage going to CV pin set by RV2 pot. The diodes D1 and D2 prevents a transistor Q1 from being damaged due to back e.m.f generated when the device is switched ON and OFF continuously. The driving transistor Q1 is used to boost the current and voltage from the output pin Q of the device, hence making a speaker to produce louder sound. In many occasions, a power transistor such as TIP41A or 2N3055 is connected at the output Q to amplify the sound signal produced by a loudspeaker.

Figure A6: Voltage Controlled Oscillator Using LM555 TimerQuestions(a) Mount the circuit presented in figure A6 on the prototyping board(b) What changes do you realize for the pitch of sound produced on the loudspeaker when pot RV2 is varied from minimum to maximum? (c) Clearly explain the causes for the changes of sound pitch observed in (b) aboveThe circuit presented in figure A6 can be extended to make a Police Siren (Dee-Dah or Warble-Tone Alarm). Figure A7 illustrates a circuit which can produce a Dee-Dah sound effect similar to that observed in a Police Siren system. From the figure, the output Q of the first LM555 timer on the left side is fed to Control Voltage CV input pin of the second LM555 timer through a resistor R2. The first timer is configured to produce a low frequency note while the second timer is configured to produce a high frequency note. The output Q of the first timer frequency modulates the output Q of the second timer by varying the voltage at its Control Voltage pin.

Figure A7: Police Siren Using LM555 TimerQuestions(a) Mount the circuit on a prototyping board(b) While varying the values of RV1 and RV2 interchangeably from minimum to maximum, observe the changes of the sound pitch produced at the loudspeaker. Keep fixed the values of RV1 and RV2 when you hear sound from a loudspeaker similar to that of a police siren.(c) Briefly explain the principle of operation of the device.

(B) NOT Gate Square Wave GeneratorA NOT gate can be briefly defined as a logic circuit which is capable to invert the input logic state. It has one output and only accepts a single input. The output of a NOT gate is logic state HIGH if its input is logic state LOW and logic state LOW if its input is logic state HIGH.

In one of its applications, a NOT gate can be configured to operate as a Square Wave Generator. In this configuration, a NOT gate operates as an Astable multivibrator or oscillator because it produces at its output continuous train of rectangular pulses of a given frequency and duty cycle. Figure B1 illustrates a NOT gate configured in Astable mode.

Figure B1: NOT Gate Astable Multivibrator

From the illustration provided in figure B1, assume initially the input of gate N1 is logic HIGH and consequently its output is logic state LOW. The capacitor C1 starts charging through the resistor R1 and the input of the first NOT gate N2 is kept at logic state LOW until C1 becomes fully charged. When fully charged, C1 can no longer hold the input of N2 to logic state LOW and thus toggles it to logic state HIGH. Consequently, the output of N2, and hence the input of N1, becomes logic state LOW and the output of N1 becomes logic state HIGH. The capacitor C1 starts to discharge through R1 and when it is fully discharged the circuit returns to the original conditions and the cycle repeats all over. This causes the system to oscillate. The frequency of oscillations of the system is determined by two components; resistor R1 and capacitor C1. Resistor R2 is normally very small compared to R1 and it contributes insignificant effect on the frequency of the output signal. Mathematically, If R2=R1, then If R2